A one-time programmable memory based on MRAM

Abstract

The application discloses a one-time programmable memory based on MRAM and relates to the field of semiconductor manufacturing.The one-time programmable memory based on MRAM comprises a storage unit, a reference unit and a comparison circuit, wherein the storage unit comprises a first magnetic tunnel junction, and the equivalent resistance of a first metal column in the storage unit is much smaller than the equivalent resistance of the first magnetic tunnel junction in a parallel state, so that the equivalent resistance of the storage unit is mainly determined by the state of the first magnetic tunnel junction; the storage principle and structure of the storage unit in the application are consistent with MRAM, so that the same production process can be used to produce MRAM, the one-time programmable storage unit and the one-time programmable memory, the production cost is reduced, and the production process is simplified.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a one-time programmable memory based on MRAM. Background Technology

[0002] One-time programmable memory (IPM) is a type of non-volatile memory that can only be programmed once and cannot be modified afterward. Therefore, IPM is often used to store reliable data that needs to be repeatedly accessed, including configuration information for memory chips, such as trim information, failure addresses, device IDs, and manufacturing IDs. IPM consists of memory cells and reference cells. The equivalent resistance of the memory cell corresponding to the stored data "0" is different from that corresponding to the stored data "1". When reading data, the equivalent resistance of the memory cell and the equivalent resistance of the reference cell are used to determine whether the data stored in the IPM is "0" or "1".

[0003] MRAM (Magnetic Random Access Memory) is a non-volatile vortex random access memory that uses the magnetoresistance effect of a magnetic tunnel junction to store and retrieve data. The equivalent resistance of a magnetic tunnel junction differs in its short-circuit, parallel, and antiparallel states. Therefore, during data storage, the state of the magnetic tunnel junction is changed, thereby altering its equivalent resistance. The data stored in the MRAM is then retrieved based on the equivalent resistance of the magnetic tunnel junction and a preset read resistance.

[0004] One-time programmable memory (IPM) and MRAM are both commonly used memory types, but due to their different manufacturing processes, they need to be produced on separate production lines, resulting in higher production costs and a more complicated production process. Summary of the Invention

[0005] The purpose of this invention is to provide a one-time programmable memory based on MRAM, which can be manufactured using the same production process as MRAM, thereby reducing production costs and simplifying the production process.

[0006] To address the aforementioned technical problems, this invention provides a one-time programmable memory based on MRAM, comprising a storage cell, a reference cell, and a comparison circuit. The storage cell includes a first top metal line, a first bottom metal line, N first top vias, N first bottom vias, and N storage sub-cells, where N is a positive integer.

[0007] The storage sub-unit includes a first metal pillar and a first magnetic tunnel junction;

[0008] The first ends of N first metal pillars are respectively connected to the first ends of N magnetic tunnel junctions one by one; the second ends of N first metal pillars are respectively connected to the first ends of N first bottom through holes; the second ends of N magnetic tunnel junctions are respectively connected to the first ends of N first top through holes; the second ends of N first bottom through holes are all connected to the first bottom metal wire; and the second ends of N first top through holes are all connected to the first top metal wire.

[0009] The first input terminal of the comparison circuit is connected to the storage cell, and the second input terminal is connected to the reference cell, for outputting a high level or a low level based on the equivalent resistance of the storage cell and the equivalent resistance of the reference cell.

[0010] Preferably, the equivalent resistance of the first metal pillar is much smaller than the equivalent resistance of the first magnetic tunnel junction when it is in a parallel state.

[0011] Preferably, the storage sub-unit further includes a first bottom electrode disposed between the first metal pillar and the first bottom through hole.

[0012] Preferably, the first metal column is made of tungsten, titanium, or tantalum.

[0013] Preferably, the reference unit includes a second top metal line, a second top through hole, a second bottom metal line, a connecting layer, a second bottom through hole, and M second metal pillars, wherein the equivalent resistance of the second metal pillars is much greater than the equivalent resistance of the connecting layer, and M is a positive integer not less than 2.

[0014] The connecting layer is used to connect M second metal pillars in series. The first end of the M second metal pillars connected in series is connected to the second top through hole. The second end of the M second metal pillars connected in series is connected to the second bottom through hole. The second bottom through hole is connected to the second bottom metal wire. The second top through hole is connected to the second top metal wire.

[0015] Preferably, it also includes a second bottom electrode;

[0016] The second bottom electrode is disposed between the second end of the M second metal pillars connected in series and the second bottom through hole.

[0017] Preferably, the connecting layer is a second magnetic tunnel junction and / or a metal connecting layer.

[0018] Preferably, the material of the second metal column is tungsten, titanium, or tantalum.

[0019] Preferably, it also includes a gating circuit and a reading circuit;

[0020] The read circuit is used to read the level output of the comparator circuit connected to the memory cell selected by the gating circuit.

[0021] Preferably, the equivalent resistance of the reference cell is half the sum of the equivalent resistances of each of the magnetic tunnel junctions in the memory cell when they are in a short-circuit state and the equivalent resistances of each of the magnetic tunnel junctions when they are in a parallel state.

[0022] This invention provides a one-time programmable memory based on MRAM, which includes a storage cell, a reference cell, and a comparator circuit. The storage cell includes a first magnetic tunnel junction, and the equivalent resistance of the first metal pillar in the storage cell is much smaller than the equivalent resistance when the first magnetic tunnel junction is in a parallel state. Therefore, the equivalent resistance of the storage cell is mainly determined by the state of the first magnetic tunnel junction. The storage principle and structure of the storage cell in this invention are consistent with those of MRAM. Therefore, MRAM and MRAM-based one-time programmable memories can be produced using the same manufacturing process, reducing production costs and simplifying the manufacturing process. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the prior art and embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 A schematic diagram of a one-time programmable memory based on MRAM provided by the present invention;

[0025] Figure 2 A schematic diagram of the structure of a reference cell in a one-time programmable memory based on MRAM provided by the present invention;

[0026] Figure 3 A schematic diagram of the structure of a reference cell in another MRAM-based one-time programmable memory provided by the present invention;

[0027] Figure 4 A schematic diagram of the structure of a reference cell in another MRAM-based one-time programmable memory provided by the present invention;

[0028] Figure 5 A schematic diagram of the structure of a reference cell in another MRAM-based one-time programmable memory provided by the present invention;

[0029] Figure 6A schematic diagram of the structure of a reference cell in another MRAM-based one-time programmable memory provided by the present invention;

[0030] Figure 7 A graph showing the equivalent resistance of a reference cell in a one-time programmable memory based on MRAM, provided by the present invention. Detailed Implementation

[0031] The core of this invention is to provide a one-time programmable memory based on MRAM, which can be manufactured using the same production process as MRAM, thereby reducing production costs and simplifying the production process.

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] Please refer to Figure 1 , Figure 1 The present invention provides a schematic diagram of a one-time programmable memory based on MRAM. The one-time programmable memory based on MRAM includes a storage unit 01, a reference unit 02 and a comparison circuit 03. The storage unit 01 includes a first top metal line 11, a first bottom metal line 12, N first top through holes 13, N first bottom through holes 14 and N storage sub-units, where N is a positive integer.

[0034] The storage sub-unit includes a first metal pillar 15 and a first magnetic tunnel junction 16;

[0035] The first ends of N first metal pillars 15 are respectively connected to the first ends of N magnetic tunnel junctions one by one; the second ends of N first metal pillars 15 are respectively connected to the first ends of N first bottom through holes 14; the second ends of N magnetic tunnel junctions are respectively connected to the first ends of N first top through holes 13; the second ends of N first bottom through holes 14 are all connected to the first bottom metal wire 12; and the second ends of N first top through holes 13 are all connected to the first top metal wire 11.

[0036] The first input terminal of the comparator circuit 03 is connected to the storage cell 01, and the second input terminal is connected to the reference cell 02. It is used to output a high level or a low level based on the equivalent resistance of the storage cell 01 and the equivalent resistance of the reference cell 02.

[0037] One-time programmable memory (OTP) and micro-RAM are both commonly used memory types. In standard logic CMOS technology, OTP memory has three types of memory elements: floating-gate transistors, fuses, and antifuse. For example, polysilicon fuses are typically programmed bit-by-bit, resulting in slower programming speeds, higher current draw, and higher power consumption. The selection transistors and programming circuits used to drive the high current also have large areas. Due to the high temperatures during programming, an isolation area is required around the fuse, further increasing the cell size. However, because these types of OTP and MRAM store data using different principles, their internal structures differ, leading to different manufacturing processes. Memory manufacturers need to produce OTP and MRAM separately on different production lines, resulting in higher and more complex production costs.

[0038] To solve the above technical problems, based on the principle that the equivalent resistance of a magnetic tunnel junction is different in the short-circuit state, parallel state and anti-parallel state, this application uses the magnetic tunnel junction as part of the storage cell 01 in the one-time programmable memory based on MRAM.

[0039] Specifically, the MRAM-based one-time programmable memory in this application includes a storage cell 01, a reference cell 02, and a comparator circuit 03. The comparator circuit 03 outputs a high or low level based on the equivalent resistance of the storage cell 01 and the equivalent resistance of the reference cell 02. The equivalent resistance of the storage cell 01 differs depending on the stored data, while the equivalent resistance of the reference cell 02 remains unchanged regardless of the stored data. The storage cell 01 achieves the purpose of different equivalent resistances when storing different data based on the magnetoresistive effect of the first magnetic tunnel junction 16. For example, when storing "0" in the storage cell 01 through the MRAM-based one-time programmable memory, the first magnetic tunnel junction 16 in the storage cell 01 is controlled to be in a short-circuit state. When storing "1" in the storage cell 01, the first magnetic tunnel junction 16 in the storage cell 01 needs to be controlled to be in a parallel state. In short, the state of the first magnetic tunnel junction 16 in the storage cell 01 is different when storing different logic states. When reading data from memory cell 01, comparator circuit 03 outputs a high or low level based on the equivalent resistance of memory cell 01 and the equivalent resistance of reference cell 02. The output of comparator circuit 03 represents the magnitude relationship between the equivalent resistance of memory cell 01 and the equivalent resistance of reference cell 02. For example, comparator circuit 03 outputs a low level when the equivalent resistance of memory cell 01 is less than the equivalent resistance of reference cell 02.

[0040] For example, the equivalent resistance of reference cell 02 is between the equivalent resistance of storage cell 01 when it is in a short-circuit state and the equivalent resistance of storage cell 01 when it is in a parallel state. When storing logic state "0", a breakdown voltage is applied to put storage cell 01 into a short-circuit state; when storing logic state "1", storage cell 01 is controlled to enter a parallel state. Comparison circuit 03 outputs a low level when the equivalent resistance of storage cell 01 is less than the equivalent resistance of reference cell 02, and a high level otherwise. When reading data stored in storage cell 01 of the one-time programmable memory, this can be achieved by reading the output level of comparison circuit 03. For example, if comparison circuit 03 outputs a low level, it can be determined that the equivalent resistance of storage cell 01 is less than the equivalent resistance of reference cell 02, meaning that storage cell 01 is in a short-circuit state and the corresponding logic state of storage cell 01 is "0". The comparison circuit can be a comparator, and this application does not impose any particular limitation on it.

[0041] For details, please refer to Figure 1 , Figure 1 This is a schematic diagram of a one-time programmable memory based on MRAM provided by the present invention. IN1 is the equivalent resistance of storage cell 01, IN2 is the equivalent resistance of reference cell 02, and IOUT is the output level of comparator circuit 03. Storage cell 01 includes a first top metal line 11, a first bottom metal line 12, N first top vias 13, N first bottom vias 14, and N storage sub-cells, wherein the storage sub-cells include a first metal pillar 15 and a first magnetic tunnel junction 16.

[0042] The storage sub-cell is connected to the first top metal line 11 through the first top through-hole 13, and to the first bottom metal line 12 through the first bottom through-hole 14. Finally, it is connected to the first input terminal of the comparator circuit 03 through the first top metal line 11 and the first bottom metal line 12 so that the comparator circuit 03 can output a level.

[0043] In summary, this invention provides a one-time programmable memory based on MRAM, including a storage cell 01, a reference cell 02, and a comparator circuit 03. The storage cell 01 includes a first magnetic tunnel junction 16, and the equivalent resistance of the first metal pillar 15 in the storage cell 01 is much smaller than the equivalent resistance when the first magnetic tunnel junction 16 is in a parallel state. Therefore, the equivalent resistance of the storage cell 01 is mainly determined by the state of the first magnetic tunnel junction 16. The storage principle and structure of the storage cell 01 in this invention are consistent with those of MRAM. Therefore, MRAM and MRAM-based one-time programmable memories can be produced using the same manufacturing process, reducing production costs and simplifying the manufacturing process.

[0044] Based on the above embodiments:

[0045] In a preferred embodiment, the equivalent resistance of the first metal pillar is much smaller than the equivalent resistance of the first magnetic tunnel junction when it is in a parallel state.

[0046] Considering that in some extreme cases, if the equivalent resistance of the first metal pillar 15 is too large or even close to the equivalent resistance when the first magnetic tunnel junction 16 is in a parallel state, even if the first magnetic tunnel junction 16 in the memory cell 01 is in a short-circuit state, the equivalent resistance of the memory cell 01 will be affected by the interference of the equivalent resistance of the first metal pillar 15, causing the output of the comparator circuit 03 to be abnormal, which in turn causes the one-time programmable memory cell to be abnormal. To avoid the above problems, the equivalent resistance of the first metal pillar 15 needs to be much smaller than the equivalent resistance when the first magnetic tunnel junction 16 is in a parallel state.

[0047] In summary, in this embodiment, the equivalent resistance of the first metal pillar 15 is much smaller than the equivalent resistance of the first magnetic tunnel junction 16 when it is in a parallel state, which further ensures the reliability of the one-time programmable memory based on MRAM.

[0048] In a preferred embodiment, the storage sub-unit further includes a first bottom electrode 17 disposed between the first metal pillar 15 and the first bottom through hole 14.

[0049] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a one-time programmable memory based on MRAM provided by the present invention. In this embodiment, a first bottom electrode 17 is also provided between the first metal pillar 15 and the first bottom through hole 14, which can block the diffusion between the first metal pillar 15 and the first bottom through hole 14, thereby ensuring the storage performance of the one-time programmable memory based on MRAM.

[0050] In a preferred embodiment, the first metal pillar 15 is made of tungsten, titanium, or tantalum.

[0051] In this embodiment, considering the different properties of tungsten, titanium, and tantalum, such as tungsten's stable chemical properties, titanium's high strength, and tantalum's high melting point, high density, and acid resistance, the material of the first metal column 15 can be selected according to the actual application requirements, and this application does not impose any special limitations on it.

[0052] In a preferred embodiment, the reference unit 02 includes a second top metal line 21, a second top through hole 22, a second bottom metal line 23, a connecting layer 25, a second bottom through hole 24, and M second metal pillars 26, wherein the equivalent resistance of the second metal pillars 26 is much greater than the equivalent resistance of the connecting layer 25, and M is a positive integer not less than 2.

[0053] The connecting layer 25 is used to connect M second metal pillars 26 in series. The first end of the M second metal pillars 26 connected in series is connected to the second top through hole 22. The second end of the M second metal pillars 26 connected in series is connected to the second bottom through hole 24. The second bottom through hole 24 is connected to the second bottom metal wire 23. The second top through hole 22 is connected to the second top metal wire 21.

[0054] In this embodiment, considering that the equivalent resistance of the reference unit 02 does not need to change with different stored logic states, a material with stable resistance can be used as part of the reference unit 02. Specifically, M second metal pillars 26 are connected in series through a connecting layer 25, with one end connected to the second top through-hole 22 and the other end connected to the second bottom through-hole 24. Then, the second top through-hole 22 is connected to the second top metal line 21, and the second bottom through-hole 24 is connected to the second bottom metal line 23 to connect to the comparator circuit 03. Through the above parts, the reference unit 02 provides a stable reference resistance.

[0055] Furthermore, the equivalent resistance of the reference cell 02 can be a value between the equivalent resistance of the storage cell 01 when it is in a short-circuit state and the equivalent resistance of the storage cell 01 when it is in a parallel state; this application does not impose any particular limitation on this.

[0056] In a preferred embodiment, a second bottom electrode 27 is also included;

[0057] The second bottom electrode 27 is disposed between the second end of the M second metal pillars 26 connected in series and the second bottom through hole 24.

[0058] In this embodiment, a second bottom electrode 27 is also provided between the second metal pillar 26 and the second bottom through hole 24, which can block diffusion between the second metal pillar 26 and the second bottom through hole 24, thereby ensuring the storage performance of the one-time programmable memory unit and the one-time programmable memory.

[0059] In a preferred embodiment, the connecting layer 25 is a second magnetic tunnel junction and / or a metal connecting layer.

[0060] In this embodiment, the connecting layer 25 of the M second metal pillars 26 connected in series can be a second magnetic tunnel junction, a metal connecting layer, or a combination of a second magnetic tunnel junction and a metal connecting layer. This application does not make any special limitation on this.

[0061] Please refer to Figure 2 , Figure 2 This is a schematic diagram of a reference cell in a one-time programmable memory based on MRAM provided by the present invention. The connection layer 25 is composed of a second magnetic tunnel junction and a metal connection layer. The reference cell 02 is produced using the same material required to produce the memory cell 01. Figure 2The uppermost connecting layer 25 is the second magnetic tunnel junction. Figure 2 The lower connecting layer 25 consists of the second bottom electrode 27, the second bottom through hole 24, and the second bottom metal wire 23, all of which are made of metal. M second metal pillars 26 are connected in series through the connecting layer 25.

[0062] Please refer to Figure 3 , Figure 3 This is a schematic diagram of the structure of a reference cell in another MRAM-based one-time programmable memory provided by the present invention. Figure 3 The uppermost connecting layer 25 is the top electrode. Figure 3 The lower connecting layer 25 is a metal connecting layer made of the same material as the second bottom electrode 27, the second bottom through hole 24 and the second bottom metal wire 23.

[0063] Please refer to Figure 4 , Figure 4 This is a schematic diagram of a reference cell in another MRAM-based one-time programmable memory provided by the present invention. The connection layer 25 is composed of a second magnetic tunnel junction and a metal connection layer. Figure 4 The material of the upper connecting layer 25 is the same as that of the second top metal wire 21, the second top through hole 22, and the second magnetic tunnel junction. Figure 4 The material of the lower connecting layer 25 is the same as that of the second bottom electrode 27, the second bottom through hole 24 and the second bottom metal wire 23.

[0064] Please refer to Figure 5 , Figure 5 This is a schematic diagram of a reference cell in another MRAM-based one-time programmable memory provided by the present invention. The connection layer 25 is a metal connection layer. Figure 5 The material of the upper connecting layer 25 is the same as the material of the second top metal wire 21 and the second top through hole 22. Figure 5 The material of the lower connecting layer 25 is the same as that of the second bottom electrode 27, the second bottom through hole 24 and the second bottom metal wire 23.

[0065] Please refer to Figure 6 , Figure 6 This is a schematic diagram of a reference cell in another MRAM-based one-time programmable memory provided by the present invention. The connection layer 25 is a metal connection layer. Figure 6 The material of the upper connecting layer 25 is the same as that of the top electrode, the second top metal line 21, and the second top through hole 22. Figure 6 The material of the lower connecting layer 25 is the same as that of the second bottom electrode 27, the second bottom through hole 24 and the second bottom metal wire 23.

[0066] In summary, the reference unit 02, which is made of the same material as the storage unit 01, can be implemented in various ways, and the appropriate method can be selected based on actual production conditions. This application does not impose any particular limitation on this method. The reference unit 02 is ultimately connected to the second input terminal of the comparator circuit 03 via the second top metal line 21 and the second bottom metal line 23.

[0067] In a preferred embodiment, the second metal column 26 is made of tungsten, titanium, or tantalum.

[0068] In this embodiment, considering the different properties of tungsten, titanium, and tantalum, such as tungsten's stable chemical properties, titanium's high strength, and tantalum's high melting point, high density, and acid resistance, the material of the first metal column 15 can be selected according to the actual application requirements, and this application does not impose any special limitations on it.

[0069] As a preferred embodiment, it also includes a gating circuit and a reading circuit;

[0070] The read circuit is used to read the output level of the one-time programmable memory cell selected by the gating circuit.

[0071] The read circuit is used to read the level output of the comparator circuit connected to the memory cell selected by the gating circuit.

[0072] In order to accurately read the data stored in the memory cell of the MRAM-based one-time programmable memory, a gating circuit is set in this application to select the target memory cell, and then the reading circuit reads the level output of the comparison circuit 03 connected to the memory cell selected by the gating circuit.

[0073] In a preferred embodiment, the equivalent resistance of the reference unit 02 is half the sum of the equivalent resistances of each magnetic tunnel junction in the storage unit 01 when they are in a short-circuit state and the equivalent resistances when they are in a parallel state.

[0074] Selecting a suitable reference cell 02 with appropriate equivalent resistance has a significant impact on accurately reading information stored in the MRAM-based one-time programmable memory. Please refer to [the relevant documentation / reference]. Figure 7 , Figure 7 This invention provides a graph illustrating the equivalent resistance of a reference cell in a one-time programmable memory (MRAM). The ideal equivalent resistance of reference cell 02 in a one-time programmable memory cell is (Rshort + Rp) / 2, where Rshort is the equivalent resistance when each magnetic tunnel junction in memory cell 01 is in a short-circuit state, Rp is the equivalent resistance when each magnetic tunnel junction is in a parallel state, Rap is the equivalent resistance when each magnetic tunnel junction is in an anti-parallel state, and Rref is the equivalent resistance of reference cell 02. Furthermore, referring to… Figure 7It can be found that the equivalent resistance of the actual manufactured reference unit 02 also has a certain fluctuation. As long as the fluctuation of the equivalent resistance is controlled within a certain range, it is acceptable.

[0075] In addition, in reality, the equivalent resistance of a magnetic tunnel junction in a short-circuit state after being broken down is very small, so the equivalent resistance of reference cell 02 can also be set to Rp / 2.

[0076] It should be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0077] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A one-time programmable memory based on MRAM, characterized in that, It includes a storage unit, a reference unit, and a comparison circuit. The storage unit includes a first top metal line, a first bottom metal line, N first top through holes, N first bottom through holes, and N storage sub-units, where N is a positive integer. The storage sub-unit includes a first metal pillar and a first magnetic tunnel junction; The first ends of N first metal pillars are respectively connected to the first ends of N magnetic tunnel junctions one by one; the second ends of N first metal pillars are respectively connected to the first ends of N first bottom through holes; the second ends of N magnetic tunnel junctions are respectively connected to the first ends of N first top through holes; the second ends of N first bottom through holes are all connected to the first bottom metal wire; and the second ends of N first top through holes are all connected to the first top metal wire. The first input terminal of the comparator circuit is connected to the memory cell, and the second input terminal is connected to the reference cell.

2. The one-time programmable memory based on MRAM as described in claim 1, characterized in that, The equivalent resistance of the first metal pillar is much smaller than the equivalent resistance of the first magnetic tunnel junction when it is in a parallel state.

3. The one-time programmable memory based on MRAM as described in claim 2, characterized in that, The storage sub-unit also includes a first bottom electrode disposed between the first metal pillar and the first bottom through hole.

4. The one-time programmable memory based on MRAM as described in claim 2, characterized in that, The first metal column is made of tungsten, titanium, or tantalum.

5. The one-time programmable memory based on MRAM as described in claim 1, characterized in that, The reference unit includes a second top metal line, a second top through hole, a second bottom metal line, a connecting layer, a second bottom through hole, and M second metal pillars, wherein the equivalent resistance of the second metal pillars is much greater than the equivalent resistance of the connecting layer, and M is a positive integer not less than 2. The connecting layer is used to connect M second metal pillars in series. The first end of the M second metal pillars connected in series is connected to the second top through hole. The second end of the M second metal pillars connected in series is connected to the second bottom through hole. The second bottom through hole is connected to the second bottom metal wire. The second top through hole is connected to the second top metal wire.

6. The one-time programmable memory based on MRAM as described in claim 5, characterized in that, It also includes a second bottom electrode; The second bottom electrode is disposed between the second end of the M second metal pillars connected in series and the second bottom through hole.

7. The one-time programmable memory based on MRAM as described in claim 5, characterized in that, The connecting layer is a second magnetic tunnel junction and / or a metal connecting layer.

8. The one-time programmable memory based on MRAM as described in claim 5, characterized in that, The second metal column is made of tungsten, titanium, or tantalum.

9. The one-time programmable memory based on MRAM as described in claim 1, characterized in that, It also includes a gating circuit and a reading circuit; The read circuit is used to read the level output of the comparator circuit connected to the memory cell selected by the gating circuit.

10. The one-time programmable memory based on MRAM as described in any one of claims 1 to 9, characterized in that, The equivalent resistance of the reference cell is half the sum of the equivalent resistances of each of the magnetic tunnel junctions in the memory cell when they are in a short-circuit state and the equivalent resistances of each of the magnetic tunnel junctions when they are in a parallel state.

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