Silicon single photon detector integrated on chip and method for manufacturing the same

Abstract

The application provides an on-chip integrated silicon single-photon detector and a preparation method thereof. The on-chip integrated silicon single-photon detector comprises a silicon nitride waveguide and a silicon mode-locked detector. The silicon nitride waveguide is used for receiving and transmitting incident light, and the wavelength of the incident light is 300 nm-1100 nm. The length direction of the silicon mode-locked detector is consistent with the light transmission direction in the silicon nitride waveguide, and the width direction of the silicon mode-locked detector is consistent with the current direction in the silicon mode-locked detector when the silicon mode-locked detector is powered on. The silicon mode-locked detector is arranged at intervals from the silicon nitride waveguide, and the silicon nitride waveguide is located at the upper part of the height direction of the silicon mode-locked detector. The silicon mode-locked detector is used for receiving the incident light coupled from the silicon nitride waveguide, and for converting the incident light into an electric signal when the silicon mode-locked detector is powered on. The on-chip integrated silicon single-photon detector solves the technical problem of low detection efficiency caused by the small absorption coefficient of the silicon material for near-infrared light close to 1100 nm.

Description

Technical Field

[0001] This application relates to the field of semiconductor optoelectronic device technology, and in particular to an on-chip integrated silicon single-photon detector and its fabrication method. Background Technology

[0002] Photons are ideal information carriers in quantum information technology, and single-photon detectors are the core components of optical quantum information technology. Similar to classical photonics, optical quantum integration is a key technology for improving performance and stability, reducing power consumption and size, and represents a major challenge in robustly moving quantum information technology from the laboratory to practical applications.

[0003] Indium gallium arsenide / indium phosphide (InGaAs / InP) single-photon detectors exhibit high absorption coefficients and detection efficiency for near-infrared light near 1100 nm. They are integrated on-chip with silicon waveguides via bonding processes. However, due to dislocations introduced by bonding, surface dangling bonds, and the high trap density of the material itself, dark counts are high, noise is significant, and afterpulse phenomena introduced by defects are severe, with long dead times drastically reducing the system's count rate. Superconducting nanowire single-photon detectors offer high detection efficiency for near-infrared light near 1100 nm. To address the single-photon detection problem in silicon-based integration, superconducting nanowires are embedded in silicon waveguides, enabling on-chip photon correlation measurements of non-classical photons. However, due to the mismatch between the superconducting nanowires and the silicon waveguide's optical field modes, the average single-photon detection efficiency at 3 K is only 10%, which is significantly lower than the detection efficiency of unintegrated superconducting nanowires (which can reach over 95%), severely impacting device performance. Furthermore, due to the limitations of the working principle of superconducting nanowires, the chip operating temperature is usually less than 4K, requiring a bulky and expensive cooling system, which severely restricts its application areas.

[0004] In addition, silicon has a complete crystal lattice and a high electron-hole ionization ratio, but it is limited by the intrinsic bandgap of silicon, that is, by the small absorption coefficient of silicon for near-infrared light at close to 1100 nm. As a result, silicon single-photon detectors have low detection efficiency for near-infrared light at close to 1100 nm, which limits the application of silicon single-photon detectors. Summary of the Invention

[0005] This application provides an on-chip integrated silicon single-photon detector and its fabrication method, which solves the problem of the difficulty in on-chip integration of silicon single-photon detectors, and also solves the technical problem of low detection efficiency caused by the small absorption coefficient of silicon material for near-infrared light at close to 1100nm.

[0006] The embodiments of this application provide the following technical solutions to solve the above-mentioned technical problems:

[0007] This application provides an on-chip integrated silicon single-photon detector, including:

[0008] A silicon nitride waveguide, wherein the silicon nitride waveguide is used to receive and transmit incident light, wherein the wavelength of the incident light is 300nm-1100nm;

[0009] A silicon guided-mode detector, wherein the length direction of the silicon guided-mode detector is consistent with the light transmission direction within the silicon nitride waveguide, and the width direction of the silicon guided-mode detector is consistent with the current direction within the silicon guided-mode detector when it is energized; the silicon guided-mode detector and the silicon nitride waveguide are spaced apart, and the silicon nitride waveguide is located at the upper part of the height direction of the silicon guided-mode detector; the silicon guided-mode detector is used to receive incident light coupled from the silicon nitride waveguide, and when the silicon guided-mode detector is energized, it is used to convert the incident light into an electrical signal.

[0010] The beneficial effects of the embodiments of this application are as follows: The on-chip integrated silicon single-photon detector provided in this application embodiment is configured with a silicon guided-mode detector and a silicon nitride waveguide spaced apart, with the silicon nitride waveguide located at the upper part of the silicon guided-mode detector in the height direction. This allows light transmitted in the silicon nitride waveguide to couple into the silicon guided-mode detector. The current direction of the silicon guided-mode detector is the same as the width direction of the silicon guided-mode detector. Light entering the silicon guided-mode detector enters the silicon guided-mode detector perpendicular to the current direction within the silicon guided-mode detector. The direction of light within the silicon guided-mode detector is perpendicular to the direction of the current. Therefore, the silicon guided-mode detector can achieve the desired electric field distribution within the silicon guided-mode detector by increasing the silicon guided-mode waveguide. The length of the detector is increased to enhance the absorption of near-infrared light at approximately 1100 nm by the silicon guided-mode detector. Once photogenerated charges are generated in the silicon guided-mode detector, they will separate and undergo collisional ionization under the influence of an electric field, thereby amplifying the signal. This solves the technical problem of low detection efficiency caused by the small absorption coefficient of silicon material for near-infrared light at approximately 1100 nm. Secondly, the on-chip integrated silicon single-photon detector provided in this application has a simple structure, and the silicon nitride waveguide and silicon guided-mode detector can be integrated on the same substrate, enabling the on-chip integrated silicon single-photon detector provided in this application to meet the requirements of integrated and miniaturized optoelectronic devices.

[0011] In one possible implementation, a grating coupler and a mode conversion structure are also included. The mode conversion structure is connected between the grating coupler and the silicon nitride waveguide. The mode conversion structure is used to convert the mode size of the grating coupler. The grating coupler is used to receive and transmit the input light.

[0012] The incident light incident on the grating coupler is transmitted through the grating coupler and the mode conversion structure and then incident on the silicon nitride waveguide.

[0013] In one possible implementation, the silicon conductive mode detector includes an avalanche region, an absorption region, a P-type ohmic contact region, an N-type ohmic contact region, a P-type ohmic contact electrode, and an N-type ohmic contact electrode.

[0014] The P-type ohmic contact electrode is disposed on the upper part of the P-type ohmic contact area, and the N-type ohmic contact electrode is disposed on the upper part of the N-type ohmic contact area;

[0015] The N-type ohmic contact region, the avalanche region, the absorption region, and the P-type ohmic contact region are arranged sequentially along the width direction of the silicon conductive mode detector.

[0016] In one possible implementation, the silicon nitride waveguide is located above the absorption region, and the orthographic projection of the silicon nitride waveguide onto the absorption region is located inside the absorption region.

[0017] In one possible implementation, a support layer is disposed between the silicon guided mode detector and the silicon nitride waveguide, the thickness of the support layer being less than 60 nm;

[0018] The refractive index of the support layer is less than that of silicon nitride, and the refractive index of the support layer is less than that of silicon.

[0019] In one possible implementation, the support layer is a silicon dioxide layer.

[0020] This application also provides a method for fabricating an on-chip integrated silicon single-photon detector, comprising the following steps:

[0021] A second silicon dioxide layer is deposited on a silicon substrate, the thickness of the second silicon dioxide layer being less than 60 nm. The silicon substrate includes a first silicon layer, a first silicon dioxide layer, and a second silicon layer stacked sequentially, with the second silicon dioxide layer deposited on top of the second silicon layer.

[0022] The second silicon layer is processed to form the initial structure of the silicon conductive mode detector;

[0023] A first silicon nitride layer is deposited on the second silicon dioxide layer;

[0024] A portion of the first silicon nitride layer is etched away to form a silicon nitride waveguide. The length direction of the silicon nitride waveguide is the same as the length direction of the silicon substrate. Light entering the silicon nitride waveguide is transmitted along the length direction of the silicon nitride waveguide.

[0025] A portion of the second silicon dioxide layer located on the upper part of the initial structure of the silicon guided mode detector is etched away. An electrode structure is then fabricated on the initial structure of the silicon guided mode detector with the portion of the second silicon dioxide layer etched away to form a silicon guided mode detector. When the silicon guided mode detector is energized, the direction of the current is the same as the width direction of the silicon guided mode detector. The silicon nitride waveguide is located on the portion of the initial structure of the silicon guided mode detector corresponding to the portion with the second silicon dioxide layer not etched away.

[0026] The beneficial effects of the on-chip integrated silicon single-photon detector fabrication method provided in this application embodiment are the same as those of the on-chip integrated silicon single-photon detector described above, and will not be repeated here.

[0027] In one possible implementation, the method for processing the second silicon layer to form the initial structure of the silicon guided mode detector is as follows:

[0028] Along the length direction of the silicon substrate, the silicon substrate includes at least a first portion, and along the width direction of the silicon substrate, the first portion includes at least a first region, a second region, a third region, and a fourth region arranged sequentially.

[0029] The second region is doped to incorporate boron into the second silicon layer of the region to form an avalanche region.

[0030] The third region is left unprocessed to form an absorption region;

[0031] The first region is doped to incorporate phosphorus into the second silicon layer of the first region to form an N-type ohmic contact region.

[0032] The fourth region is doped to incorporate boron into the second silicon layer of the fourth region to form a P-type ohmic contact region.

[0033] In one possible implementation, in the step of etching away a portion of the second silicon dioxide layer located on the upper part of the initial structure of the silicon conductive mode detector, and in the process of fabricating an electrode structure on the portion of the initial structure of the silicon conductive mode detector corresponding to the portion where the second silicon dioxide layer has been etched away, the electrode structure is a P-type ohmic contact electrode and an N-type ohmic contact electrode.

[0034] In this step, the second silicon dioxide layer located on top of the N-type ohmic contact region and the P-type ohmic contact region is etched away, a P-type ohmic contact electrode is prepared in the P-type ohmic contact region, and an N-type ohmic contact electrode is prepared in the N-type ohmic contact region.

[0035] In one possible implementation, along the length direction of the silicon substrate, the silicon substrate includes a first part and a second part, and along the width direction of the silicon substrate, the first part is sequentially divided into a first segment, a second segment and a third segment;

[0036] Between the steps of depositing a second silicon dioxide layer on the silicon substrate and processing the second silicon layer to form the initial structure of the silicon conductive mode detector, the method further includes growing a second silicon nitride layer on the second silicon dioxide layer; etching away the second silicon nitride layer, the second silicon dioxide layer, and the second silicon layer at the second portion, the first segment, and the third segment; depositing silicon dioxide on the second portion, the first segment, and the third segment to form a third silicon dioxide layer; and removing the second silicon nitride layer located on the second segment.

[0037] In the step of processing the second silicon layer to form the initial structure of the silicon conductive mode detector, the second silicon layer located in the second segment is processed to form the initial structure of the silicon conductive mode detector.

[0038] In the step of depositing a first silicon nitride layer on the second silicon dioxide layer, the first silicon nitride layer is deposited on the second silicon dioxide layer and the third silicon dioxide layer;

[0039] In the step of etching away a portion of the first silicon nitride layer to form a silicon nitride waveguide, a portion of the second silicon nitride layer is etched away to form a silicon nitride waveguide, a wedge-shaped mode conversion structure, and a grating coupler. The wedge-shaped mode conversion structure is located between the silicon nitride waveguide and the grating coupler, and incident light can enter from the grating coupler and be transmitted into the silicon nitride waveguide. Attached Figure Description

[0040] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0041] Figure 1 This is a schematic diagram of the structure of an on-chip integrated silicon single-photon detector according to an embodiment of this application;

[0042] Figure 2 This is a simulation result of the optical field of the on-chip integrated silicon single-photon detector in an embodiment of this application at any position behind the incident end of the silicon nitride waveguide;

[0043] Figure 3 This is a diagram showing the electrical simulation results of an on-chip integrated silicon single-photon detector according to an embodiment of this application;

[0044] Figure 4 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 1 ;

[0045] Figure 5 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 2 ;

[0046] Figure 6This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 3 ;

[0047] Figure 7 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 4 ;

[0048] Figure 8 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 5 .

[0049] Explanation of reference numerals in the attached figures:

[0050] 100. Silicon nitride waveguide;

[0051] 200. Silicon conductive mode detector;

[0052] 210. Avalanche region; 220. Absorption region; 230. P-type ohmic contact region; 240. N-type ohmic contact region; 250. P-type ohmic contact electrode; 260. N-type ohmic contact electrode;

[0053] 300. Grating coupler;

[0054] 400. Modular conversion structure;

[0055] 500, silicon substrate;

[0056] 510, First silicon layer; 520, First silicon dioxide layer; 530, Second silicon layer; 540, Second silicon dioxide layer; 550, Second silicon nitride layer; 560, Third silicon dioxide layer.

[0057] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0058] In related technologies, InGaAs / InP single-photon detectors exhibit high absorption coefficients and detection efficiency for near-infrared light near 1100 nm. They are integrated on-chip with silicon waveguides via bonding processes. However, due to dislocations introduced by bonding, surface dangling bonds, and the high trap density of the material itself, dark counts are high, noise is significant, and afterpulse phenomena introduced by defects are severe, with long dead times drastically reducing the system's count rate. Superconducting nanowire single-photon detectors offer high detection efficiency for near-infrared light near 1100 nm. To address the single-photon detection problem in silicon-based integration, superconducting nanowires are embedded in silicon waveguides, enabling on-chip photon correlation measurements of non-classical photons. However, due to the mismatch between the superconducting nanowires and the silicon waveguide's optical field modes, the average single-photon detection efficiency at 3 K is only 10%, which is significantly lower than the detection efficiency of unintegrated superconducting nanowires (which can reach over 95%), severely impacting device performance. Furthermore, due to the limitations of the working principle of superconducting nanowires, the chip operating temperature is typically below 4K, requiring a bulky and expensive cooling system, which severely restricts its application areas. Therefore, the shortcomings of InGaAs / InP single-photon detectors are obvious, and the inability to achieve on-chip integration of superconducting nanowire single-photon detectors is a significant issue. Silicon material has a complete crystal lattice and a high electron-hole ionization ratio, but due to the intrinsic limitation of silicon's bandgap, silicon single-photon detectors have low detection efficiency for near-infrared light close to 1100nm, thus limiting their applications.

[0059] In view of this, the embodiments of this application provide a silicon nitride waveguide at the upper part of the silicon guided-mode detector in the height direction, so that the light transmitted in the silicon nitride waveguide can be coupled into the silicon guided-mode detector. The current direction of the silicon guided-mode detector is the same as the width direction of the silicon guided-mode detector. The light entering the silicon guided-mode detector enters the silicon guided-mode detector in a direction perpendicular to the current direction within the silicon guided-mode detector. The direction of the light within the silicon guided-mode detector is perpendicular to the direction of the current. Therefore, the silicon guided-mode detector can increase the absorption of near-infrared light at close to 1100 nm by increasing the length of the silicon guided-mode detector while ensuring the electric field distribution. Once photogenerated charges are generated in the silicon guided-mode detector, they will separate and undergo collisional ionization under the action of the electric field, thereby amplifying the signal. This structure solves the problem of the difficulty in on-chip integration of high-sensitivity silicon single-photon detectors, and also solves the technical problem of low detection efficiency caused by the small absorption coefficient of silicon material for near-infrared light at close to 1100 nm.

[0060] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0061] Example 1

[0062] Figure 1 This is a schematic diagram of the structure of an on-chip integrated silicon single-photon detector according to an embodiment of this application.

[0063] like Figure 1 As shown, the on-chip integrated silicon single-photon detector provided in this embodiment includes a silicon nitride waveguide 100 and a silicon guided-mode detector 200. The silicon nitride waveguide 100 is used to receive and transmit incident light with a wavelength of 300nm-1100nm. Optionally, the incident light can be light transmitted from other devices (such as other optical waveguides or the mode conversion structure 400 described below), or it can be light directly incident into the silicon nitride waveguide 100 through an optical fiber. The length direction of the silicon guided mode detector 200 is arranged along the light transmission direction within the silicon nitride waveguide 100. The width direction of the silicon guided mode detector 200 is the same as the current direction within the silicon guided mode detector 200 when it is energized. The silicon guided mode detector 200 and the silicon nitride waveguide 100 are spaced apart, and the silicon nitride waveguide 100 is located at the upper part of the height direction of the silicon guided mode detector 200. The silicon guided mode detector 200 is used to receive incident light coupled from the silicon nitride waveguide 100, and when the silicon guided mode detector 200 is energized, it is used to convert the incident light into an electrical signal. In other words, there is a gap between the silicon guided-mode detector 200 and the silicon nitride waveguide 100. Light transmitted within the silicon nitride waveguide 100 can be transferred to the silicon guided-mode detector 200. The incident light enters the silicon guided-mode detector 200 from its upper part, and the direction of light transmission within the silicon guided-mode detector 200 is consistent with the length direction of the silicon guided-mode detector 200. Therefore, the direction of light incident on the silicon guided-mode detector 200 is perpendicular to the direction of the current within the silicon guided-mode detector 200. The silicon guided-mode detector 200 detects single photons by collecting the electrical signal generated by the incident light. It is worth noting that in this embodiment, the wavelength of the incident light can be near-infrared light close to 1100 nm, such as near-infrared light at 1064 nm. Near-infrared light at 1064 nm is an important band in satellite-to-ground quantum communication systems. Of course, the wavelength of the first transmitted light can also be near-infrared light in other bands. The on-chip integrated silicon single-photon detector provided in this embodiment can detect near-infrared light in the range of 300nm-1100nm. Compared with silicon single-photon detectors in related technologies, the on-chip integrated silicon single-photon detector provided in this embodiment can significantly improve the detection efficiency of near-infrared light close to 1100nm.

[0064] In related technologies, the light transmission direction and current direction of silicon single-photon detectors are consistent. Due to the intrinsic limitation of silicon bandgap, near-infrared light (such as near-infrared light at 1064nm) has a small absorption coefficient and low absorption efficiency in silicon materials. Therefore, in order to improve the light absorption of silicon single-photon detectors, it is necessary to increase the thickness of the intrinsic layer (the light transmission direction is from top to bottom). However, increasing the thickness of the intrinsic layer will create a neutral region without an electric field inside the silicon single-photon detector, which will affect the carrier collection efficiency and thus lead to low detection efficiency of silicon detectors. The on-chip integrated silicon single-photon detector provided in this embodiment decouples the electric field direction from the light transmission direction (the light transmission direction is perpendicular to the current direction). While ensuring the electric field distribution (i.e., there is no neutral region without an electric field), the absorption of near-infrared light (such as near-infrared light at 1064nm) at close to 1100nm can be increased by increasing the length of the silicon guided-mode detector 200. Once photogenerated charges are generated in the silicon guided-mode detector 200, they will separate and undergo collisional ionization under the action of the electric field, thereby amplifying the signal. This solves the problem of the difficulty in on-chip integration of high-sensitivity silicon single-photon detectors, and also solves the technical problem of low detection efficiency caused by the small absorption coefficient of silicon material for near-infrared light at close to 1100nm.

[0065] It is understood that the on-chip integrated silicon single-photon detector provided in this embodiment is only for... Figure 1 The structure in it does not contain Figure 1 The grating coupler 300 and mode conversion structure 400 shown are illustrated.

[0066] Example 2

[0067] Figure 1 This is a schematic diagram of the structure of an on-chip integrated silicon single-photon detector according to an embodiment of this application; Figure 2 This is a simulation result of the optical field of the on-chip integrated silicon single-photon detector in an embodiment of this application at any position behind the incident end of the silicon nitride waveguide; Figure 3 The diagram shows the electrical simulation results of the on-chip integrated silicon single-photon detector according to an embodiment of this application.

[0068] like Figure 1As shown, the on-chip integrated silicon single-photon detector provided in this embodiment has a structure that is basically the same as that provided in Embodiment 1. The difference is that the on-chip integrated silicon single-photon detector provided in this embodiment also includes a grating coupler 300 and a mode conversion structure 400. The mode conversion structure 400 is connected between the grating coupler 300 and the silicon nitride waveguide 100. That is, the on-chip integrated silicon single-photon detector also includes a mode conversion structure 400 connected to one end of the silicon nitride waveguide 100 along its length direction and a grating coupler 300 connected to the end of the mode conversion structure 400 away from the silicon nitride waveguide 100.

[0069] The mode conversion structure 400 is used to convert the mode size of the grating coupler 300. The grating coupler 300 receives and transmits incident light. The incident light incident on the grating coupler 300 is transmitted through the grating coupler 300 and the mode conversion structure 400 before being incident on the silicon nitride waveguide 100. The incident light incident on the grating coupler 300 can be light transmitted from the optical fiber. The mode conversion structure 400 and the grating coupler 300 are placed before the silicon nitride waveguide 100 to improve the efficiency of light transmission from the optical fiber into the silicon nitride waveguide 100. The light transmitted in the optical fiber is guided into the on-chip integrated silicon single-photon detector through the grating coupler 300. The grating coupler 300 has good coupling with the optical fiber, which can improve the incident light efficiency. Furthermore, the grating coupler 300 can change the direction of light propagation, increasing the flexibility of optical fiber access to the on-chip integrated silicon single-photon detector.

[0070] Optionally, the mode conversion structure 400 is a wedge-shaped mode conversion structure 400, and the area of ​​the end of the wedge-shaped mode conversion structure near the silicon nitride waveguide 100 is smaller than the area of ​​the end of the wedge-shaped mode conversion structure away from the silicon nitride waveguide 100.

[0071] In some embodiments of this application, the silicon guided mode detector 200 includes an avalanche region 210, an absorption region 220, a P-type ohmic contact region 230, an N-type ohmic contact region 240, a P-type ohmic contact electrode 250, and an N-type ohmic contact electrode 260. The avalanche region 210 is made of boron-doped silicon, the absorption region 220 is made of silicon, the P-type ohmic contact region 230 is made of boron-doped silicon, and the N-type ohmic contact region 240 is made of phosphorus-doped silicon. The doping concentrations of the avalanche region 210 and the P-type ohmic contact region 230 are different. The P-type ohmic contact electrode 250 is disposed above the P-type ohmic contact region 230, and the N-type ohmic contact region 240, the avalanche region 210, the absorption region 220, and the P-type ohmic contact region 230 are arranged sequentially along the width direction of the silicon guided mode detector 200. The N-type ohmic contact electrode 260 is disposed on the upper part of the N-type ohmic contact area 240. The P-type ohmic contact electrode 250 and the N-type ohmic contact electrode 260 are biased to generate an electric field in the silicon guided mode detector 200, and the current direction in the silicon guided mode detector 200 is the same as the width direction of the silicon guided mode detector 200.

[0072] In order to increase the detection efficiency of the on-chip integrated silicon single-photon detector in this embodiment, the silicon nitride waveguide 100 is located above the absorption region 220, and the orthogonal projection of the silicon nitride waveguide 100 on the absorption region 220 is located inside the absorption region 220. The N-type ohmic contact region 240, avalanche region 210, absorption region 220, and P-type ohmic contact region 230 are arranged sequentially along the width direction of the silicon guided mode detector 200. The current direction within the silicon guided mode detector 200 is from the N-type ohmic contact region 240 to the P-type ohmic contact region 230. The absorption region 220 absorbs the light transmitted from the silicon nitride wave, generating electrons and holes. Electrons move towards one side of the N-type ohmic contact region 240, and holes move towards one side of the P-type ohmic contact region 230. During the movement of electrons, they pass through the avalanche region 210, thereby triggering an avalanche. The electron-dominant avalanche triggering method can reduce noise on the one hand, and on the other hand, in silicon materials, the efficiency of electron-triggered avalanche is higher than that of hole-triggered avalanche. Therefore, the silicon guided mode detector 200 can significantly improve the sensitivity of the on-chip integrated silicon single-photon detector in this embodiment by using electron-triggered avalanche.

[0073] In some embodiments of this application, a support layer is disposed between the silicon nitride waveguide 100 and the silicon guided-mode detector 200. The thickness of the support layer is less than 60 nm. The support layer serves to space and support the silicon nitride waveguide 100, and its thickness should not be too large. If the thickness of the support layer is too large, the light transmitted in the silicon nitride waveguide 100 will not be able to couple into the silicon guided-mode detector 200. Furthermore, in order to ensure that the arrangement of the support layer does not affect the transmission of light in the silicon nitride waveguide 100 and the silicon guided-mode detector 200, the refractive index of the support layer is less than that of silicon nitride and less than that of silicon.

[0074] Optionally, the support layer is a silicon dioxide layer. Optionally, the thickness of the silicon dioxide layer is 10 nm.

[0075] Figure 2 As shown in the simulation results of the on-chip integrated silicon single-photon detector provided in this embodiment, the silicon guided-mode detector 200 has light at any position behind the incident end of the silicon nitride waveguide 100, indicating that the light transmitted in the silicon nitride waveguide 100 can be coupled into the silicon guided-mode detector 200. The incident end of the silicon nitride waveguide 100 is the end of the silicon nitride waveguide 100 closest to the mode conversion structure 400. Figure 2 In the diagram, the lower black frame represents the silicon guided mode detector 200, the upper black frame represents the silicon nitride waveguide 100, the black areas within the upper black frame and the lower black area represent light, and the white area surrounding the black area within the silicon nitride waveguide 100 represents evanescent waves. Figure 3 As shown in the figure, the electrical simulation results of the on-chip integrated silicon single-photon detector provided in this embodiment show that light can be amplified after entering the silicon guided mode detector 200. In the figure, 1 is the curve with no incident light in the silicon guided mode detector 200, 2 is the curve with incident light in the silicon guided mode detector 200, and 3 is the gain curve of the silicon guided mode detector 200.

[0076] Example 3

[0077] Figure 7 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 4 .

[0078] This embodiment provides a method for fabricating an on-chip integrated silicon single-photon detector as described in Embodiment 1. The fabrication method includes the following steps:

[0079] S100. A second silicon dioxide layer 540 is deposited on a silicon substrate 500. The thickness of the second silicon dioxide layer 540 is less than 60 nm. The silicon substrate 500 includes a first silicon layer 510, a first silicon dioxide layer 520, and a second silicon layer 530 stacked sequentially. The second silicon dioxide layer 540 is deposited on top of the second silicon layer 530. Optionally, the thickness of the second silicon layer 530 is 100 nm to 1000 nm. The silicon substrate 500 is cleaned before processing. Optionally, the thickness of the second silicon dioxide layer 540 is 10 nm.

[0080] S200, The second silicon layer 530 is processed to form the initial structure of the silicon conductive mode detector. Among other things, such as... Figure 7 As shown, the method for processing the second silicon layer 530 is as follows:

[0081] S210. Along the length direction of the silicon substrate 500, the silicon substrate 500 includes at least a first portion. Along the width direction of the silicon substrate 500, the first portion includes at least a first region, a second region, a third region, and a fourth region arranged sequentially. The second region is doped to incorporate boron into the second silicon layer 530 of that region to form an avalanche region 210. The third region is left untreated to form an absorption region 220. Optionally, the second region is doped with boron through a doping process such as boron implantation or diffusion, such that the doping concentration of the second region is 10. 15 ~10 17 cm -3 .

[0082] S220. After desizing and cleaning, the first region is doped to incorporate phosphorus into the second silicon layer 530 of the first region, forming an N-type ohmic contact region 240. Optionally, phosphorus is doped into the fourth region through phosphorus implantation or diffusion processes, resulting in a doping concentration of 10-1 in the fourth region. 18 ~10 20 cm -3 .

[0083] S230. After desizing and cleaning, the fourth region is doped to incorporate boron into the second silicon layer 530 of the fourth region, forming a P-type ohmic contact region 230. Optionally, boron is doped into the first region through boron implantation or diffusion, resulting in a doping concentration of 10-1. 18 ~10 20 cm -3 .

[0084] S300, deposit a first silicon nitride layer on the second silicon dioxide 540 layer. Optionally, the thickness of the first silicon nitride layer is 220 nm.

[0085] S400, a portion of the first silicon nitride layer is etched away to form a silicon nitride waveguide 100. The length direction of the silicon nitride waveguide 100 is the same as the length direction of the silicon substrate 500. Light entering the silicon nitride waveguide 100 is transmitted along the length direction of the silicon nitride waveguide 100.

[0086] S500: A portion of the second silicon dioxide 540 layer located on top of the initial structure of the silicon mode detector is etched away. An electrode structure is then fabricated on the portion of the initial structure of the silicon mode detector where the second silicon dioxide layer has been etched away, forming the silicon mode detector 200. When the silicon mode detector 200 is energized, the direction of the current is the same as the width direction of the silicon mode detector 200. The silicon nitride waveguide 100 is located on the portion of the initial structure of the silicon mode detector where the second silicon dioxide 540 layer has not been etched away. In this step, the electrode structure consists of a P-type ohmic contact electrode 250 and an N-type ohmic contact electrode 260. The second silicon dioxide 540 layer located on top of the N-type ohmic contact region 240 and the P-type ohmic contact region 230 is etched away. A P-type ohmic contact electrode 250 is fabricated in the P-type ohmic contact region 230, and an N-type ohmic contact electrode 260 is fabricated in the N-type ohmic contact region 240. Optionally, the P-type ohmic contact electrode 250 and the N-type ohmic contact electrode 260 are prepared by using magnetron sputtering or electron beam evaporation to generate an alloy composed of one or more metals selected from gold, silver, titanium or aluminum, with a thickness of more than 100 nm. Then, the excess metal and photoresist are removed by stripping to obtain the P-type ohmic contact electrode 250 and the N-type ohmic contact electrode 260, respectively.

[0087] Example 4

[0088] Figure 4 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 1 ; Figure 5 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 2 ; Figure 6 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 3 ; Figure 7 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 4 ; Figure 8 This describes the fabrication state of the on-chip integrated silicon single-photon detector in the embodiments of this application. Figure 5 .

[0089] This embodiment provides a method for fabricating an on-chip integrated silicon single-photon detector as described in Embodiment 2. The method for fabricating an on-chip integrated silicon single-photon detector provided in this embodiment is basically the same as the method for fabricating an on-chip integrated silicon single-photon detector in Embodiment 3, except that: along the length direction of the silicon substrate 500, the silicon substrate 500 includes a first part and a second part, and along the width direction of the silicon substrate 500, the first part is sequentially divided into a first segment, a second segment and a third segment.

[0090] Between step S100 and step S200, the following steps are also included: Figure 4 As shown, a second silicon nitride layer 550 is grown on the second silicon dioxide layer 540; as Figure 5 As shown, the second silicon nitride layer 550, the second silicon dioxide layer 540, and the second silicon layer 530 at the second part, the first segment, and the third segment are etched away; as shown Figure 6 As shown, a third silicon dioxide layer 560 is formed by depositing silicon dioxide on the second part, the first segment, and the third segment, and the second silicon nitride layer 550 located on the second segment is removed. Optionally, the second silicon nitride layer 550 is grown on the second silicon dioxide layer 540 by low-pressure chemical vapor deposition (LPCVD), and the thickness of the second silicon nitride layer 550 is 100 nm. The second silicon nitride layer 550 serves as a stop layer for chemical mechanical polishing (CMP). Optionally, the thickness of the third silicon dioxide layer 560 is 220 nm.

[0091] In step S200, as Figure 7 As shown, the second silicon layer 530 located in the second section is processed to form the initial structure of the silicon conductive mode detector.

[0092] In step S300, a first silicon nitride layer is deposited on a second silicon dioxide layer 540 and a third silicon dioxide layer 560.

[0093] In step S400, as Figure 8 As shown, a portion of the second silicon nitride layer 550 is etched away to form a silicon nitride waveguide 100, a wedge-shaped mode conversion structure 400, and a grating coupler 300. The wedge-shaped mode conversion structure 400 is located between the silicon nitride waveguide 100 and the grating coupler 300, allowing incident light to enter from the grating coupler 300 and be transmitted into the silicon nitride waveguide 100.

[0094] In other words, in this embodiment, the fabrication method of the on-chip integrated silicon single-photon detector includes the following steps:

[0095] 1. A second silicon dioxide layer 540 is deposited on a silicon substrate 500. The thickness of the second silicon dioxide layer 540 is less than 60 nm. The silicon substrate 500 includes a first silicon layer 510, a first silicon dioxide layer 520, and a second silicon layer 530 stacked sequentially. The second silicon dioxide layer 540 is deposited on top of the second silicon layer 530. Optionally, the thickness of the second silicon layer 530 is 100 nm to 1000 nm. The silicon substrate 500 is cleaned before processing. Optionally, the thickness of the second silicon dioxide layer 540 is 10 nm.

[0096] 2. Along the length direction of the silicon substrate 500, the silicon substrate 500 includes a first part and a second part. Along the width direction of the silicon substrate 500, the first part is sequentially divided into a first segment, a second segment, and a third segment. For example... Figure 4 As shown, a second silicon nitride layer 550 is grown on the second silicon dioxide layer 540.

[0097] 3. For example Figure 5 As shown, the second silicon nitride layer 550, the second silicon dioxide layer 540, and the second silicon layer 530 at the second part, the first section, and the third section are etched away.

[0098] 4. For example Figure 6 As shown, a third silicon dioxide layer 560 is formed by depositing silicon dioxide on the second part, the first segment, and the third segment, and the second silicon nitride layer 550 located on the second segment is removed. Optionally, the second silicon nitride layer 550 is grown on the second silicon dioxide layer 540 by low-pressure chemical vapor deposition (LPCVD), and the thickness of the second silicon nitride layer 550 is 100 nm. The second silicon nitride layer 550 serves as a stop layer for chemical mechanical polishing (CMP). Optionally, the thickness of the third silicon dioxide layer 560 is 220 nm.

[0099] 5. The second silicon layer 530 located in the second section is processed to form the initial structure of the silicon conductive mode detector. For example, Figure 7 As shown, the method for processing the second silicon layer 530 is as follows:

[0100] 5.1 Along the length direction and width direction of the silicon substrate 500, the second segment includes a first region, a second region, a third region, and a fourth region arranged sequentially. The second region is doped to incorporate boron into the second silicon layer 530 of that region to form an avalanche region 210. The third region is left untreated to form an absorption region 220. Optionally, the second region is doped with boron through boron implantation or diffusion, resulting in a doping concentration of 10¹⁵ to 10¹⁷ cm⁻³.

[0101] 5.2 After removing the adhesive and cleaning, the first region is doped to incorporate phosphorus into the second silicon layer 530 of the first region, forming an N-type ohmic contact region 240. Optionally, phosphorus is incorporated into the fourth region through phosphorus implantation or diffusion processes, resulting in a doping concentration of 10¹⁸–10²⁰ cm⁻³.

[0102] 5.3 After removing the adhesive and cleaning, the fourth region is doped to incorporate boron into the second silicon layer 530 of the fourth region, forming a P-type ohmic contact region 230. Optionally, boron is doped into the first region through boron implantation or diffusion, resulting in a doping concentration of 10¹⁸–10²⁰ cm⁻³.

[0103] 6. Deposit a first silicon nitride layer on the second silicon dioxide layer 540 and the third silicon dioxide layer 560. Optionally, the thickness of the first silicon nitride layer is 220 nm.

[0104] 7. For example Figure 8 As shown, the first silicon nitride layer outside the absorption region 220 is etched away to form a silicon nitride waveguide 100. The length direction of the silicon nitride waveguide 100 is the same as the length direction of the silicon substrate 500. Light entering the silicon nitride waveguide 100 is transmitted along the length direction of the silicon nitride waveguide 100. Correspondingly, a portion of the second silicon nitride layer 550 located in the second part is etched away to form a wedge-shaped mode conversion structure 400 and a grating coupler 300. The wedge-shaped mode conversion structure 400 is located between the silicon nitride waveguide 100 and the grating coupler 300. Incident light can enter from the grating coupler 300 and be transmitted into the silicon nitride waveguide 100.

[0105] 8. Etch away the second silicon dioxide 540 layer located on top of the N-type ohmic contact region 240 and the P-type ohmic contact region 230, fabricate a P-type ohmic contact electrode 250 in the P-type ohmic contact region 230, and fabricate an N-type ohmic contact electrode 260 in the N-type ohmic contact region 240. Optionally, the P-type ohmic contact electrode 250 and the N-type ohmic contact electrode 260 are fabricated by using magnetron sputtering or electron beam evaporation to generate an alloy composed of one or more metals selected from gold, silver, titanium, or aluminum, with a thickness of more than 100 nm. Then, the excess metal and photoresist are removed by stripping to obtain the P-type ohmic contact electrode 250 and the N-type ohmic contact electrode 260, respectively.

[0106] This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed in this application. The description and embodiments are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0107] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A method for fabricating an on-chip integrated silicon single-photon detector, characterized in that, Includes the following steps: A second silicon dioxide layer is deposited on a silicon substrate, the thickness of the second silicon dioxide layer being less than 60 nm. The silicon substrate includes a first silicon layer, a first silicon dioxide layer, and a second silicon layer stacked sequentially, with the second silicon dioxide layer deposited on top of the second silicon layer. The second silicon layer is processed to form the initial structure of the silicon conductive mode detector; A first silicon nitride layer is deposited on the second silicon dioxide layer; A portion of the first silicon nitride layer is etched away to form a silicon nitride waveguide. The length direction of the silicon nitride waveguide is the same as the length direction of the silicon substrate. Light entering the silicon nitride waveguide is transmitted along the length direction of the silicon nitride waveguide. A portion of the second silicon dioxide layer located on the upper part of the initial structure of the silicon guided mode detector is etched away. An electrode structure is then fabricated on the initial structure of the silicon guided mode detector with the portion of the second silicon dioxide layer etched away to form a silicon guided mode detector. When the silicon guided mode detector is energized, the direction of the current is the same as the width direction of the silicon guided mode detector. The silicon nitride waveguide is located on the portion of the initial structure of the silicon guided mode detector corresponding to the portion where the second silicon dioxide layer was not etched away. The method for processing the second silicon layer to form the initial structure of the silicon guided mode detector is as follows: Along the length direction of the silicon substrate, the silicon substrate includes at least a first portion, and along the width direction of the silicon substrate, the first portion includes at least a first region, a second region, a third region, and a fourth region arranged sequentially. The second region is doped to incorporate boron into the second silicon layer of the region to form an avalanche region. The third region is left unprocessed to form an absorption region; The first region is doped to incorporate phosphorus into the second silicon layer of the first region to form an N-type ohmic contact region. The fourth region is doped to incorporate boron into the second silicon layer of the fourth region to form a P-type ohmic contact region, wherein the direction of light in the silicon conductive mode detector is perpendicular to the direction of current.

2. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 1, characterized in that, In the step of etching away a portion of the second silicon dioxide layer located on the upper part of the initial structure of the silicon conductive mode detector, an electrode structure is fabricated on the initial structure of the silicon conductive mode detector on which the portion of the second silicon dioxide layer has been etched away. The electrode structure is a P-type ohmic contact electrode and an N-type ohmic contact electrode. In this step, the second silicon dioxide layer located on top of the N-type ohmic contact region and the P-type ohmic contact region is etched away, a P-type ohmic contact electrode is prepared in the P-type ohmic contact region, and an N-type ohmic contact electrode is prepared in the N-type ohmic contact region.

3. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 1, characterized in that, Along the length direction of the silicon substrate, the silicon substrate includes a first part and a second part, and along the width direction of the silicon substrate, the first part is sequentially divided into a first segment, a second segment and a third segment; Between the steps of depositing a second silicon dioxide layer on the silicon substrate and processing the second silicon layer to form the initial structure of the silicon conductive mode detector, the method further includes growing a second silicon nitride layer on the second silicon dioxide layer; etching away the second silicon nitride layer, the second silicon dioxide layer, and the second silicon layer at the second portion, the first segment, and the third segment; depositing silicon dioxide on the second portion, the first segment, and the third segment to form a third silicon dioxide layer; and removing the second silicon nitride layer located on the second segment. In the step of processing the second silicon layer to form the initial structure of the silicon conductive mode detector, the second silicon layer located in the second segment is processed to form the initial structure of the silicon conductive mode detector. In the step of depositing a first silicon nitride layer on the second silicon dioxide layer, the first silicon nitride layer is deposited on the second silicon dioxide layer and the third silicon dioxide layer; In the step of etching away a portion of the first silicon nitride layer to form a silicon nitride waveguide, a portion of the second silicon nitride layer is etched away to form a silicon nitride waveguide, a wedge-shaped mode conversion structure, and a grating coupler. The wedge-shaped mode conversion structure is located between the silicon nitride waveguide and the grating coupler, and incident light can enter from the grating coupler and be transmitted into the silicon nitride waveguide.

4. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 1, characterized in that, The silicon nitride waveguide is used to receive and transmit incident light, the wavelength of which is 300nm-1100nm; The length direction of the silicon guided mode detector is consistent with the light transmission direction within the silicon nitride waveguide, and the width direction of the silicon guided mode detector is consistent with the current direction within the silicon guided mode detector when it is energized. The silicon guided mode detector and the silicon nitride waveguide are spaced apart, and the silicon nitride waveguide is located at the upper part of the height direction of the silicon guided mode detector. The silicon guided mode detector is used to receive incident light coupled from the silicon nitride waveguide, and when the silicon guided mode detector is energized, it is used to convert the incident light into an electrical signal.

5. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 4, characterized in that, The on-chip integrated silicon single-photon detector also includes a grating coupler and a mode conversion structure. The mode conversion structure is connected between the grating coupler and the silicon nitride waveguide. The mode conversion structure is used to convert the mode size of the grating coupler. The grating coupler is used to receive and transmit input light. The incident light incident on the grating coupler is transmitted through the grating coupler and the mode conversion structure and then incident on the silicon nitride waveguide.

6. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 1, characterized in that, The silicon conductive mode detector includes an avalanche region, an absorption region, a P-type ohmic contact region, an N-type ohmic contact region, a P-type ohmic contact electrode, and an N-type ohmic contact electrode; The P-type ohmic contact electrode is disposed on the upper part of the P-type ohmic contact area, and the N-type ohmic contact electrode is disposed on the upper part of the N-type ohmic contact area; The N-type ohmic contact region, the avalanche region, the absorption region, and the P-type ohmic contact region are arranged sequentially along the width direction of the silicon conductive mode detector.

7. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 6, characterized in that, The silicon nitride waveguide is located above the absorption region, and the orthogonal projection of the silicon nitride waveguide onto the absorption region is located inside the absorption region.

8. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 1, characterized in that, A support layer is disposed between the silicon guided mode detector and the silicon nitride waveguide, and the thickness of the support layer is less than 60 nm. The refractive index of the support layer is less than that of silicon nitride, and the refractive index of the support layer is less than that of silicon.

9. The method for fabricating an on-chip integrated silicon single-photon detector according to claim 8, characterized in that, The support layer is a silicon dioxide layer.

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