Phase change memory material, phase change memory cell, and phase change memory

CN116940221BActive Publication Date: 2026-10-23HUAWEI TECH CO LTD +1
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Patent Information

Application Number
CN202210318382.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-29
Publication Date
2026-10-23
Estimated Expiration
2042-03-29

AI Technical Summary

Technical Problem

然而,现有的相变存储材料只有高阻态和低阻态是两个稳定的状态,相变存储材料的晶态和非晶态之间的中间电阻态,由于自发的结构弛豫特性或电场作用,原子容易发生较为显著的位移,导致相变材料组分会逐步偏析乃至出现较大孔洞、缺陷,使得中间电阻态的电阻值随时间显著漂移,从而降低了相变存储器的抗噪声的容限,增加了电路设计以及校验纠错的复杂程度,可靠性较差,无法实现可用的多态存储,不能满足高精度神经形态计算的要求

Benefits of technology

[0014]上述第二方面和第三方面可以达到的技术效果,可以参照上述第一方面中的相应效果描述,这里不再重复赘述。

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Abstract

The application provides a phase change storage material, a phase change storage unit and a phase change memory. δ (Ge x Sb y Te z ) 1‑δ , wherein the atomic content of Nb is 0 < δ < 1, Nb δ (Ge x Sb y Te z ) 1‑δ , 0 < x < 10, 0 < y < 10, and 0 < z < 10. The phase change storage material can realize multi-state storage of the phase change memory and meet the requirements of high-precision neuromorphic computing.
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Description

Technical Field

[0001] This application relates to the field of storage materials, specifically to a phase change storage material, a phase change storage cell, and a phase change memory. Background Technology

[0002] Phase change memory (PCM) materials can represent data 0 and 1 based on the reversible high-resistivity to low-resistivity transition of the material, thus enabling data read and write operations. Theoretically, PCM can not only achieve two levels of resistance transition, namely fully crystalline and fully amorphous states, but also obtain continuous resistance state transitions (partially amorphous or intermediate resistance states) by applying electrical pulses of varying intensity to PCM cells between crystalline and amorphous states. This allows PCM to accurately simulate synaptic plasticity behavior, making it a promising candidate as the basic synaptic unit for in-memory computing systems. However, existing phase change memory materials only have two stable states: high resistance and low resistance. The intermediate resistive state between the crystalline and amorphous states of phase change memory materials is prone to significant atomic displacement due to spontaneous structural relaxation characteristics or electric field effects. This leads to gradual segregation of the phase change material components and even the formation of large pores and defects, causing the resistance value of the intermediate resistive state to drift significantly over time. This reduces the noise immunity tolerance of the phase change memory, increases the complexity of circuit design and error correction, results in poor reliability, and makes it impossible to achieve usable multi-state storage, thus failing to meet the requirements of high-precision neuromorphic computing. Summary of the Invention

[0003] This application provides a phase change storage material, a phase change storage unit, and a phase change memory, to provide a phase change storage material that can be used for multi-state storage, enabling multi-state storage of the phase change memory and meeting the requirements of high-precision neuromorphic computing.

[0004] In a first aspect, this application provides a phase change memory material, the phase change memory material comprising Nb δ (Ge x Sb y Te z ) 1-δ The atomic content δ of Nb ranges from 0 to δ < 1. δ (Ge x Sb y Te z ) 1-δ In the given condition, 0 < x ≤ 10, 0 < y ≤ 10, and 0 < z ≤ 10.

[0005] The phase change memory material in this application, due to its component Ge x Sb y Te z A certain amount of Nb was added, and the strong chemical bond between Nb and Te was utilized to modify the Nb content.δ (Ge x Sb y Te z ) 1-δ The microstructure and bond connections of the system alter Nb δ (Ge x Sb y Te z ) 1-δ The phase transition and thermal properties of the system alter Nb δ (Ge x Sb y Te z ) 1-δ The atomic mobility of the system reduces the resistivity drift of the doped system. This phase change memory material undergoes a relatively gradual structural phase transition during heating, from a completely amorphous state to a completely polycrystalline state, accompanied by a reversible transition between high-resistivity and low-resistivity states. Based on Nb... δ (Ge x Sb y Te z ) 1-δ Phase change memory (PCM) cells can generate a series of stable partially amorphous states under the excitation of electrical pulses of different intensities. The generated partially amorphous states can reversibly return to the high-resistivity fully amorphous state and the low-resistivity fully crystalline state. Moreover, the generated partially amorphous states have controllable and distinguishable differences in resistance and reflectivity, especially with extremely low resistance drift characteristics, which enables PCM to achieve multi-state data storage.

[0006] As one optional implementation, the atomic content δ of Nb satisfies: 0.01 < δ < 0.5. As another optional implementation, the atomic content δ of Nb satisfies: 0.01 < δ < 0.1. In a specific optional implementation, the specific value of δ can be, for example, 0.025, 0.03, 0.035, 0.04, 0.045, 0.05, 0.055, 0.06, 0.065, 0.07, 0.08, 0.09, or 0.1.

[0007] As an optional implementation, Nb δ (Ge x Sb y Te z ) 1-δ In the given condition, x satisfies: 1 ≤ x ≤ 5. As an optional implementation, Nb... δ (Ge x Sb y Te z ) 1-δ In the given equation, x satisfies: 1 ≤ x ≤ 3.

[0008] As an optional implementation, Nbδ (Ge x Sb y Te z ) 1-δ In the expression, y satisfies: 1 ≤ y ≤ 5. As an optional implementation, Nb... δ (Ge x Sb y Te z ) 1-δ In the given condition, y satisfies: 1≤y≤3.

[0009] As an optional implementation, Nb δ (Ge x Sb y Te z ) 1-δ In this context, z satisfies: 3 ≤ z ≤ 10. As an optional implementation, Nb... δ (Ge x Sb y Te z ) 1-δ In the given equation, z satisfies: 3≤z≤8.

[0010] In one alternative implementation, the phase change memory material includes Nb δ (Ge2Sb2Te5) 1-δ 、Nb δ (Ge1Sb2Te4) 1-δ 、Nb δ (Ge2Sb2Te4) 1-δ or Nb δ (Ge3Sb4Te8) 1-δ At least one of them.

[0011] In one alternative implementation, the phase change memory material has more than 5 adjustable resistance states, and preferably more than 10 adjustable resistance states.

[0012] Secondly, this application also provides a phase change memory unit, which includes a positive electrode, a negative electrode, a phase change material layer and an insulating dielectric layer. The phase change material layer and the insulating dielectric layer are both disposed between the positive electrode and the negative electrode. The two ends of the phase change material layer are in contact with the positive electrode and the negative electrode, respectively, and the insulating dielectric layer surrounds the periphery of the phase change material layer. The phase change material layer is formed using the phase change memory material as described in the first aspect of this application.

[0013] Thirdly, this application also provides a phase-change memory, which includes the phase-change memory cell as described in the second aspect of this application.

[0014] The technical effects that can be achieved by the second and third aspects mentioned above can be referred to the corresponding effect descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of a phase-change memory cell according to one embodiment;

[0016] Figure 2 This is a schematic diagram of the structure of a phase-change memory cell according to one embodiment;

[0017] Figure 3 The graph shows the relationship between the resistance of the phase change storage film and temperature for each embodiment and comparative example.

[0018] Figure 4 The graphs show the 10-year data retention test results of the phase change memory films in the various embodiments and comparative examples.

[0019] Figure 5 This is an X-ray photoelectron spectrum of a phase change memory thin film according to an embodiment of this application after annealing at 280°C;

[0020] Figures 6-10 This is a schematic diagram illustrating the fabrication process of a phase-change memory cell according to an embodiment of this application;

[0021] Figure 11 The graph shows the relationship between the completely amorphous resistance of the phase change memory cell and time for each embodiment and comparative example.

[0022] Figure 12 For Nb 0.035 - Resistance-voltage relationship diagram of phase change memory cell corresponding to GST phase change memory thin film;

[0023] Figure 13 For Nb 0.035 - The resistance-voltage relationship of the phase change memory cell corresponding to the GST phase change memory film at a pulse width of 200ns;

[0024] Figure 14 For Nb 0.035 - The relationship between the phase change memory cell corresponding to the GST phase change memory film and the partial amorphous resistance-time of the corresponding pulse voltage excited.

[0025] Figure label:

[0026] 100 - Phase change memory cell; 10 - Upper electrode; 20 - Lower electrode; 30 - Phase change material layer; 40 - Insulating dielectric layer;

[0027] 50 - Common electrode; 60 - Conductive layer; 11 - Substrate; 12 - Electrode layer; 13 - Phase change material thin film layer; 14 - Upper electrode layer. Detailed Implementation

[0028] To facilitate understanding, the application scenarios of the phase change materials in this application will be explained below.

[0029] Phase-change memory (PCM) has demonstrated significant technological advantages and is considered by the Semiconductor Industry Association (SIA) to be a potential replacement for flash memory and dynamic random access memory (DRAM), thus becoming one of the mainstream semiconductor memory products of the future. The PCM cell is the main component of PCM and a key part of realizing PCM. Figure 1 and Figure 2 These are schematic diagrams of the structure of a phase-change memory cell.

[0030] like Figure 1 As shown, in one embodiment, with Figure 1 The phase change storage unit 100, as illustrated in the diagram, may include an upper electrode 10 and a lower electrode 20, one of which is a positive electrode and the other a negative electrode. A phase change material layer 30 and an insulating dielectric layer 40 are disposed between the upper electrode 10 and the lower electrode 20. The upper surface of the phase change material layer 30 contacts the upper electrode 10, and the lower surface of the phase change material layer 30 contacts the lower electrode 20. The insulating dielectric layer 40 surrounds the periphery of the phase change material layer 30, with its upper surface contacting the upper electrode 10 and its lower surface contacting the lower electrode 20. Thus, the phase change material layer 30 is situated within the enclosed space formed by the upper electrode 10, the lower electrode 20, and the insulating dielectric layer 40. Figure 2 This is a schematic diagram of a T-shaped phase-change memory cell. Compared to... Figure 1 The structure shown, a T-shaped phase-change memory cell, includes multiple independently configured upper electrodes 10 and multiple independently configured lower electrodes 20. Each of the multiple independently configured lower electrodes 20 can be connected to a common electrode 50 via a conductive layer 60, through which electrical signals are transmitted. In the phase-change memory cell 100, when data is stored, the phase-change material layer 30 undergoes a corresponding resistance change to achieve information writing and reading. Currently, the phase-change memory materials forming the phase-change material layer 30 are mostly Ge-Sb-Te based phase-change materials, such as metal-doped Ge-Sb-Te, where the existing doping metal can be one of Ag, Cu, or Zn. Because the intermediate states of these phase-change materials are unstable, they can only achieve a maximum of three-state storage. Since they cannot achieve storage of more states (e.g., ten states), they cannot meet the requirements of neuromorphic chips.

[0031] To achieve polymorphic storage, embodiments of this application provide a phase change memory material, which includes Nb δ (Ge x Sb y Te z ) 1-δ The atomic content δ of Nb ranges from 0 to 1.δ (Ge x Sb y Te z ) 1-δ In the given condition, 0 < x ≤ 10, 0 < y ≤ 10, 0 < z ≤ 10, and 0 ≤ z ≤ 10.

[0032] In one optional embodiment, the atomic content δ of Nb satisfies: 0.01 < δ < 0.5. As another optional implementation, the atomic content δ of Nb satisfies: 0.01 < δ < 0.1. In a specific optional implementation, the specific value of δ can be, for example, 0.025, 0.03, 0.035, 0.04, 0.045, 0.05, 0.055, 0.06, 0.065, 0.07, 0.08, 0.09, or 0.1.

[0033] In one alternative embodiment, Nb δ (Ge x Sb y Te z ) 1-δ In this case, x satisfies: 1 ≤ x ≤ 5. As an alternative implementation, x satisfies: 1 ≤ x ≤ 3.

[0034] In one alternative embodiment, Nb δ (Ge x Sb y Te z ) 1-δ In this case, y satisfies: 1 ≤ y ≤ 5. As an alternative implementation, y satisfies: 1 ≤ y ≤ 3.

[0035] In one alternative embodiment, Nb δ (Ge x Sb y Te z ) 1-δ In the equation, z satisfies: 3 ≤ z ≤ 10. As an alternative implementation, the content z of Sb satisfies: 3 ≤ z ≤ 8.

[0036] In one alternative embodiment, the phase change storage material may be Nb δ (Ge2Sb2Te5) 1-δ 、Nb δ (Ge1Sb2Te4) 1-δ 、Nb δ (Ge2Sb2Te4) 1-δ or Nb δ (Ge3Sb4Te8) 1-δ One or at least two of them.

[0037] In one alternative embodiment, the phase change temperature of the phase change storage material is 180–300°C.

[0038] In one optional embodiment, the phase change memory material has more than 5 adjustable resistance states, preferably more than 10. For example, the phase change memory material may have 5, 8, 10, 12, 15, or more adjustable resistance states.

[0039] The phase change memory material of this application enables multi-state storage and exhibits extremely excellent thermal stability. Unlike previously reported phase change memory materials, the Nb-doped GST of this application possesses a relatively continuous and gradually changing RV phase change window, making it possible to construct a partially amorphous phase for multi-state storage. This phase change material can achieve continuously adjustable resistance states by controlling the number and amplitude of pulse voltages; for example, 10 states have been achieved. Furthermore, unlike existing phase change memory materials, the partially amorphous state of this system has an extremely low resistance drift coefficient, making it highly valuable for practical applications such as multi-state storage and in-memory computing.

[0040] The phase change storage material of this application can be prepared by any one of sputtering, evaporation, chemical vapor deposition, molecular beam epitaxy, atomic vapor deposition, and atomic layer deposition.

[0041] The preparation process of the phase change memory material of this application is illustrated below using sputtering as an example.

[0042] Phase change memory materials can be prepared using sputtering. The target material can be one of the following three types: 1) a target based on Nb and Ge-Sb-Te; 2) a target based on Nb, Ge, Sb, and Te; or 3) a target based on Nb-Ge-Sb-Te. The purity of the target material must be greater than 99.999%. The preparation environment for the phase change memory materials is an argon atmosphere with a purity greater than 99.999%. The vacuum level of the sputtering process must be higher than 4 × 10⁻⁶. -4 The sputtering power ranges from 5W to 100W, the argon gas flow rate ranges from 10sccm to 50sccm, and the sputtering pressure ranges from 0.2Pa to 0.6Pa.

[0043] The phase change memory material of this application will be further described in detail below with reference to specific embodiments.

[0044] Example 1

[0045] This embodiment is a phase change memory thin film, wherein the phase change memory material is composed of Nb. 0.025 (Ge2Sb2Te5) 0.975 The following is abbreviated as Nb 0.025 -GST.

[0046] Example 2

[0047] This embodiment is a phase change memory thin film, wherein the phase change memory material is composed of Nb. 0.03 (Ge2Sb2Te5) 0.97 The following is abbreviated as Nb 0.03 -GST.

[0048] Example 3

[0049] This embodiment is a phase change memory thin film, wherein the phase change memory material is composed of Nb. 0.035 (Ge2Sb2Te5) 0.965 The following is abbreviated as Nb 0.035 -GST.

[0050] Example 4

[0051] This embodiment is a phase change memory thin film, wherein the phase change memory material is composed of Nb. 0.04 (Ge2Sb2Te5) 0.96 The following is abbreviated as Nb 0.04 -GST.

[0052] Example 5

[0053] This embodiment is a phase change memory thin film, wherein the phase change memory material is composed of Nb. 0.045 (Ge2Sb2Te5) 0.955 The following is abbreviated as Nb 0.045 -GST.

[0054] The phase change memory films in Examples 1-5 can be prepared by magnetron sputtering. The specific preparation process is as follows: Phase change memory films are prepared by co-sputtering Nb and Ge2Sb2Te5 targets on a SiO2 / Si substrate under an argon (Ar) atmosphere. The purity of the Nb and Ge2Sb2Te5 targets is greater than 99.999% (atomic percentage), and the purity of the argon gas is greater than 99.999% (volume percentage). In this example, the sputtering background vacuum is higher than 4 × 10⁻⁶. -4 The sputtering power of Pa, Nb targets and Ge2Sb2Te5 targets is adjustable from 5W to 100W, the argon gas flow rate is adjustable from 10sccm to 50sccm, and the sputtering pressure is 0.2Pa to 0.6Pa.

[0055] Comparative Example 1

[0056] The comparative example is a phase change memory thin film, wherein the phase change memory material composition is Ge2Sb2Te5, hereinafter abbreviated as GST.

[0057] The phase change storage films in all the above embodiments and comparative examples have the same thickness.

[0058] The following will combine Figures 3-5 This paper describes the electrical properties of the phase change memory thin film of this application.

[0059] Figure 3 This is a graph showing the resistance of the phase change storage thin film as a function of temperature for each embodiment and comparative example. Figure 3 As shown, with increasing temperature, each phase change storage film undergoes a phase transition from amorphous to polycrystalline state, accompanied by a reversible transition between high-resistivity and low-resistivity states. Compared to the GST thin film material in Comparative Example 1, such as Figure 3 Compared to the GST film in Comparative Example 1, the transition temperature between the high-resistivity and low-resistivity states is approximately 160-180°C, while the transition temperature between the high-resistivity and low-resistivity states of the phase change storage films in the embodiments of this application is between 180-300°C, exhibiting better high-temperature stability and less susceptibility to operating temperature effects. Furthermore, from... Figure 4 It is evident that the phase change memory films of the various embodiments of this application exhibit better stability in the high-resistivity state, with a more gradual temperature change, and even better stability in the amorphous state. Furthermore, as the Nb doping concentration increases, the crystallization temperature of the phase change memory film increases, thus enabling its use in various temperature environments and achieving good stability.

[0060] Figure 4 This is a test graph showing the 10-year data retention of the phase change memory films in various embodiments and comparative examples. Figure 4 As shown, the 10-year data retention temperature of the phase change memory film varies with the Nb atomic content. Higher Nb content results in a higher 10-year data retention temperature, ranging from 148 to 230°C. In contrast, the comparative phase change memory material has a 10-year data retention temperature of only 87°C, significantly lower than that of the phase change memory films in the embodiments of this application. Therefore, it can be demonstrated that the phase change memory film of this application can achieve more durable data retention performance.

[0061] Figure 5 The X-ray photoelectron spectrum of the phase change memory film of this application after annealing at 280°C is shown below. Figure 5 As shown, during the phase transition from amorphous to polycrystalline state in the phase change memory film, Nb participates in the crystallization process of Ge-Sb-Te, altering the crystallization process and crystal structure of Ge-Sb-Te. This demonstrates that Nb doping changes the binding energy of Ge / Sb / Te atoms. During the transition from crystalline to amorphous state, Nb can participate in the crystallization process of Ge-Sb-Te, combining with its atoms to form a stable lattice structure, thereby achieving a stable intermediate resistive state structure.

[0062] The above tests show that Nb can effectively alter the crystallization process and crystal structure of Ge-Sb-Te, resulting in a smoother phase transition characteristic in the phase change memory film. Furthermore, the phase change memory film of this application exhibits good high-temperature stability and strong data retention. By doping with different amounts of Nb, phase change memory materials with different phase transition curves can be obtained, making it possible to manipulate the intermediate resistive state.

[0063] Device Examples

[0064] T-shaped phase change memory cells were fabricated using the phase change memory films of Examples 1-5 and Comparative Example 1, respectively. The specific fabrication process of the T-shaped phase change memory cells is as follows:

[0065] S1) A conductive layer 60 (Al, TiN, etc., adjustable to the micrometer level) is deposited on a clean Si / SiO2 substrate 11. Figure 6 As shown;

[0066] S2) An electrode material layer (TiN, W, etc., adjustable below the micrometer level) is deposited on the conductive layer 60 to form the electrode layer 12, such as... Figure 7 As shown;

[0067] S3) The electrode layer 12 is etched using an etching process and filled with a dielectric material (such as SiO2). The remaining portion of the electrode layer 12 forms the lower electrode 20 and the common electrode 50, respectively. The filled dielectric material forms an insulating dielectric layer 40, such as... Figure 8 As shown;

[0068] S4) Deposit a phase change material thin film layer 13 and an upper electrode layer 14 (such as TiN) on the etched substrate 11. Figure 9 As shown;

[0069] S5) The phase change material thin film layer 13 is etched using an etching process to form the phase change material layer 30, and the upper electrode layer 14 is etched to form the upper electrode 10, thus successfully fabricating the T-type phase change memory cell. Figure 10 As shown.

[0070] This preparation method is simple and practical, and can be manufactured using existing complementary metal-oxide-semiconductor (CMOS) processes without the need for complex preparation procedures.

[0071] The following combination Figures 11-12 The phase change performance of different phase change memory cells is explained.

[0072] Figure 11 This shows the time-varying relationship (including drift coefficient) of the completely amorphous resistance of the phase-change memory cell corresponding to each embodiment and comparative example. Figure 11As shown, the phase change memory cell based on phase change film has lower resistance drift characteristics compared to the phase change memory cell of GST, demonstrating that Nb doping can effectively reduce the resistance drift characteristics of the GST system, which is beneficial to the accuracy and stability of neuromorphic computing.

[0073] Figure 12 For Nb 0.035 The resistance-voltage relationship of the phase-change memory cell corresponding to GST is shown in the figure below. Figure 12 As shown, the phase change memory cell of the phase change memory thin film in this application embodiment has a smoother phase change characteristic compared to the phase change memory cell of GST, and the resistance of the phase change memory cell changes more continuously.

[0074] Figure 13 For Nb 0.035 - The resistance-voltage relationship of the phase change memory cell corresponding to the GST phase change memory film at a pulse width of 200ns; Figure 14 For Nb 0.035 - The relationship between the phase change memory cell corresponding to the GST phase change memory film and the partial amorphous resistance-time relationship (including drift coefficient) excited by the corresponding pulse voltage. For example... Figure 13 and Figure 14 As shown, the phase change memory cell corresponding to the phase change memory film in this application embodiment, through a series of partially amorphous states obtained by using controlled pulse voltage, and the resistance drift test of each partially amorphous state, demonstrates the good structural stability of each partially amorphous state and the small resistance drift.

[0075] As demonstrated by the above tests, the phase change memory film of this application exhibits continuously adjustable intermediate state resistance with a large number of adjustable resistance states. Multiple resistance states can be continuously adjusted by controlling the number and amplitude of pulse voltages, for example, more than 10 states, with clear distinction between the resistance values ​​of each state. Simultaneously, the intermediate state resistance drift is small, and the structure is stable. Utilizing the phase change memory film of this application, a phase change memory with low resistance drift characteristics can be obtained. By controlling the operating voltage, a phase change memory with a series of stable, distinguishable, and low-drift intermediate resistance states can be generated, making it highly valuable for practical applications such as multi-state storage and in-memory computing.

[0076] The terminology used in the above embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification and appended claims of this application, the singular expressions “a,” “an,” “the,” “the,” “the,” and “this” are intended to also include expressions such as “one or more,” unless the context clearly indicates otherwise.

[0077] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0078] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A phase change memory material, characterized in that, The phase change storage material includes Nb δ (Ge2Sb2Te5) 1-δ 、Nb δ (Ge1Sb2Te4) 1-δ 、Nb δ (Ge2Sb2Te4) 1-δ or Nb δ (Ge3Sb4Te8) 1-δ At least one of the following, wherein the atomic content δ of Nb ranges from 0.01 to 0.

5.

2. The phase change storage material according to claim 1, characterized in that, The phase change temperature of the phase change storage material is 180~300℃.

3. The phase change storage material according to claim 1 or 2, characterized in that, The phase change storage material has more than 5 adjustable resistance states.

4. A phase-change memory cell, characterized in that, The device includes a positive electrode, a negative electrode, a phase change material layer, and an insulating dielectric layer. The phase change material layer and the insulating dielectric layer are both disposed between the positive electrode and the negative electrode. The two ends of the phase change material layer are in contact with the positive electrode and the negative electrode, respectively, and the insulating dielectric layer surrounds the periphery of the phase change material layer. The phase change material layer is formed using the phase change storage material as described in any one of claims 1-3.

5. A phase-change memory, characterized in that, Includes the phase-change memory unit as described in claim 4.

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