Ecc check management method and device of vehicle-mounted chip and storage medium

Abstract

Embodiments of the application disclose an ECC check management method and device for a vehicle-mounted chip and a storage medium. The method comprises: obtaining first to-be-checked data, which comprises data content; splicing the data content and first physical address information corresponding to the data content to obtain second to-be-checked data; checking the second to-be-checked data to obtain checked data, and storing the checked data in a memory module without saving address information; obtaining the checked data when decoding, combining the checked data and second physical address information to obtain to-be-decoded data; decoding the to-be-decoded data to obtain the second to-be-checked data; performing an address removal operation on the second to-be-checked data to obtain the first to-be-checked data, and reporting a bus address when an ECC error occurs. The embodiments of the application can make the vehicle-mounted chip meet a higher functional safety level ECC check function on the basis of saving storage space.

Description

Technical Field

[0001] This application relates to the field of automotive chip technology, specifically to an ECC verification management method, device, and storage medium for automotive chips. Background Technology

[0002] With the increasing popularity of new energy vehicles and the rapid upgrading of various high technologies, new energy vehicles are gradually being accepted by the public and have become a future development trend. New energy vehicles can integrate various on-board chips to improve their intelligence.

[0003] Currently, the reliability of data transmission and storage during the driving process of new energy vehicles directly affects driving safety. Functional safety requires simultaneous error correcting code (ECC) verification of data and address information. This requires storage space to store data, address, and verification information simultaneously. However, the ECC functionality of automotive chips is not space-saving enough. Therefore, the problem of how to implement the ECC function of automotive chips while saving storage space urgently needs to be solved. Summary of the Invention

[0004] This application provides an ECC verification management method, device, and storage medium for automotive chips, which enables automotive chips to meet higher functional safety levels of ECC verification while saving storage space.

[0005] In a first aspect, embodiments of this application provide an ECC verification management method for an automotive chip, the automotive chip comprising: an error correction and verification (ECC) module and a memory module; the method comprising:

[0006] Obtain the first data to be verified, which includes: data content;

[0007] The ECC module concatenates the data content with the first physical address information corresponding to the data content to obtain the second data to be verified.

[0008] The second data to be verified is verified to obtain verified data. The verified data is then stored in the memory module without saving the address information.

[0009] During decoding, the verified data is obtained from the memory module, and the verified data is combined with the second physical address information to obtain the data to be decoded;

[0010] The data to be decoded is decoded to obtain the second data to be verified;

[0011] Perform an address removal operation on the second data to be verified to obtain the first data to be verified.

[0012] When an ECC error occurs in the first data to be verified, the bus address is reported.

[0013] Secondly, embodiments of this application provide an ECC verification management device for an automotive chip, the automotive chip including: an error correction and verification ECC module and a memory module; the device includes: an acquisition unit, a splicing unit, a verification unit, a combination unit, a decoding unit, an address removal operation unit, and a reporting unit, wherein,

[0014] The acquisition unit is used to acquire first data to be verified, the first data to be verified including: data content;

[0015] The splicing unit is used to splice the data content with the first physical address information corresponding to the data content through the ECC module to obtain the second data to be verified.

[0016] The verification unit is used to verify the second data to be verified, obtain the verified data, store the verified data in the memory module, and not save the address information.

[0017] The combination unit is used to obtain the verified data from the memory module during decoding, and combine the verified data with the second physical address information to obtain the data to be decoded;

[0018] The decoding unit is used to decode the data to be decoded to obtain the second data to be verified;

[0019] The address removal operation unit is used to perform an address removal operation on the second data to be verified to obtain the first data to be verified.

[0020] The reporting unit is used to report the bus address when an ECC error occurs in the first data to be verified.

[0021] Thirdly, embodiments of this application provide an in-vehicle chip, including a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for performing the steps in the first aspect of embodiments of this application.

[0022] Fourthly, embodiments of this application provide an in-vehicle terminal, which includes the in-vehicle chip described in the third aspect.

[0023] Fifthly, embodiments of this application provide a computer-readable storage medium storing a computer program for electronic data interchange, wherein the computer program causes a computer to perform some or all of the steps described in the first aspect of embodiments of this application.

[0024] Implementing the embodiments of this application has the following beneficial effects:

[0025] As can be seen, the ECC verification management method, device, and storage medium for automotive chips described in this application embodiment are applied to automotive chips. The automotive chip includes: an error correction and verification ECC module and a memory module; acquiring first data to be verified, the first data to be verified includes: data content; concatenating the data content with the first physical address information corresponding to the data content through the ECC module to obtain second data to be verified; verifying the second data to be verified to obtain verified data; storing the verified data in the memory module without saving the address information; during decoding, retrieving the verified data from the memory module; combining the verified data with the second physical address information to obtain data to be decoded; decoding the data to be decoded to obtain the second data to be verified; performing an address removal operation on the second data to be verified to obtain the first data to be verified; when an ECC error occurs in the first data to be verified, reporting the bus address. Thus, security is improved, the functional safety level is enhanced, and no additional space is occupied, saving costs. That is, while saving storage space, the automotive chip can meet the ECC verification function of a higher functional safety level. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a flowchart illustrating an ECC verification management method for an automotive chip provided in an embodiment of this application.

[0028] Figure 2 This is a schematic diagram of the structure of an in-vehicle chip provided in an embodiment of this application;

[0029] Figure 3 This is a functional unit block diagram of an ECC verification management device for an automotive chip provided in an embodiment of this application. Detailed Implementation

[0030] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that comprises a series of steps or units is not limited to the listed steps or units, but in one possible example includes steps or units not listed, or in one possible example includes other steps or units inherent to these processes, methods, products, or apparatuses.

[0031] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0032] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0033] Please see Figure 1 , Figure 1 This is a flowchart illustrating an ECC verification management method for an automotive chip provided in this application embodiment. As shown in the figure, it is applied to an automotive chip, which includes an error correction and verification (ECC) module and a memory module. The ECC verification management method for this automotive chip includes:

[0034] 101. Obtain the first data to be verified, which includes: data content.

[0035] In this embodiment, the first data to be verified can be off-chip data or on-chip data of the vehicle chip. For example, when the first data to be verified is off-chip data, it can be data sent by a peripheral device communicating with the vehicle chip; when the first data to be verified is on-chip data, it can be cached data. The data content includes n bits of data. For example, the data content can be 64 bits of data. The memory module can be a flash memory module or a memory (such as static random access memory).

[0036] 102. The ECC module concatenates the data content with the first physical address information corresponding to the data content to obtain the second data to be verified.

[0037] In practice, the data content and the corresponding first physical address information can be concatenated according to preset requirements, thus increasing the bit length and improving security. These preset requirements can be set in advance, or the system defaults to ECC algorithm requirements.

[0038] 103. Verify the second data to be verified to obtain verified data, store the verified data in the memory module, and do not save the address information.

[0039] In this embodiment, the second data to be verified can be ECC verified to obtain the verified data. The verified data is then stored in the memory module without saving the address information, thus saving memory space and avoiding wasting extra storage space.

[0040] In this embodiment, since the address is fixed when accessing the flash memory module (flash) or static random-access memory (SRAM), it does not need to be stored. This allows for the retention of more error correction and verification (ECC) information, resulting in better security and improved functional safety, without consuming additional space and saving costs. Furthermore, it is assumed that the address portion is golden and will never err.

[0041] 104. During decoding, the verified data is obtained from the memory module, and the verified data is combined with the second physical address information to obtain the data to be decoded.

[0042] In this embodiment, during decoding, verified data can be retrieved from the memory module and combined with the second physical address information to obtain the data to be decoded. The first physical address information and the second physical address information can be the same or different.

[0043] In this embodiment of the application, the ECC verification logic repairs single-bit errors and identifies multi-bit errors; it can generate an ECC error flag, and the single error correction (SEC) and double error detection (DED) of ECC generate ECC flags respectively.

[0044] 105. Decode the data to be decoded to obtain the second data to be verified.

[0045] In the specific implementation, the data to be decoded is decoded to obtain the second data to be verified, which is equivalent to restoring the second data to be verified.

[0046] 106. Perform an address removal operation on the second data to be verified to obtain the first data to be verified.

[0047] In this embodiment of the application, the address of the second data to be verified can be removed to obtain the first data to be verified, which is equivalent to restoring the first data to be verified.

[0048] 107. When an ECC error occurs in the first data to be verified, report the bus address.

[0049] In this embodiment of the application, when the first data to be verified has an ECC error, the bus address can be reported, the first data to be verified can be aligned n bits based on the bus address, and then some or all of the data in the non-main array area of ​​the aligned data can be pre-encoded to obtain the third decoded data, so as to retain more ECC information.

[0050] The preset encoding can be set in advance or used by the system default. Preset encoding refers to encoding in areas inaccessible by the bus, specifically using a specified number of bits to distinguish it from addresses accessible by the bus. The specified number of bits can be set in advance or used by the system default.

[0051] In this embodiment of the application, some or all of the data in the non-main array region of the data after the first data to be verified is aligned can be pre-encoded to retain more ECC information.

[0052] In this embodiment, ECC encoding supports simultaneous ECC verification of both physical address and data. The flash memory module only stores the verified data. Before ECC encoding, 64 bits of data, 8 bits of ECC verification information, and 20 bits of address information can be concatenated according to ECC requirements. When an ECC error occurs, the bus address is reported. The bus address is aligned to 64 bits. Special encoding is performed on the non-main array area bus, preserving more ECC information, improving security, and enhancing the functional safety level, without occupying additional space and saving costs.

[0053] The main array area is the area accessible by the bus, the non-main array area is the area inaccessible by the bus, and the special encoding is used to encode the inaccessible area according to a specified number of bits, so as to distinguish it from the address accessible by the bus.

[0054] For example, when an ECC error occurs, the bus address is reported. The bus address is aligned to 64 bits, and the non-master array area bus is specially encoded.

[0055] To illustrate further, in this embodiment of the application, during ECC encoding and decoding, the physical address and data of the flash memory module are verified. ECC encoding supports simultaneous ECC verification of both the physical address and the data, and the flash memory module can save only the verified data information. For example, physical addresses A[14:0], {2'b01, region[1:0], A[14:0]} are used as the physical addresses participating in ECC verification, as follows:

[0056] MAIN ARRAY:region=2'b00;

[0057] NVR CFG Sector:region=2'b01;

[0058] NVR Sector:region = 2'b10;

[0059] RDN Sector:region = 2'b11;

[0060] The data involved in the ECC calculation are {2'b01, region[1:0], A[14:0], din[63:0]}; when saving the ECC calculation results, it is not necessary to save the information of {2'b01, region[1:0], A[14:0]}.

[0061] In addition, before performing ECC decoding, the 64-bit data, 8-bit ECC check information, and 20-bit address information can be concatenated according to ECC requirements. When an ECC error occurs, the bus address is reported, and the bus address is aligned to 64 bits. The non-master array area bus is specially encoded, as follows:

[0062] NVR CFG Sector:bus_addr[31:24]=8'h15;

[0063] NVR Sector:bus_addr[31:24]=8'h16;

[0064] RDN Sector:bus_addr[31:24]=8'h17;

[0065] The above address range is the system's reserved address space;

[0066] The correspondence between the ECC check data bit width and the required check bits is as follows:

[0067] 4-11 5 12-26 6 27-57 7 58-120 8 121-247 9 248-502 10 503-1013 11 1014-2036 12 2037-4083 13 4084-8178 14

[0068] In the specific implementation, the 8-bit ECC check information is located in the 92-bit data as follows: 90, 63, 31, 15, 7, 3, 1, 0.

[0069] In practical applications, because the address is fixed when accessing flash memory modules or SRAM, it doesn't need to be stored. This preserves more ECC information, improves security, and enhances functional safety levels without consuming extra space, thus saving costs. Furthermore, it's assumed that the address portion is golden and will never err.

[0070] Optionally, the following steps may also be included:

[0071] A1. Detect whether the data content is a first preset scenario, where the first preset scenario is either an all-zero scenario or an all-one scenario;

[0072] A2. When the data content is the first preset scenario, add the first preset sequence to the data content to obtain the updated data content.

[0073] In this embodiment, the first preset scenario can be preset or defaulted to by the system. The first preset scenario can be an all-zero scenario or an all-one scenario. The all-zero scenario is when the data content is all zeros, and the all-one scenario is when the data content is all one. The first preset sequence is a sequence that is neither all zeros nor all one ones. The first preset sequence can be preset or defaulted to by the system. For example, the first preset sequence may include 0b010101.

[0074] In the specific implementation, it can detect whether the data content is a first preset scenario. The first preset scenario is either an all-zero scenario or an all-one scenario. When the data content is the first preset scenario, the first preset sequence is added to the data content to obtain the updated data content. After adding the first preset sequence, ECC verification can be implemented.

[0075] Optionally, step A2 above, which involves adding a first preset sequence to the data content to obtain the updated data content, may include the following steps:

[0076] A21. Extract keywords from the data content to obtain target keywords;

[0077] A22. Determine the target location of the target keyword;

[0078] A23. Determine the first preset sequence corresponding to the target keyword;

[0079] A24. Based on the target location, add the first preset sequence to the data content to obtain the updated data content.

[0080] In this embodiment, keyword extraction can be performed on the data content to obtain target keywords. The target keywords can be specified keywords, which can be preset or defaulted to by the system. The target position of the target keyword can be determined, and the first preset sequence corresponding to the target keyword can be determined. That is, the mapping relationship between preset keywords and preset sequences can be stored in advance. Based on the mapping relationship, the first preset sequence corresponding to the target keyword can be determined. Then, according to the target position, the first preset sequence is added to the data content to obtain the updated data content. That is, the first preset sequence can be inserted at the target position. In this way, personalized sequence addition can be achieved based on the content and position of the keyword, which can not only realize ECC verification, but also improve security.

[0081] Optionally, the following steps may also be included:

[0082] B1. Detect whether the first physical address information is a second preset scenario, where the second preset scenario is an all-1 scenario;

[0083] B2. When the first physical address information is the second preset scenario, add the second preset sequence to the first physical address information to obtain the updated first physical address information.

[0084] In this embodiment, the second preset scenario can be preset or defaulted to by the system. The second preset scenario can be an all-zero scenario or an all-one scenario. The all-zero scenario is when the data content is all zeros, and the all-one scenario is when the data content is all one. The second preset sequence is a sequence that is neither all zeros nor all one ones. The second preset sequence can be preset or defaulted to by the system. For example, the second preset sequence may include 0b010101.

[0085] In the specific implementation, it can detect whether the physical address information is the second preset scenario. The second preset scenario is either the all-zero scenario or the all-one scenario. When the physical address information is the second preset scenario, the second preset sequence can be added to the physical address information to obtain the updated physical address information. After adding the second preset sequence, ECC verification can be implemented.

[0086] Optionally, step B2 above, which involves adding a second preset sequence to the first physical address information to obtain the updated first physical address information, may include the following steps:

[0087] B21. Determine the target attribute information corresponding to the first physical address information, wherein the target attribute information includes: target address length and target storage interval location;

[0088] B22. Determine the reference sequence corresponding to the length of the target address;

[0089] B23. Determine the target optimization parameters corresponding to the target storage space location, wherein the target optimization parameters include: the target optimization location and the target optimization content;

[0090] B24. Optimize the reference sequence according to the target optimization parameters to obtain the second preset sequence;

[0091] B25. Add the second preset sequence to the first physical address information to obtain the updated first physical address information.

[0092] In this embodiment of the application, target attribute information corresponding to the first physical address information can be determined. The target attribute information may include: target address length and target storage interval location. A preset mapping relationship between address length and sequence can be stored in advance. Then, based on the mapping relationship, a reference sequence corresponding to the target address length can be determined.

[0093] Next, a pre-stored mapping relationship between preset storage space locations and optimization parameters can be established. Based on this mapping relationship, the target optimization parameters corresponding to the target storage space location can be determined. The target optimization parameters include the target optimization location and the target optimization content. The reference sequence can then be optimized based on the target optimization parameters to obtain a second preset sequence. For example, the content corresponding to the target optimization location in the reference sequence can be replaced with the target optimization content. The second preset sequence is then added to the first physical address information to obtain the updated first physical address information. Based on the address length and storage range location of the first physical address information, a personalized sequence can be introduced, which can not only achieve ECC verification but also improve security.

[0094] As can be seen, the ECC verification management method for automotive chips described in this application embodiment is applied to automotive chips, which include: an error correction and verification ECC module and a memory module; acquiring first data to be verified, the first data to be verified includes: data content; concatenating the data content with the first physical address information corresponding to the data content through the ECC module to obtain second data to be verified; verifying the second data to be verified to obtain verified data; storing the verified data in the memory module without saving the address information; during decoding, retrieving the verified data from the memory module; combining the verified data with the second physical address information to obtain data to be decoded; decoding the data to be decoded to obtain the second data to be verified; performing an address removal operation on the second data to be verified to obtain the first data to be verified; when an ECC error occurs in the first data to be verified, reporting the bus address, thereby improving security and enhancing the functional safety level without occupying additional space and saving costs. That is, while saving storage space, the automotive chip can meet the ECC verification function of a higher functional safety level.

[0095] Consistent with the above embodiments, please refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of an in-vehicle chip provided in an embodiment of this application. As shown in the figure, the in-vehicle chip includes a processor, a memory, a communication interface, and one or more programs. The one or more programs are stored in the memory and configured to be executed by the processor. The in-vehicle chip also includes an error correction and verification (ECC) module and a memory module. In this embodiment, the programs include instructions for performing the following steps:

[0096] Obtain the first data to be verified, which includes: data content;

[0097] The ECC module concatenates the data content with the first physical address information corresponding to the data content to obtain the second data to be verified.

[0098] The second data to be verified is verified to obtain verified data. The verified data is then stored in the memory module without saving the address information.

[0099] During decoding, the verified data is obtained from the memory module, and the verified data is combined with the second physical address information to obtain the data to be decoded;

[0100] The data to be decoded is decoded to obtain the second data to be verified;

[0101] Perform an address removal operation on the second data to be verified to obtain the first data to be verified.

[0102] When an ECC error occurs in the first data to be verified, the bus address is reported.

[0103] Optionally, the above procedure may also include instructions for performing the following steps:

[0104] Detect whether the data content is a first preset scenario, wherein the first preset scenario is an all-0 scenario or an all-1 scenario;

[0105] When the data content is the first preset scenario, the first preset sequence is added to the data content to obtain the updated data content.

[0106] Optionally, in the step of adding a first preset sequence to the data content to obtain updated data content, the above procedure includes instructions for performing the following steps:

[0107] Keyword extraction is performed on the data content to obtain the target keywords;

[0108] Determine the target location of the target keyword;

[0109] Determine the first preset sequence corresponding to the target keyword;

[0110] Based on the target location, the first preset sequence is added to the data content to obtain the updated data content.

[0111] Optionally, the above procedure may also include instructions for performing the following steps:

[0112] Detect whether the first physical address information is a second preset scenario, where the second preset scenario is either an all-zero scenario or an all-one scenario;

[0113] When the first physical address information is the second preset scenario, the second preset sequence is added to the first physical address information to obtain the updated first physical address information.

[0114] Optionally, in the step of adding a second preset sequence to the first physical address information to obtain updated first physical address information, the above procedure includes instructions for performing the following steps:

[0115] Determine the target attribute information corresponding to the first physical address information, wherein the target attribute information includes: target address length and target storage range location;

[0116] Determine the reference sequence corresponding to the length of the target address;

[0117] Determine the target optimization parameters corresponding to the target storage space location, the target optimization parameters including: target optimization location and target optimization content;

[0118] The reference sequence is optimized according to the target optimization parameters to obtain the second preset sequence;

[0119] The second preset sequence is added to the first physical address information to obtain the updated first physical address information.

[0120] As can be seen, the vehicle-mounted chip described in this application embodiment includes: an error correction and verification (ECC) module and a memory module; it acquires first data to be verified, which includes data content; the ECC module concatenates the data content with the corresponding first physical address information to obtain second data to be verified; the second data to be verified is verified to obtain verified data; the verified data is stored in the memory module without saving the address information; during decoding, the verified data is retrieved from the memory module and combined with the second physical address information to obtain data to be decoded; the data to be decoded is decoded to obtain second data to be verified; the address of the second data to be verified is removed to obtain first data to be verified; when an ECC error occurs in the first data to be verified, the bus address is reported. Thus, the security is better, the functional safety level is improved, and no additional space is occupied, saving costs. That is, while saving storage space, the vehicle-mounted chip can meet the ECC verification function of a higher functional safety level.

[0121] Figure 3 This is a functional unit block diagram of an ECC verification management device 300 for an automotive chip, as described in this application embodiment. The ECC verification management device 300 is applied to an automotive chip, which includes an error correction and verification (ECC) module and a memory module. The ECC verification management device 300 includes an acquisition unit 301, a splicing unit 302, a verification unit 303, a combination unit 304, a decoding unit 305, an address removal operation unit 306, and a reporting unit 307.

[0122] The acquisition unit 301 is used to acquire first data to be verified, the first data to be verified including: data content;

[0123] The splicing unit 302 is used to splice the data content with the first physical address information corresponding to the data content through the ECC module to obtain the second data to be verified.

[0124] The verification unit 303 is used to verify the second data to be verified, obtain the verified data, store the verified data in the memory module, and not save the address information.

[0125] The combination unit 304 is used to obtain the verified data from the memory module during decoding, and combine the verified data with the second physical address information to obtain the data to be decoded;

[0126] The decoding unit 305 is used to decode the data to be decoded to obtain the second data to be verified.

[0127] The address removal operation unit 306 is used to perform an address removal operation on the second data to be verified to obtain the first data to be verified.

[0128] The reporting unit 307 is used to report the bus address when an ECC error occurs in the first data to be verified.

[0129] Optionally, the device 300 is further specifically used for:

[0130] Detect whether the data content is a first preset scenario, wherein the first preset scenario is an all-0 scenario or an all-1 scenario;

[0131] When the data content is the first preset scenario, the first preset sequence is added to the data content to obtain the updated data content.

[0132] Optionally, in the aspect of adding a first preset sequence to the data content to obtain the updated data content, the device 300 is specifically used for:

[0133] Keyword extraction is performed on the data content to obtain the target keywords;

[0134] Determine the target location of the target keyword;

[0135] Determine the first preset sequence corresponding to the target keyword;

[0136] Based on the target location, the first preset sequence is added to the data content to obtain the updated data content.

[0137] Optionally, the device 300 is further specifically used for:

[0138] Detect whether the first physical address information is a second preset scenario, where the second preset scenario is either an all-zero scenario or an all-one scenario;

[0139] When the first physical address information is the second preset scenario, the second preset sequence is added to the first physical address information to obtain the updated first physical address information.

[0140] Optionally, in the aspect of adding a second preset sequence to the first physical address information to obtain the updated first physical address information, the device 300 is specifically used for:

[0141] Determine the target attribute information corresponding to the first physical address information, wherein the target attribute information includes: target address length and target storage range location;

[0142] Determine the reference sequence corresponding to the length of the target address;

[0143] Determine the target optimization parameters corresponding to the target storage space location, the target optimization parameters including: target optimization location and target optimization content;

[0144] The reference sequence is optimized according to the target optimization parameters to obtain the second preset sequence;

[0145] The second preset sequence is added to the first physical address information to obtain the updated first physical address information.

[0146] As can be seen, the ECC verification management device for automotive chips described in this application embodiment is applied to automotive chips, which include: an error correction and verification ECC module and a memory module; it acquires first data to be verified, which includes data content; it concatenates the data content with the first physical address information corresponding to the data content through the ECC module to obtain second data to be verified; it verifies the second data to be verified to obtain verified data; it stores the verified data in the memory module without saving the address information; during decoding, it retrieves the verified data from the memory module, combines the verified data with the second physical address information to obtain data to be decoded; it decodes the data to be decoded to obtain the second data to be verified; it performs an address removal operation on the second data to be verified to obtain the first data to be verified; when an ECC error occurs in the first data to be verified, it reports the bus address. Thus, it has better security and improves the functional safety level without occupying extra space and saving costs. That is, it can enable automotive chips to meet higher functional safety level ECC verification functions while saving storage space.

[0147] It is understood that the functions of each program module of the ECC verification management device of the vehicle chip in this embodiment can be specifically implemented according to the methods in the above method embodiments. The specific implementation process can be referred to the relevant descriptions in the above method embodiments, and will not be repeated here.

[0148] This application also provides an in-vehicle terminal, which includes an in-vehicle chip. The in-vehicle terminal may include at least one of the following: an in-vehicle navigation system, an in-vehicle controller, an in-vehicle refrigerator, an in-vehicle dashcam, an in-vehicle battery, an in-vehicle steering wheel, etc., and is not limited thereto.

[0149] This application also provides a computer-readable storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments, wherein the computer includes an on-board chip.

[0150] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0151] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0152] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0153] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0154] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0155] If the integrated units described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0156] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include: flash drive, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.

[0157] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for ECC verification management of an automotive chip, characterized in that, The vehicle-mounted chip includes: an error correction and verification (ECC) module and a memory module; the method includes: Obtain the first data to be verified, which includes: data content; The ECC module concatenates the data content with the first physical address information corresponding to the data content to obtain the second data to be verified. The second data to be verified is verified to obtain verified data. The verified data is then stored in the memory module without saving the address information. During decoding, the verified data is obtained from the memory module, and the verified data is combined with the second physical address information to obtain the data to be decoded; The data to be decoded is decoded to obtain the second data to be verified; Perform an address removal operation on the second data to be verified to obtain the first data to be verified. When an ECC error occurs in the first data to be verified, the bus address is reported.

2. The method according to claim 1, characterized in that, The method further includes: Detect whether the data content is a first preset scenario, wherein the first preset scenario is an all-0 scenario or an all-1 scenario; When the data content is the first preset scenario, the first preset sequence is added to the data content to obtain the updated data content.

3. The method according to claim 2, characterized in that, The step of adding a first preset sequence to the data content to obtain the updated data content includes: Keyword extraction is performed on the data content to obtain the target keywords; Determine the target location of the target keyword; Determine the first preset sequence corresponding to the target keyword; Based on the target location, the first preset sequence is added to the data content to obtain the updated data content.

4. The method according to claim 1, characterized in that, The method further includes: Detect whether the first physical address information is a second preset scenario, where the second preset scenario is either an all-zero scenario or an all-one scenario; When the first physical address information is the second preset scenario, the second preset sequence is added to the first physical address information to obtain the updated first physical address information.

5. The method according to claim 4, characterized in that, The step of adding a second preset sequence to the first physical address information to obtain the updated first physical address information includes: Determine the target attribute information corresponding to the first physical address information, wherein the target attribute information includes: target address length and target storage range location; Determine the reference sequence corresponding to the length of the target address; Determine the target optimization parameters corresponding to the target storage interval location, the target optimization parameters including: target optimization location and target optimization content; The reference sequence is optimized according to the target optimization parameters to obtain the second preset sequence; The second preset sequence is added to the first physical address information to obtain the updated first physical address information.

6. An ECC verification management device for an automotive chip, characterized in that, The vehicle-mounted chip includes an error correction and verification (ECC) module and a memory module; the device includes an acquisition unit, a splicing unit, a verification unit, a combination unit, a decoding unit, an address removal operation unit, and a reporting unit, wherein... The acquisition unit is used to acquire first data to be verified, the first data to be verified including: data content; The splicing unit is used to splice the data content with the first physical address information corresponding to the data content through the ECC module to obtain the second data to be verified. The verification unit is used to verify the second data to be verified, obtain the verified data, store the verified data in the memory module, and not save the address information. The combination unit is used to obtain the verified data from the memory module during decoding, and combine the verified data with the second physical address information to obtain the data to be decoded; The decoding unit is used to decode the data to be decoded to obtain the second data to be verified; The address removal operation unit is used to perform an address removal operation on the second data to be verified to obtain the first data to be verified. The reporting unit is used to report the bus address when an ECC error occurs in the first data to be verified.

7. The apparatus according to claim 6, characterized in that, The device is also specifically used for: Detect whether the data content is a first preset scenario, wherein the first preset scenario is an all-0 scenario or an all-1 scenario; When the data content is the first preset scenario, the first preset sequence is added to the data content to obtain the updated data content.

8. A vehicle-mounted chip, characterized in that, It includes a processor and a memory, the memory being used to store one or more programs and configured to be executed by the processor, the programs including instructions for performing the steps of the method as described in any one of claims 1-5.

9. A vehicle-mounted terminal, characterized in that, The vehicle-mounted terminal includes the vehicle-mounted chip as described in claim 8.

10. A computer-readable storage medium, characterized in that, A computer program for storing electronic data interchange is provided, wherein the computer program causes a computer to perform the method as described in any one of claims 1-5.

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