Clock recovery method and system for optical fiber communication system

Abstract

The application provides a clock recovery method and system for an optical fiber communication system, comprising the following steps: S1, establishing a training data set to construct a learnable clock recovery structure; S2, training the learnable clock recovery structure by using the data set; and S3, compensating for IQ skew and recovering a clock by using the trained learnable clock recovery structure and deploying the learnable clock recovery structure in the optical fiber communication system. The application constructs a learnable clock recovery structure, a training method and a deployment process, and the method and system can be used for IQ skew compensation and clock recovery of an optical communication system, and can improve the transmission system performance of the optical fiber communication system.

Description

Technical Field

[0001] This invention relates to the technical field of optical fiber communication systems, and more specifically, to a clock recovery method and system for optical fiber communication systems. Background Technology

[0002] In the field of fiber optic communication systems, signal quality is affected by various non-ideal effects of devices. Among these, the sampling clock error of high-speed ADCs and the skew error of the ADC IQ signals are some of the non-ideal effects affecting signal quality. IQ skew refers to the time delay between the I and Q signals, while sampling clock error refers to the deviation between the set sampling frequency and the actual sampling frequency of the I and Q signals. This leads to a deterioration in the received bit error rate performance, requiring clock recovery to compensate for the non-ideal effects.

[0003] Patent document CN102255683A (application number: 201110191185.5) discloses a clock recovery method for a high-speed optical time-division multiplexing system. This method places the baseband clock within the high-speed optical time-division multiplexing data band by adding phase modulation, so that the high-speed optical time-division multiplexing data and the baseband clock can be transmitted together. At the receiving end, the baseband clock only needs to be separated to realize the baseband clock recovery of the optical time-division multiplexing system.

[0004] To address the aforementioned shortcomings, this invention proposes a clock recovery method and system for optical fiber communication systems. It proposes a learnable clock recovery structure, uses an adaptive algorithm to track parameters, calculates the IQ skew and sampling clock error, and feeds this back to the ADC to achieve clock recovery for the optical fiber communication system. This improves the signal quality of the optical fiber communication system and reduces the bit error rate after transmission. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the purpose of this invention is to provide a clock recovery method and system for optical fiber communication systems.

[0006] A clock recovery method for an optical fiber communication system provided by the present invention includes:

[0007] Step S1: Construct a learnable clock recovery structure and deploy the learnable clock recovery structure in the digital signal processing system of the fiber optic communication system;

[0008] Step S2: Using data from the fiber optic communication system, adaptively learn the parameters of the learnable clock recovery structure;

[0009] Step S3: Calculate the IQ skew and clock sampling error using the parameters in the learnable clock recovery structure, and feed them back to the ADC to complete clock recovery.

[0010] Preferably, the construction of the learnable clock recovery structure includes: a fast Fourier transform layer, an IQ skew compensation structure layer, and an inverse Fourier transform layer;

[0011] The time-domain digital signal is converted into a frequency-domain digital signal using a Fast Fourier Transform (FFT) layer. Based on the frequency-domain digital signal, the frequency-domain digital signals of the I-channel and Q-channel after IQ skew compensation are calculated using an IQ skew compensation structure layer. The obtained frequency-domain digital signal is then inversely transformed into a time-domain digital signal using an Inverse Fast Fourier Transform (IFFT) layer.

[0012] The IQ skew compensation structure layer includes:

[0013]

[0014]

[0015] in and These are the frequency domain digital signals of the input and output of channel I in the i-th block, respectively. and Let be the frequency domain digital signals of the input and output of the i-th Q-channel, respectively. and These are the learnable parameters for the I and Q paths.

[0016] Preferably, the deployment of the learnable clock recovery structure in the digital signal processing system of the optical fiber communication system includes: deploying the learnable clock recovery structure between frequency offset compensation and dispersion compensation in the digital signal processing system.

[0017] Preferably, step S2 employs:

[0018] Step S2.1: Collect the input signals and corresponding symbols of the receiving end of the optical fiber communication system in chronological order;

[0019] Step S2.2: Preprocess the input signal at the receiving end, divide it into N blocks to obtain the digital signal before it is input to the digital signal processing system;

[0020] Step S2.3: Input the digital signals of the N blocks of digital signal processing system before input to the digital signal processing system after the deployment of the learnable clock recovery structure, and adaptively track the parameters of the learnable clock recovery structure.

[0021] Preferably, step S2.3 employs the following:

[0022] Step S2.3.1: Preprocess the digital signals input to the N digital signal processing system;

[0023] Step S2.3.2: Perform a real-valued Fast Fourier Transform on the preprocessed digital signal sequence to obtain the frequency domain digital signal sequences of the I and Q channels;

[0024] Step S2.3.3: Using the parameters in the learnable clock recovery structure, perform IQskew compensation on the frequency domain digital signal sequence to obtain the processed frequency domain digital signal sequence;

[0025] Step S2.3.4: Perform inverse fast Fourier transform and subsequent digital signal processing on the processed frequency domain digital signal sequence to obtain the time domain signal output;

[0026] Step S2.3.5: Perform error calculation and gradient backpropagation on the time-domain signal output, and adaptively update the parameters of the learnable clock recovery structure.

[0027] Preferably, step S3 employs the following methods:

[0028] Step S3.1: Record the parameter changes of N learnable clock recovery structures;

[0029] Step S3.2: Based on the parameter change sequence, perform linear fitting and calculate IQ skew and sampling clock error;

[0030] Step S3.3: Feedback to the ADC to perform IQ skew compensation and clock recovery.

[0031] Preferably, step S3.2 employs the following:

[0032] Skew = τ I -τ Q

[0033] TR I =-k I ·F s

[0034] TR Q =-k Q ·F s

[0035] Among them, Skew and TR I and TR Q These represent IQ skew, I-channel sampling error, and Q-channel sampling error, respectively, and F s k is the current sampling frequency. I and k Q τ represents the slopes of the I and Q paths after linear fitting of the learnable clock recovery structure parameter variation sequence; I and τ Q This represents the time delay of the I-path and the Q-path.

[0036] A clock recovery system for an optical fiber communication system according to the present invention includes:

[0037] Module M1: Constructs a learnable clock recovery structure and deploys the learnable clock recovery structure in the digital signal processing system of the fiber optic communication system;

[0038] Module M2: Adaptively learns the parameters of a learnable clock recovery structure using data from the fiber optic communication system;

[0039] Module M3: Utilizes the parameters in the learnable clock recovery structure to calculate IQ skew and clock sampling error, and feeds back to the ADC to complete clock recovery.

[0040] Preferably, the construction of the learnable clock recovery structure includes: a fast Fourier transform layer, an IQ skew compensation structure layer, and an inverse Fourier transform layer;

[0041] The time-domain digital signal is converted into a frequency-domain digital signal using a Fast Fourier Transform (FFT) layer. Based on the frequency-domain digital signal, the frequency-domain digital signals of the I-channel and Q-channel after IQ skew compensation are calculated using an IQ skew compensation structure layer. The obtained frequency-domain digital signal is then inversely transformed into a time-domain digital signal using an Inverse Fast Fourier Transform (IFFT) layer.

[0042] The IQ skew compensation structure layer includes:

[0043]

[0044]

[0045] in and These are the frequency domain digital signals of the input and output of channel I in the i-th block, respectively. and Let be the frequency domain digital signals of the input and output of the i-th Q-channel, respectively. and These are the learnable parameters for the I and Q paths;

[0046] The digital signal processing system that deploys a learnable clock recovery structure in an optical fiber communication system includes: deploying the learnable clock recovery structure between frequency offset compensation and dispersion compensation in the digital signal processing system.

[0047] Preferably, the module M2 adopts:

[0048] Module M2.1: Collects the input signals and corresponding symbols of the receiving end of the optical fiber communication system in chronological order;

[0049] Module M2.2: Preprocesses the input signal from the receiving end, dividing it into N blocks to obtain the digital signal before it is input to the digital signal processing system;

[0050] Module M2.3: Inputs the digital signals from the N blocks of the digital signal processing system before they are input into the digital signal processing system after the deployment of the learnable clock recovery structure, and adaptively tracks the parameters of the learnable clock recovery structure;

[0051] The module M2.3 adopts:

[0052] Module M2.3.1: Preprocesses the digital signals input to the N-block digital signal processing system;

[0053] Module M2.3.2: Perform a real-valued Fast Fourier Transform on the preprocessed digital signal sequence to obtain the frequency domain digital signal sequences of the I and Q channels;

[0054] Module M2.3.3: Utilizes the parameters in the learnable clock recovery structure to perform IQskew compensation on the frequency domain digital signal sequence, obtaining the processed frequency domain digital signal sequence;

[0055] Module M2.3.4: Performs inverse fast Fourier transform on the processed frequency domain digital signal sequence and performs subsequent digital signal processing to obtain the time domain signal output;

[0056] Module M2.3.5: Performs error calculation and gradient backpropagation on the time-domain signal output, and adaptively updates the parameters of the learnable clock recovery structure;

[0057] The module M3 adopts:

[0058] Module M3.1: Records the parameter changes of N learnable clock recovery structures;

[0059] Module M3.2: Performs linear fitting based on the parameter change sequence, and calculates IQ skew and sampling clock error;

[0060] Module M3.3: Feedback ADC, performing IQ skew compensation and clock recovery;

[0061] The module M3.2 adopts:

[0062] Skew = τ I -τ Q

[0063] TR I =-k I ·F s

[0064] TR Q =-k Q ·Fs

[0065] Among them, Skew and TR I and TR Q These represent IQ skew, I-channel sampling error, and Q-channel sampling error, respectively, and F s k is the current sampling frequency. I and k Q τ represents the slopes of the I and Q paths after linear fitting of the learnable clock recovery structure parameter variation sequence; I and τ Q This represents the time delay of the I-path and the Q-path.

[0066] Compared with the prior art, the present invention has the following beneficial effects:

[0067] 1. This invention designs a learnable clock recovery structure to achieve adaptive compensation of IQ skew;

[0068] 2. This invention proposes a method for calculating sampling error from skew values, thereby realizing the calculation and feedback compensation of clock sampling error;

[0069] 3. This system can be applied to any channel, and in particular, it is suitable for various fiber optic communication scenarios such as single polarization and dual polarization. Attached Figure Description

[0070] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0071] Figure 1 This is a schematic diagram of the clock recovery process for an optical fiber communication system according to the present invention.

[0072] Figure 2 This is a schematic diagram of the clock recovery structure of the present invention used in optical fiber communication systems.

[0073] Figure 3 This is a diagram illustrating the IQ skew results of an optical fiber communication system according to an embodiment of the present invention.

[0074] Figure 4 This is a diagram illustrating the sampling error results of an optical fiber communication system according to an embodiment of the present invention. Detailed Implementation

[0075] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0076] Example 1

[0077] The clock recovery method for optical fiber communication systems provided by the present invention, such as Figure 1 As shown, it includes:

[0078] Step S1: Construct a learnable clock recovery structure and deploy it in the digital signal processing system of the fiber optic communication system;

[0079] Step S2: Using data from the fiber optic communication system, adaptively learn the parameters of the learnable clock recovery structure;

[0080] Step S3: Calculate the IQ skew and clock sampling error using the parameters in the learnable clock recovery structure, and feed them back to the ADC to complete clock recovery.

[0081] Specifically, step S1 employs the following:

[0082] Step S1.1: Construct a learnable clock recovery structure;

[0083] Step S1.2: Deploy the learnable clock recovery structure in the digital signal processing system after frequency offset compensation and before dispersion compensation.

[0084] Specifically, step S1.1 employs the following:

[0085] Step S1.1.1: Construct the Fast Fourier Transform (FFT) layer and the Inverse Fast Fourier Transform (IFFT) layer;

[0086] Step S1.1.2: Construct the IQ skew compensation structure;

[0087] Step S1.2.3: Set the skew value in the IQ skew compensation structure as a learnable parameter.

[0088] Specifically, the construction of the IQ skew compensation structure, setting the skew value as a learnable parameter, is defined by the following formula:

[0089]

[0090]

[0091] in and These are the frequency domain digital signals of the input and output of channel I in the i-th block, respectively. and Let be the frequency domain digital signals of the input and output of the i-th Q-channel, respectively. and These are the learnable parameters for the I and Q paths;

[0092] Specifically, step S2 employs the following:

[0093] Step S2.1: Collect the input signals and corresponding symbols of the receiving end of the optical fiber communication system in chronological order;

[0094] Step S2.2: Preprocess the input signal at the receiving end, divide it into N blocks to obtain the digital signal before it is input to the digital signal processing system;

[0095] Step S2.3: Input the digital signals of the N blocks of digital signal processing system before input to the digital signal processing system after the deployment of the learnable clock recovery structure, and adaptively track the parameters of the learnable clock recovery structure.

[0096] Specifically, step S2.3 employs the following:

[0097] Step S2.3.1: Preprocess the digital signals input to the N digital signal processing system;

[0098] Step S2.3.2: Perform a real-valued Fast Fourier Transform on the preprocessed digital signal sequence to obtain the frequency domain digital signal sequences of the I and Q channels;

[0099] Step S2.3.3: Using the parameters in the learnable clock recovery structure, perform IQskew compensation on the frequency domain digital signal sequence to obtain the processed frequency domain digital signal sequence;

[0100] Step S2.3.4: Perform inverse fast Fourier transform and subsequent digital signal processing on the processed frequency domain digital signal sequence to obtain the time domain signal output;

[0101] Step S2.3.5: Perform error calculation and gradient backpropagation on the time-domain signal output, and adaptively update the parameters of the learnable clock recovery structure.

[0102] Specifically, step S3 employs the following:

[0103] Step S3.1: Record the parameter changes of N learnable clock recovery structures;

[0104] Step S3.2: Based on the parameter change sequence, perform linear fitting and calculate IQ skew and sampling clock error;

[0105] Step S3.3: Feedback to the ADC to perform IQ skew compensation and clock recovery.

[0106] Specifically, step S3.2 involves: performing linear fitting based on the parameter change sequence, and calculating the IQ skew and sampling clock error, using the following formulas:

[0107] Skew = τ I -τQ

[0108] TR I =-k I ·F s

[0109] TR Q =-k Q ·F s

[0110] Among them, Skew and TR I and TR Q These represent IQ skew, I-channel sampling error, and Q-channel sampling error, respectively, and F s k is the current sampling frequency. I and k Q These are the slopes of the I and Q paths after linear fitting of the learnable clock recovery structure parameter change sequence, respectively.

[0111] The clock recovery system for optical fiber communication systems provided by the present invention, such as Figure 2 As shown, it includes:

[0112] Module M1: Constructs a learnable clock recovery structure and deploys it in the digital signal processing system of the fiber optic communication system;

[0113] Module M2: Adaptively learns the parameters of a learnable clock recovery structure using data from the fiber optic communication system;

[0114] Module M3: Utilizes the parameters in the learnable clock recovery structure to calculate IQ skew and clock sampling error, and feeds back to the ADC to complete clock recovery.

[0115] Specifically, module M1 adopts:

[0116] Module M1.1: Constructs a learnable clock recovery structure;

[0117] Module M1.2: Deploys a learnable clock recovery structure in a digital signal processing system after frequency offset compensation and before dispersion compensation.

[0118] Specifically, module M1.1 adopts:

[0119] Module M1.1.1: Constructs the Fast Fourier Transform (FFT) layer and the Inverse Fast Fourier Transform (IFFT) layer;

[0120] Module M1.1.2: Constructs the IQ skew compensation structure;

[0121] Module M1.2.3: Sets the skew value in the IQ skew compensation structure as a learnable parameter.

[0122] Specifically, the construction of the IQ skew compensation structure, setting the skew value as a learnable parameter, is defined by the following formula:

[0123]

[0124]

[0125] in and These are the frequency domain digital signals of the input and output of channel I in the i-th block, respectively. and Let be the frequency domain digital signals of the input and output of the i-th Q-channel, respectively. and These are the learnable parameters for the I and Q paths;

[0126] Specifically, module M2 adopts:

[0127] Module M2.1: Collects the input signals and corresponding symbols from the receiver of the fiber optic communication system in chronological order;

[0128] Module M2.2: Preprocesses the input signal from the receiving end, dividing it into N blocks to obtain the digital signal before it is input to the digital signal processing system;

[0129] Module M2.3: Inputs the digital signals from the N blocks of the digital signal processing system before input to the digital signal processing system after the deployment of the learnable clock recovery structure, and adaptively tracks the parameters of the learnable clock recovery structure.

[0130] Specifically, module M2.3 adopts:

[0131] Module M2.3.1: Preprocesses the digital signals input to the N-block digital signal processing system;

[0132] Module M2.3.2: Perform a real-valued Fast Fourier Transform on the preprocessed digital signal sequence to obtain the frequency domain digital signal sequences of the I and Q channels;

[0133] Module M2.3.3: Utilizes the parameters in the learnable clock recovery structure to perform IQskew compensation on the frequency domain digital signal sequence, obtaining the processed frequency domain digital signal sequence;

[0134] Module M2.3.4: Performs inverse fast Fourier transform and subsequent digital signal processing on the processed frequency domain digital signal sequence to obtain the time domain signal output;

[0135] Module M2.3.5: Performs error calculation and gradient backpropagation on the time-domain signal output, and adaptively updates the parameters of the learnable clock recovery structure.

[0136] Specifically, module M3 adopts:

[0137] Module M3.1: Records the parameter changes of N learnable clock recovery structures;

[0138] Module M3.2: Performs linear fitting based on the parameter change sequence, and calculates IQ skew and sampling clock error;

[0139] Module M3.3: Feedback ADC, performs IQ skew compensation and clock recovery.

[0140] Specifically, module M3.2 employs the following method: based on the parameter change sequence, it performs linear fitting to calculate IQ skew and sampling clock error, using the following formula:

[0141] Skew = τ I -τ Q

[0142] TR I =-k I ·F s

[0143] TR Q =-k Q ·F s

[0144] Among them, Skew and TR I and TR Q These represent IQ skew, I-channel sampling error, and Q-channel sampling error, respectively, and F s k is the current sampling frequency. I and k Q These are the slopes of the I and Q paths after linear fitting of the learnable clock recovery structure parameter change sequence, respectively.

[0145] Example 2

[0146] Example 2 is a preferred example of Example 1.

[0147] This invention also provides a clock recovery result illustration for an optical fiber communication system. The experimental optical fiber communication system has an optical fiber length of 811 km, dual polarization, single channel, 4-bit / symbol modulation, an ADC sampling rate of 100 Gsam / s, a transmission rate of 400 Gbit / s, and uses coherent modulation and demodulation. Figure 3 The results of skew compensation for the XI-channel signal are presented, demonstrating that the proposed algorithm tracks the magnitude of the skew. Figure 4The paper presents the skew sequences corresponding to different sampling rate errors, revealing a clear relationship between the slope of the fitted skew and the magnitude of the sampling error. In the above scenario, the proposed method and system capture the IQ skew and sampling clock error present in the ADC, resolving the non-ideal effects in ADCs during optical communication and improving transmission performance.

[0148] The technical problem to be solved by this invention is to realize a clock recovery method for optical fiber communication systems. This invention designs a learnable clock recovery structure to achieve adaptive compensation of IQ skew. This invention proposes a method to calculate the sampling error from the skew value, realizing the calculation and feedback compensation of clock sampling error, improving the signal quality of optical fiber communication and reducing the bit error rate after transmission. The clock recovery method and system for optical fiber communication systems proposed in this invention can be applied to any channel, and in particular, it is suitable for various optical fiber communication scenarios such as single polarization and dual polarization.

[0149] Those skilled in the art will understand that, in addition to implementing the system, apparatus, and their modules provided by this invention in purely computer-readable program code, the same program can be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system, apparatus, and their modules provided by this invention can be considered a hardware component, and the modules included therein for implementing various programs can also be considered structures within the hardware component; alternatively, modules for implementing various functions can be considered both software programs implementing the method and structures within the hardware component.

[0150] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A clock recovery method for an optical fiber communication system, characterized in that, include: Step S1: Construct a learnable clock recovery structure and deploy the learnable clock recovery structure in the digital signal processing system of the fiber optic communication system; Step S2: Using data from the fiber optic communication system, adaptively learn the parameters of the learnable clock recovery structure; Step S3: Calculate the IQ skew and clock sampling error using the parameters in the learnable clock recovery structure, and feed them back to the ADC to complete clock recovery; Step S2 employs the following: Step S2.1: Collect the input signals and corresponding symbols of the receiving end of the optical fiber communication system in chronological order; Step S2.2: Preprocess the input signal at the receiving end, divide it into N blocks to obtain the digital signal before it is input to the digital signal processing system; Step S2.3: Input the digital signals of the N blocks before the input to the digital signal processing system into the digital signal processing system after the deployment of the learnable clock recovery structure, and adaptively track the parameters of the learnable clock recovery structure; Step S2.3 adopts the following: Step S2.3.1: [The text appears to be incomplete and contains several grammatical errors. A more accurate translation would require the full context.] N The digital signal is preprocessed before it is input to the block digital signal processing system; Step S2.3.2: Perform a real-valued Fast Fourier Transform on the preprocessed digital signal sequence to obtain the frequency domain digital signal sequences of the I and Q channels; Step S2.3.3: Using the parameters in the learnable clock recovery structure, perform IQ skew compensation on the frequency domain digital signal sequence to obtain the processed frequency domain digital signal sequence; Step S2.3.4: Perform inverse fast Fourier transform and subsequent digital signal processing on the processed frequency domain digital signal sequence to obtain the time domain signal output; Step S2.3.5: Perform error calculation and gradient backpropagation on the time-domain signal output, and adaptively update the parameters of the learnable clock recovery structure; Step S3 employs the following: Step S3.1: Record the parameter changes of N learnable clock recovery structures; Step S3.2: Based on the parameter change sequence, perform linear fitting and calculate IQ skew and sampling clock error; Step S3.3: Feedback to the ADC to perform IQ skew compensation and clock recovery; Step S3.2 adopts the following: in, , and These represent IQ skew, I-channel sampling error, and Q-channel sampling error, respectively. The current sampling frequency, and These are the slopes of the I and Q paths after linear fitting of the learnable clock recovery structure parameter change sequence, respectively. and This represents the time delay of the I-path and the Q-path.

2. The clock recovery method for an optical fiber communication system according to claim 1, characterized in that, The constructed learnable clock recovery structure includes: a fast Fourier transform layer, an IQ skew compensation structure layer, and an inverse Fourier transform layer; The time-domain digital signal is converted into a frequency-domain digital signal using a Fast Fourier Transform (FFT) layer. Based on the frequency-domain digital signal, the frequency-domain digital signals of the I-channel and Q-channel after IQ skew compensation are calculated using an IQ skew compensation structure layer. The obtained frequency-domain digital signal is then inversely transformed into a time-domain digital signal using an Inverse Fast Fourier Transform (IFFT) layer. The IQ skew compensation structure layer includes: in and The first i The frequency domain digital signals of the input and output of the I-channel in the block. and The first i The frequency domain digital signals of the input and output of the Q-channel. and These are the learnable parameters for the I and Q paths.

3. The clock recovery method for an optical fiber communication system according to claim 1, characterized in that, The digital signal processing system that deploys a learnable clock recovery structure in an optical fiber communication system includes: deploying the learnable clock recovery structure between frequency offset compensation and dispersion compensation in the digital signal processing system.

4. A clock recovery system for an optical fiber communication system, characterized in that, include: Module M1: Constructs a learnable clock recovery structure and deploys the learnable clock recovery structure in the digital signal processing system of the fiber optic communication system; Module M2: Adaptively learns the parameters of a learnable clock recovery structure using data from the fiber optic communication system; Module M3: Utilizes the parameters in the learnable clock recovery structure to calculate IQ skew and clock sampling error, and feeds back to the ADC to complete clock recovery; The module M2 adopts: Module M2.1: Collects the input signals and corresponding symbols of the receiving end of the optical fiber communication system in chronological order; Module M2.2: Preprocesses the input signal from the receiving end, dividing it into N blocks to obtain the digital signal before it is input to the digital signal processing system; Module M2.3: Inputs the digital signals from the N blocks of the digital signal processing system before they are input into the digital signal processing system after the deployment of the learnable clock recovery structure, and adaptively tracks the parameters of the learnable clock recovery structure; The module M2.3 adopts: Module M2.3.1: Will N The digital signal is preprocessed before it is input to the block digital signal processing system; Module M2.3.2: Perform a real-valued Fast Fourier Transform on the preprocessed digital signal sequence to obtain the frequency domain digital signal sequences of the I and Q channels; Module M2.3.3: Utilizes the parameters in the learnable clock recovery structure to perform IQ skew compensation on the frequency domain digital signal sequence, obtaining the processed frequency domain digital signal sequence; Module M2.3.4: Performs inverse fast Fourier transform on the processed frequency domain digital signal sequence and performs subsequent digital signal processing to obtain the time domain signal output; Module M2.3.5: Performs error calculation and gradient backpropagation on the time-domain signal output, and adaptively updates the parameters of the learnable clock recovery structure; The module M3 adopts: Module M3.1: Records the parameter changes of N learnable clock recovery structures; Module M3.2: Performs linear fitting based on the parameter change sequence, and calculates IQ skew and sampling clock error; Module M3.3: Feedback ADC, performing IQ skew compensation and clock recovery; The module M3.2 adopts: in, , and These represent IQ skew, I-channel sampling error, and Q-channel sampling error, respectively. The current sampling frequency, and These are the slopes of the I and Q paths after linear fitting of the learnable clock recovery structure parameter change sequence, respectively. and This represents the time delay of the I-path and the Q-path.

5. The clock recovery system for an optical fiber communication system according to claim 4, characterized in that, The constructed learnable clock recovery structure includes: a fast Fourier transform layer, an IQ skew compensation structure layer, and an inverse Fourier transform layer; The time-domain digital signal is converted into a frequency-domain digital signal using a Fast Fourier Transform (FFT) layer. Based on the frequency-domain digital signal, the frequency-domain digital signals of the I-channel and Q-channel after IQ skew compensation are calculated using an IQ skew compensation structure layer. The obtained frequency-domain digital signal is then inversely transformed into a time-domain digital signal using an Inverse Fast Fourier Transform (IFFT) layer. The IQ skew compensation structure layer includes: in and The first i The frequency domain digital signals of the input and output of the I-channel in the block. and The first i The frequency domain digital signals of the input and output of the Q-channel. and These are the learnable parameters for the I and Q paths; The digital signal processing system that deploys a learnable clock recovery structure in an optical fiber communication system includes: deploying the learnable clock recovery structure between frequency offset compensation and dispersion compensation in the digital signal processing system.

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