Packaged device, packaging method, quantum processor, and quantum computer

Abstract

The application discloses a packaging device, a packaging method, a quantum processor and a quantum computer. The packaging device comprises two first circuit boards, a second circuit board, and a quantum chip. The first circuit boards are provided with first connecting ends for connecting signal connectors and first electric connecting points corresponding to the first connecting ends. The second circuit board is located between the two first circuit boards and is provided with a second connecting end for connecting the quantum chip and second electric connecting points corresponding to the second connecting end. The second electric connecting points comprise first electric connecting points and second electric connecting points distributed on different surfaces. The first electric connecting points are connected with the first electric connecting points of one of the first circuit boards. The second electric connecting points are connected with the first electric connecting points of the other first circuit board. The packaging device can increase the number of signal connectors, and is suitable for packaging more quantum bits.

Description

Technical Field

[0001] This application belongs to the field of quantum computing technology, especially the field of quantum chip packaging. In particular, this application relates to a packaging device, packaging method, quantum processor and quantum computer. Background Technology

[0002] As a core component of quantum computers, quantum chips are relatively fragile devices. Exposed quantum chips are highly susceptible to environmental clutter, which can affect signal transmission and performance. Therefore, in practical applications, quantum chips must be encapsulated using packaging devices (such as enclosures) to form a quantum processor before use. In current technology, the circuit board used for quantum chip encapsulation within the packaging device is typically connected to signal connectors (e.g., SMA connectors) via soldering. Currently, the number of signal connectors that can be installed in packaging devices for quantum chips is limited, and the existing structure of these devices restricts the development of quantum chips. Furthermore, with the iterative development of quantum computing technology, this problem will become more pronounced, severely impacting the expansion of the number of qubits. Invention Content

[0003] To overcome the shortcomings of the prior art, this application provides a packaging device, packaging method, quantum processor and quantum computer. The packaging device distributes the signal connectors onto two circuit boards for mounting, which helps to increase the number of signal connectors that can be installed.

[0004] One embodiment of this application provides a packaging device, including: two first circuit boards, each having a first connection end for connecting a signal connector and a first electrical connection point corresponding to the first connection end; and a second circuit board located between the two first circuit boards, having a second connection end for connecting a quantum chip and a second electrical connection point corresponding to the second connection end, the second electrical connection point including a first type of electrical connection point and a second type of electrical connection point distributed on different surfaces, wherein the first type of electrical connection point is connected to a first electrical connection point of one of the first circuit boards, and the second type of electrical connection point is connected to a first electrical connection point of the other first circuit board.

[0005] As described above, the first electrical connection point and the second connection point of the packaged device have the same physical properties.

[0006] The packaging device described above, wherein the first circuit board and the second circuit board are detachably stacked.

[0007] In the packaged device described above, the signal connector is mounted on a fixed substrate, on which a pillar is formed penetrating the first circuit board and the second circuit board, and the end of the signal connector is connected to the first connection end.

[0008] The packaging device described above further includes a transition circuit board located between the first circuit board and the second circuit board. A connecting conductor is formed on the transition circuit board. One end of the connecting conductor is used to connect to a first electrical connection point, and the other end of the connecting conductor is used to connect to a second electrical connection point.

[0009] In the encapsulation device described above, the end of the connecting conductor has an elastic structure.

[0010] As described above, the adapter circuit board of the packaged device is a button-type connector.

[0011] One embodiment of this application provides a packaging method, comprising: providing a quantum chip; and providing a packaging device as described above, connecting a first connection terminal to a signal connector, bonding a second connection terminal to the quantum chip, and placing a second circuit board between two first circuit boards, connecting a first type of electrical connection point to a first electrical connection point of one of the first circuit boards, and connecting a second type of electrical connection point to a first electrical connection point of the other first circuit board.

[0012] One embodiment of this application provides a quantum processor, including: a quantum chip; and a packaging device as described above, wherein the quantum chip is bonded to the second connection terminal.

[0013] One embodiment of this application provides a quantum computer including the quantum processor described above.

[0014] Compared with existing technologies, the packaging device provided in this application includes: two first circuit boards, each having a first connection end for connecting a signal connector and a first electrical connection point corresponding to the first connection end; and a second circuit board located between the two first circuit boards, having a second connection end for connecting a quantum chip and a second electrical connection point corresponding to the second connection end. The second electrical connection point includes a first type of electrical connection point and a second type of electrical connection point distributed on different surfaces. The first type of electrical connection point is connected to a first electrical connection point on one of the first circuit boards, and the second type of electrical connection point is connected to a first electrical connection point on the other first circuit board. This packaging device places the second circuit board between the two first circuit boards, allowing the second electrical connection points located on different surfaces of the second circuit board to be connected to different second circuit boards. This method helps to increase the number of signal connectors that can be installed, thus making it suitable for packaging more qubits. Attached Figure Description

[0015] Figure 1 A schematic diagram of a low-temperature superconducting environment for mounting and packaging devices is provided for this application;

[0016] Figure 2 A schematic diagram of the structure of a packaging device provided in this application;

[0017] Figure 3 A schematic diagram of a packaging method provided in this application;

[0018] Figure 4 A schematic diagram of another packaging device provided in this application;

[0019] Figure 5 A schematic diagram of another encapsulation method provided in this application.

[0020] Explanation of reference numerals in the attached figures:

[0021] 1 - First circuit assembly; 10 - First circuit board; 11 - First connection terminal; 12 - First electrical connection point; 13 - First limiting hole;

[0022] 2 – Second circuit assembly; 20 – Second circuit board; 21 – Second connection terminal; 22 – Second connection point; 23 – Second limiting hole.

[0023] 3 - Adapter circuit board, 30 - Connecting conductor,

[0024] 41 - Fixed substrate, 410 - Connector mounting hole, 42 - Fixed cover plate, 5 - Pillar, 6 - Chip mounting platform, 7 - Heat conduction structure. Detailed Implementation

[0025] In order to make

[0026] The objectives, technical solutions, and advantages of the embodiments of this application are clearer now. The embodiments of this application will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments. The division of the following embodiments is for ease of description and should not constitute any limitation on the specific implementation of this application. The various embodiments can be combined with and referenced by each other without contradiction.

[0027] It should be noted that the terms "comprising" and "having," and any variations thereof, in the specification, claims, and accompanying drawings of this application are intended to cover a non-exclusive inclusion. For example, a process, method, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such process, method, product, or apparatus. Furthermore, it should be understood that this application uses references to "above" and "below" at various levels based on the accompanying drawings.

[0028] Figure 1 This is a schematic diagram of a low-temperature superconducting environment for mounting and encapsulating devices, as provided in this application.

[0029] A quantum chip, as the hardware structure of quantum computing, is an integration of qubit hardware units. Quantum chips are relatively fragile components; exposed quantum chips are highly susceptible to clutter in the surrounding environment, which can affect signal transmission and performance. To ensure stable operation, quantum chips must be encapsulated using packaging devices in practical applications. After being encapsulated to form a quantum processor, the quantum chip is placed in a low-temperature superconducting environment. For example, after encapsulation, the quantum processor is installed in… Figure 1 The hardware platform shown includes structures such as a cooling plate, an adapter plate, and a mounting bracket. The quantum processor is typically fixed to the bottom of the bracket, and a shell is formed outside the bracket to isolate the quantum processor from external environments (not shown in the figure). The signal ports on the quantum chip, such as read signal lines, pulse signal lines, and flux control signal lines, need to be connected to external signal generating or receiving devices via the adapter lines of the packaged device. Therefore, signal connectors need to be installed on the surface of the packaged device. The purpose of packaging is to provide the quantum chip with basic signal connections, good thermal contact, a stable ground plane, and basic shielding protection.

[0030] The size of the packaged device determines the amount of space required for placement in a low-temperature superconducting environment; the structure of the packaged device determines the spatial arrangement of the signal transmission lines connecting the quantum chip, which in turn determines the signal transmission quality and affects the efficiency of installation and disassembly. Improving the structure of quantum chip packaging boxes to achieve miniaturization, compactness, and structural rationality has always been one of the key tasks for quantum computing research companies.

[0031] In the existing technology, quantum chips mainly adopt two packaging methods. One method is to have a chip mounting plate inside the packaging box, on which the quantum chip is pasted. A PCB board (Printed Circuit Board) with transmission lines is arranged around the chip mounting plate and the transmission lines are connected to the ports of the quantum chip. The other method is to place the quantum chip in a fixing slot or cavity and then cover it with a PCB board to press and fix the quantum chip. In the same way, the transmission lines on the PCB board need to be connected to the ports of the quantum chip.

[0032] Printed circuit boards also need to be connected to external circuitry, typically through soldering, and this external circuitry must pass through the encapsulation enclosure. Traditional packaging structures require connecting the circuit board to both the quantum chip and the external circuitry, resulting in a large workload, low installation efficiency, and difficulty in removing the chip after packaging. Installing packaged devices in low-temperature superconducting environments is also very inconvenient. This problem will become even more pronounced as the number of qubits increases.

[0033] Furthermore, when installing this packaged device in a low-temperature superconducting environment, the inconvenience of wiring the external circuit to the quantum processor and the inconvenience of cabling make it impossible for existing packaged devices used for quantum chip packaging to make full use of external space to install signal connectors.

[0034] Therefore, embodiments of this application provide a packaging device, packaging method, quantum processor, and quantum computer, wherein the packaging device enables efficient and convenient installation of the quantum processor.

[0035] Figure 2 A schematic diagram of the structure of a packaging device provided in this application;

[0036] Figure 3 A schematic diagram of a packaging method provided in this application;

[0037] Combination Figure 1 , Figure 2 and Figure 3As shown, the first embodiment of this application provides a packaged device, including: a first circuit assembly 1 and a second circuit assembly 2, wherein the second circuit assembly 2 is detachably placed on the first circuit assembly 1. Specifically, the first circuit assembly 1 has a first connection terminal 11 and a first electrical connection point 12. A first signal transmission line (not shown in the figures) is formed on a first circuit board 10. The first connection terminal 11 and the first electrical connection point 12 can be end structures of the first signal transmission line. The first connection terminal 11 is used to connect to an external circuit, and the first electrical connection point 12 is correspondingly connected to the first connection terminal 11 to enable signal transmission between the two. The second circuit assembly 2 has a second connection terminal 21 and a second electrical connection point 22. The second connection terminal 21 is used to connect to a signal port located on a quantum chip, such as a read signal line, pulse signal line, magnetic flux control signal line, etc., and the second electrical connection point 22 is correspondingly connected to the second connection terminal 21 to enable signal transmission between the two. Furthermore, in specific implementation, when the second circuit component 2 is placed on the first circuit component 1, the second electrical connection point 22 is connected to the first electrical connection point 12. This connection ensures that the electrical signal is transmitted from the first connection terminal 11 to the first electrical connection point 12, and then through the second electrical connection point 22 to the second connection terminal 21, or in the opposite direction, such as ensuring that the electrical signal is transmitted from the second connection terminal 21 to the second electrical connection point 22, and then through the first electrical connection point 12 to the first connection terminal 11. It is understood that, to facilitate the connection between the second electrical connection point 22 and the first electrical connection point 12, the surfaces where the second electrical connection point 22 and the first electrical connection point 12 are located are opposite each other. Therefore, the first connection terminal 11 and the first electrical connection point 12 can be formed on different surfaces, or the second connection terminal 21 and the second electrical connection point 22 can be formed on different surfaces.

[0038] It should be noted that packaging devices in related technologies typically use the same circuit board as a connection medium between the quantum chip and external circuits. This circuit board needs to connect to both the quantum chip and the external circuits. Therefore, during the packaging process of the quantum chip, the bonding connection steps between the packaging device and the quantum chip, and the connection steps between the packaging device and the external circuits, can only be performed step by step. However, the packaging device provided in this application, through its detachable first circuit assembly 1 and second circuit assembly 2, facilitates the simultaneous connection of the first circuit assembly 1 to the external circuit and the bonding connection of the second circuit assembly 2 to the quantum chip. The second circuit assembly 2 is then placed on the first circuit assembly 1, and the second electrical connection point 22 is connected to the first electrical connection point 12. Therefore, this structure helps improve the installation efficiency of the quantum processor.

[0039] In some embodiments, the second circuit component 2 and the first circuit component 1 are connected by a plug-in structure, which allows the second circuit component 2 to be detachably placed on the first circuit component 1. However, it is understood that this application is not limited to this specific implementation. Any structure that enables the separation and connection of the second circuit component 2 and the first circuit component 1, and that ensures that when the two are connected, the second circuit component 2 is placed on the first circuit component 1 and the second electrical connection point 22 is connected to the first electrical connection point 12, is acceptable. In some examples, the plug-in structure includes a post formed on the first circuit component 1 and a limiting hole formed on the second circuit component 2, wherein the limiting hole and the post 5 cooperate with each other.

[0040] In some embodiments, the first circuit assembly 1 includes a first circuit board 10 having the first connection end 11 and the first electrical connection point 12, and a fixing substrate 41 having a pillar 5. The first circuit board 10 has a first limiting hole 13 that mates with the pillar 5. For example, combined with Figure 2 As shown, the first connection end 11 is located on the bottom surface of the first circuit board 10, and the first electrical connection point 12 is located on the top surface of the first circuit board 10; the second circuit assembly 2 includes a second circuit board 20 having the second connection end 21 and the second electrical connection point 22 formed thereon, and the second circuit board 20 has a second limiting hole 23 that mates with the column 5. As an example, combined with Figure 2 As shown, the first connection end 11 is located on the bottom surface of the first circuit board 10, and the first electrical connection point 12 is located on the top surface of the first circuit board 10. The first circuit board 10 and the second circuit board 20 can be stacked on the fixed substrate 41 through the cooperation of the limiting hole and the pillar 5. For example, combined with... Figure 2 As shown, the second circuit assembly 2 may also include a fixing cover plate 42. The fixing base plate 41 and the fixing cover plate 42 cooperate to press the first circuit board 10 and the second circuit board 20, which are located between the fixing base plate 41 and the fixing cover plate 42, together.

[0041] In other embodiments, the packaging device further includes a transition circuit board 3 located between the first circuit board 10 and the second circuit board 20. A connecting conductor 30 is formed on the transition circuit board 3. One end of the connecting conductor 30 is used to connect to the first electrical connection point 12, and the other end is used to connect to the second electrical connection point 22. To prevent damage to the electrical connection point structure and thus affect signal transmission when the connecting conductor 30 contacts the first electrical connection point 12 and the second electrical connection point 22, in one embodiment, the end of the connecting conductor 30 is an elastic structure. The elastic structure forms a buffer, ensuring that the connecting conductor 30 forms a soft contact at the first electrical connection point 12 and the second electrical connection point 22. In another embodiment, the transition circuit board 3 is a button-type connector. The button-type connector and the electrical connection point formed on the circuit board are in end-face contact, resulting in less damage from insertion and extraction forces. Installing a button-type connector between the upper and lower circuit boards completes the vertical connection between the circuit boards.

[0042] The second embodiment of this application provides a packaging method, referring to... Figure 3 As shown, the packaging method includes steps S301 to S302, wherein: step S301 involves providing a quantum chip with signal ports formed on it, such as ports for reading signal lines, pulse signal lines, magnetic flux control signal lines, etc.; and step S302 involves providing the packaging device as described in the above embodiment, connecting the first connection terminal 11 to an external circuit, and connecting the second connection terminal 21 to the quantum chip via wire bonding. Specifically, the second connection terminal 21 with the same signal attributes is connected to the signal port, and the second circuit component 2 is detachably placed on the first circuit component 1, and the second electrical connection point 22 is connected opposite to the first connection point 12 to form a signal transmission connection. The first connection terminal 11 can be connected to a signal connector (such as an SMA connector or an SMP connector) and connected to a signal generating device or a signal receiving device via a transmission cable of an external circuit.

[0043] A third embodiment of this application provides a quantum processor, including: a quantum chip; and a packaging device as described in the previous embodiment, wherein the quantum chip is connected to the second connection terminal 21 via wire bonding. Typically, the quantum chip can be directly mounted on a circuit board. In one embodiment, to dissipate heat accumulated during quantum chip operation, the packaging device may further include a chip mounting platform 6, on which the quantum chip can be mounted, and the chip mounting platform 6 is connected to a heat conduction structure 7, through which the heat of the quantum chip is dissipated.

[0044] It should be noted that the above quantum processors include the packaging devices described in the preceding embodiments, or include packaging devices obtained according to the above packaging methods, and have the same beneficial effects as the above packaging device embodiments and packaging method embodiments, therefore, they will not be described in detail here. For technical details not disclosed in the quantum processor embodiments of this application, those skilled in the art should refer to the descriptions of the above packaging device embodiments or packaging method embodiments for understanding; for the sake of brevity, they will not be repeated here.

[0045] A fourth embodiment of this application provides a quantum computer comprising: a vacuum cooling system including a sealed container; a quantum processor as described in the previous embodiment, the quantum chip being contained within a vacuum cooling environment defined by the sealed container; and a plurality of transmission lines disposed within the vacuum cooling environment for directing electromagnetic signals to at least one selected qubit in the quantum processor and receiving electromagnetic signals from the at least one selected qubit.

[0046] It should be noted that the above quantum computers include the quantum processors described in the previous embodiments and have the same beneficial effects as the quantum processor embodiments described above, therefore, they will not be described again. For technical details not disclosed in the quantum computer embodiments of this application, those skilled in the art should also refer to the descriptions of the above packaging device embodiments or packaging method embodiments for understanding; for the sake of brevity, they will not be repeated here.

[0047] Combination Figure 1 As shown, when installing this packaged device in a low-temperature superconducting environment, the external circuit and the quantum processor are connected via wiring. Due to structural limitations, the number of signal connectors that can be connected to the mounting surface of the packaged device is very limited. This makes wiring and wiring inconvenient, and this problem becomes more prominent as the number of qubits increases. This deficiency seriously affects the expansion of the number of qubits. To address this, this application also provides a packaged device, packaging method, quantum processor, and quantum computer as described in the fifth to eighth embodiments below. This packaged device distributes the signal connectors across two circuit boards for connection and installation, which helps to increase the number of signal connectors that can be installed.

[0048] Figure 4 A schematic diagram of another packaging device provided in this application;

[0049] Figure 5 A schematic diagram of another encapsulation method provided in this application.

[0050] Combination Figure 1 , Figure 4 and Figure 5 As shown, a comparative study Figure 2 and Figure 3As shown, the fifth embodiment of this application provides a packaging device, including: two first circuit boards 10, and a second circuit board 20 located between the two first circuit boards 10, wherein: each first circuit board 10 has a first connection terminal 11 and a first electrical connection point 12. Specifically, a first signal transmission line (not shown in the figure) is formed on the first circuit board 10. The first connection terminal 11 and the first electrical connection point 12 can be the end structures of the first signal transmission line. The first connection terminal 11 is used to connect to a signal connector, and the first electrical connection point 12 is correspondingly connected to the first connection terminal 11 so that signal transmission can be realized between the two. The second circuit board 20 has a second connection terminal 21 and a second electrical connection point 22. Specifically, a second signal transmission line (not shown in the figure) is formed on the second circuit board 20. The second connection terminal 21 and the second electrical connection point 22 can be the end structures of the second signal transmission line. The second connection terminal 21 is used to connect to the signal port on the quantum chip, such as the port of the read signal line, pulse signal line, magnetic flux control signal line, etc., and the second electrical connection point 22 is correspondingly connected to the second connection terminal 21 so that signal transmission can be realized between the two. It should be emphasized that, in this embodiment, in combination with Figure 4 As shown, in the two first circuit boards 10, the upper first circuit board 10 has a first connection terminal 11 located on the top surface and a first electrical connection point 12 located on the bottom surface, while the lower first circuit board 10 has a first connection terminal 11 located on the bottom surface and a first electrical connection point 12 located on the top surface. The second electrical connection point 22 includes a first type of electrical connection point and a second type of electrical connection point distributed on different surfaces. For example, the first type of electrical connection point may be located on the top surface of the second circuit board 20, and the second type of electrical connection point may be located on the bottom surface of the second circuit board 20. Furthermore, the first type of electrical connection point and... Figure 2 The first electrical connection point 12 of the first circuit board 10 located above is connected, and the second type of electrical connection point is connected to... Figure 2 The first electrical connection point 12 of the first circuit board 10 located below is connected. The packaged device places the second circuit board 20 between the two first circuit boards 10, and the second electrical connection points 22 located on different surfaces of the second circuit board 20 can be connected to different first circuit boards 10 respectively. This method helps to increase the number of signal connectors installed. For example, the signal transmission conductor of the signal connector fixed through the connector mounting hole 410 can be fixedly connected to the first connection end 11 on the corresponding first circuit board 10, thereby making it suitable for packaging more qubits.

[0051] In some embodiments, the first electrical connection point 12 and the second connection point 22 have the same physical properties. Specifically, the first electrical connection point 12 and the second connection point 22 have the same shape and size, and the same material structure. For example, they are both superconducting materials, such as aluminum (Al) and niobium (Nb). In specific implementations, they are not limited to these, as long as the material exhibits superconducting properties at a temperature equal to or below the critical temperature is acceptable.

[0052] In some embodiments, the first circuit board 10 and the second circuit board 20 are detachably stacked. In some embodiments, the second circuit board 20 and the first circuit board 10 are connected by a plug-in structure, which allows the second circuit board 20 to be detachably placed on the first circuit board 10. However, it is understood that this application is not limited to this in specific implementations. As long as a structure that allows the separation and connection of the second circuit board 20 and the first circuit board 10 can be achieved, and this structure can ensure that when the two are connected, the second circuit board 20 is placed on the first circuit board 10 and the second electrical connection point 22 is connected to the first electrical connection point 12, it is acceptable. In some embodiments, the signal connector is mounted on a fixed substrate 41, and a post 5 is formed on the fixed substrate 41 that penetrates the first circuit board 10 and the second circuit board 20. The end of the signal connector is connected to the first connection end 11. Specifically, the first circuit board 10 has a first limiting hole 13 that mates with the post 5, and the second circuit board 20 has a second limiting hole 23 that mates with the post 5. The first circuit board 10 and the second circuit board 20 can be stacked on the fixed substrate 41 through the cooperation of the limiting holes and the post 5. For example, in combination Figure 2 As shown, the second circuit assembly 2 may also include a fixing cover plate 42. The fixing base plate 41 and the fixing cover plate 42 cooperate to press the first circuit board 10 and the second circuit board 20, which are located between the fixing base plate 41 and the fixing cover plate 42, together.

[0053] In some embodiments, the packaging device further includes a transition circuit board 3 located between the first circuit board 10 and the second circuit board 20. A connecting conductor 30 is formed on the transition circuit board 3. One end of the connecting conductor 30 is used to connect to the first electrical connection point 12, and the other end is used to connect to the second electrical connection point 22. To avoid damage to the electrical connection point structure and affecting signal transmission when the connecting conductor 30 contacts the first electrical connection point 12 and the second electrical connection point 22, for example, the end of the connecting conductor 30 is an elastic structure. The elastic structure forms a buffer, ensuring that the connecting conductor 30 forms a soft contact at the first electrical connection point 12 and the second electrical connection point 22. For another example, the transition circuit board 30 is a button-type connector. The button-type connector and the electrical connection point formed on the circuit board are in end-face contact, resulting in less damage from insertion and extraction forces. Installing a button-type connector between the upper and lower circuit boards completes the vertical connection between the circuit boards.

[0054] The sixth embodiment of this application provides a packaging method, see reference... Figure 5 As shown, the packaging method includes steps S601 to S602, wherein: step S601, providing a quantum chip, on which signal ports are formed, such as ports for reading signal lines, pulse signal lines, magnetic flux control signal lines, etc.; and step S602, providing a packaging device as described in the fifth embodiment of this application, connecting the first connection end 11 to a signal connector, and bonding the second connection end 21 to the quantum chip. Specifically, the second connection end 21 with the same signal attributes is connected to the signal port, and the second circuit board 20 is placed between two first circuit boards 10, and the first type of electrical connection point 12 is connected to the first electrical connection point 12 of one first circuit board 10, and the second type of electrical connection point is connected to the first electrical connection point 12 of the other first circuit board 10.

[0055] The seventh embodiment of this application provides a quantum processor, including: a quantum chip; and a packaging device as described in the fifth embodiment of this application, wherein the quantum chip is bonded to the second connection terminal 21.

[0056] The eighth embodiment of this application provides a quantum computer, characterized in that it includes a quantum processor as described in the seventh embodiment of this application. Specifically, the quantum computer includes: a vacuum cooling system comprising a sealed container; a quantum processor as described in the seventh embodiment of this application, the quantum chip being contained within a vacuum cooling environment defined by the sealed container; and a plurality of transmission lines disposed within the vacuum cooling environment for directing electromagnetic signals to at least one selected qubit in the quantum processor and receiving electromagnetic signals from the at least one selected qubit.

[0057] The above description, based on the embodiments shown in the drawings, details the structure, features, and effects of this application. The above description is only a preferred embodiment of this application, but this application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of this application, or modifications to equivalent embodiments, that do not exceed the spirit covered by the specification and drawings, should be within the protection scope of this application.

Claims

1. A packaged device, characterized in that, include: Two first circuit boards, each having a first connection terminal for connecting a signal connector, and a first electrical connection point corresponding to the first connection terminal; and, The second circuit board is located between the two first circuit boards and has a second connection terminal for connecting the quantum chip and a second electrical connection point corresponding to the second connection terminal. The second electrical connection point includes a first type of electrical connection point and a second type of electrical connection point distributed on different surfaces. The first type of electrical connection point is connected to a first electrical connection point of one of the first circuit boards, and the second type of electrical connection point is connected to a first electrical connection point of the other first circuit board. The first circuit board and the second circuit board are detachably stacked; The packaging device also includes a transition circuit board located between the first circuit board and the second circuit board, wherein a connecting conductor is formed on the transition circuit board, one end of the connecting conductor is used to connect to the first electrical connection point, and the other end of the connecting conductor is used to connect to the second electrical connection point.

2. The packaged device according to claim 1, characterized in that, The first electrical connection point and the second electrical connection point have the same physical properties.

3. The packaged device according to claim 1, characterized in that, The signal connector is mounted on a fixed substrate, on which a column is formed that penetrates the first circuit board and the second circuit board, and the end of the signal connector is connected to the first connection end.

4. The packaging device according to claim 1, 2, or 3, characterized in that, The ends of the connecting conductor are elastic structures.

5. The packaged device according to claim 1, 2, or 3, characterized in that, The adapter circuit board is a button-type connector.

6. A packaging method, characterized in that, include: Provide quantum chips; The packaged device according to any one of claims 1 to 5 is provided, wherein the first connection terminal is connected to a signal connector, the second connection terminal is bonded to a quantum chip, and the second circuit board is placed between two first circuit boards, wherein the first type of electrical connection point is connected to the first electrical connection point of one of the first circuit boards, and the second type of electrical connection point is connected to the first electrical connection point of the other first circuit board.

7. A quantum processor, characterized in that, include: Quantum chips; and The packaging device according to any one of claims 1 to 5, wherein the quantum chip is bonded to the second connection terminal.

8. A quantum computer, characterized in that, Includes the quantum processor as described in claim 7.

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