Frequency configuration in quantum gates for leakage removal

Abstract

A quantum computing system configured for removing a leakage state can include quantum hardware comprising a first qubit and a second qubit, wherein the first qubit is configured to have a first transition frequency, and wherein the second qubit is configured to have a second transition frequency, the first transition frequency being greater than the second transition frequency. The quantum computing system can include one or more quantum control devices configured to control operations of at least the first qubit and the second qubit, wherein the one or more quantum control devices are configured to implement a quantum gate operation on the first qubit and the second qubit based at least in part on the first transition frequency and the second transition frequency, and wherein the one or more quantum control devices are configured to periodically reset a quantum state of the first qubit.

Description

[0001] Priority requirements

[0002] This application claims priority to U.S. Provisional Application Serial No. 63 / 161,180, filed March 15, 2021, entitled “Frequency Configuration in Quantum Gates for Leakage Removal,” which is incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to frequency configuration in quantum gates for leakage removal. Background Technology

[0004] Quantum computing is a method of computation that utilizes quantum effects, such as superposition and entanglement of ground states, to perform certain calculations more efficiently than classical digital computers. Compared to digital computers that store and manipulate information in bit form (e.g., "1" or "0"), quantum computing systems can manipulate information using quantum bits (qubits). A qubit can refer to a quantum device that enables the superposition of multiple states (e.g., data in "0" and "1" states), and / or to the superposition of data itself in multiple states. In conventional terminology, the superposition of "0" and "1" states in a quantum system can be represented, for example, as a|0> + b|1>. The "0" and "1" states of a digital computer are analogous to the |0> and |1> ground states of a qubit, respectively. Summary of the Invention

[0005] Aspects and advantages of embodiments of this disclosure will be set forth in part in the description which follows, or may be learned from the description or by practice of the embodiments.

[0006] One example aspect of this disclosure relates to a quantum computing system configured to remove leaky states. The quantum computing system may include quantum hardware comprising a first qubit and a second qubit, wherein the first qubit is configured to have a first transition frequency, and wherein the second qubit is configured to have a second transition frequency, the first transition frequency being greater than the second transition frequency. The quantum computing system may include one or more quantum control devices configured to control the operation of at least the first and second qubits, wherein the one or more quantum control devices are configured to implement quantum gate operations on the first and second qubits at least partially based on the first and second transition frequencies, and wherein the one or more quantum control devices are configured to periodically reset the quantum state of the first qubit.

[0007] Another example aspect of this disclosure relates to a quantum computing system configured to remove leaky states. The quantum computing system may include quantum hardware comprising a plurality of qubits arranged in a qubit lattice, the plurality of qubits including one or more data qubits configured to implement quantum gate operations together with a plurality of measurement qubits, wherein each quantum gate operation includes a higher-frequency side and a lower-frequency side, wherein the lower-frequency side is configured to be implemented at the one or more data qubits.

[0008] Another exemplary aspect of this disclosure relates to a computer-implemented method for implementing quantum gate operations. The computer-implemented method may include configuring a first qubit of quantum hardware at a first transition frequency by one or more quantum control devices. The computer-implemented method may include configuring a second qubit of quantum hardware at a second transition frequency by one or more quantum control devices, the first transition frequency being greater than the second transition frequency. The computer-implemented method may include implementing quantum gate operations at the first and second qubits by one or more quantum control devices at least partially based on the first and second transition frequencies, wherein one or more quantum control devices are configured to periodically reset the quantum state of the first qubit.

[0009] Other aspects of this disclosure relate to various systems, apparatuses, non-transitory computer-readable media, user interfaces, and electronic devices.

[0010] These and other features, aspects, and advantages of the various embodiments of this disclosure will be better understood by referring to the following description and the appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and, together with the description, serve to explain the relevant principles. Attached Figure Description

[0011] A detailed discussion of embodiments for those skilled in the art is set forth in the description with reference to the accompanying drawings, in which:

[0012] Figure 1 An example quantum computing system according to an exemplary embodiment of the present disclosure is depicted;

[0013] Figure 2 An example qubit grid according to an example embodiment of the present disclosure is depicted;

[0014] Figure 3 An example qubit grid for implementing quantum gate operations according to an example embodiment of the present disclosure is depicted;

[0015] Figure 4An example qubit grid for implementing quantum gate operations according to an example embodiment of the present disclosure is depicted;

[0016] Figure 5 An example qubit grid for implementing quantum gate operations according to an example embodiment of the present disclosure is depicted;

[0017] Figure 6 A frequency diagram is depicted illustrating an example configuration of state frequencies on qubits according to an example aspect of this disclosure;

[0018] Figure 7 A flowchart is depicted for an example method of implementing quantum gate operations according to an example embodiment of the present disclosure;

[0019] Figure 8 A block diagram of an example computing system is depicted that can be used to implement systems and methods according to exemplary embodiments of the present disclosure. Detailed Implementation

[0020] An exemplary aspect of this disclosure relates to frequency configurations in quantum gates for leakage removal, and more specifically, to frequency configurations in quantum grids (e.g., comprising measurement qubits and data qubits) to isolate potential leakage points for removal from the quantum computing system. Some quantum gates (e.g., controlled Z-nonadiabatic quantum gates) can be implemented based at least in part on the frequency difference between the operating frequencies (e.g., transition frequencies) of the first and second qubits. Quantum gates can be implemented in one of two configurations, including a configuration where the operating frequency of the first qubit is greater than that of the second qubit, or a configuration where the operating frequency of the second qubit is greater than that of the first qubit. According to an exemplary aspect of this disclosure, quantum gate operation can be configured to provide a high-frequency side of the quantum gate operation at the measurement qubit and a low-frequency side at the data qubit. The measurement qubit can be periodically refreshed to remove leakage conditions. This configuration can reduce the impact of leakage conditions on the operation of the quantum computing system.

[0021] A quantum computing system may include a qubit grid, the qubit grid comprising a plurality of qubits arranged in a grid configuration. The qubit grid may include one or more data qubits and one or more measurement qubits. For example, in some implementations, the qubit grid may be an interleaved grid of data qubits and measurement qubits, such that each data qubit is surrounded by measurement qubits in the grid and / or each measurement qubit is surrounded by data qubits in the grid (e.g., except at the edges of the qubit grid). Data qubits may perform computations to evaluate one or more quantum algorithms. Additionally and / or alternatively, measurement qubits may be configured to read out and / or monitor parity of the quantum computing system (e.g., data qubits). For example, quantum readout may be periodically read out from measurement qubits, for example on the order of microsecond intervals.

[0022] The qubit grid may be implemented according to various quantum error correction codes, such as, for example, quantum surface codes or reduced versions thereof, repetition codes. For example, a repetition code may be a reduced version of a quantum surface code, which is useful for certain tasks, such as testing. Example aspects of the present disclosure may be useful for quantum computing systems according to quantum error correction codes having an alternating qubit grid.

[0023] Qubits may be frequency-tunable qubits, such that the operating frequency (e.g., transition frequency) of the qubit can be varied. For example, in some implementations, the transition frequency of a qubit may be varied, such as within a range of candidate transition frequencies. In some implementations, the operating frequency (e.g., transition frequency) may be changed by one or more quantum control devices.

[0024] Some quantum gate operations (referred to herein as quantum gates) may be implemented at least partially based on the operating frequency (e.g., transition frequency) of qubits. As an example, quantum gates may be non-adiabatic quantum gates. A non-adiabatic quantum gate may be implemented by resonance of transition frequencies between a first qubit and a second qubit. For example, a non-adiabatic controlled-Z (also referred to as CZ) quantum gate may be implemented based on resonance between the 01 transition frequency in the first qubit and the 12 transition frequency in the second qubit.

[0025] During implementation of a (e.g., non-adiabatic controlled-Z) gate between a first qubit and a second qubit, the operating frequencies of the first qubit and the second qubit may be adjusted based on a target frequency difference |f1-f2| between the operating frequency f1 of the first qubit and the operating frequency f2 of the second qubit. For example, the first qubit and / or the second qubit may be adjusted to implement the quantum gate in one of two configurations, where f1>f2 or f1<f2, but in both cases a common frequency difference is defined between the two qubits. Both configurations are valid when implementing the same quantum gate.

[0026] However, all aspects of this disclosure recognize that while both configurations are effective for realizing (e.g., non-adiabatic controlled Z) quantum gates, there are slight operational differences that can be used to reduce the possibility of leakage conditions, including leakage from computational quantum states |0> and |1> to non-computational leakage states such as |2>, |3>, etc., according to example aspects of this disclosure. Leakage conditions at data qubits can be significantly more destructive to quantum code evaluation than some other errors such as bit flips, phase flips, or gate errors. Qubits ideally operate in the |0> and |1> states or a superposition thereof. However, qubits can sometimes leak from computational space |0> and |1> into excitations or non-computational spaces with leaked states |2> or higher. Such leaked states can lead to inaccurate evaluation of quantum algorithms. Furthermore, in some cases, leaked states can propagate to other qubits.

[0027] Consider the following convention: where, for example, f 01 This refers to the frequency difference between the |0> and |1> states. The frequencies of two qubits can be offset by one qubit anharmonicity, denoted by the symbol η. For example, this interval provides the f of a qubit. 12 and another qubit f 01 Resonance between them. In an example implementation of a non-adiabatic controlled Z-gate, the initial two qubit states |11> involve Rabi oscillations with nearly identical energy states |20>. In this example, f1>f2, so |2> is located on the higher frequency qubit. Due to imperfect calibration and / or other factors, leakage states |2> are typically generated more frequently on the higher frequency qubit compared to the lower frequency qubit.

[0028] Furthermore, physical mechanisms can remove leaking states |2> from lower-frequency qubits, thereby reducing leakage at lower-frequency qubits. This physical mechanism is generated by the nearly equal energies of states |12> and |30>. For example, the anharmonic shift discussed earlier can also provide a qubit f 23 and another qubit f 12The near resonance between the states results in nearly equal energies for states |12> and |30>. This near-equal energy, in turn, leads to resonance between the states. Therefore, in the presence of a |12> state, a |2> state can be removed and reset to a |0> state. However, this mechanism results in the creation of a |3> state at a higher frequency qubit. In this way, leakage essentially shifts from a lower-frequency qubit to a higher-frequency qubit. For example, in an example implementation of repeating and / or surface codes, a leaked state has approximately a 20% chance of moving from the low-frequency side of a non-adiabatic controlled Z-gate to the high-frequency side of the gate. This makes it potentially advantageous to place more fragile qubits on the low-frequency side of a (e.g., non-adiabatic controlled Z-gate) quantum gate if leakage conditions cause the performance of some more fragile qubits to deteriorate more severely than others.

[0029] This principle can be applied to quantum error-correcting codes, such as repetitive codes and surface codes. For example, in at least these codes (or other suitable quantum lattice configurations), two types of qubits can exist, including data qubits and measurement qubits. Quantum gates (e.g., non-adiabatic CZ gates) can be applied between the data qubits and the measurement qubits. According to an example aspect of this disclosure, the measurement qubit can be periodically reset to |0> from any state (e.g., |1>, |2>, |3>). Therefore, leakage conditions on the measurement qubit degrade the quantum computing system significantly less than leakage conditions on the data qubit.

[0030] Therefore, exemplary aspects of this disclosure involve defining the qubit frequencies for implementing the high-frequency and low-frequency sides of quantum gate operations to reduce the likelihood of leakage conditions in the quantum computing system. For example, according to exemplary aspects of this disclosure, the high-frequency side of the quantum gate (e.g., non-adiabatic controlled Z) can be implemented at the measurement qubit, making potential leakage conditions more likely to move to the measurement qubit. The measurement qubit can be periodically refreshed or reset (e.g., by one or more quantum control devices) such as during and / or as an aid to normal quantum computing operations, thereby removing leakage conditions from the quantum computing system.

[0031] For example, an exemplary embodiment of an exemplary aspect of this disclosure provides a quantum computing system configured to remove leaky states. The quantum computing system includes quantum hardware comprising a first qubit and a second qubit. The quantum computing system may also include one or more quantum control devices configured to control the operation of at least the first and second qubits. For example, the one or more quantum control devices may be configured to implement quantum gate operations on the first and second qubits. In some embodiments, the quantum gate operation may be a non-adiabatic quantum gate operation and / or a controlled gate operation, such as a controlled Z-gate operation, such as a non-adiabatic controlled Z-gate operation.

[0032] The first qubit can be configured to have a first transition frequency, and / or the second qubit can be configured to have a second transition frequency, such as for implementing quantum gate operations. The first transition frequency can be greater than the second transition frequency. For example, the first qubit and the second qubit can be sides of a quantum gate operation based on a frequency difference (such as at least partially based on the first transition frequency and the second transition frequency). For example, according to an exemplary aspect of this disclosure, configuring the first transition frequency to be greater than the second transition frequency can make a leaky state more likely to exist at the first qubit.

[0033] Furthermore, one or more quantum control devices can be configured to periodically reset the quantum state of the first qubit. Thus, a leaky state present at the first qubit can be removed from the quantum computing system. As an example, the first qubit can be a measurement qubit. Additionally and / or alternatively, the second qubit can be a data qubit. For example, the first (e.g., measurement) qubit can be periodically reset or refreshed in response to a quantum measurement or quantum readout (e.g., parity measurement) obtained from the measurement qubit. The first qubit can be periodically reset at any suitable interval—such as microsecond intervals (e.g., approximately one microsecond).

[0034] Another exemplary aspect of this disclosure provides a computer-implemented method for implementing quantum gate operations. The computer-implemented method can be implemented using any suitable computing system, such as a quantum computing system including quantum hardware that communicates with one or more quantum control devices.

[0035] The method may include (e.g., via one or more quantum control devices) configuring a first qubit of quantum hardware at a first transition frequency. The method may also include (e.g., via one or more quantum control devices) configuring a second qubit of quantum hardware at a second transition frequency. The first transition frequency may be greater than the second transition frequency. For example, a frequency difference may exist between the first and second transition frequencies. According to an exemplary aspect of this disclosure, configuring the first transition frequency to be greater than the second transition frequency may make a leaky state more likely to exist at the first qubit.

[0036] The method may include implementing (e.g., via one or more quantum control devices) a quantum gate operation at a first qubit and a second qubit, at least in part based on a first transition frequency and a second transition frequency. For example, the first qubit and the second qubit may each implement one side of the quantum gate operation. The quantum gate operation may be implemented at least in part based on the frequency difference between the first qubit and the second qubit (e.g., at least in part based on the first transition frequency and the second transition frequency). In some embodiments, the quantum gate operation may be or may include a non-adiabatic controlled Z-quantum gate.

[0037] One or more quantum control devices can be configured to periodically reset the quantum state of a first qubit. Thus, a leaky state present at the first qubit can be removed from the quantum computing system. As an example, the first qubit can be a measurement qubit. Additionally and / or alternatively, the second qubit can be a data qubit. Furthermore, in some implementations, the quantum hardware can be arranged in quantum surface codes. The first (e.g., measurement) qubit can be periodically reset or refreshed in response to a quantum measurement or quantum readout (e.g., peer measurement) obtained from the measurement qubit. The first qubit can be periodically reset at any suitable interval (e.g., microsecond intervals, e.g., approximately one microsecond).

[0038] In some embodiments, this principle can be applied to qubit grids comprising multiple qubits. In a qubit grid, some or all combinations of data qubits and measurement qubits can be configured, wherein the data qubits operate at frequencies lower than the measurement qubits, and a frequency difference is defined to implement quantum gate operations. For example, in some embodiments, only a subset of quantum gate operations at a specific (e.g., data) qubit is implemented in the configuration, wherein the data qubit operates at a frequency lower than the measurement qubit. In some embodiments, all quantum gate operations can be implemented at a specific (e.g., data) qubit, wherein the operating frequency of that qubit is lower than the operating frequency of its adjacent (e.g., measurement) qubits. It is desirable to avoid the case where the data qubit is on the high-frequency side of all (e.g., four) non-adiabatic controlled Z-gates connected to it, because leakage will subsequently accumulate on the data qubit, where it may not be possible to remove the leakage. For example, it may be advantageous for the data qubit to implement at least one quantum gate operation on the low-frequency side.

[0039] Another example aspect of this disclosure provides a quantum computing system configured to remove leaky states. The quantum system may include quantum hardware comprising a plurality of qubits arranged in a qubit lattice. The plurality of qubits may include one or more data qubits and / or a plurality of measurement qubits. For example, the plurality of qubits may be arranged in quantum surface codes, repeating codes, etc.

[0040] One or more data qubits can be configured to implement quantum gate operations using multiple measurement qubits. Each quantum gate operation may include a high-frequency side and a low-frequency side. According to an example aspect of this disclosure, the low-frequency side is implemented at one or more data qubits. For example, according to an example aspect of this disclosure, configuring a first transition frequency greater than a second transition frequency may make a leakage state more likely to exist at the first qubit. In some embodiments, the quantum gate operation may be a non-adiabatic quantum gate operation and / or a controlled gate operation, such as a controlled Z-gate operation, such as a non-adiabatic controlled Z-gate operation.

[0041] Quantum gate operations can be implemented between a first qubit and a second qubit. The first qubit can be configured to have a first transition frequency, and / or the second qubit can be configured to have a second transition frequency, as used to implement a quantum gate operation. The first transition frequency can be greater than the second transition frequency if the first qubit is on the high-frequency side of the quantum gate operation and / or if the second qubit is on the low-frequency side of the quantum gate operation. For example, the first qubit and the second qubit can be sides of a quantum gate operation based on a frequency difference (e.g., at least partially based on the first and second transition frequencies).

[0042] In some example implementations, the low-frequency side of a quantum gate operation is implemented on a data qubit. Additionally and / or alternatively, the high-frequency side of a quantum gate operation may be implemented on a measurement qubit. For example, if data qubits are provided in a qubit grid, wherein the data qubits are surrounded by multiple (e.g., four) measurement qubits and configured to implement multiple (e.g., four) quantum gate operations using the multiple measurement qubits, then data qubits may be provided on the low-frequency side of each of these quantum gate operations. Additionally and / or alternatively (e.g., in the case of a total of four quantum gate operations at one data qubit), the low-frequency side of two of the quantum gate operations may be implemented at data qubits in one or more data qubits, and / or the high-frequency side of two of the quantum gate operations may be implemented at data qubits. These configurations may be provided randomly and / or regularly throughout the quantum grid. For example, the grid may form a regular pattern of quantum gate operation configurations and / or configurations may be provided randomly or arbitrarily, such as to satisfy other optimization constraints.

[0043] For example, in a surface code where four controlled Z-gates are provided per data qubit and per code cycle, there is a possibility of a leakage condition shifting secondaryly, first from a data qubit to a measurement qubit, and then from the measurement qubit to another data qubit before it can be removed by resetting the measurement qubit. According to an example aspect of this disclosure, one means of reducing the likelihood of this occurring is to configure the data qubits with four controlled Z-gates such that the data qubits are on the low-frequency side of two of the four CZ gates and on the high-frequency side of the other two. This configuration can be provided randomly and / or regularly throughout the quantum grid. For example, by allowing random or regular configuration, this allows room for optimization considerations regarding other operational constraints.

[0044] For illustrative purposes, this document discusses exemplary aspects with reference to embodiments including non-adiabatic controlled Z-gates. It should be understood that exemplary aspects of this disclosure can be applied to some other suitable quantum computing systems, such as quantum computing systems including quantum gates requiring a configurable frequency difference between two qubits, wherein the qubits are susceptible to leakage conditions, and / or wherein leakage conditions can be removed from at least some of the qubits in the quantum computing system.

[0045] Systems and methods according to exemplary aspects of this disclosure can provide numerous technical effects and benefits, including improvements to computing techniques. As an example, systems and methods according to exemplary aspects of this disclosure include systems and methods comprising quantum hardware having a first qubit and a second qubit, wherein the first qubit is configured to have a first transition frequency, and wherein the second qubit is configured to have a second transition frequency, the first transition frequency being greater than the second transition frequency; and one or more quantum control devices configured to control the operation of at least the first and second qubits, wherein the one or more quantum control devices are configured to perform quantum gate operations on the first and second qubits at least partially based on the first and second transition frequencies, and wherein the one or more quantum control devices are configured to periodically reset the quantum state of the first qubit. For example, systems and methods according to exemplary aspects of this disclosure can provide efficient implementations of quantum algorithms (e.g., quantum gate operations) with improved robustness to leakage conditions.

[0046] Systems and methods according to exemplary aspects of this disclosure can provide isolation of leaked states at qubits (e.g., measurement qubits) that are periodically refreshed or reset back to a computational state, such that leaked states do not persist long in the quantum computing system. For example, in some exemplary embodiments, even without the natural energy relaxation of leaked states, the lifetime of the leaked state |2> can be reduced to less than three cycles. Natural energy relaxation refers to the ability of a qubit to relax to a computational energy state over time. This, in turn, can improve the accuracy of quantum algorithm implementations. Additionally and / or alternatively, this can reduce the amount of computation time and / or other resources lost due to leaked states.

[0047] Example embodiments of this disclosure will now be discussed in more detail with reference to the accompanying drawings. As used herein, the term "about" in conjunction with a value means within 20% of that value.

[0048] Figure 1An example quantum computing system 100 according to an exemplary embodiment of the present disclosure is depicted. Example system 100 is an example of a system located on one or more classical computers or quantum computing devices at one or more locations, wherein the systems, components, and techniques described below can be implemented. Those skilled in the art who use the disclosure provided herein will understand that other quantum computing architectures or systems can be used without departing from the scope of this disclosure.

[0049] System 100 includes quantum hardware 102 that communicates data with one or more classical processors 104. Quantum hardware 102 includes components for performing quantum computing. For example, quantum hardware 102 includes a quantum system 110, a control device 112, and a readout device 114 (e.g., a readout resonator). Quantum system 110 may include one or more multi-level quantum subsystems, such as qubit registers. In some embodiments, the multi-level quantum subsystem may include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0050] The type of multilevel quantum system used in system 100 can vary. For example, in some cases, it may be convenient to include one or more readout devices 114 attached to one or more superconducting qubits (e.g., transmon, flux, gmon, xmon, or other qubits). In other cases, ion traps, photonic devices, or superconducting cavities (e.g., which can be used to prepare states without the need for qubits) can be used. Further examples of realizing multilevel quantum systems include fluxmon qubits, silicon quantum dots, or phosphorus-impurity qubits.

[0051] Quantum circuits can be constructed and applied to a qubit register included in quantum system 110 via multiple control lines coupled to one or more control devices 112. Example control devices 112 operating on the qubit register can be used to implement quantum gates or quantum circuits having multiple quantum gates (e.g., Pauli gates, Hadamard gates, controlled-NOT (CNOT) gates, controlled-phase gates, T-gates, multi-qubit quantum gates, coupler quantum gates, etc.). One or more control devices 112 can be configured to operate on quantum system 110 via one or more corresponding control parameters (e.g., one or more physical control parameters). For example, in some embodiments, the multi-level quantum subsystem may be superconducting qubits, and control devices 112 may be configured to provide control pulses to the control lines to generate magnetic fields to adjust the frequency of the qubits.

[0052] Quantum hardware 102 may also include a readout device 114 (e.g., a readout resonator). Measurement results 108 obtained via the measurement device can be provided to classical processor 104 for processing and analysis. In some embodiments, quantum hardware 102 may include quantum circuits, and control device 112 and readout device 114 may implement one or more quantum logic gates that operate on quantum hardware 102 by utilizing physical control parameters (e.g., microwave pulses) transmitted via wires included in quantum hardware 102. Further examples of control devices include arbitrary waveform generators, wherein a DAC (digital-to-analog converter) creates the signal.

[0053] Readout device 114 can be configured to perform quantum measurements on quantum system 110 and send the measurement result 108 to classical processor 104. Furthermore, quantum hardware 102 can be configured to receive data from classical processor 104 specifying physical control qubit parameter values ​​106. Quantum hardware 102 can use the received physical control qubit parameter values ​​106 to update the operation of control device 112 and readout device 114 on quantum system 110. For example, quantum hardware 102 can receive data specifying new values ​​representing the voltage strength of one or more DACs included in control device 112, and can update the operation of the DACs on quantum system 110 accordingly. Classical processor 104 can be configured, for example, to initialize quantum system 110 to an initial quantum state by sending data specifying an initial set of parameters 106 to quantum hardware 102.

[0054] The readout device 114 can measure the state of an element (e.g., a qubit) by utilizing the impedance difference between the |0> and |1> states of an element (such as a qubit) in a quantum system. For example, when the qubit is in state |0> or state |1>, the resonant frequency of the readout resonator can exhibit different values ​​due to the nonlinearity of the qubit. Therefore, the microwave pulse reflected from the readout device 114 carries a load that depends on the amplitude and phase shift of the qubit state. In some embodiments, a Purcell filter can be used in conjunction with the readout device 114 to block microwave propagation at the qubit frequency.

[0055] Figure 2 An example qubit grid 200 according to an exemplary embodiment of the present disclosure is depicted. For example, the qubit grid 200 may be provided based on quantum surface codes, repeating codes, etc. Figure 2As shown, the qubit grid 200 can be an interleaved qubit grid of one or more data qubits 202 and / or one or more measurement qubits 204. The measurement qubits 204 can be configured to provide readouts and / or measurement errors (e.g., peerity) in the output of the data qubits 202. For example, some of the data qubits 202 can be used to implement a time series of quantum gate operations that define a quantum algorithm across some or all of the data qubits 202. Figure 2 As shown, the data qubits 202 may be surrounded by the measurement qubits 204. Additionally and / or alternatively, the measurement qubits 204 may be located within a square or other surface defined by two or more (e.g., four) data qubits 202.

[0056] Figure 3 An example qubit grid 300 for implementing quantum gate operations according to an exemplary embodiment of the present disclosure is depicted. For example, the qubit grid 300 may be provided based on quantum surface codes, repeating codes, etc. Figure 3 As shown, the qubit grid 300 can be an interleaved qubit grid of one or more data qubits 202 and / or one or more measurement qubits 204. The measurement qubits 204 can be configured to provide readouts and / or measurement errors (e.g., peerity) in the output of the data qubits 202. For example, some of the data qubits 202 can be used to implement time-series quantum gate operations that define a quantum algorithm across some or all of the data qubits 202.

[0057] like Figure 3 As shown, a quantum gate operation 302 (e.g., a non-adiabatic controlled Z-gate operation) can be implemented between two qubits, such as a data qubit 202 and a measurement qubit 204. The quantum gate operation 302 may include a high-frequency side (indicated by f...) h (represented) and the low-frequency side (by f) l (Representation). According to an example aspect of this disclosure, the low-frequency side is implemented at data qubit 202. Additionally and / or alternatively, the high-frequency side is implemented at measurement qubit 204. For example, according to an example aspect of this disclosure, measurement qubit 204 is configured (e.g., f... h The transition frequency of f is greater than that of the data qubit 202 (e.g., f). l The transition frequency of the quantum gate can make the leakage state more likely to appear at the first qubit. In some embodiments, the quantum gate operation 302 can be a non-adiabatic quantum gate operation and / or a controlled gate operation, such as a controlled Z-gate operation, such as a non-adiabatic controlled Z-gate operation.

[0058] Figure 4 An example qubit grid 400 for implementing quantum gate operations according to an example embodiment of the present disclosure is depicted. Figure 4In the depicted configuration, data qubits 202 are implemented on the low-frequency side of each quantum gate operation 302. For example, if data qubits 202 are provided in a qubit grid 400 such that the data qubits 202 are surrounded by four quantum gate operations 302 (e.g., four measurement qubits 204), then data qubits 202 can be provided on the low-frequency side of each of these four quantum gate operations 302.

[0059] Figure 5 An example qubit grid 500 for implementing quantum gate operations according to an example embodiment of the present disclosure is depicted. Figure 5 In the qubit grid 500, data qubits 202 are used to implement the low-frequency side of two quantum gate operations 502 and the high-frequency side of two quantum gate operations 504. These arrangements can be provided randomly and / or regularly throughout the quantum grid 500. For example, the grid 500 can form a regular pattern of quantum gate configurations 502, 504 and / or can be provided randomly or arbitrarily, such as to satisfy other optimization constraints.

[0060] For example, in a surface code where four controlled Z-gates are provided per data qubit 202 and per code cycle, there is a possibility that a leakage condition may move secondary, first from data qubit 202 to measurement qubit 204, and then from measurement qubit 204 to another data qubit 202 before it can be removed by resetting measurement qubit 204. According to an example aspect of this disclosure, one means of reducing the likelihood of this occurring is to configure the data qubits 202 with four controlled Z-gates 502, 504 such that the data qubits 202 are located on the low-frequency side of two of the four CZ gates 502 and the high-frequency side of the other two of the four CZ gates 504. This configuration can be provided randomly and / or regularly at various points in the quantum grid 500. For example, by allowing random or regular arrangements, this can free up optimization considerations for other operational constraints.

[0061] Figure 6 A frequency diagram 600 depicts an example configuration of state frequencies on qubits according to an example aspect of this disclosure. (As shown) Figure 6 As shown, f 01 This refers to the frequency difference between, for example, the states |0> and |1>, and other subscripts similarly refer to frequency differences. The frequencies of two qubits can be shifted by a qubit anharmonicity 615, which is denoted by the symbol η. For example, as shown between the first qubit frequency diagram 610 and the second qubit frequency diagram 620, this interval provides a frequency f of one qubit. 23 and another qubit f 12 The resonance between them. This resonance can help achieve f at the first qubit. 12 f at the energy level and the second quantum bit01 Non-adiabatic controlled Z-quantum gate operations between frequencies, such as Figure 6 As shown.

[0062] Figure 7 A flowchart is depicted for an example method 700 for implementing quantum gate operations according to an example embodiment of the present disclosure. Although for illustrative and discussion purposes... Figure 7 The steps are described in a specific order, but the method of this disclosure is not limited to the specifically shown order or arrangement. The various steps of method 700 may be omitted, rearranged, combined, and / or modified in various ways without departing from the scope of this disclosure. Method 700 can be implemented by any suitable computing system, such as a quantum computing system including quantum hardware communicating with one or more quantum control devices, such as… Figure 1 Quantum computing system 100.

[0063] Method 700 may include configuring a first qubit of the quantum hardware at a first transition frequency at 702 (e.g., via one or more quantum control devices). Method 700 may include configuring a second qubit of the quantum hardware at a second transition frequency at 704 (e.g., via one or more quantum control devices). The first transition frequency may be greater than the second transition frequency. For example, a frequency difference may exist between the first and second transition frequencies. According to an exemplary aspect of this disclosure, configuring the first transition frequency to be greater than the second transition frequency may make a leaky state more likely to exist at the first qubit.

[0064] Method 700 may include, at 706, implementing (e.g., via one or more quantum control devices) a quantum gate operation at a first qubit and a second qubit, at least in part based on a first transition frequency and a second transition frequency. For example, the first and second qubits may be used to implement each side of the quantum gate operation based on a frequency difference (such as at least in part based on the first and second transition frequencies). In some embodiments, the quantum gate operation may be or may include a non-adiabatic controlled Z-quantum gate.

[0065] One or more quantum control devices can be configured to periodically reset the quantum state of a first qubit. Thus, a leaky state present at the first qubit can be removed from the quantum computing system. As an example, the first qubit can be a measurement qubit. Additionally and / or alternatively, the second qubit can be a data qubit. Furthermore, in some implementations, the quantum hardware can be arranged in quantum surface codes. The first (e.g., measurement) qubit can be periodically reset or refreshed in response to a quantum measurement or quantum readout (e.g., peer measurement) obtained from the measurement qubit. The first qubit can be periodically reset at any suitable interval (e.g., microsecond intervals, e.g., approximately one microsecond).

[0066] Figure 8 Systems and methods that can be used to implement exemplary embodiments of this disclosure (such as references) are described. Figure 1 A block diagram of an example computing system 1000 (the system under discussion). System 1000 includes a control system 1010 and a quantum computing system 1030 communicatively coupled via a network 1050. One or more aspects of any of the methods described herein may be implemented on the control system 1010 and / or the quantum computing system 1030.

[0067] The control system 1010 may include any type of computing device (e.g., a classical computing device). The control system 1010 includes one or more processors 1012 and a memory 1014. The one or more processors 1012 may include any suitable processing device (e.g., processor core, microprocessor, ASIC, FPGA, controller, microcontroller, etc.) and may be a single processor or multiple processors operatively connected. The memory 1014 may include one or more non-transitory computer-readable storage media, such as RAM, ROM, EEPROM, EPROM, flash memory devices, disks, etc., and combinations thereof. The memory 1014 may store data 1016 (e.g., qubit parameters, measurement results, etc.) and instructions 1018, which are executed by the processor 1012 to cause the control system 1010 to perform operations, such as one or more aspects of any of the methods disclosed herein. According to an example embodiment of this disclosure, the control system 1010 may be configured to process error information 1020 obtained by measuring the output of a quantum system (e.g., quantum system 1040) to identify errors in quantum computing. Additionally, the quantum control system 1010 can be configured to control the operation of the quantum system 1040 (e.g., the transition frequency).

[0068] Quantum computing system 1030 includes one or more processors 1032 and memory 1034. The one or more processors 1032 may include suitable processing devices (e.g., processor cores, microprocessors, ASICs, FPGAs, controllers, microcontrollers, etc.) and may be a single processor or multiple processors operatively connected. Memory 1034 may include one or more non-transitory computer-readable storage media, such as RAM, ROM, EEPROM, EPROM, flash memory devices, disks, etc., and combinations thereof. Memory 1034 may store data 1036 and instructions 1038, which are executed by processor 1032 to cause quantum computing system 1030 to perform operations, such as implementing a quantum circuit with one or more quantum gates on quantum system 1040 having multiple quantum gates and obtaining relevant measurements (e.g., error message 1020). Quantum computing system 1030 may be similar to reference [reference missing]. Figure 1The quantum computing system discussed and described. Other suitable quantum computing systems may be used without departing from the scope of this disclosure.

[0069] Network 1050 can be any type of communication network, such as a local area network (e.g., intranet), a wide area network (e.g., the Internet), or some combination thereof, and can include any number of wired or wireless links. Generally, communication on network 1050 can be carried via any type of wired and / or wireless connection using various communication protocols (e.g., TCP / IP, HTTP, SMTP, FTP), encodings or formats (e.g., HTML, XML), and / or protection schemes (e.g., VPN, Secure HTTP, SSL). In some embodiments, network 1050 can be omitted, allowing control system 1010 to communicate directly with quantum computing system 1030 via signals.

[0070] The implementations of digital, classical, and / or quantum themes, as well as digital function operations and quantum operations, described in this specification can be realized in digital electronic circuits, suitable quantum circuits, or more generally in quantum computing systems, in physically implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware (including the structures disclosed in this specification and their structural equivalents), or combinations thereof. The term "quantum computing system" may include, but is not limited to, quantum computers / computing systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[0071] Implementations of the digital and / or quantum themes described in this specification can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution or control of its operation by a data processing device. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubit / qubit structures, or a combination thereof. Alternatively or additionally, program instructions can be encoded on artificially generated propagation signals capable of encoding digital and / or quantum information (e.g., machine-generated electrical, optical, or electromagnetic signals), generated to encode digital and / or quantum information for transmission to a suitable receiver device for execution by a data processing device.

[0072] The terms quantum information and quantum data refer to information or data carried, stored, or preserved by quantum systems, where the smallest non-trivial system is a qubit, i.e., a system that defines a unit of quantum information. It should be understood that the term "qubit" encompasses all quantum systems that can be appropriately approximated as two-level systems in their corresponding context. Such quantum systems can include multi-level systems, e.g., systems with two or more levels. For example, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational ground state is identified as having a ground state and a first excited state; however, it should be understood that other settings in which the computational state is identified as having a higher-level excited state (e.g., a qubit) are also possible.

[0073] The term "data processing device" refers to digital and / or quantum data processing hardware and encompasses all types of devices, apparatuses, and machines for processing digital and / or quantum data, including, for example, programmable digital processors, programmable quantum processors, digital computers, quantum computers, or multiple digital and quantum processors or computers, and combinations thereof. The device may also be or further include special-purpose logic circuitry, such as FPGAs (Field-Programmable Gate Arrays), or ASICs (Application-Specific Integrated Circuits), or quantum simulators—that is, quantum data processing devices designed to simulate or generate information about a particular quantum system. In particular, a quantum simulator is a special-purpose quantum computer that does not have the capability to perform general-purpose quantum computing. In addition to hardware, the device may optionally include code that creates an execution environment for digital and / or quantum computer programs, such as code constituting processor firmware, protocol stacks, database management systems, operating systems, or combinations thereof.

[0074] Digital or classical computer programs (which may also be referred to or described as programs, software, software applications, modules, software modules, scripts, or code) can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and can be deployed in any form, including as standalone programs or as modules, components, subroutines, or other units suitable for use in a digital computing environment. Quantum computer programs (which may also be referred to or described as programs, software, software applications, modules, software modules, scripts, or code) can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or can be written using a quantum programming language (e.g., QCL, Quipper, Cirq, etc.).

[0075] Digital and / or quantum computer programs may, but do not necessarily, correspond to files in a file system. A program may be stored as a part of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), a single file dedicated to the program in question, or multiple coordination files, such as files storing one or more modules, subroutines, or code sections. Digital and / or quantum computer programs may be deployed to execute on a single digital or quantum computer, or on multiple digital and / or quantum computers located at one site or distributed across multiple sites and interconnected via digital and / or quantum data communication networks. A quantum data communication network is understood as a network that can transmit quantum data using quantum systems (e.g., qubits). Typically, digital data communication networks cannot transmit quantum data; however, quantum data communication networks can transmit both quantum and digital data.

[0076] The processes and logical flows described in this specification can be executed by one or more programmable digital and / or quantum computers, which, as appropriate, operate in conjunction with one or more digital and / or quantum processors to execute one or more digital and / or quantum computer programs to perform functions by manipulating input digital and quantum data and generating outputs. The processes and logical flows can also be executed by dedicated logic circuitry (e.g., FPGA or ASIC) or a quantum simulator, or a combination of dedicated logic circuitry or a quantum simulator and one or more programmable digital and / or quantum computers, and the apparatus can also be implemented as a combination of dedicated logic circuitry (e.g., FPGA or ASIC) or a quantum simulator, or a combination of dedicated logic circuitry or a quantum simulator and one or more programmable digital and / or quantum computers.

[0077] A system of one or more digital and / or quantum computers or processors being "configured" or "operable to" perform a specific operation or action means that the system has software, firmware, hardware, or a combination thereof installed thereon, which, in operation, causes the system to perform the operation or action. One or more digital and / or quantum computer programs being configured to perform a specific operation or action means that the one or more programs include instructions that, when executed by a digital and / or quantum data processing device, cause that device to perform the operation or action. A quantum computer can receive instructions from a digital computer that, when executed by a quantum computing device, cause that device to perform the operation or action.

[0078] Digital and / or quantum computers suitable for executing digital and / or quantum computer programs can be based on general-purpose or special-purpose digital and / or quantum microprocessors or both, or any other type of central digital and / or quantum processing unit. Generally, the central digital and / or quantum processing unit receives instructions and digital and / or quantum data from read-only memory, or random access memory, or a quantum system suitable for transmitting quantum data (e.g., photons), or a combination thereof.

[0079] Some example elements of a digital and / or quantum computer are a central processing unit (CPU) for executing or implementing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The CPU and memory may be supplemented or incorporated into dedicated logic circuitry or a quantum simulator. Generally, a digital and / or quantum computer will also include, or be operatively coupled to, one or more high-capacity storage devices for storing digital and / or quantum data, such as magnetic disks, magneto-optical disks, or optical disks, or quantum systems suitable for storing quantum information. However, a digital and / or quantum computer does not need to have such devices.

[0080] Digital and / or quantum computer-readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memories, media, and memory devices, including, for example: semiconductor memory devices such as EPROM, EEPROM, and flash memory devices; magnetic disks such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems such as trapped atoms or electrons. It can be understood that quantum memory is a device capable of storing quantum data long-term, with high fidelity, and efficiently, such as an optical material interface utilizing light for transmission and a material used to store and preserve quantum characteristics (such as superposition or quantum coherence) of quantum data.

[0081] Control of the various systems or portions thereof described in this specification can be implemented in a digital and / or quantum computer program product comprising instructions stored on one or more tangible, non-transitory machine-readable storage media and executable on one or more digital and / or quantum processing devices. The systems or portions thereof described in this specification can each be implemented as an apparatus, method, or electronic system, which may include one or more digital and / or quantum processing devices and memory for storing executable instructions to perform the operations described in this specification.

[0082] While this specification contains numerous specific implementation details, these should not be construed as limiting the scope of possible claims, but rather as descriptions of features that may be specific to particular embodiments. Certain features described in this specification within the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations and even initially claimed in this way, in some cases one or more features from the claimed combination may be removed in combination, and the claimed combination may be for sub-combinations or variations thereof.

[0083] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring such operations to be performed in the specific order shown or sequentially, or to perform all of the shown operations to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above embodiments should not be construed as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0084] Specific embodiments of the subject matter have been described. Other embodiments are within the scope of the appended claims. For example, the actions recited in the claims can be performed in different orders and still achieve the desired result. As an example, the processes depicted in the drawings do not necessarily require the specific order shown or sequential execution to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. A quantum computing system configured to remove leaky states, the quantum computing system comprising: Quantum hardware, the quantum hardware comprising a first measurement qubit and a data qubit, wherein the first measurement qubit is configured to have a first transition frequency, and wherein the data qubit is configured to have a second transition frequency, the first transition frequency being greater than the second transition frequency; and One or more quantum control devices are configured to control the operation of at least the first measurement qubit and the data qubit, wherein the one or more quantum control devices are configured to implement quantum gate operations on the first measurement qubit and the data qubit at least in part based on the first transition frequency and the second transition frequency, and wherein the one or more quantum control devices are configured to periodically reset the quantum state of the first measurement qubit.

2. The quantum computing system according to claim 1, wherein, The quantum gate operations include non-adiabatic quantum gate operations.

3. The quantum computing system according to claim 1, wherein, The quantum gate operations include controlled gate operations.

4. The quantum computing system according to claim 3, wherein, The controlled gate operation includes the controlled Z-gate operation.

5. The quantum computing system according to claim 1, wherein, The one or more quantum control devices are configured to periodically reset the quantum state of the first measured qubit to the |0> state.

6. A quantum computing system configured to remove leaky states, the quantum computing system comprising: Quantum hardware, the quantum hardware comprising a plurality of qubits arranged in a qubit grid, the plurality of qubits including one or more data qubits, the one or more data qubits being configured to perform quantum gate operations together with a plurality of measurement qubits; Each of the quantum gate operations includes a high-frequency side and a low-frequency side, wherein each of the one or more data qubits is configured to implement at least one quantum gate operation having a low-frequency side configured to be implemented at the corresponding data qubit in the one or more data qubits.

7. The quantum computing system according to claim 6, wherein, The plurality of qubits are arranged using quantum surface codes.

8. The quantum computing system according to claim 6, wherein, The quantum gate operations include non-adiabatic quantum gate operations.

9. The quantum computing system according to claim 6, wherein, The quantum gate operations include controlled Z-gate operations.

10. The quantum computing system according to claim 6, wherein, For each quantum gate operation implemented at at least one of the one or more data qubits, the low-frequency side of the quantum gate operation is implemented at the at least one data qubit.

11. The quantum computing system according to claim 6, wherein, The low-frequency side of the two quantum gate operations in the quantum gate operation is implemented at at least one of the one or more data qubits, and the high-frequency side of the two quantum gate operations in the quantum gate operation is implemented at the at least one data qubit.

12. The quantum computing system according to claim 11, wherein, Each of the one or more data qubits implements four quantum gate operations.

13. A computer-implemented method for implementing quantum gate operations, the computer-implemented method comprising: The first measurement qubit of the quantum hardware is configured at the first transition frequency by one or more quantum control devices; The data qubits of the quantum hardware are configured at a second transition frequency by the one or more quantum control devices, wherein the first transition frequency is greater than the second transition frequency; and Quantum gate operations are performed at the first measurement qubit and the data qubit by the one or more quantum control devices, at least in part based on the first transition frequency and the second transition frequency; The one or more quantum control devices are configured to periodically reset the quantum state of the first measured qubit.

14. The computer-implemented method according to claim 13, wherein, The quantum gate operation includes the non-adiabatic controlled Z quantum gate.

15. The computer-implemented method according to claim 13, wherein, There is a frequency difference between the first transition frequency and the second transition frequency, wherein the quantum gate operation is implemented at least in part based on the frequency difference.

16. The computer-implemented method according to claim 13, wherein, The quantum hardware is arranged using quantum surface codes.

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