power supply

Abstract

A power supply is provided. The power supply includes a boost circuit and an LLC converter. The LLC converter includes a first inductor, a first switch and a second switch. The LLC converter controls the first switch and the second switch based on a zero voltage switching rule to convert a boosted power provided by the boost circuit into an output power. The first inductor is inductively coupled with a boost inductor of the boost circuit to obtain a first energy. A point in time when a zero voltage difference occurs between a first terminal and a second terminal of the first switch is delayed in response to the first energy, so that a turn-on point of the second switch lags behind a turn-on point of the power switch.

Description

Technical Field

[0001] This invention relates to the field of power conversion, and more particularly to a power supply. Background Technology

[0002] Power supplies, when handling high output power, must meet power factor requirements such as Energy Star standards. Therefore, they are typically designed with a two-stage architecture. The first stage is a fixed-frequency switching boost power factor corrector. The second stage is a variable-frequency switching resonant LLC converter.

[0003] LLC converters reduce their switching frequency due to higher output load (output power). It should be noted that when the switching frequency of the LLC converter decreases to the point where it turns on simultaneously with the power switch of the boost power factor corrector, audible noise is generated as the energy of both the LLC converter and the boost power factor corrector begins to build up at the same time. Therefore, this invention proposes a power supply that can suppress dynamic noise based on load conditions to improve the problems encountered in conventional designs. Summary of the Invention

[0004] The present invention provides a power supply capable of suppressing dynamic noise based on load conditions.

[0005] The power supply of the present invention includes a boost circuit and an LLC converter. The boost circuit includes a boost inductor and a power switch. The boost circuit operates in response to the switching of the power switch, thereby boosting the rectified power supply to produce a boosted power supply. The LLC converter is coupled to the boost circuit. The LLC converter includes a first inductor, a first switch, and a second switch. The LLC converter controls the first and second switches based on zero-voltage switching (ZVS) rules, thereby converting the boosted power supply into an output power supply. The first inductor is inductively coupled to the boost inductor to obtain a first energy. The time when zero voltage difference occurs between the first and second terminals of the first switch is delayed in response to the first energy, causing the turn-on time of the second switch to lag behind the turn-on time of the power switch.

[0006] Based on the above, the first inductor of the LLC converter is inductively coupled to the boost inductor of the boost circuit to obtain the first energy. The time when zero voltage difference is generated between the first and second terminals of the first switch is dynamically delayed in response to the first energy. The turn-on time of the second switch is also dynamically delayed. In this way, the turn-on time of the second switch lags behind the turn-on time of the power switch, thereby reducing the annoying noise caused by the second switch and the power switch transitioning to the on state at the same time.

[0007] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0008] Figure 1 This is a schematic diagram of a power supply according to the first embodiment of the present invention;

[0009] Figure 2 This is a schematic diagram showing the relationship between the voltage difference between the first and second terminals of the first switch and the conduction state of the second switch, according to an embodiment of the present invention.

[0010] Figure 3 This is a schematic diagram showing the relationship between the conduction state of the power switch and the conduction state of the first switch according to an embodiment of the present invention.

[0011] Figure 4 This is another schematic diagram based on the first embodiment;

[0012] Figure 5 This is a schematic diagram of a power supply according to the second embodiment of the present invention.

[0013] Explanation of reference numerals in the attached figures

[0014] 100, 200: Power supply

[0015] 110, 210: Boost circuit

[0016] 120, 220: LLC converters

[0017] 121, 221: Resonant slots

[0018] 122, 222: Output circuit

[0019] 130, 230: Rectifier

[0020] C2, C3: Parasitic capacitance

[0021] CO1: Capacitor

[0022] CO2: Output capacitor

[0023] CR: Resonant capacitor

[0024] DO1: Diode

[0025] DO2, DO3: Output diodes

[0026] LM1: Boost Inductor

[0027] LM2: Magnetizing Inductor

[0028] LM3: Sensing Inductor

[0029] LR: Resonant Inductor

[0030] LX1: First Inductor

[0031] LX2: Second Inductor

[0032] NP: Primary coil

[0033] NS1, NS2: Secondary coils

[0034] P1: First Energy

[0035] P2: Second Energy

[0036] Q1: Power switch

[0037] Q2: First switch

[0038] Q3: Second switch

[0039] R1: Resistor

[0040] SC1, SC2, SC3: Control signals

[0041] S_Q1: The on state of the first switch

[0042] S_Q3: The on state of the second switch

[0043] t: time

[0044] t1, t2, t3, t4: Time points

[0045] td: Delay

[0046] TR: Transformer

[0047] VB: via boost power supply

[0048] VDS_Q2: Voltage difference between the first and second terminals of the first switch

[0049] VIN: Input power

[0050] VOUT: Output power

[0051] VR: Rectified power supply Detailed Implementation

[0052] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same component reference numerals are used in the drawings and description to denote the same or similar parts.

[0053] Please refer to Figure 1 , Figure 1This is a schematic diagram of a power supply according to a first embodiment of the present invention. In this embodiment, the power supply 100 includes a boost circuit 110 and an LLC converter 120. The boost circuit 110 includes a boost inductor LM1 and a power switch Q1. The boost circuit 110 operates in response to the switching of the power switch Q1, thereby boosting the rectified power supply VR to generate a boosted power supply VB. The LLC converter 120 is coupled to the boost circuit 110. The LLC converter 120 includes a first inductor LX1, a first switch Q2, and a second switch Q3. The LLC converter 120 controls the first switch Q2 and the second switch Q3 based on the zero-voltage switching (ZVS) rule to convert the boosted power supply VB to generate an output power supply VOUT.

[0054] In this embodiment, the first inductor LX1 is inductively coupled to the boost inductor LM1 to obtain the first energy P1. For example, the first inductor LX1, the boost inductor LM1, and a magnetic component (e.g., an iron core) can form an inductively coupled circuit. The present invention is not limited to this example.

[0055] In this embodiment, the time point at which zero voltage difference is generated between the first and second terminals of the first switch Q2 is dynamically delayed in response to the first energy P1. Therefore, based on the ZVS rule, this dynamic delay in the zero voltage difference time point also dynamically delays the turn-on time of the second switch Q3. In other words, the turn-on time of the second switch Q3 is delayed in response to the load state of the boost circuit 110. Therefore, the turn-on time of the second switch Q3 lags behind the turn-on time of the power switch Q1. In other words, based on the first energy P1 and the ZVS rule, the first time point at which the second switch Q3 transitions from the off state to the on state is not the same as the second time point at which the power switch Q1 transitions from the off state to the on state. The first time point lags behind the second time point.

[0056] It should be noted that the first time point and the second time point are not the same. The energy in the boost inductor LM1 and the energy in the LLC converter 120 (i.e., resonant tank 121) will not start to build up simultaneously. Therefore, this embodiment dynamically suppresses the noise caused by the simultaneous start of energy in the boost inductor LM1 and the LLC converter 120 based on the first energy P1 generated by the load state.

[0057] Furthermore, please also refer to Figure 1 as well as Figure 2 , Figure 2 This is a schematic diagram illustrating the relationship between the voltage difference between the first and second terminals of the first switch and the conduction state of the second switch, according to an embodiment of the present invention. Figure 2The diagram illustrates the voltage difference VDS_Q2 between the first and second terminals of the first switch Q2 and the conduction state S_Q3 of the second switch Q3. The first switch Q2 has a parasitic capacitance C2 located between its first and second terminals. This parasitic capacitance C2 stores a first energy P1. Therefore, even if the first switch Q2 is turned off at time t1 in response to the control signal SC2, the parasitic capacitance C2 still stores the first energy P1. Consequently, the voltage difference VDS_Q2 between the first and second terminals of the first switch Q2 is not zero. The first energy P1 in the parasitic capacitance C2 will be completely discharged at time t2 (i.e., VDS_Q2 equals 0). There is a delay td between time t2 and time t1. Therefore, based on the ZVS rule, the second switch Q3 will only be turned on after the first energy P1 stored in the parasitic capacitance C2 has been completely discharged at time t2. The timing of the control signal SC3 is delayed by td. Therefore, the turn-on time of the second switch Q3 will be delayed from time point t3 to time point t4.

[0058] Please refer to the following at the same time. Figure 1 as well as Figure 3 , Figure 3 This is a schematic diagram showing the relationship between the conduction state of the power switch and the conduction state of the first switch according to an embodiment of the present invention. Figure 3 The diagram illustrates the on-state S_Q1 of power switch Q1 and the on-state S_Q3 of the second switch Q3. In this embodiment, when control signals SC1 and SC3 simultaneously transition from a low voltage level to a high voltage level, the on-time of the second switch Q3 is delayed by td based on the first energy P1 stored in the parasitic capacitance C2 and the ZVS rule. Therefore, the first time point at which the second switch Q3 transitions from the off state to the on state is not the same as the second time point at which the power switch Q1 transitions from the off state to the on state. In this embodiment, the larger the first energy P1, the larger the delay td of the on-time of the second switch Q3. Conversely, the smaller the first energy P1, the smaller the delay td of the on-time of the second switch Q3.

[0059] Please return Figure 1In this embodiment, the boost circuit 110 can be a boost power factor corrector. The boost circuit 110 also includes a diode DO1 and a capacitor CO1 (this invention is not limited thereto). A boost inductor LM1 is coupled between the anode of diode DO1 and the rectified power supply VR. A first terminal of power switch Q1 is coupled to the anode of diode DO1. A second terminal of power switch Q1 is coupled to a first reference low voltage (e.g., a first ground terminal). The control terminal of power switch Q1 receives a control signal SC1. Based on the load condition requirements, power switch Q1 responds to the control signal SC1 by switching to determine the energy stored in boost inductor LM1. A first terminal of capacitor CO1 is coupled to the cathode of diode DO1. A second terminal of capacitor CO1 is coupled to the first reference low voltage. The first terminal of capacitor CO1 serves as the output terminal of boost circuit 110.

[0060] Regarding the LLC converter 120, the first terminal of the second switch Q3 is coupled to the output terminal of the boost circuit 110. The second terminal of the second switch Q3 is coupled to the first terminal of the first switch Q2. The control terminal of the second switch Q3 receives the control signal SC3. The second terminal of the first switch Q2 is coupled to the first reference low voltage. The control terminal of the first switch Q2 receives the control signal SC2. The first terminal of the first inductor LX1 is coupled to the first terminal of the first switch Q2. The second terminal of the first inductor LX1 is coupled to the first reference low voltage.

[0061] In some embodiments, control signals SC1-SC3 may be provided, for example, by a controller (not shown). Control signals SC1 and SC3 are not provided simultaneously when the power supply 100 is started. Thus, when the power supply 100 is started, the first time point when the second switch Q3 transitions from the off state to the on state (the time point of the rising edge of control signal SC3) will not be the same as the second time point when the power switch Q1 transitions from the off state to the on state (the time point of the rising edge of control signal SC1). Furthermore, the controller can detect the timing of control signal SC3. When it detects that the rising edge of control signal SC3, after being delayed, occurs at the same time point as the rising edge of control signal SC1, the controller adjusts the timing of one of the control signals SC1 or SC3.

[0062] In some embodiments, the LLC converter 120 further includes a second inductor (not shown). The second inductor responds to the load state at the output of the power supply 100 to obtain a second energy. In these embodiments, the second inductor is coupled in series with the first inductor LX1 between a first terminal of the first switch Q2 and a first reference low voltage. The time point at which the first and second terminals of the first switch Q2 achieve zero voltage difference is dynamically delayed in response to the load state at the output. Based on the ZVS rule, this dynamic delay of the zero voltage difference time point causes the turn-on time of the second switch Q3 to also be dynamically delayed based on the load state at the output. Therefore, the first time point at which the second switch Q3 transitions from the off state to the on state is not the same as the second time point at which the power switch Q1 transitions from the off state to the on state.

[0063] Furthermore, the LLC converter 120 also includes a resistor R1, a resonant tank 121, a transformer TR, and an output circuit 122. The first terminal of resistor R1 is coupled to the first terminal of the first switch Q2. The resonant tank 121 includes a resonant inductor LR, a magnetizing inductor LM2, and a resonant capacitor CR. The resonant inductor LR, magnetizing inductor LM2, and resonant capacitor CR are connected in series between the second terminal of resistor R1 and a first reference low voltage. For example, the first terminal of the resonant inductor LR is coupled to the second terminal of resistor R1. The first terminal of the magnetizing inductor LM2 is coupled to the second terminal of the resonant inductor LR. The first terminal of the resonant capacitor CR is coupled to the second terminal of the magnetizing inductor LM2. The second terminal of the resonant capacitor CR is coupled to the first reference low voltage.

[0064] It is worth mentioning that resistor R1 prevents the resonant slot 121 from being affected by the inductive coupling of the first inductor LX1 when it is resonating.

[0065] Transformer TR is coupled to magnetizing inductor LM2. Transformer TR converts the first power supply located at magnetizing inductor LM2 to generate a second power supply. The output circuit is coupled to the transformer. Output circuit 122 generates output voltage VOUT based on the second power supply.

[0066] The following section describes the implementation details of the transformer and output circuit; please refer to [link / reference needed]. Figure 4 , Figure 4This is another schematic diagram based on the first embodiment. The transformer TR includes a primary winding NP and secondary windings NS1 and NS2. The primary winding NP is coupled in parallel with the magnetizing inductor LM2. The first terminal of the secondary winding NS1 and the first terminal of the secondary winding NS2 are connected to a second reference low voltage (e.g., a second ground terminal). The output circuit 122 includes output diodes DO2 and DO3 and an output capacitor CO2. The anode of the first output diode DO2 is coupled to the second terminal of the secondary winding NS1. The cathode of the first output diode DO2 is coupled to the output terminal of the output circuit 120. The anode of the output diode DO3 is coupled to the second terminal of the secondary winding NS2. The cathode of the output diode DO3 is coupled to the output terminal of the output circuit 120. The first terminal of the output capacitor CO2 is coupled to the output terminal of the output circuit 120. The second terminal of the output capacitor CO2 is coupled to the second reference low voltage.

[0067] In addition, the power supply 100 may also include a rectifier 130. The rectifier 130 receives an input power supply VIN and rectifies the input power supply VIN to generate a rectified power supply VR. In this embodiment, the rectifier 130 may be a full-bridge rectifier (this invention is not limited thereto).

[0068] Please refer to Figure 5 , Figure 5 This is a schematic diagram of a power supply according to a second embodiment of the present invention. The power supply 200 includes a boost circuit 210, an LLC converter 220, and a rectifier 230. In this embodiment, the boost circuit 210 can be implemented by... Figure 1 as well as Figure 4 Sufficient teaching has been obtained from the embodiments described herein, and therefore will not be repeated here. The rectifier 230 can be implemented by... Figure 4 Sufficient teaching has been obtained from the embodiments, and therefore will not be repeated here.

[0069] Compared to Figure 4 The LLC converter 120, in this embodiment, further includes a sense inductor LM3 and a second inductor LX2. In this embodiment, the sense inductor LM3 is coupled between the second terminal of the output capacitor CO2 and the second reference low voltage. The sense inductor LM3 responds to the load at the output of the power supply to store energy. In this embodiment, the sense inductor LM3 may be located in the output circuit 222. The second inductor LX2 is coupled between the second terminal of the first inductor LX1 and the first reference low voltage. The second inductor LX2 is inductively coupled to the sense inductor LM3 to obtain a second energy P2.

[0070] For example, a second inductor LX2, a sensing inductor LM3, and a magnetically conductive component (such as an iron core) can form an inductively coupled circuit. This invention is not limited to this example.

[0071] In this embodiment, the time point at which zero voltage difference is generated between the first and second terminals of the first switch Q2 is dynamically delayed due to the sum of the first energy P1 and the second energy P2. Therefore, the turn-on time of the second switch Q3 is dynamically delayed. In other words, the turn-on time of the second switch Q3 is dynamically delayed in response to the load state of the output terminal of the power supply 200 and the load state of the boost circuit 210. In this embodiment, the larger the sum of the first energy P1 and the second energy P2, the greater the delay in the turn-on time of the second switch Q3. Conversely, the smaller the sum of the first energy P1 and the second energy P2, the smaller the delay in the turn-on time of the second switch Q3.

[0072] In this embodiment, resistor R1 prevents the resonant slot 221 from being affected by the inductive coupling of the first inductor LX1 and the inductive coupling of the second inductor LX2 when it is resonating.

[0073] In summary, the power supply includes a boost circuit and an LLC converter. The first inductor of the LLC converter is inductively coupled to the boost inductor of the boost circuit to obtain a first energy. The time when zero voltage difference is generated between the first and second terminals of the first switch is dynamically delayed in response to the first energy. The turn-on time of the second switch is dynamically delayed in response to the load state of the boost circuit. In this way, the first time when the second switch transitions from the off state to the on state is not the same as the second time when the power switch transitions from the off state to the on state, thereby reducing annoying noise caused by the second switch and the power switch transitioning to the on state at the same time. The LLC converter also obtains a second energy in response to the load state at the output of the power supply. Therefore, the turn-on time of the second switch is also dynamically delayed in response to the load state at the output of the power supply.

[0074] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A power supply, characterized in that, The power supply includes: A boost circuit, including a boost inductor and a power switch, is configured to operate in response to switching of the power switch, thereby boosting the rectified power supply to produce a boosted power supply; and An LLC converter, coupled to the boost circuit, includes a first inductor, a first switch, and a second switch, configured to control the first and second switches based on a zero-voltage switching rule, thereby converting the boosted power supply into an output power supply. The first inductor is inductively coupled to the boost inductor to obtain the first energy, and The time when the first terminal and the second terminal of the first switch reach zero voltage difference is delayed due to the first energy, causing the turn-on time of the second switch to lag behind the turn-on time of the power switch.

2. The power supply according to claim 1, characterized in that, The greater the first energy, the greater the delay in the conduction time of the second switch.

3. The power supply according to claim 1, characterized in that: The parasitic capacitance of the first switch stores the first energy, and The parasitic capacitance is located between the first terminal of the first switch and the second terminal of the first switch.

4. The power supply according to claim 1, characterized in that: The first terminal of the second switch is coupled to the output terminal of the boost circuit. The second terminal of the second switch is coupled to the first terminal of the first switch. The second terminal of the first switch is coupled to a first reference low voltage. The first terminal of the first inductor is coupled to the first terminal of the first switch, and The second terminal of the first inductor is coupled to the first reference low voltage.

5. The power supply according to claim 4, characterized in that, The LLC converter also includes: A second inductor, connected in series with the first inductor between the first terminal of the first switch and the first reference low voltage, is configured to respond to the load at the output of the power supply to obtain a second energy.

6. The power supply according to claim 4, characterized in that, The LLC converter also includes: A resistor, wherein a first end of the resistor is coupled to a first end of the first switch; The resonant slot includes a resonant inductor, a magnetizing inductor, and a resonant capacitor connected in series, wherein the resonant slot is coupled between the second end of the resistor and the first reference low voltage. A transformer, coupled to the magnetizing inductor, configured to convert a first power supply located at the magnetizing inductor to generate a second power supply; and An output circuit, coupled to the transformer, is configured to generate an output voltage based on the second power supply.

7. The power supply according to claim 6, characterized in that, The resistor is configured to prevent the resonant slot from being affected by the inductive coupling of the first inductor when it is resonating.

8. The power supply according to claim 6, characterized in that: The transformer includes: The primary winding is coupled in parallel with the magnetizing inductor; First and second side coils; and A second secondary side coil, the first end of which is connected to the first end of the first secondary side coil and to a second reference low voltage; and The output circuit includes: The first output diode has its anode coupled to the second terminal of the first secondary coil and its cathode coupled to the output terminal of the output circuit. A second output diode, the anode of which is coupled to the second terminal of the second secondary coil, and the cathode of which is coupled to the output terminal of the output circuit; and An output capacitor, wherein a first end of the output capacitor is coupled to the output terminal of the output circuit, and a second end of the output capacitor is coupled to the second reference low voltage.

9. The power supply according to claim 8, characterized in that, The LLC converter also includes: A sensing inductor, coupled between the second terminal of the output capacitor and the second reference low voltage, is configured to respond to the load at the output of the power supply to store energy; and A second inductor is coupled between the second terminal of the first inductor and the first reference low voltage, and is inductively coupled to the detection inductor to obtain a second energy.

10. The power supply according to claim 9, characterized in that, The time point at which zero voltage difference is generated between the first terminal and the second terminal of the first switch is dynamically delayed due to the sum of the first energy and the second energy, thereby dynamically delaying the conduction time point of the second switch.

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