Debugging circuit for motor motion assembly
Patent Information
- Application Number
- CN202310914350.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-25
- Publication Date
- 2026-10-30
- Estimated Expiration
- 2043-07-25
AI Technical Summary
在现有组件的调试、磨合过程中,需要花费大量人力物力,并且必须保证程序正常运行,才能在组件调试、磨合阶段发现组件问题并予以修正
[0007]本发明具有的积极效果是:通过设计降压电路可将输入的高电压降低到器件所需的工作电压;通过设计分压电路一,可通过分压生成一个基准电压,供运算放大器输入端使用;通过设计三角波发生器电路,可产生一定幅值和一定频率的三角波;通过设计比较器电路一、比较器电路二以及比较器电路三,可根据同相输入端与反相输入端的输入电压,在输出端输出高低电平;通过设计分压电路二,可为比较器电路二和比较器电路三提供参考电压;通过设计逻辑控制电路,可使电阻 R16 默认将电机驱动芯片 U7 的第七引脚拉高;在晶体管 Q1 关断的情况下,当运算放大器 U5 输出高电平时,晶体管 Q2 导通,电机驱动芯片 U7 的第七引脚拉低;当运算放大器 U6 输出高电平时,晶体管 Q1 导通,晶体管 Q2关断,电机驱动芯片 U7 的第七引脚拉高。通过设计电机驱动电路,可根据电机驱动芯片U7 的逻辑真值表实现电机的正反转,即:当 A 输入端引脚 AIN、B 输入端引脚 BIN 输入不同高低电平时,N 引脚 GN1、N 引脚 GN2、P 引脚 GP1、P 引脚 GP2 的输出电平随之变化;控制 P 沟道增强型场效应晶体管 Q3 和 N 沟道增强型场效应晶体管 Q6 导通时,电机正转;控制 P 沟道增强型场效应晶体管 Q5 和 N 沟道增强型场效应晶体管 Q4 导通时,电机反转。
Smart Images

Figure CN116995962B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a debugging circuit, and more particularly to a debugging circuit for a motor motion component, belonging to the field of rehabilitation equipment. Background Technology
[0002] In rehabilitation equipment, many devices rely on motors and potentiometers to control various mechanical components. The more precise the mechanical component, the higher the required precision of each part. Often, a small error during assembly can lead to a malfunction of the entire motion assembly. Therefore, after assembly, the motion assembly should be tested and subjected to prolonged reciprocating motion to allow it to break in. The assembled motion assembly also needs to run for an extended period to allow the various parts to mesh and reach optimal operating conditions before being delivered to the user. If components are not tested and problems are only discovered after the entire machine is assembled, it not only requires partial disassembly but also expends significant time and effort to locate the problem, increasing the difficulty of troubleshooting, extending the manufacturing cycle, and even causing delivery delays. Therefore, component testing is essential.
[0003] In existing technologies, after the motion components are assembled, they need to be tested in conjunction with a main control chip. To test the components using the main control chip, test programs need to be written; this requires not only programming but also program verification and testing to prevent program defects from causing operational abnormalities. The debugging and break-in process of existing components requires significant manpower and resources, and the program must run normally to identify and correct component problems during the debugging and break-in phase. Furthermore, using a main control chip increases manufacturing costs.
[0004] Simplifying the component debugging and break-in process and improving debugging efficiency is a major challenge currently facing the field of rehabilitation equipment. Summary of the Invention
[0005] To address the tedious work of writing test programs and using the main control chip to test components during component debugging, this invention provides a debugging circuit for a motor motion component. Its purpose is to: reuse the circuitry of the motor and potentiometer for testing, eliminating the need to write test programs; enable the component to reciprocate within a set motion range, automatically decelerating when approaching its limit; and allow for timely detection and resolution of problems after component assembly, avoiding rework due to faults during the overall machine debugging phase and improving equipment assembly and debugging efficiency.
[0006] The technical solution of the present invention is: a debugging circuit for a motor motion component, including a motor and a potentiometer; the debugging circuit for the motor motion component includes a step-down circuit, a voltage divider circuit one, a triangular wave generator circuit, a comparator circuit one, a voltage divider circuit two, a comparator circuit two, a comparator circuit three, a logic control circuit, and a motor drive circuit. The circuit consists of several circuits: a step-down circuit reduces the power supply voltage to the required operating voltage for each component and then supplies power to each module; a voltage divider circuit outputs one voltage signal to the triangular wave generator circuit; the triangular wave generator circuit outputs a triangular wave signal to comparator circuit one; the potentiometer outputs one voltage signal to comparator circuit one, comparator circuit two, and comparator circuit three; a voltage divider circuit two outputs two different voltage signals to comparator circuit two and comparator circuit three; comparator circuit one outputs one voltage signal to the motor drive circuit; comparator circuit two and comparator circuit three each output two voltage signals to the logic control circuit; the logic control circuit receives the level signals from comparator circuit two and comparator circuit three, performs logic processing, and outputs one signal to the motor drive circuit; the motor drive circuit controls the motor to operate based on the input signals from comparator circuit one and the logic control circuit. This debugging circuit does not require an external main control chip. Through the cooperation of the above circuits, the motor drives the potentiometer to reciprocate, automatically decelerating when the movement approaches its limit, thus achieving self-adjustment and break-in of the motor's moving components. Furthermore, the step-down circuit consists of a linear regulator U2, capacitors C1, C2, C3, and C4; the input terminal of the linear regulator U2 is connected to the power supply, the output terminal is the voltage output terminal, and the middle pin is the ground terminal; capacitors C1 and C3 are connected in parallel between the input line and the ground line; capacitors C2 and C4 are connected in parallel between the output line and the ground line. Furthermore, the voltage divider circuit consists of resistors R1 and R2; one end of resistors R1 and R2 is connected to the inverting input of operational amplifier U1 and the non-inverting input of operational amplifier U3 in the triangular wave generator circuit; the other end of resistors R1 and R2 is connected to the power supply voltage and the ground terminal, respectively. Furthermore, the second voltage divider circuit is composed of resistors R9, R10, and R11; wherein resistors R9, R10, and R11 are connected in series; the connection terminals of resistors R9 and R10 are simultaneously connected to the inverting input terminal of operational amplifier U5 in comparator circuit two; the connection terminals of resistors R10 and R11 are simultaneously connected to the non-inverting input terminal of operational amplifier U6 in comparator circuit three; the other terminals of resistors R9 and R11 are respectively connected to the power supply voltage and the ground terminal. Furthermore, the triangular wave generator circuit consists of operational amplifier U1, operational amplifier U3, resistors R3, R4, and R5, and capacitor C5. Operational amplifier U1 forms a hysteresis comparator, and operational amplifier U3 forms an integrator circuit. Resistors R3 and R4 are connected to the non-inverting input terminal of operational amplifier U1. The other end of resistor R3 is connected to the output terminal of operational amplifier U3. The other end of resistor R4 is connected to the output terminal of operational amplifier U1 and is connected in series with resistor R5. In addition, capacitor C5 is connected between the inverting input terminal and the output terminal of operational amplifier U3. The output terminal of operational amplifier U3 is also connected to resistor R8 of comparator circuit one. Furthermore, the first comparator circuit includes an operational amplifier U4, a resistor R8, and a resistor R12; the other end of resistor R8 is connected to the inverting input of operational amplifier U4; the non-inverting input of operational amplifier U4 is connected to the non-inverting input of operational amplifier U5 in the second comparator circuit and the inverting input of operational amplifier U6 in the third comparator circuit, and is also connected to the output of reserved resistors R6 and R7 and potentiometer VR1; the output of operational amplifier U4 is connected to one end of resistor R12, and the other end of resistor R12 is connected to the motor drive circuit; Furthermore, the second comparator circuit includes an operational amplifier U5; its inverting input is connected between resistors R9 and R10 in the second voltage divider circuit; its non-inverting input is connected to the non-inverting input of the operational amplifier U4 in the first comparator circuit and the inverting input of the operational amplifier U6 in the third comparator circuit; the output of the operational amplifier U5 is connected to resistor R13 in the logic control circuit. Furthermore, the comparator circuit three includes an operational amplifier U6; its non-inverting input is connected between resistors R11 and R10 in the voltage divider circuit two; its inverting input is connected to the non-inverting input of operational amplifier U4 in comparator circuit one and the non-inverting input of operational amplifier U5 in comparator circuit two, respectively; the output of operational amplifier U6 is connected to resistor R14 in the logic control circuit. Furthermore, the logic control circuit includes a primary control circuit and a secondary control circuit; wherein the primary control circuit includes transistor Q1, resistor R14, and resistor R15; the secondary control circuit includes transistor Q2, resistor R13, and resistor R16; transistors Q1 and Q2 are bipolar transistors; the base of transistor Q1 is connected to one end of resistor R14, and the other end of resistor R14 is connected to the output terminal of operational amplifier U6; the collector of transistor Q1 is connected to one end of resistor R15, and the other end of resistor R15 is connected to the connection between the base of transistor Q2 and resistor R13 in the secondary control circuit; the collector of transistor Q2 is connected to resistor R16, and the connection of the collector of transistor Q2 is connected to the motor drive circuit; the emitters of transistors Q1 and Q2 are grounded respectively. Furthermore, the motor drive circuit includes a motor drive chip U7, a P-channel enhancement-mode field-effect transistor (EMT) Q3, a P-channel EMT Q5, an N-channel EMT Q4, and an N-channel EMT Q6. The input terminals of the motor drive chip U7 include a power supply voltage, an A input pin AIN, a B input pin BIN, and a ground terminal. The A input pin AIN is connected to the other end of resistor R12 of comparator circuit one. The B input pin BIN is connected to the line between the collector of transistor Q2 and resistor R16. The output terminals of the motor drive chip U7 include a P pin GP1 connected to the gate of the P-channel EMT, a P pin GP2 connected to the gate of the P-channel EMT, an N pin GN1 connected to the gate of the N-channel EMT, and an N pin GN2 connected to the gate of the N-channel EMT. The output terminals of the motor drive chip U7 are respectively connected to the gates of the corresponding EMTs. In addition, the source of P-channel enhancement-mode field-effect transistor Q3 is connected to the drain of N-channel enhancement-mode field-effect transistor Q4, and then connected to terminal M1 of motor M; the source of P-channel enhancement-mode field-effect transistor Q5 is connected to the drain of N-channel enhancement-mode field-effect transistor Q6, and then connected to terminal M2 of motor M; the drains of P-channel enhancement-mode field-effect transistors Q3 and Q5 are connected and then connected to the power supply VM; the sources of N-channel enhancement-mode field-effect transistors Q4 and Q6 are connected and then grounded.
[0007] The positive effects of this invention are as follows: By designing a step-down circuit, the input high voltage can be reduced to the operating voltage required by the device; by designing a voltage divider circuit, a reference voltage can be generated for use at the input of the operational amplifier; by designing a triangular wave generator circuit, a triangular wave of a certain amplitude and frequency can be generated; by designing comparator circuits one, two, and three, high and low levels can be output at the output based on the input voltages at the non-inverting and inverting input terminals; by designing a voltage divider circuit two, a reference voltage can be provided for comparator circuits two and three; by designing a logic control circuit, resistor R16 can be used to pull the seventh pin of the motor driver chip U7 high by default; when transistor Q1 is off, and operational amplifier U5 outputs a high level, transistor Q2 is turned on, and the seventh pin of the motor driver chip U7 is pulled low; when operational amplifier U6 outputs a high level, transistor Q1 is turned on, transistor Q2 is turned off, and the seventh pin of the motor driver chip U7 is pulled high. By designing a motor drive circuit, the forward and reverse rotation of the motor can be achieved according to the logic truth table of the motor drive chip U7. That is, when the A input pin AIN and the B input pin BIN input different high and low levels, the output levels of the N pins GN1, GN2, GP1, and GP2 change accordingly. When the P-channel enhancement-mode field-effect transistor Q3 and the N-channel enhancement-mode field-effect transistor Q6 are turned on, the motor rotates forward; when the P-channel enhancement-mode field-effect transistor Q5 and the N-channel enhancement-mode field-effect transistor Q4 are turned on, the motor rotates in reverse. Attached Figure Description
[0008] Figure 1 is a schematic diagram of the structure of the present invention.
[0009] Figure 2 is a circuit diagram of the present invention.
[0010] Figure 3 is the logic truth table of the motor driver chip.
[0011] Figure 4 is a reference diagram of the waveforms generated by operational amplifiers U1 and U3.
[0012] Figure 5 shows the square wave output of operational amplifier U4 after the voltage falls within the range of the triangular wave voltage value.
[0013] Figure 6 shows the different waveforms corresponding to the forward and reverse rotation of the motor.
[0014] Figure 7 is an example diagram of a component with a motor and a potentiometer.
[0015] Labeling Explanation: Potentiometer 10, Potentiometer Terminal 1, Potentiometer Terminal 2, Potentiometer Terminal 3, 13, Square Wave, 14, Triangle Wave, 15, Diagonal Wave, 16, n-shaped Wave, 17, V-shaped Wave, 18, A Input Terminal AIN, B Input Terminal BIN, Capacitor C1, Capacitor C2, Capacitor C3, Capacitor C4, P Pin GP1, Resistor R1, Resistor R2, Resistor R3, Resistor R4, Resistor R5, Reserved Resistor R6, Reserved Resistor R7, Adjustable Potentiometer VR1, Resistor R8, Resistor R9, Resistor R10, Resistor R11, Motor M, Terminal M1, Terminal M2, P Pin GP2, N Pin GN1, N Pin GN2, Output Terminal OUT, Transistor Q1, Transistor Q2, P-channel Enhancement Field-Effect Transistor Q3, N-channel Enhancement Field-Effect Transistor Q4, P-channel Enhancement Field-Effect Transistor Q5, N... Channel enhancement-mode field-effect transistor Q6, power supply VM, supply voltage VCC, ground GND, operational amplifier U1, linear regulator U2, operational amplifier U3, operational amplifier U4, operational amplifier U5, operational amplifier U6, motor driver chip U7. Detailed Implementation
[0016] The specific technical solutions of the present invention will be described in detail below with reference to the accompanying drawings.
[0017] The technical solution of this invention is a debugging circuit for a motor motion component. Figure 1 is a schematic diagram of the invention, and Figure 2 is a circuit diagram of the invention. The debugging circuit for the motor motion component includes a step-down circuit, a voltage divider circuit one, a triangular wave generator circuit, a comparator circuit one, a voltage divider circuit two, a comparator circuit two, a comparator circuit three, a logic control circuit, and a motor drive circuit. Specifically, the reference voltage output terminal of the voltage divider circuit one is connected to the triangular wave generator circuit; the output terminal of the triangular wave generator circuit is connected to the comparator circuit one; the voltage divider circuit two is connected to the comparator circuit two and the comparator circuit three according to the voltage division ratio; the comparator circuit one, comparator circuit two, and comparator circuit three output high and low levels at their output terminals according to the input voltages at the non-inverting and inverting input terminals, respectively; the comparator circuit two and comparator circuit three output signals to the first-level control circuit and the second-level control circuit of the logic control circuit; the logic control circuit and the comparator circuit one are jointly connected to the motor drive circuit to control the forward and reverse rotation of the motor.
[0018] Specifically, voltage divider circuit one is connected to the inverting input of operational amplifier U1 and also to the non-inverting input of operational amplifier U3; the output of operational amplifier U1 is connected to its own non-inverting input through resistor R4, forming a feedback loop; the output of operational amplifier U3 is connected to its own inverting input through capacitor C5, forming a feedback loop, and is also connected to the non-inverting input of operational amplifier U1 through resistor R3, forming a feedback loop between the two operational amplifiers, thereby generating a triangular wave; the output of operational amplifier U3 is connected to the inverting input of operational amplifier U4 through resistor R8. The output of potentiometer VR1 is connected to the non-inverting input of operational amplifier U4, operational amplifier U5, and the inverting input of operational amplifier U6, respectively; voltage divider circuit two connects the two divided voltages to the inverting input of operational amplifier U5 and the non-inverting input of operational amplifier U6, respectively. The output of operational amplifier U6 is connected to the base of transistor Q1 through resistor R14; the emitter of transistor Q1 is grounded, and the collector is connected to the base of transistor Q2 through resistor R15; the output of operational amplifier U5 is connected to the junction of the base of transistor Q2 and resistor R15 through resistor R13; the emitter of transistor Q2 is grounded, and the collector is connected to the B input pin BIN of motor driver chip U7, and also connected to the supply voltage VCC through resistor R16, keeping it at a high level by default; the output of operational amplifier U4 is connected to the A input pin AIN of motor driver chip U7 through resistor R12. The N-pins GN1 and GN2 of the motor driver chip U7 are connected to the gates of N-channel enhancement-mode field-effect transistors Q4 and Q6, respectively; the sources of N-channel enhancement-mode field-effect transistors Q4 and Q6 are grounded; the drains of N-channel enhancement-mode field-effect transistors Q4 and Q6 are connected to the two ends of the motor M, and also to the sources of P-channel enhancement-mode field-effect transistors Q3 and Q5. The P-pins GP1 and GP2 of the motor driver chip U7 are connected to the gates of P-channel enhancement-mode field-effect transistors Q3 and Q5, respectively; the drains of P-channel enhancement-mode field-effect transistors Q3 and Q5 are connected to the power supply VM. The buck converter circuit can be designed according to the specifications of the selected buck converter chip.
[0019] The step-down circuit consists of a linear regulator U2, capacitors C1, C2, C3, and C4. The input terminal IN of the linear regulator U2 is connected to the power supply VM, the output terminal is OUT, and the middle pin is ground GND. Capacitors C1 and C3 are connected in parallel between the input line and the ground line; capacitors C2 and C4 are connected in parallel between the output line and the ground line. The function of the step-down circuit is to reduce the high input voltage to the operating voltage required by the device.
[0020] The voltage divider circuit consists of resistors R1 and R2. One end of resistors R1 and R2 is connected to the inverting input of operational amplifier U1 and the non-inverting input of operational amplifier U3 in the triangular wave generator circuit. The other ends of resistors R1 and R2 are connected to the supply voltage VCC and the ground terminal GND, respectively. The principle of the voltage divider circuit is to divide the voltage according to a certain ratio. The voltage Vout at the midpoint between resistors R1 and R2 is VCC × R2 / (R1 + R2). The function of the voltage divider circuit is to generate a reference voltage for use at the input of the operational amplifier.
[0021] The triangular wave generator circuit consists of operational amplifiers U1 and U3, resistors R3, R4, and R5, and capacitor C5. Operational amplifier U1 forms a hysteresis comparator, and operational amplifier U3 forms an integrator circuit. Resistors R3 and R4 are connected to the non-inverting input of operational amplifier U1. The other end of resistor R3 is connected to the output of operational amplifier U3, and the other end of resistor R4 is connected to the output of operational amplifier U1. In addition to resistor R4, resistor R5 is connected in series between the output of operational amplifier U1 and the inverting input of operational amplifier U3. Furthermore, capacitor C5 is connected between the inverting input and output of operational amplifier U3. The output of operational amplifier U3 is also connected to resistor R8 of comparator circuit one. The function of the triangular wave generator circuit is to generate a triangular wave of a certain amplitude and frequency.
[0022] The first comparator circuit includes an operational amplifier U4, resistors R8 and R12; the other end of resistor R8 is connected to the inverting input of operational amplifier U4; the non-inverting input of operational amplifier U4 is connected to the non-inverting input of operational amplifier U5 in the second comparator circuit and the inverting input of operational amplifier U6 in the third comparator circuit, and is also connected to the output of reserved resistors R6 and R7 and potentiometer VR1; the output of operational amplifier U4 is connected to one end of resistor R12, and the other end of resistor R12 is connected to the motor drive circuit.
[0023] The voltage divider circuit two consists of resistors R9, R10, and R11; resistors R9, R10, and R11 are connected in series; the connection terminals of resistors R9 and R10 are simultaneously connected to the inverting input terminal of operational amplifier U5 in comparator circuit two; the connection terminals of resistors R10 and R11 are simultaneously connected to the non-inverting input terminal of operational amplifier U6 in comparator circuit three; the other terminals of resistors R9 and R11 are connected to the supply voltage VCC and the ground terminal GND, respectively. The principle of voltage divider circuit two is to divide the voltage according to a certain ratio; the function of voltage divider circuit two is to provide a reference voltage for comparator circuit two and comparator circuit three.
[0024] The second comparator circuit includes an operational amplifier U5; its inverting input is connected between resistors R9 and R10 in the second voltage divider circuit; its non-inverting input is connected to the non-inverting input of operational amplifier U4 in the first comparator circuit and the inverting input of operational amplifier U6 in the third comparator circuit; the output of operational amplifier U5 is connected to resistor R13 in the logic control circuit. The principle of the second comparator circuit is as follows: when the voltage difference between the non-inverting and inverting inputs of operational amplifier U5 is greater than 0, the output of operational amplifier U5 is close to the positive power rail; when the difference is less than 0, the output of operational amplifier U5 is close to the negative power rail. The function of the second comparator circuit is to output high and low levels at the output terminal based on the input voltages at the non-inverting and inverting inputs.
[0025] The comparator circuit three includes operational amplifier U6; its non-inverting input is connected between resistors R11 and R10 in voltage divider circuit two; its inverting input is connected to the non-inverting inputs of operational amplifier U4 in comparator circuit one and operational amplifier U5 in comparator circuit two, respectively; the output of operational amplifier U6 is connected to resistor R14 in the logic control circuit. The principle of comparator circuit three: the voltage difference between the non-inverting and inverting inputs of operational amplifier U6 is calculated. When the difference is greater than 0, the operational amplifier output is close to the positive power rail; when the difference is less than 0, the operational amplifier output is close to the negative power rail. The function of comparator circuit three: based on the input voltages at the non-inverting and inverting inputs, it outputs a high or low level at the output.
[0026] Figure 3 shows the logic truth table of the motor driver chip. The logic control circuit includes a primary control circuit and a secondary control circuit; the primary control circuit includes transistor Q1, resistor R14, and resistor R15; the secondary control circuit includes transistor Q2, resistor R13, and resistor R16; the base of transistor Q1 is connected to one end of resistor R14, and the other end of resistor R14 is connected to the output of operational amplifier U6; the collector of transistor Q1 is connected to one end of resistor R15, and the other end of resistor R15 is connected to the connection between the base of transistor Q2 and resistor R13 in the secondary control circuit; the emitter of transistor Q2 is grounded; the connection between the collector of transistor Q2 and resistor R16 is connected to the motor drive circuit; the emitters of transistors Q1 and Q2 are grounded respectively. The principle of the logic control circuit is as follows: Resistors R14 and R15, and transistor Q1 form a primary control circuit; when resistor R14 receives a high level input, transistor Q1 is turned on, and transistor Q2 is turned off. Resistors R13 and transistor Q2 form a secondary control circuit; when transistor Q1 is off, if resistor R13 receives a high level input, transistor Q2 is turned on. Resistor R16 is a pull-up resistor. The function of the logic control circuit is as follows: Resistor R16 by default pulls the seventh pin of the motor driver chip U7 high; when transistor Q1 is off, when operational amplifier U5 outputs a high level, transistor Q2 is turned on, and the seventh pin of the motor driver chip U7 is pulled low; when operational amplifier U6 outputs a high level, transistor Q1 is turned on, transistor Q2 is turned off, and the seventh pin of the motor driver chip U7 is pulled high.
[0027] The motor drive circuit includes a motor drive chip U7, a P-channel enhancement-mode field-effect transistor (EMT) Q3, a P-channel EMT Q5, an N-channel EMT Q4, and an N-channel EMT Q6. The input terminals of the motor drive chip U7 include the supply voltage VCC, input pin A (AIN), input pin B (BIN), and ground terminal GND. The input pin A (AIN) is connected to the other end of resistor R12 of comparator circuit one. The input pin B (BIN) is connected to the line between the collector of transistor Q2 and resistor R16. The output terminals of the motor drive chip U7 include a P-pin GP1 connected to the gate of the P-channel EMT, a P-pin GP2 connected to the gate of the P-channel EMT, an N-pin GN1 connected to the gate of the N-channel EMT, and an N-pin GN2 connected to the gate of the N-channel EMT. The output terminals of the motor drive chip U7 are respectively connected to the gates of the corresponding EMTs. In addition, the source of P-channel enhancement-mode field-effect transistor Q3 is connected to the drain of N-channel enhancement-mode field-effect transistor Q4, and then connected to terminal M1 of motor M; the source of P-channel enhancement-mode field-effect transistor Q5 is connected to the drain of N-channel enhancement-mode field-effect transistor Q6, and then connected to terminal M2 of motor M; the drains of P-channel enhancement-mode field-effect transistors Q3 and Q5 are connected and then connected to the power supply VM; the sources of N-channel enhancement-mode field-effect transistors Q4 and Q6 are connected and then grounded. The principle of the motor drive circuit: By controlling the A input pin AIN and the B input pin BIN of the motor drive chip U7, the output pins P pin GP1, P pin GP2, N pin GN1, and N pin GN2 of the motor drive chip U7 will output high and low levels, respectively. This controls the H-bridge drive circuit composed of P-channel enhancement-mode field-effect transistor Q3, N-channel enhancement-mode field-effect transistor Q4, P-channel enhancement-mode field-effect transistor Q5, and N-channel enhancement-mode field-effect transistor Q6, thereby controlling the speed and direction of the motor.
[0028] The function of the motor drive circuit is as follows: According to the logic truth table in the datasheet of the motor drive chip U7, when the A input pin AIN and the B input pin BIN of the motor drive chip U7 are input with different high and low levels, the output levels of the P pins GP1, GP2, GN1, and GN2 change accordingly; when the P-channel enhancement-mode field-effect transistor Q3 and the N-channel enhancement-mode field-effect transistor Q6 are turned on, the motor M rotates forward; when the P-channel enhancement-mode field-effect transistor Q5 and the N-channel enhancement-mode field-effect transistor Q4 are turned on, the motor rotates in reverse.
[0029] Figure 4 is a reference diagram of the waveforms generated by operational amplifiers U1 and U3. Taking a 12V power supply VM for the motor as an example, the operational amplifiers are rail-to-rail operational amplifiers; the positions of terminals M1 and M2 of the motor M, and terminals 1, 2, and 3 of the adjustable potentiometer VR1 are labeled as potentiometer terminal 11, potentiometer terminal 212, and potentiometer terminal 313; the step-down circuit reduces the power supply VM to the supply voltage VCC (5V in this embodiment).
[0030] Resistors R1 and R2 have the same resistance value and divide the supply voltage VCC. The voltage at the inverting input of operational amplifier U1 and the non-inverting input of operational amplifier U3 is equal to 2.5V. The waveforms generated by operational amplifiers U1 and U3 are both based on 2.5V.
[0031] In Figure 4, square wave 14 is the output waveform of operational amplifier U1, and triangular wave 15 is the output waveform of operational amplifier U3.
[0032] Resistors R3 and R4 set the triangular wave amplitude to a minimum of 1V and a maximum of 4V; the inverting input of operational amplifier U4 will receive a 1.4V triangular wave 15.
[0033] Resistors R6 and R7 are reserved resistors; in this embodiment, 0-ohm resistors are selected. Resistors R9, R10, and R11 are used to divide the voltage, inputting 3.8V to the inverting input terminal of operational amplifier U5 and 1.2V to the non-inverting input terminal of operational amplifier U6.
[0034] When the power is on, the BIN pin of the motor driver chip U7 remains high by default. At this time, the potentiometer voltage position is determined: when the potentiometer is at its minimum value, terminal 2 outputs 5V, which is input to the inverting input of operational amplifier U6 and the non-inverting inputs of operational amplifiers U4 and U5; operational amplifiers U4 and U5 output high levels, and operational amplifier U6 outputs a low level; transistor Q1 is off, and transistor Q2 is on; the AIN pin of the motor driver chip U7 is high, and the BIN pin of the motor driver chip U7 is low; according to the truth table of the motor driver chip U7, the P-channel enhancement-mode MOSFET Q3 and the N-channel enhancement-mode MOSFET Q6 are on, and the motor begins to rotate.
[0035] Figure 5 shows the square wave output of operational amplifier U4 after the voltage falls within the triangular wave voltage range. The rotation of the motor drives the potentiometer to rotate; as the potentiometer resistance increases, the voltage at terminal 2 decreases. When the voltage drops to within the triangular wave voltage range, operational amplifier U4 outputs a square wave, and the duty cycle gradually decreases as the voltage decreases, thus achieving the function of gradually slowing down the speed.
[0036] In Figure 5, the slanted wave 16 is the voltage waveform at potentiometer terminal 12, the triangular wave 15 is the waveform of the triangular wave generator (i.e., the waveform at the connection between operational amplifier U4 and resistor R8), and the n-shaped wave 17 is the output waveform of operational amplifier U4.
[0037] When the voltage drops below 1.2V, operational amplifier U6 will output a high level, transistor Q1 will turn on, transistor Q2 will turn off, and the BIN pin of motor driver chip U7 will be at a high level, causing the motor to rotate in reverse and drive the potentiometer to rotate. When the potentiometer resistance decreases, the voltage at potentiometer terminal 12 will increase.
[0038] Figure 6 shows the different waveforms corresponding to the forward and reverse rotation of the motor. When the voltage increases to 3.8V, operational amplifier U5 outputs a high level and operational amplifier U6 outputs a low level; transistor Q1 is turned off and transistor Q2 is turned on, pin 7 of the motor driver chip U7 is at a low level, and the motor switches its rotation direction.
[0039] In Figure 6, V-shaped wave 18 is the voltage waveform at potentiometer terminal 12, triangular wave 15 is the waveform of the triangular wave generator (i.e., the waveform at the connection between operational amplifier U4 and resistor R8), and square wave 14 is the output waveform of operational amplifier U4.
[0040] The power supply is connected to the motor drive section, providing power for the motor rotation on the one hand, and supplying voltage to the step-down circuit on the other hand. After the step-down circuit outputs the usable voltage of each module, it supplies power to the voltage divider circuit 1, voltage divider circuit 2, triangular wave generator circuit, comparator circuit 1, comparator circuit 2, comparator circuit 3, motor drive chip U7, and potentiometer respectively.
[0041] Voltage divider circuit one outputs one voltage signal to the triangular wave generator circuit; the signal output by the triangular wave generator circuit is provided to comparator circuit one; the potentiometer outputs one voltage signal to comparator circuit one, comparator circuit two, and comparator circuit three respectively; voltage divider circuit two outputs two different voltage signals to comparator circuit two and comparator circuit three respectively; comparator circuit one outputs one voltage signal to the motor driver chip U7; comparator circuit two and comparator circuit three each output two voltage signals to control the logic control circuit; the logic control circuit outputs one signal to the motor driver chip U7; the motor driver chip U7 controls the motor M to move according to the input signals of comparator circuit one and the logic control circuit.
[0042] This circuit reuses the wiring of the motor and potentiometer for testing, eliminating the need to write test programs. It allows the components to reciprocate within a set range of motion and automatically decelerate when approaching the limit position. It can promptly identify and resolve problems after component assembly, avoiding rework during the overall machine debugging stage and improving the efficiency of equipment assembly and debugging.
Claims
1. A debugging circuit for a motor motion component, comprising a motor and a potentiometer, characterized in that: The debugging circuit for the motor motion assembly includes a step-down circuit, a voltage divider circuit I, a triangular wave generator circuit, a comparator circuit I, a voltage divider circuit II, a comparator circuit II, a comparator circuit III, a logic control circuit, and a motor drive circuit. The step-down circuit reduces the power supply voltage to the required operating voltage for each component and then supplies power to each circuit module. The voltage divider circuit I outputs one voltage signal to the triangular wave generator circuit, which in turn outputs a triangular wave signal to comparator circuit I. The potentiometer outputs one voltage signal to comparator circuit I, comparator circuit II, and comparator circuit III respectively. The voltage divider circuit II outputs two different voltage signals to the comparators respectively. Circuit 2 and Comparator Circuit 3 are connected. Comparator Circuit 1 outputs one voltage signal to the motor drive circuit, while Comparator Circuit 2 and Comparator Circuit 3 each output two voltage signals to the logic control circuit. The logic control circuit receives the level signals output by Comparator Circuit 2 and Comparator Circuit 3, performs logic processing, and outputs one signal to the motor drive circuit. The motor drive circuit controls the motor to move according to the input signals from Comparator Circuit 1 and the logic control circuit. This debugging circuit does not require an external main control chip. Through the cooperation of the above circuits, the motor drives the potentiometer to reciprocate. When the movement approaches the limit position, it automatically decelerates, realizing the self-adjustment and break-in of the motor's moving components. The motor drive circuit includes a motor drive chip (U7), a P-channel enhancement-mode field-effect transistor (P-channel enhancement-mode field-effect transistor 3 (Q3), a P-channel enhancement-mode field-effect transistor 5 (Q5), an N-channel enhancement-mode field-effect transistor 4 (Q4), and an N-channel enhancement-mode field-effect transistor 6 (Q6). The input terminals of the motor drive chip (U7) include a power supply voltage (VCC), an A input pin (AIN), a B input pin (BIN), and a ground terminal (GND). The A input pin (AIN) is connected to the other end of resistor 12 (R12) of comparator circuit 1. The B input pin (BIN) is connected to the collector of transistor 2 (Q2) and resistor 16 (R16). The output terminals of the motor drive chip (U7) include P pin 1 (GP1) connected to the gate of the P-channel enhancement-mode field-effect transistor, P pin 2 (GP2) connected to the gate of the P-channel enhancement-mode field-effect transistor, and N-channel enhancement-mode field-effect transistor 6. The N-pin 1 (GN1) connected to the gate of the N-channel MOSFET and the N-pin 2 (GN2) connected to the gate of the N-channel MOSFET are respectively connected to the gate of the corresponding enhancement-mode MOSFET.Additionally, the source of P-channel enhancement-mode field-effect transistor three (Q3) is connected to the drain of N-channel enhancement-mode field-effect transistor four (Q4), and then connected to terminal M1 of the motor (M). The source of P-channel enhancement-mode field-effect transistor five (Q5) is connected to the drain of N-channel enhancement-mode field-effect transistor six (Q6), and then connected to terminal M2 of the motor (M). The drains of P-channel enhancement-mode field-effect transistor three (Q3) and P-channel enhancement-mode field-effect transistor five (Q5) are connected to the power supply (VM), and the sources of N-channel enhancement-mode field-effect transistor four (Q4) and N-channel enhancement-mode field-effect transistor six (Q6) are connected to ground.
2. The debugging circuit for a motor motion component according to claim 1, characterized in that: The step-down circuit consists of a linear regulator (U2), capacitors (C1, C2, C3, and C4). The input terminal (IN) of the linear regulator (U2) is connected to the power supply (VM), the output terminal is the output terminal (OUT), and the middle terminal is the ground terminal (GND). Capacitors (C1) and (C3) are connected in parallel between the input line and the ground line, and capacitors (C2) and (C4) are connected in parallel between the output line and the ground line.
3. The debugging circuit for a motor motion component according to claim 1, characterized in that: The voltage divider circuit consists of resistor 1 (R1) and resistor 2 (R2). One end of resistor 1 (R1) and resistor 2 (R2) are connected to the inverting input of operational amplifier 1 (U1) and the non-inverting input of operational amplifier 3 (U3) in the triangular wave generator circuit. The other end of resistor 1 (R1) and resistor 2 (R2) are respectively connected to the power supply voltage (VCC) and the ground terminal (GND).
4. The debugging circuit for a motor motion component according to claim 1, characterized in that: The voltage divider circuit two consists of resistors nine (R9), ten (R10), and eleven (R11). Resistors nine (R9), ten (R10), and eleven (R11) are connected in series. The terminals of resistors nine (R9) and ten (R10) are simultaneously connected to the inverting input of operational amplifier five (U5) in comparator circuit two. The terminals of resistors ten (R10) and eleven (R11) are simultaneously connected to the non-inverting input of operational amplifier six (U6) in comparator circuit three. The other terminals of resistors nine (R9) and eleven (R11) are respectively connected to the power supply voltage (VCC) and the ground terminal (GND).
5. The debugging circuit for a motor motion component according to claim 1, characterized in that: The triangular wave generator circuit consists of operational amplifier 1 (U1), operational amplifier 3 (U3), resistor 3 (R3), resistor 4 (R4), resistor 5 (R5), and capacitor 5 (C5). Operational amplifier 1 (U1) forms a hysteresis comparator, and operational amplifier 3 (U3) forms an integrator circuit. Resistor 3 (R3) and resistor 4 (R4) are connected to the non-inverting input terminal of operational amplifier 1 (U1). The other end of resistor 3 (R3) is connected to the output terminal of operational amplifier 3 (U3), and the other end of resistor 4 (R4) is connected to the output terminal of operational amplifier 1 (U1). Resistor 5 (R5) is also connected in series. In addition, capacitor 5 (C5) is connected between the inverting input terminal and the output terminal of operational amplifier 3 (U3). Operational amplifier 3 (U3) is also connected to resistor 8 (R8) of comparator circuit 1.
6. The debugging circuit for a motor motion component according to claim 1, characterized in that: The comparator circuit one includes operational amplifier four (U4), resistor eight (R8), and resistor twelve (R12). The other end of resistor eight (R8) is connected to the inverting input of operational amplifier four (U4). The non-inverting input of operational amplifier four (U4) is connected to the non-inverting input of operational amplifier five (U5) of comparator circuit two and the inverting input of operational amplifier six (U6) of comparator circuit three, respectively. It is also connected to the output of reserved resistor six (R6), reserved resistor seven (R7), and potentiometer one (VR1). One end of resistor twelve (R12) is connected to the output of operational amplifier four (U4), and the other end of resistor twelve (R12) is connected to the motor drive circuit.
7. The debugging circuit for a motor motion component according to claim 1, characterized in that: The second comparator circuit includes an operational amplifier five (U5), whose inverting input is connected between resistor nine (R9) and resistor ten (R10) of the second voltage divider circuit. Its non-inverting input is connected to the non-inverting input of operational amplifier four (U4) of the first comparator circuit and the inverting input of operational amplifier six (U6) of the third comparator circuit. The output of operational amplifier five (U5) is connected to resistor thirteen (R13) of the logic control circuit.
8. The debugging circuit for a motor motion component according to claim 1, characterized in that: The comparator circuit three includes operational amplifier six (U6), whose non-inverting input is connected between resistor eleven (R11) and resistor ten (R10) of voltage divider circuit two, and its inverting input is connected to the non-inverting input of operational amplifier four (U4) of comparator circuit one and the non-inverting input of operational amplifier five (U5) of comparator circuit two, respectively. The output of operational amplifier six (U6) is connected to resistor fourteen (R14) of logic control circuit.
9. The debugging circuit for a motor motion component according to claim 1, characterized in that: The logic control circuit includes a primary control circuit and a secondary control circuit. The primary control circuit includes transistor 1 (Q1), resistor 14 (R14), and resistor 15 (R15). The secondary control circuit includes transistor 2 (Q2), resistor 13 (R13), and resistor 16 (R16). Transistors 1 (Q1) and 2 (Q2) are transistors. The base of transistor 1 (Q1) is connected to one end of resistor 14 (R14), and the other end of resistor 14 (R14) is connected to the output of operational amplifier 6 (U6). The collector of transistor 1 (Q1) is connected to one end of resistor 15 (R15), and the other end of resistor 15 (R15) is connected to the connection between the base of transistor 2 (Q2) and resistor 13 (R13) in the secondary control circuit. The collector of transistor 2 (Q2) is connected to resistor 16 (R16). The connection of the collector of transistor 2 (Q2) is connected to the motor drive circuit. The emitter of transistor Q2 is grounded.
Citation Information
Patent Citations
Motor drive circuit
CN101546983A
Multi-media knee joint rehabilitation apparatus
CN105362038A