Signal processing circuit, method, ultrasonic signal processing chip and radar device

Abstract

The signal processing circuit, method, ultrasonic signal processing chip and radar device provided in the embodiments of the present application comprise: a sampling circuit configured to obtain a sampling signal; a frequency conversion module configured to convert the sampling signal into a mixed frequency signal; a low-pass filter configured to perform low-pass filtering on the mixed frequency signal based on different cutoff frequencies to obtain a first signal and a second signal; an amplitude calculation module configured to perform amplitude calculation based on the first signal and the second signal respectively, and output a first envelope curve and a second envelope curve; and an envelope generation module configured to determine a final envelope curve based on the first envelope curve and the second envelope curve. In the embodiments of the present application, a relatively ideal envelope curve can be obtained, and the parameters of the low-pass filter do not need to be adjusted, so that the system is simpler, and problems such as data jitter and discontinuity at the boundary of filter bandwidth conversion caused by adjusting the parameters of the low-pass filter are avoided.

Description

[0001] This application claims priority to Chinese Patent Application No. 202310375784.5, filed on April 10, 2023, entitled “A Signal Processing Circuit, Processing Method and Processing Chip for an Ultrasonic Transducer”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of electronic technology, specifically to a signal processing circuit, method, ultrasonic signal processing chip, and radar device. Background Technology

[0003] Ultrasonic ranging, as a typical non-contact measurement method, is widely used in many scenarios, such as vehicle obstacle detection, industrial automation control, and construction engineering. Taking vehicle obstacle detection as an example, after emitting ultrasonic waves at frequencies of 20 kHz or higher (which are in the inaudible range), the ultrasonic transducer can sense the echo signal reflected from external obstacles and analyze the echo signal to determine the distance between the ultrasonic transducer and the obstacle, i.e., the detection distance. Based on this detection distance, corresponding prompts can be provided to the user (e.g., through a buzzer or by displaying the obstacle distance on a screen) to assist the user in safe driving.

[0004] Specifically, when distance detection is required, the main control circuit of the ultrasonic transducer chip receives a trigger signal from the host computer (such as an ECU) and controls the drive circuit to generate an ultrasonic drive signal. This drive signal is used to drive the ultrasonic transducer to emit ultrasonic waves (this process is called the "drive phase"). After the drive phase, the drive signal stops driving the ultrasonic transducer, but the ultrasonic transducer does not stop vibrating immediately. Instead, it generates periodic oscillation signals (this process is called the "aftershock phase"). During the aftershock phase, because the intensity of the oscillation signal is relatively large, the signal processing circuit cannot identify the echo signal (the signal reflected back by the emitted ultrasonic wave when it encounters an obstacle). After the aftershock phase, the signal processing circuit can identify the echo signal (this process is called the "receive phase").

[0005] In existing technologies, signal processing circuits typically include bandpass filters and low-pass filters. During the signal processing described above, the drive signal in the driving phase, the oscillation signal in the aftershock phase, and the echo signal in the receiving phase are all input to the signal processing circuit for processing. Because the signal characteristics differ in the driving phase, aftershock phase, and receiving phase, to obtain better signal processing results, it is usually necessary to adjust the specific parameters of the bandpass and low-pass filters according to the phase of the signal to be processed. For example, in the driving phase, the bandpass filter has a larger bandwidth, and the low-pass filter has a lower cutoff frequency; in the aftershock phase, the bandwidth of the bandpass filter decreases, and the cutoff frequency of the low-pass filter increases.

[0006] However, the above scheme increases the system complexity and is prone to data jitter and discontinuity at the boundaries of filter bandwidth transformation.

[0007] It should be noted that the information disclosed in the background section of this application is intended only to enhance the understanding of the general background of this application, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0008] In view of this, this application provides a signal processing circuit, method, ultrasonic signal processing chip, and radar device to solve the problems in the prior art where, in order to obtain better signal processing results, it is usually necessary to adjust the specific parameters of the bandpass filter and low-pass filter according to the stage of the signal to be processed, which leads to increased system complexity and the problem that data jitter and discontinuity are prone to occur at the boundary of filter bandwidth transformation.

[0009] In a first aspect, embodiments of this application provide a signal processing circuit, including:

[0010] The sampling circuit is used to sample the signal to be processed and obtain the sampled signal;

[0011] A frequency conversion module, electrically connected to the sampling circuit, is used to receive the sampling signal output by the sampling circuit and convert the sampling signal into a mixed frequency signal;

[0012] A low-pass filter, electrically connected to the frequency converter module, is used to receive the mixing signal output by the frequency converter module and perform low-pass filtering on the mixing signal based on different cutoff frequencies to obtain a first signal and a second signal.

[0013] An amplitude calculation module is electrically connected to the low-pass filter and is used to receive a first signal and a second signal output by the low-pass filter, and to calculate the amplitude based on the first signal and the second signal respectively, and output a first envelope curve and a second envelope curve.

[0014] An envelope generation module, electrically connected to the amplitude calculation module, is used to receive the first envelope curve and the second envelope curve output by the amplitude calculation module, and to determine the final envelope curve based on the first envelope curve and the second envelope curve.

[0015] Secondly, embodiments of this application provide a signal processing method, including:

[0016] The signal to be processed is sampled to obtain the sampled signal;

[0017] The sampled signal is converted into a mixed signal;

[0018] The mixing signal is low-pass filtered based on different cutoff frequencies to obtain a first signal and a second signal.

[0019] The amplitudes are calculated based on the first signal and the second signal respectively, and the first envelope curve and the second envelope curve are output.

[0020] The final envelope curve is determined based on the first envelope curve and the second envelope curve.

[0021] Thirdly, embodiments of this application provide an ultrasonic signal processing chip, comprising:

[0022] The signal processing circuit described in the first aspect, wherein the sampling circuit is used to be electrically connected to the ultrasonic transducer, and the signal to be processed includes a driving stage, an aftershock stage, and a receiving stage.

[0023] Fourthly, embodiments of this application provide an automotive ultrasonic radar device, characterized in that it includes:

[0024] The chip described in the third aspect;

[0025] Ultrasonic transducer;

[0026] The ultrasonic transducer is electrically connected to the chip.

[0027] In this embodiment, firstly, the signals to be processed are low-pass filtered based on different cutoff frequencies to obtain two sets of low-pass filtered signals corresponding to different cutoff frequencies; then, two intermediate envelope curves are generated based on the two sets of low-pass filtered signals respectively; finally, the two intermediate envelope curves are combined to determine the final envelope curve. This scheme can obtain a relatively ideal envelope curve without adjusting the parameters of the low-pass filter, thus simplifying the system. Furthermore, it avoids the problems of data jitter and discontinuity at the boundaries of filter bandwidth changes caused by adjusting the parameters of the low-pass filter. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of an application scenario provided by an embodiment of this application;

[0030] Figure 2A and Figure 2B This is a schematic diagram of the ranging principle of an ultrasonic system provided in an embodiment of this application;

[0031] Figure 3 This is a schematic diagram of the ranging principle of another ultrasonic system provided in an embodiment of this application;

[0032] Figure 4 This is a schematic diagram of a signal processing circuit provided in an embodiment of this application;

[0033] Figure 5 This is a schematic diagram of the ranging principle of another ultrasonic system provided in an embodiment of this application;

[0034] Figure 6 This is a schematic diagram of the ranging principle of another ultrasonic system provided in an embodiment of this application;

[0035] Figure 7 This is a schematic diagram of the ranging principle of another ultrasonic system provided in an embodiment of this application;

[0036] Figure 8 This is a schematic diagram of an application scenario provided by an embodiment of this application;

[0037] Figure 9 A schematic diagram of the circuit structure of an envelope generation module provided in an embodiment of this application;

[0038] Figure 10 A schematic diagram illustrating the change of a weighting coefficient provided in an embodiment of this application;

[0039] Figure 11 A schematic diagram of the circuit structure of another envelope generation module provided in an embodiment of this application;

[0040] Figure 12 This is a schematic diagram of the ranging principle of another ultrasonic system provided in an embodiment of this application;

[0041] Figure 13 This is a schematic diagram of the ranging principle of another ultrasonic system provided in an embodiment of this application;

[0042] Figure 14 This is a schematic diagram of the ranging principle of another ultrasonic system provided in an embodiment of this application;

[0043] Figure 15 A schematic flowchart of a signal processing method provided in an embodiment of this application;

[0044] Figure 16 A schematic diagram of the structure of an ultrasonic signal processing chip is also provided in the embodiments of this application;

[0045] Figure 17 This application also provides a schematic diagram of the structure of an automotive ultrasonic radar device. Detailed Implementation

[0046] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0047] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0048] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0049] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0050] See Figure 1 This is a schematic diagram illustrating an application scenario provided in an embodiment of this application. Figure 1The image shows a vehicle 100 and an obstacle 200. The rear of the vehicle 100 is equipped with multiple ultrasonic transducers 101. When the user (or in the case of autonomous driving) controls the vehicle 100 to reverse (or in any scenario such as parallel parking or obstacle recognition), the ultrasonic transducers 101 can emit ultrasonic waves and receive echo signals. (The ultrasonic transducer can be two independent devices including an ultrasonic emitting transducer and an ultrasonic receiving transducer, or it can be a single device that can both emit and receive ultrasonic waves.) The distance between the ultrasonic transducers 101 (i.e., the vehicle 100) and the obstacle 200 can be calculated, and corresponding prompts can be provided to the user (e.g., a warning sound is output through a buzzer or the distance to the obstacle is displayed on a screen) to assist the user in driving safely.

[0051] It should be pointed out that, Figure 1 The examples provided in this application are merely one possible application scenario and should not be construed as limiting the scope of protection of this application. For instance, ultrasonic ranging, in addition to its application in vehicle obstacle detection, may also be applied in industrial automatic control, construction engineering surveying, and other scenarios. In other application scenarios, the obstacle may also be referred to as the "object to be detected." Besides being located at the rear of the vehicle, ultrasonic transducers can also be located at the side or front of the vehicle to detect obstacles on the side or front of the vehicle. Furthermore, in addition to four ultrasonic transducers, more or fewer ultrasonic transducers can be used, etc. This application does not impose specific limitations in these respects.

[0052] See Figure 2A and Figure 2B This is a schematic diagram illustrating the ranging principle of an ultrasonic system provided in an embodiment of this application. Figure 2A and Figure 2B As shown, the ultrasonic system includes an Electronic Control Unit (ECU), an ultrasonic transducer chip, and an ultrasonic transducer. The ultrasonic transducer chip includes a main control circuit, a drive circuit, and a signal processing circuit. The ECU and the main control circuit are communicatively connected. The output of the main control circuit is electrically connected to the input of the drive circuit, the output of the drive circuit is electrically connected to the input of the ultrasonic transducer, the output of the ultrasonic transducer is electrically connected to the input of the signal processing circuit, and the output of the signal processing circuit is electrically connected to the input of the main control circuit.

[0053] Specifically, in Figure 2A In the ultrasonic system shown, the input and output terminals of the ultrasonic transducer are respectively set. For example... Figure 2A As shown, the two ports at the bottom of the ultrasonic transducer are electrically connected to the output of the drive circuit as input terminals, and the two ports at the top of the ultrasonic transducer are electrically connected to the input of the signal processing circuit as output terminals. Figure 2B In the ultrasonic system shown, the same set of ports serves as both the input and output terminals of the ultrasonic transducer. For example... Figure 2B As shown, the two ports at the bottom of the ultrasonic transducer can be used as input terminals, electrically connected to the output terminal of the drive circuit, and simultaneously as output terminals, electrically connected to the input terminal of the signal processing circuit. It should be noted that... Figure 2A and Figure 2B The inclusion of two ports at the input and / or output of the ultrasonic transducer is merely an illustrative example; it can also be configured with more or fewer ports. Furthermore, in different implementations, there are other variations in the functional units and / or connections between functional units of the ultrasonic system, as described in other parts of this application.

[0054] When distance detection is required, the main control circuit of the ultrasonic transducer chip receives a trigger signal from the ECU and controls the drive circuit to generate an ultrasonic drive signal. This drive signal is used to drive the ultrasonic transducer to emit ultrasonic waves (this process is called the "drive phase"). After the drive phase, the drive signal stops driving the ultrasonic transducer, but the ultrasonic transducer does not stop vibrating immediately. Instead, it generates periodic oscillation signals (this process is called the "aftershock phase"). During the aftershock phase, because the intensity of the oscillation signal is relatively large, the signal processing circuit cannot identify the echo signal (the signal reflected back by the emitted ultrasonic wave when it encounters an obstacle). After the aftershock phase, the signal processing circuit can identify the echo signal (this process is called the "receive phase").

[0055] In the aforementioned signal processing, the drive signal during the driving phase, the oscillation signal during the aftershock phase, and the echo signal during the receiving phase are all input to the signal processing circuit for processing. Particularly in cases where an ultrasonic transducer acts as both an ultrasonic transmitting transducer and an ultrasonic receiving transducer, the drive signal during the driving phase is directly input to the signal processing circuit, along with the oscillation and echo signals from the ultrasonic transducer. After receiving the ultrasonic signal, the signal processing circuit can extract the envelope curve of the ultrasonic signal. Furthermore, it compares the envelope curve with a preset envelope curve threshold to obtain a threshold comparison result. Based on the threshold comparison result, it can determine whether an obstacle has been detected and the distance to the obstacle. Specifically, the threshold comparison result may include a first logic and a second logic. For example, the first logic is 1 and the second logic is 0; or, the first logic is 0 and the second logic is 1. In other parts of this document, logic "1" may also be referred to as a high level, and logic "0" may also be referred to as a low level.

[0056] In existing technologies, signal processing circuits typically include bandpass filters and low-pass filters. Because the signal characteristics differ during the driving, aftershock, and receiving phases, to obtain a more ideal envelope curve, the specific parameters of the bandpass and low-pass filters usually need to be adjusted according to the phase of the signal being processed. For example, during the driving phase, the bandpass filter has a larger bandwidth, and the low-pass filter has a lower cutoff frequency; during the aftershock phase, the bandwidth of the bandpass filter decreases, and the cutoff frequency of the low-pass filter increases.

[0057] However, the above scheme increases the system complexity and is prone to data jitter and discontinuity at the boundaries of filter bandwidth transformation.

[0058] To address the aforementioned problems, this application provides a signal processing scheme. First, low-pass filtering is applied to the signal to be processed based on different cutoff frequencies to obtain two sets of low-pass filtered signals corresponding to different cutoff frequencies. Then, two intermediate envelope curves are generated based on the two sets of low-pass filtered signals respectively. Finally, the two intermediate envelope curves are combined to determine the final envelope curve. This scheme can obtain a more ideal envelope curve without adjusting the parameters of the low-pass filter, thus simplifying the system. Furthermore, it avoids the problems of data jitter and discontinuity at the boundaries of filter bandwidth changes caused by adjusting the low-pass filter parameters. The specific implementation method will be described in detail below.

[0059] See Figure 3 This is a schematic diagram illustrating the ranging principle of another ultrasonic system provided in an embodiment of this application. Figure 3 As shown, in Figure 2A Based on the ultrasonic system shown, the signal processing circuit further includes a sampling circuit, a frequency conversion module, a low-pass filter, an amplitude calculation module, and an envelope generation module. Furthermore, the signal processing circuit described in this embodiment can also be applied to... Figure 2B The ultrasonic system shown is, for the sake of brevity, referred to only as [missing information] in this article. Figure 2A The ultrasonic system shown is used as an example for explanation.

[0060] It should be noted that, for ease of understanding, the working principle of the signal processing circuit is explained using an ultrasonic ranging application scenario as an example in the embodiments of this application. However, this application scenario should not be considered a limitation on the scope of protection of this application. It is understood that when the signal processing circuit is applied to other application scenarios, it can process other types of signals based on the same principle, and all of them should fall within the scope of protection of this application.

[0061] Please continue reading. Figure 3In this embodiment, the input terminal of the sampling circuit is electrically connected to the output terminal of the ultrasonic transducer, the output terminal of the sampling circuit is electrically connected to the input terminal of the frequency conversion module, the output terminal of the frequency conversion module is electrically connected to the input terminal of the low-pass filter, the output terminal of the low-pass filter is electrically connected to the input terminal of the amplitude calculation module, and the output terminal of the amplitude calculation module is electrically connected to the input terminal of the envelope generation module.

[0062] The sampling circuit is used to sample the signal to be processed to obtain a sampled signal. Specifically, in this embodiment, the sampling circuit is used to receive the ultrasonic signal output by the ultrasonic transducer and sample the ultrasonic signal to obtain a sampled signal. That is, in the application scenario of ultrasonic ranging, the signal to be processed is an ultrasonic signal (as mentioned above, the signal to be processed also includes the drive signal in the driving stage, the oscillation signal in the aftershock stage, and the ultrasonic echo signal in the receiving stage). Of course, in other application scenarios, the signal to be processed can be other types of signals, and this embodiment does not impose specific limitations on this.

[0063] In a specific implementation, the sampling circuit can be an analog-to-digital converter (ADC). Of course, those skilled in the art can set other types of sampling circuits according to actual needs, and the embodiments of this application do not impose specific limitations on this.

[0064] The frequency conversion module receives the sampled signal output from the sampling circuit and converts it into a mixed signal. Specifically, the sampled signal can be digitally down-converted based on the local signal to obtain the corresponding mixed signal. This mixed signal includes high-frequency and low-frequency signals, with the low-frequency signal being the desired signal. Therefore, in subsequent steps, the high-frequency signal needs to be filtered out to obtain the required low-frequency signal. Furthermore, in practical applications, since ultrasonic signals are typically complex signals, it is necessary to digitally down-convert the sampled signal based on two mutually orthogonal local signals to obtain two mixed signals.

[0065] See Figure 4 This is a schematic diagram of a signal processing circuit provided in an embodiment of this application. Figure 4As shown in the embodiment of this application, the frequency conversion module specifically includes a first frequency conversion module and a second frequency conversion module. The first and second frequency conversion modules are electrically connected to the sampling circuit and are used to receive the sampling signal output by the sampling circuit. Specifically, the first frequency conversion module performs digital down-conversion processing on the sampling signal based on the local signal sin(2πfot) to obtain a first mixed signal; the second frequency conversion module performs digital down-conversion processing on the sampling signal based on the local signal cos(2πfot) to obtain a second mixed signal. It can be understood that the local signals sin(2πfot) and cos(2πfot) are orthogonal to each other; that is, the first and second frequency conversion modules perform digital down-conversion processing on the sampling signal based on mutually orthogonal local signals.

[0066] Furthermore, the ultrasonic transducer chip also includes a storage unit where the aforementioned local signals can be stored. Specifically, the storage unit is electrically connected to the frequency converter module, and the frequency converter module can directly obtain the local signals from the storage unit, such as... Figure 5 As shown. Alternatively, the storage unit is electrically connected to the main control circuit. When the frequency converter module needs a local signal, the main control circuit can obtain the local signal from the storage unit and then forward the local signal to the frequency converter module, such as... Figure 6 As shown.

[0067] In specific implementations, the storage unit can be any form of storage unit or element, such as RAM (random access memory), ROM (read-only memory), register, or cache.

[0068] A low-pass filter is used to receive the mixed signal output from the frequency converter module and performs low-pass filtering on the mixed signal based on different cutoff frequencies to obtain a first signal and a second signal. Specifically, the cutoff frequency of the low-pass filter can be a preset cutoff frequency. During signal processing, regardless of the stage of the signal to be processed, the mixed signal is low-pass filtered based on this preset cutoff frequency to obtain a first signal and a second signal corresponding to different cutoff frequencies. Since this filtering method does not require adjustment of the filter parameters, the system is simpler and avoids problems such as data jitter and discontinuity at the boundaries of filter bandwidth changes caused by adjusting the low-pass filter parameters.

[0069] In addition, in subsequent steps, a first envelope curve and a second envelope curve can be generated based on the first signal and the second signal, respectively. The weighted combination of the first envelope curve and the second envelope curve can be adjusted according to the signal characteristics at different stages to obtain a more ideal envelope curve, achieving a signal processing effect similar to adjusting the parameters of a low-pass filter. This will be explained in detail below.

[0070] It is understandable that when the frequency converter outputs two mixing signals, low-pass filtering is performed on the two mixing signals based on different cutoff frequencies to obtain four filtered signals.

[0071] Please continue reading. Figure 4 In this embodiment, the low-pass filter specifically includes a first low-pass filter, a second low-pass filter, a third low-pass filter, and a fourth low-pass filter. The first low-pass filter is electrically connected to the output of the first frequency converter module, and is used to receive the first mixing signal output by the first frequency converter module, and perform low-pass filtering on the first mixing signal to obtain a first filtered signal (for ease of explanation, this first filtered signal is labeled "Q1"); the second low-pass filter is electrically connected to the output of the first frequency converter module, and is used to receive the first mixing signal output by the first frequency converter module, and perform low-pass filtering on the first mixing signal to obtain a second filtered signal (for ease of explanation, this second filtered signal is labeled "Q2"); the third low-pass filter is electrically connected to the output of the second frequency converter module, and is used to receive the second mixing signal output by the second frequency converter module, and perform low-pass filtering on the second mixing signal to obtain a third filtered signal (for ease of explanation, this third filtered signal is labeled "I1"); the fourth low-pass filter is electrically connected to the output of the second frequency converter module, and is used to receive the second mixing signal output by the second frequency converter module, and perform low-pass filtering on the second mixing signal to obtain a fourth filtered signal (for ease of explanation, this fourth filtered signal is labeled "I2"). The cutoff frequency of the first low-pass filter is higher than that of the second low-pass filter, and the cutoff frequency of the third low-pass filter is higher than that of the fourth low-pass filter.

[0072] Understandably, since the cutoff frequency of the first low-pass filter is higher than that of the second low-pass filter, the first and second low-pass filters perform low-pass filtering on the first mixer signal based on different cutoff frequencies, obtaining the first filtered signal Q1 and the second filtered signal Q2. Similarly, since the cutoff frequency of the third low-pass filter is higher than that of the fourth low-pass filter, the third and fourth low-pass filters perform low-pass filtering on the third mixer signal based on different cutoff frequencies, obtaining the third filtered signal I1 and the fourth filtered signal I2.

[0073] In one possible implementation, the first low-pass filter and the third low-pass filter are the same, or the first low-pass filter and the third low-pass filter have the same cutoff frequency; the second low-pass filter and the fourth low-pass filter are the same, or the second low-pass filter and the fourth low-pass filter have the same cutoff frequency. It is understood that this configuration can reduce system complexity, design difficulty, design cycle time, and cost.

[0074] The amplitude calculation module receives a first signal and a second signal output from a low-pass filter, and performs amplitude calculations based on the first and second signals respectively, outputting a first envelope curve and a second envelope curve. Specifically, the amplitude calculation module includes a first amplitude calculation module and a second amplitude calculation module. The first amplitude calculation module performs amplitude calculations based on the first signal and outputs a first envelope curve; the second amplitude calculation module performs amplitude calculations based on the second signal and outputs a second envelope curve.

[0075] Understandably, when the low-pass filter outputs four filtered signals, these four filtered signals need to be combined in pairs. The first amplitude calculation module and the second amplitude calculation module calculate the amplitude of each group of filtered signals separately, outputting the first envelope curve and the second envelope curve. Since the local signals corresponding to the same group of filtered signals should be orthogonal to each other, the first signal can correspond to the first filtered signal Q1 and the third filtered signal I1, and the second signal can correspond to the second filtered signal Q2 and the fourth filtered signal I2. Of course, the first signal can also correspond to the second filtered signal Q2 and the fourth filtered signal I2, in which case the second signal corresponds to the first filtered signal Q1 and the third filtered signal I1.

[0076] Please continue reading. Figure 4 In this embodiment, the input terminal of the first amplitude calculation module is electrically connected to the output terminals of the first low-pass filter and the third low-pass filter, respectively (this electrical connection can be a direct electrical connection or an indirect electrical connection through a downsampling circuit, which will be described below). It is used to receive the first filtered signal Q1 and the third filtered signal I1 output by the first and third low-pass filters, respectively, and to perform amplitude calculation based on the first filtered signal Q1 and the third filtered signal I1 to obtain a first envelope curve (for ease of explanation, this first envelope curve is labeled "E1"). The input terminal of the second amplitude calculation module is electrically connected to the output terminals of the second and fourth low-pass filters, respectively (similarly, this electrical connection can be a direct electrical connection or an indirect electrical connection through a downsampling circuit, which will be described below). It is used to receive the second filtered signal Q2 and the fourth filtered signal I2 output by the second and fourth low-pass filters, respectively, and to perform amplitude calculation based on the second filtered signal Q2 and the fourth filtered signal I2 to obtain a second envelope curve (for ease of explanation, this second envelope curve is labeled "E2").

[0077] In the specific implementation, the first amplitude calculation module can be based on the formula: The first envelope curve is calculated. Here, E1 is the amplitude of the first envelope curve, Q1 is the amplitude of the first filtered signal, and I1 is the amplitude of the third filtered signal. The second amplitude calculation module can be based on the formula: The second envelope curve is calculated. Here, E2 is the amplitude of the second envelope curve, Q2 is the amplitude of the second filtered signal, and I2 is the amplitude of the fourth filtered signal. It should be noted that when the signal processing circuit includes a downsampling module, Q1 is the amplitude of the first downsampled signal, I1 is the amplitude of the third downsampled signal, Q2 is the amplitude of the second downsampled signal, and I2 is the amplitude of the fourth downsampled signal.

[0078] The envelope generation module is electrically connected to the amplitude calculation module. Specifically, as follows: Figure 4 As shown, the first and second input terminals of the envelope generation module are electrically connected to the output terminals of the first and second amplitude calculation modules, respectively. These terminals receive the first envelope curve E1 output by the first amplitude calculation module and the second envelope curve E2 output by the second amplitude calculation module, and determine the final envelope curve (labeled "E" for clarity) based on the first and second envelope curves E1 and E2. Specifically, the weighted combination of the first envelope curve E1 and the second envelope curve E2 can be adjusted according to the signal characteristics at different stages to obtain a more ideal envelope curve, achieving a signal processing effect similar to adjusting filter parameters.

[0079] In one possible implementation, multiple envelope generation strategies can be set, and different envelope generation strategies can be used to determine the final envelope curve E according to the signal characteristics at different stages. For example, a first envelope generation strategy, a second envelope generation strategy, and a third envelope generation strategy are set. The envelope generation module is specifically used to: determine the final envelope curve E according to the first envelope generation strategy, the second envelope generation strategy, and / or the third envelope generation strategy; that is, it can a) determine the final envelope curve E according to the first envelope generation strategy and the second envelope generation strategy; or b) determine the final envelope curve E according to the first envelope generation strategy, the second envelope generation strategy, and the third envelope generation strategy. The first envelope generation strategy includes using the first envelope curve E1 as the final envelope curve E; the second envelope generation strategy includes using the second envelope curve E2 as the final envelope curve E; and the third envelope generation strategy includes weighted combination of the first envelope curve E1 and the second envelope curve E2 to generate the final envelope curve E. Of course, those skilled in the art can set more or fewer envelope generation strategies according to actual needs, and this application embodiment does not impose specific limitations on this.

[0080] See Figure 7 This is a schematic diagram illustrating the ranging principle of another ultrasonic system provided in an embodiment of this application. Figure 7 As shown, the embodiments of this application are in Figure 3 Based on the ultrasonic system shown, the signal processing circuit also includes an envelope control module, which is electrically connected to the envelope generation module. Specifically, as... Figure 4As shown, the first control terminal of the envelope control module is electrically connected to the third input terminal of the envelope generation module, and is used to send an enable control signal to the envelope generation module. The envelope generation module receives the enable control signal sent by the envelope control module. The enable control signal is used to control the envelope generation module to select a first envelope generation strategy, a second envelope generation strategy, or a third envelope generation strategy to determine the final envelope curve E. That is, in this embodiment, the envelope control module controls the envelope generation module to select the envelope generation strategy.

[0081] In one possible implementation, the envelope control module's control function can also be implemented through the main control circuit or the ECU. Understandably, in this case, the envelope control module may not be included in the signal processing circuit.

[0082] In one possible implementation, the envelope control module is specifically used to: in a first stage, control the envelope generation module to select a first envelope generation strategy to determine the final envelope curve E; in a second stage, control the envelope generation module to select a third envelope generation strategy to determine the final envelope curve E; and in a third stage, control the envelope generation module to select a second envelope generation strategy to determine the final envelope curve E. The first, second, and third stages can be time stages ordered chronologically.

[0083] See Figure 8 This is a schematic diagram illustrating an application scenario provided by an embodiment of this application. For example... Figure 8 As shown, this application scenario includes the envelope curve of an ultrasonic signal. As mentioned above, the envelope curve of an ultrasonic signal can be divided into a driving phase, an aftershock phase, and a receiving phase. In this embodiment, the first phase can correspond to the first half of the driving and aftershock phases, the second phase can correspond to the transition phase between the aftershock and receiving phases (i.e., the second half of the aftershock phase and the first half of the receiving phase), and the third phase can correspond to the second half of the receiving phase. The first and second halves of the aftershock phase can be distinguished by a threshold value; that is, the portion with an amplitude greater than a specified threshold is considered the first half of the aftershock phase, and the portion with an amplitude less than the specified threshold is considered the second half of the aftershock phase. The first and second halves of the receiving phase can be distinguished by the time or period after the end of the aftershock phase; that is, a certain time or period after the end of the aftershock phase is considered the first half of the receiving phase, and the remainder is considered the second half of the receiving phase. Figure 8 In the application scenario shown, the dividing point between the first and second halves of the aftershock phase is t0, and the dividing point between the first and second halves of the reception phase is t2. Therefore, the second phase corresponds to the range of t0 to t2.

[0084] Of course, these three stages can be adjusted appropriately according to the actual situation. For example, the driving stage and the aftershock stage before the amplitude is higher than a certain threshold can be the first stage, the aftershock stage after the amplitude is lower than a certain threshold can be the second stage (or the aftershock stage after the amplitude is lower than a certain threshold, and a certain period or cycle after the aftershock stage ends can be the second stage), and the receiving stage can be the third stage (or the receiving stage excluding a certain period can be the third stage), etc.

[0085] Since the third envelope generation strategy is an envelope generation strategy between the first and second envelope generation strategies, selecting the first, third, and second envelope generation strategies in the first, second, and third stages respectively can achieve a smooth transition of the final envelope curve E. Alternatively, a smooth transition can be omitted, and the first and second stages can be divided according to time sequence, selecting the first and second envelope generation strategies in the first and second stages respectively.

[0086] Furthermore, to achieve better signal processing results, the final envelope curve E can be determined by selecting an envelope generation strategy based on the intensity of the signal to be processed. Moreover, since the amplitude of the envelope curve is positively correlated with the intensity of the signal to be processed, the final envelope curve E can be determined by selecting an envelope generation strategy based on the amplitude of the envelope curve.

[0087] As mentioned above, there is a definite correspondence between time stages and envelope generation strategies. Therefore, the current time stage can be determined based on the amplitude of the envelope curve, thereby enabling the selection of the envelope generation strategy. Specifically, when the amplitude of the envelope curve is greater than or equal to a preset amplitude threshold, it is determined to be in the first stage; when the amplitude of the envelope curve is less than the amplitude threshold and the amplitude of the envelope curve gradually decreases, it is determined to enter the second stage; when the duration of the second stage reaches a specified duration, it is determined to enter the third stage. The envelope curves are the first envelope curve E1, the second envelope curve E2, and / or the final envelope curve E. That is, the current time stage can be determined based on the amplitudes of the first envelope curve E1, the second envelope curve E2, and / or the final envelope curve E. Specifically, the amplitude threshold can be the maximum amplitude value, and the specified duration of the second stage can be 24 downsampling periods (the details of downsampling are described below). Of course, those skilled in the art can set the amplitude threshold and / or the specified duration of the second stage to other values ​​according to actual needs, and the embodiments of this application do not impose specific limitations on this.

[0088] For example, in Figure 4In this implementation, the input of the envelope control module is electrically connected to the output of the envelope generation module to receive the final envelope curve E output by the envelope generation module. The current time stage can then be determined based on the amplitude of the final envelope curve E. Alternatively, in other implementations, the input of the envelope control module can also be electrically connected to the output of either the first amplitude calculation module or the second amplitude calculation module to receive the first envelope curve E1 output by the first amplitude calculation module, or the second envelope curve E2 output by the second amplitude calculation module. The current time stage can then be determined based on either the first envelope curve E1 or the second envelope curve E2.

[0089] Please continue reading. Figure 4 In this embodiment, the second control terminal of the envelope control module is electrically connected to the control terminals of the first and third low-pass filters to trigger the first and third low-pass filters to start or stop working; the third control terminal of the envelope control module is electrically connected to the control terminals of the second and fourth low-pass filters to trigger the second and fourth low-pass filters to start or stop working. Note that in Figure 4 In this paper, the connection between the envelope control module and the first to fourth low-pass filters is simplified. The connection can include multiple connection lines, such as at least two lines. For example, the first and third low-pass filters can be controlled by the same control line, and the second and fourth low-pass filters can be controlled by the same control line. Alternatively, separate control lines can be provided between the envelope control module and each of the first to fourth low-pass filters. Of course, as shown in the diagram, they can share a common control line, in which case the signals triggered by the first to fourth low-pass filters are different. For example, 0 triggers the first and third low-pass filters, and 1 triggers the second and fourth low-pass filters. It could also be 00 triggering the first low-pass filter, 01 triggering the second low-pass filter, 10 triggering the third low-pass filter, and 11 triggering the fourth low-pass filter, etc. The specific wiring and control logic for triggering and stopping between the envelope control module and the first to fourth low-pass filters can be implemented in various ways. Those skilled in the art can freely choose according to their needs, and this application does not impose any restrictions.

[0090] As mentioned above, the first envelope generation strategy uses the first envelope curve E1 as the final envelope curve E. The first envelope curve E1 is generated based on the first filtered signal Q1 output by the first low-pass filter and the third filtered signal I1 output by the third low-pass filter. Therefore, in the first stage, only the first and third low-pass filters can be triggered, without triggering the second and fourth low-pass filters, to reduce system power consumption. Furthermore, in some possible implementations, when the system powers on, the first and third low-pass filters can be pre-programmed to directly enter the working state, thus eliminating the need for the envelope control module to trigger them.

[0091] Similarly, the third envelope generation strategy involves a weighted combination of the first envelope curve E1 and the second envelope curve E2 to generate the final envelope curve E. The first envelope curve E1 is generated based on the first filtered signal Q1 output by the first low-pass filter and the third filtered signal I1 output by the third low-pass filter; the second envelope curve E2 is generated based on the second filtered signal Q2 output by the second low-pass filter and the fourth filtered signal I2 output by the fourth low-pass filter. Therefore, in the second stage, it is necessary to trigger the second low-pass filter and the fourth low-pass filter to operate. During this process, the first low-pass filter and the third low-pass filter remain operational.

[0092] Similarly, the second envelope generation strategy uses the second envelope curve E2 as the final envelope curve E, and the second envelope curve E2 is generated based on the second filtered signal Q2 output by the second low-pass filter and the fourth filtered signal I2 output by the fourth low-pass filter. Therefore, in the third stage, only the second and fourth low-pass filters can be kept active, triggering the first and third low-pass filters to stop working, thereby reducing system power consumption.

[0093] As mentioned above, when entering the second stage, the second and fourth low-pass filters are triggered to operate, and the final envelope curve E is generated based on the filtered signals output by the first, second, third, and fourth low-pass filters. However, there is a startup process between the triggering of the low-pass filters and their normal operation. During this startup process, the filters may become unstable, which could affect the subsequent data processing results.

[0094] Therefore, in one possible implementation, the second phase is divided into the first sub-phase (e.g., Figure 8 (t0~t1) and the second sub-stage (e.g. Figure 8(t1~t2). In the first sub-stage of the second stage, the control envelope generation module selects a first envelope generation strategy to determine the final envelope curve; in the second sub-stage of the second stage, the control envelope generation module selects a third envelope generation strategy to determine the final envelope curve. The first sub-stage is the startup stage of the second and fourth low-pass filters. That is, during the startup stage of the second and fourth low-pass filters, the first envelope generation strategy is still selected to determine the final envelope curve to avoid the second and fourth low-pass filters being unstable during startup, which could affect the subsequent data processing results. In the second sub-stage of the second stage, the second and fourth low-pass filters are already running stably, so the third envelope generation strategy can be selected to determine the final envelope curve. Specifically, the first sub-stage is 8 downsampling periods, and / or the second sub-stage is 16 downsampling periods (the details of downsampling are introduced below).

[0095] See Figure 9 This is a schematic diagram of the circuit structure of an envelope generation module provided in an embodiment of this application. Figure 9 As shown, the envelope generation module includes a first multiplier, a second multiplier, an adder, and a multiplexer. The first input of the first multiplier is electrically connected to the output of the first amplitude calculation module, and is used to receive the first envelope curve E1 output by the first amplitude calculation module, and multiply the first envelope curve E1 by a first weighting coefficient α1 to obtain the first envelope curve E1 component. The first input of the second multiplier is electrically connected to the output of the second amplitude calculation module, and is used to receive the second envelope curve E2 output by the second amplitude calculation module, and multiply the second envelope curve E2 by a second weighting coefficient α2 to obtain the second envelope curve E2 component. The first and second inputs of the adder are electrically connected to the outputs of the first and second multipliers, respectively, and are used to receive the first envelope curve E1 component and the second envelope curve E2 component output by the first multiplier, respectively, and add the first envelope curve E1 component and the second envelope curve E2 component to obtain the weighted result of the first envelope curve E1 and the second envelope curve E2. The first input terminal of the multiplexer is electrically connected to the output terminal of the first amplitude calculation module, the second input terminal is electrically connected to the output terminal of the adder, and the third input terminal is electrically connected to the output terminal of the second amplitude calculation module. The first control terminal of the envelope control module is electrically connected to the enable input terminal of the multiplexer. The multiplexer receives the enable control signal output by the envelope control module and selectively turns on the first input terminal and the output terminal according to the enable control signal, so that the output terminal outputs the first envelope curve E1; turns on the second input terminal and the output terminal, so that the output terminal outputs the weighted result of the first envelope curve E1 and the second envelope curve E2; or turns on the third input terminal and the output terminal, so that the output terminal outputs the second envelope curve E2, thus determining the final output envelope curve E.

[0096] In other words, when the first envelope generation strategy needs to be selected, the multiplexer turns on the first input and output; when the third envelope generation strategy needs to be selected, the multiplexer turns on the second input and output; and when the second envelope generation strategy needs to be selected, the multiplexer turns on the third input and output.

[0097] As described above, the envelope control module can sequentially select the first envelope generation strategy, the third envelope generation strategy, and the second envelope generation strategy according to the time sequence of the first stage, the second stage, and the third stage. In order to control the above envelope generation strategies, the first control terminal of the envelope control module can sequentially select the connection between the output terminal of the multiplexer and the first input terminal, the second input terminal, and the third input terminal of the multiplexer.

[0098] It is understandable that when the multiplexer is connected to both the second input and output, the final envelope curve is E = α1*E1 + α2*E1. Specifically, α1 + α2 = 1.

[0099] In one possible implementation, in order to make the final envelope curve E of the second stage output as smooth as possible, during the process of the multiplexer outputting the weighted result of the first envelope curve E1 and the second envelope curve E2 according to the enable control signal, the first weighting coefficient α1 gradually decreases and the second weighting coefficient α2 gradually increases.

[0100] See Figure 10 This is a schematic diagram illustrating the change of a weighting coefficient provided in an embodiment of this application. Figure 10 As shown, the first weight coefficient α1 gradually decreases according to a preset gradient, and the second weight coefficient α2 gradually increases according to a preset gradient. Of course, it is also possible not to set the gradient for the change of the first weight coefficient α1 and the second weight coefficient α2, but to make the change of the first weight coefficient α1 and the second weight coefficient α2 smooth.

[0101] In a specific implementation, the first weighting coefficient α1 and the second weighting coefficient α2 can preferably be stored in a memory unit and continuously read and input into the multiplier during use. Alternatively, the first weighting coefficient α1 and the second weighting coefficient α2 can also be generated in real time by a weighting coefficient generation module. Specifically, the first output of the weighting coefficient generation module is used to generate the first weighting coefficient, and the second output is used to generate the second weighting coefficient. Furthermore, the weighting coefficient generation module can be electrically connected to the memory unit to read the first and second weighting coefficients in a specified order, thereby generating a gradually decreasing first weighting coefficient at the first output of the weighting coefficient generation module and a gradually increasing second weighting coefficient at the second output.

[0102] See Figure 11 This is a schematic diagram of the circuit structure of another envelope generation module provided in an embodiment of this application. Figure 11 As shown in the embodiment of this application, the second input terminal of the first multiplier is electrically connected to the first output terminal of the weight coefficient generation module to obtain the first weight coefficient α1 generated by the weight coefficient generation module; the second input terminal of the second multiplier is electrically connected to the second output terminal of the weight coefficient generation module to obtain the second weight coefficient α2 generated by the weight coefficient generation module. Other contents involved in the embodiments of this application can be referred to the description of the above embodiments, and will not be repeated here for the sake of brevity.

[0103] As mentioned above, the first sub-stage of the second stage is the startup stage of the second and fourth low-pass filters. The first envelope generation strategy is continued to determine the final envelope curve to prevent the second and fourth low-pass filters from being unstable during the startup stage, which could affect subsequent data processing. In other words, during the startup stage of the second and fourth low-pass filters, the weighted combination of the first envelope curve E1 and the second envelope curve E2 is not performed. Therefore, the first weighting coefficient α1 and the second weighting coefficient α2 do not need to be generated during this process.

[0104] In practice, the above control logic can be achieved by controlling the timing of the "second low-pass filter and fourth low-pass filter" and the "weighting coefficient generation module" through the envelope control module. Specifically, the envelope control module activates the second and fourth low-pass filters earlier than the weighting coefficient generation module outputs the first and second weighting coefficients.

[0105] In one possible implementation, after the envelope control module activates the second and fourth low-pass filters for a specified time via its third control terminal, its first control terminal selects the connection between the output of the multiplexer and its second input. It is understood that this specified time matches the duration of the first sub-stage described above.

[0106] Of course, in some possible implementations, the timing when the envelope control module activates the second and fourth low-pass filters via the third control terminal can also coincide with the timing when the weight coefficient generation module outputs the first and second weight coefficients. It is understood that when the two timings coincide, this corresponds to the technical solution described above that does not involve sub-stage division in the second stage, and will not be elaborated further here.

[0107] Furthermore, after the first control terminal of the envelope control module activates the connection between the output terminal of the multiplexer and the second input terminal of the multiplexer (specifically, after a specified time), the first control terminal of the envelope control module activates the connection between the output terminal of the multiplexer and the third input terminal of the multiplexer to select the second envelope generation strategy to determine the final envelope curve E. This corresponds to the third stage described above and will not be elaborated further. Moreover, since the first and third low-pass filters are not needed in the third stage, the envelope control module can stop the first and third low-pass filters through the second control terminal.

[0108] In one possible implementation, to reproduce the received signal to be processed as accurately as possible, the sampling frequency of the sampling circuit can be increased. Specifically, the sampling frequency of the sampling circuit is greater than the oscillation frequency of the signal to be processed itself. For example, if the driving circuit emits an ultrasonic signal at a frequency of f0, the sampling circuit samples the ultrasonic signal at a sampling frequency of n*f0, where n>1. For example, n can be 4, 8, etc.

[0109] However, oversampling results in a large amount of data. While it can better restore the signal to be processed, it will increase the amount of data processing required by subsequent circuits, which in turn will lead to a decrease in the system's response speed and an increase in system power consumption.

[0110] See Figure 12 This is a schematic diagram illustrating the ranging principle of another ultrasonic system provided in an embodiment of this application. Figure 12 As shown, the embodiments of this application are in Figure 3 Based on the ultrasonic system shown, a downsampling circuit is further provided between the low-pass filter and the amplitude calculation module. Specifically, the input terminal of the downsampling circuit is electrically connected to the output terminal of the low-pass filter, used to receive the filtered signal output by the low-pass filter and downsample the filtered signal to obtain a downsampled signal; the output terminal of the downsampling circuit is electrically connected to the input terminal of the amplitude calculation module, used to output the downsampled signal to the amplitude calculation module, so that the amplitude calculation module can perform amplitude calculation based on the downsampled signal and output the envelope curve. This embodiment of the application, while restoring the received signal to be processed as much as possible, can also reduce the amount of data processing, thus achieving the effect of improving detection accuracy and reducing data processing volume.

[0111] In one possible implementation, when the sampling frequency of the sampling circuit is n*f0, the sampling frequency of the downsampling circuit is f0, meaning that one point is sampled every n-1 points as the downsampled signal (note that downsampling can be regular, follow a specified pattern, or be irregular; for example, it can be sampling one point every n-1 points, or any point that can be sampled in a cycle, etc., i.e., n points in a cycle, but only one point is output in the end; this application does not limit how the points are sampled). In general, the ultrasonic transducer emits an ultrasonic signal at a frequency of f0, the sampling circuit samples at a sampling frequency of n*f0, and the downsampling circuit downsamples at a sampling frequency of f0. It can be understood that the downsampling circuit and the ultrasonic transducer have the same frequency. This configuration can reduce the complexity of the circuit.

[0112] Understandably, the number of low-pass filters should be equal to the number of downsampling circuits.

[0113] Please continue reading. Figure 4 In this embodiment, the downsampling circuit includes a first downsampling circuit, a second downsampling circuit, a third downsampling circuit, and a fourth downsampling circuit. The first to fourth downsampling circuits are electrically connected to a first to a fourth low-pass filter, respectively, to output a first downsampling signal, a second downsampling signal, a third downsampling signal, and a fourth downsampling signal. A first amplitude calculation module is electrically connected to the first and third downsampling circuits to receive the first and third downsampling signals, and performs amplitude calculation based on the first and third downsampling signals to output a first envelope curve E1. A second amplitude calculation module is electrically connected to the second and fourth downsampling circuits to receive the second and fourth downsampling signals, and performs amplitude calculation based on the second and fourth downsampling signals to output a second envelope curve E2.

[0114] See Figure 13 This is a schematic diagram illustrating the ranging principle of another ultrasonic system provided in an embodiment of this application. Figure 13 As shown, the embodiments of this application are in Figure 3Based on the ultrasonic system shown, a preamplifier circuit is also provided between the sampling circuit and the ultrasonic transducer. The input terminal of the preamplifier circuit is electrically connected to the output terminal of the ultrasonic transducer, and the output terminal of the preamplifier circuit is electrically connected to the input terminal of the sampling circuit. Specifically, the preamplifier circuit may include an amplifier and a filter. The amplifier amplifies the received ultrasonic signal, and the filter filters the received ultrasonic signal to obtain an ultrasonic signal of a specified frequency. This filtering can be high-pass, low-pass, or band-pass filtering. It should be noted that those skilled in the art can add or remove functions from the preamplifier circuit according to actual needs; or the preamplifier circuit can be deleted. This application embodiment does not impose specific limitations in this regard.

[0115] Furthermore, in some applications, the voltage of the drive signal output by the drive circuit is too low, which may prevent the ultrasonic transducer from emitting ultrasonic waves, or the low drive voltage or current may result in a short obstacle detection distance. Therefore, a transformer is installed between the output of the drive circuit and the input of the ultrasonic transducer. The transformer increases the voltage / current of the drive signal, thereby driving the ultrasonic transducer to emit ultrasonic waves. It should be noted that the echo signal received by the ultrasonic transducer can be directly transmitted to the signal processing circuit through the output without being processed by the transformer.

[0116] See Figure 14 This is a schematic diagram illustrating the ranging principle of another ultrasonic system provided in an embodiment of this application. Figure 14 As shown, the embodiments of this application are in Figure 3 Based on the ultrasonic system shown, the main control circuit also includes a threshold comparison circuit and a judgment circuit. The input of the threshold comparison circuit is electrically connected to the output of the envelope generation module. The threshold comparison circuit receives the final envelope curve E output by the envelope generation module and compares the final envelope curve E with the envelope curve threshold, outputting the threshold comparison result. The input of the judgment circuit is electrically connected to the output of the threshold comparison circuit. It receives the threshold comparison result output by the threshold comparison circuit and judges the distance to the obstacle based on the threshold comparison result, thereby directly triggering the alarm system (such as a display screen, alarm light, buzzer, etc.).

[0117] In another possible implementation, the judgment circuit function can also be implemented through the ECU. Specifically, the output of the threshold comparison circuit is electrically connected to the input of the ECU. The threshold comparison circuit can transmit the threshold comparison result to the ECU, and the ECU can judge the distance to the obstacle based on the threshold comparison result, thereby directly triggering the alarm system (such as display screen, warning light, buzzer, etc.).

[0118] It should be noted that the ultrasonic transducer shown in the above embodiments can be two independent devices including an ultrasonic transmitting transducer and an ultrasonic receiving transducer, or it can be a device that simultaneously transmits and receives ultrasonic waves; in addition, the ECU can also be other microprocessor units with data processing capabilities, and this application embodiment does not impose specific limitations on this.

[0119] Corresponding to the above embodiments, this application also provides a signal processing method, which can be applied to the signal processing circuit described in the above embodiments.

[0120] See Figure 15 This is a schematic flowchart of a signal processing method provided in an embodiment of this application. Figure 15 As shown, it mainly includes the following steps.

[0121] Step S1501: Sample the signal to be processed to obtain a sampled signal;

[0122] Step S1502: Convert the sampled signal into a mixed signal;

[0123] Step S1503: Perform low-pass filtering on the mixing signal based on different cutoff frequencies to obtain a first signal and a second signal;

[0124] Step S1504: Calculate the amplitude based on the first signal and the second signal respectively, and output the first envelope curve and the second envelope curve;

[0125] Step S1505: Determine the final envelope curve based on the first envelope curve and the second envelope curve.

[0126] In one possible implementation, converting the sampled signal into a mixed signal includes: converting the sampled signal into a first mixed signal and a second mixed signal, respectively; wherein the local signals used to generate the first mixed signal and the second mixed signal are orthogonal to each other.

[0127] In one possible implementation, the step of low-pass filtering the mixed signal based on different cutoff frequencies to obtain a first signal and a second signal includes: low-pass filtering the first mixed signal to obtain a first filtered signal; low-pass filtering the first mixed signal to obtain a second filtered signal; low-pass filtering the second mixed signal to obtain a third filtered signal; and low-pass filtering the second mixed signal to obtain a fourth filtered signal; wherein the highest frequency of the first filtered signal is greater than that of the second filtered signal, and the highest frequency of the third filtered signal is greater than that of the fourth filtered signal.

[0128] In one possible implementation, the step of calculating the amplitude based on the first signal and the second signal respectively, and outputting the first envelope curve and the second envelope curve, includes: calculating the amplitude based on the first filtered signal and the third filtered signal to obtain the first envelope curve; and calculating the amplitude based on the second filtered signal and the fourth filtered signal to obtain the second envelope curve.

[0129] In one possible implementation, the method further includes: downsampling the first filtered signal, the second filtered signal, the third filtered signal, and the fourth filtered signal to obtain a first downsampled signal, a second downsampled signal, a third downsampled signal, and a fourth downsampled signal, respectively; calculating the amplitude of the first downsampled signal and the third downsampled signal to obtain a first envelope curve; and calculating the amplitude of the second downsampled signal and the fourth downsampled signal to obtain a second envelope curve.

[0130] In one possible implementation, determining the final envelope curve based on the first envelope curve and the second envelope curve specifically includes: determining the final envelope curve based on a first envelope generation strategy, a second envelope generation strategy, and / or a third envelope generation strategy; wherein the first envelope generation strategy includes using the first envelope curve as the final envelope curve; the second envelope generation strategy includes using the second envelope curve as the final envelope curve; and the third envelope generation strategy includes weighted combination of the first envelope curve and the second envelope curve to generate the final envelope curve.

[0131] In one possible implementation, the method further includes: selecting the first envelope generation strategy, the second envelope generation strategy, or the third envelope generation strategy to determine the final envelope curve.

[0132] In one possible implementation, the step of selecting the first envelope generation strategy, the second envelope generation strategy, or the third envelope generation strategy to determine the final envelope curve specifically includes: in a first stage, selecting the first envelope generation strategy to determine the final envelope curve; in a second stage, selecting the third envelope generation strategy to determine the final envelope curve; and in a third stage, selecting the second envelope generation strategy to determine the final envelope curve.

[0133] In one possible implementation, the first envelope curve is generated in the first stage; the first envelope curve and the second envelope curve are generated in the second stage; and the second envelope curve is generated in the third stage.

[0134] In one possible implementation, the second stage includes a first sub-stage and a second sub-stage, wherein selecting the third envelope generation strategy to determine the final envelope curve in the second stage includes: in the first sub-stage, selecting the first envelope generation strategy to determine the final envelope curve; and in the second sub-stage, selecting the third envelope generation strategy to determine the final envelope curve.

[0135] In one possible implementation, the method further includes: determining that the first stage is in progress when the amplitude of the envelope curve is greater than or equal to a preset amplitude threshold; determining that the second stage is in progress when the amplitude of the envelope curve is less than the amplitude threshold and the amplitude of the envelope curve gradually decreases; and determining that the third stage is in progress when the duration of the second stage reaches a specified duration. The envelope curve is the first envelope curve, the second envelope curve, and / or the final envelope curve.

[0136] In one possible implementation, the first stage corresponds to the driving stage and the aftershock stage; at least a portion of the second stage corresponds to the aftershock stage, and at least a portion of the second stage corresponds to the receiving stage; the third stage corresponds to the receiving stage.

[0137] In one possible implementation, determining the final envelope curve according to the first envelope generation strategy, the second envelope generation strategy, and / or the third envelope generation strategy specifically includes: multiplying the first envelope curve by a first weighting coefficient to obtain a first envelope curve component; multiplying the second envelope curve by a second weighting coefficient to obtain a second envelope curve component; adding the first envelope curve component and the second envelope curve component to obtain a weighted result of the first envelope curve and the second envelope curve; and selectively outputting the first envelope curve, the weighted result of the first envelope curve and the second envelope curve, or the second envelope curve according to an enable control signal.

[0138] In one possible implementation, during the selective output of the weighted result of the first envelope curve and the second envelope curve according to the enable control signal, the first weight coefficient gradually decreases and the second weight coefficient gradually increases.

[0139] In one possible implementation, the first sub-stage is 8 downsampling periods, and / or the second sub-stage is 16 downsampling periods.

[0140] In one possible implementation, the highest frequency of the first filtered signal is the same as the highest frequency of the third filtered signal, and / or the highest frequency of the second filtered signal is the same as the highest frequency of the fourth filtered signal.

[0141] It should be noted that the specific content involved in the embodiments of this application can be found in the description of the above embodiments, and will not be repeated here for the sake of brevity.

[0142] Corresponding to the above embodiments, this application also provides an ultrasonic signal processing chip.

[0143] See Figure 16 This is a schematic diagram of the structure of an ultrasonic signal processing chip provided in an embodiment of this application. Figure 16 As shown, the ultrasonic signal processing chip includes a signal processing circuit, wherein the sampling circuit is used to electrically connect to the ultrasonic transducer, and the signal to be processed includes a driving stage, an aftershock stage, and a receiving stage.

[0144] In one possible implementation, the ultrasonic signal processing chip further includes a driving circuit electrically connected to the ultrasonic transducer to drive the ultrasonic transducer to generate ultrasonic waves, and an input terminal of the sampling circuit electrically connected to the ultrasonic transducer to receive the signal to be processed input from the ultrasonic transducer.

[0145] In one possible implementation, the frequency of the ultrasonic wave is f0, the sampling frequency of the sampling circuit is n*f0, and when the signal processing circuit includes a downsampling circuit, the sampling frequency of the downsampling circuit is f0.

[0146] In one possible implementation, the ultrasonic signal processing chip further includes a threshold comparison circuit, the input of which is electrically connected to the output of the envelope generation module, and the output of which outputs the comparison result.

[0147] It should be noted that the specific content involved in the embodiments of this application can be found in the description of the above embodiments, and will not be repeated here for the sake of brevity.

[0148] Corresponding to the above embodiments, this application also provides an automotive ultrasonic radar device.

[0149] See Figure 17 This is a schematic diagram of the structure of an automotive ultrasonic radar device provided in an embodiment of this application. Figure 17 As shown, the automotive ultrasonic radar device includes an ultrasonic signal processing chip and an ultrasonic transducer; wherein the ultrasonic transducer is electrically connected to the ultrasonic signal processing chip.

[0150] It should be noted that the specific content involved in the embodiments of this application can be found in the description of the above embodiments, and will not be repeated here for the sake of brevity.

[0151] Corresponding to the above embodiments, this application also provides a computer-readable storage medium, wherein the computer-readable storage medium may store a program, wherein when the program runs, it can control the device where the computer-readable storage medium is located to execute some or all of the steps in the above method embodiments. Specifically, the computer-readable storage medium may be a magnetic disk, an optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0152] Corresponding to the above embodiments, this application also provides a computer program product containing executable instructions that, when executed on a computer, cause the computer to perform some or all of the steps in the above method embodiments.

[0153] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, the simultaneous existence of A and B, or the existence of B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, and c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0154] Those skilled in the art will recognize that the units and algorithm steps described in the embodiments disclosed herein can be implemented using electronic hardware, computer software, or a combination of electronic hardware and software. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0155] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0156] In the several embodiments provided in this application, any function, if implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0157] The above description is merely a specific embodiment of this application. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of this application. The protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A signal processing circuit, characterized in that, include: The sampling circuit is used to sample the signal to be processed and obtain the sampled signal; A frequency conversion module, electrically connected to the sampling circuit, is used to receive the sampling signal output by the sampling circuit and convert the sampling signal into a mixed frequency signal; A low-pass filter, electrically connected to the frequency converter module, is used to receive the mixing signal output by the frequency converter module and perform low-pass filtering on the mixing signal based on different cutoff frequencies to obtain a first signal and a second signal. An amplitude calculation module is electrically connected to the low-pass filter and is used to receive a first signal and a second signal output by the low-pass filter, and to calculate the amplitude based on the first signal and the second signal respectively, and output a first envelope curve and a second envelope curve. An envelope generation module, electrically connected to the amplitude calculation module, is used to receive the first envelope curve and the second envelope curve output by the amplitude calculation module, and to determine the final envelope curve based on the first envelope curve and the second envelope curve. Specifically, the first envelope curve and the second envelope curve are weighted and combined to generate the final envelope curve, and the weighting combination method of the first envelope curve and the second envelope curve is adjusted according to the signal characteristics of different stages.

2. The signal processing circuit according to claim 1, characterized in that, The frequency converter module includes: The first frequency conversion module is electrically connected to the sampling circuit and is used to receive the sampling signal output by the sampling circuit and convert the sampling signal into a first frequency mixing signal. The second frequency conversion module is electrically connected to the sampling circuit and is used to receive the sampling signal output by the sampling circuit and convert the sampling signal into a second mixing signal. The local signals from which the first frequency conversion module and the second frequency conversion module convert the sampled signal are orthogonal to each other.

3. The signal processing circuit according to claim 2, characterized in that, The low-pass filter includes: A first low-pass filter is electrically connected to the first frequency converter module and is used to receive the first mixing signal output by the first frequency converter module and perform low-pass filtering on the first mixing signal to obtain a first filtered signal. The second low-pass filter is electrically connected to the first frequency converter module and is used to receive the first mixing signal output by the first frequency converter module and perform low-pass filtering on the first mixing signal to obtain the second filtered signal. The third low-pass filter is electrically connected to the second frequency converter module and is used to receive the second mixing signal output by the second frequency converter module and perform low-pass filtering on the second mixing signal to obtain the third filtered signal. The fourth low-pass filter is electrically connected to the second frequency converter module and is used to receive the second mixing signal output by the second frequency converter module and perform low-pass filtering on the second mixing signal to obtain the fourth filtered signal. The cutoff frequency of the first low-pass filter is higher than that of the second low-pass filter, and the cutoff frequency of the third low-pass filter is higher than that of the fourth low-pass filter.

4. The signal processing circuit according to claim 3, characterized in that, The amplitude calculation module includes: The first amplitude calculation module is electrically connected to the first low-pass filter and the third low-pass filter respectively, and is used to receive the first filtered signal output by the first low-pass filter and the third filtered signal output by the third low-pass filter, and to perform amplitude calculation based on the first filtered signal and the third filtered signal to obtain the first envelope curve. The second amplitude calculation module is electrically connected to the second low-pass filter and the fourth low-pass filter, respectively, and is used to receive the second filtered signal output by the second low-pass filter and the fourth filtered signal output by the fourth low-pass filter, and to perform amplitude calculation based on the second filtered signal and the fourth filtered signal to obtain the second envelope curve.

5. The signal processing circuit according to claim 4, characterized in that, Also includes: The downsampling circuit includes a first downsampling circuit, a second downsampling circuit, a third downsampling circuit, and a fourth downsampling circuit. The first downsampling circuit to the fourth downsampling circuit are electrically connected to the first low-pass filter to the fourth low-pass filter respectively to output a first downsampling signal, a second downsampling signal, a third downsampling signal, and a fourth downsampling signal. The first amplitude calculation module is electrically connected to the first downsampling circuit and the third downsampling signal respectively to receive the first downsampling signal and the third downsampling signal, and performs amplitude calculation based on the first downsampling signal and the third downsampling signal to output the first envelope curve; the second amplitude calculation module is electrically connected to the second downsampling circuit and the fourth downsampling circuit to receive the second downsampling signal and the fourth downsampling signal, and performs amplitude calculation based on the second downsampling signal and the fourth downsampling signal to output the second envelope curve.

6. The signal processing circuit according to claim 5, characterized in that, The envelope generation module is specifically used for: The final envelope curve is determined based on the first envelope generation strategy, the second envelope generation strategy, and / or the third envelope generation strategy. The first envelope generation strategy includes using the first envelope curve as the final envelope curve; the second envelope generation strategy includes using the second envelope curve as the final envelope curve; and the third envelope generation strategy includes weighted combination of the first envelope curve and the second envelope curve to generate the final envelope curve.

7. The signal processing circuit according to claim 6, characterized in that, Also includes: An envelope control module is electrically connected to the envelope generation module. The envelope generation module is used to receive an enable control signal generated by the envelope control module. The enable control signal is used to control the envelope generation module to select the first envelope generation strategy, the second envelope generation strategy, or the third envelope generation strategy to determine the final envelope curve.

8. The signal processing circuit according to claim 7, characterized in that, The envelope control module is specifically used for: In the first stage, the envelope generation module is controlled to select the first envelope generation strategy to determine the final envelope curve; In the second stage, the envelope generation module is controlled to select the third envelope generation strategy to determine the final envelope curve; In the third stage, the envelope generation module is controlled to select the second envelope generation strategy to determine the final envelope curve.

9. The signal processing circuit according to claim 8, characterized in that, In the first stage, the first low-pass filter and the third low-pass filter are working, and the envelope control module does not trigger the second low-pass filter and the fourth low-pass filter to work. In the second stage, the first low-pass filter and the third low-pass filter are activated, and the envelope control module triggers the second low-pass filter and the fourth low-pass filter to activate. In the third stage, the envelope control module triggers the first low-pass filter and the third low-pass filter to stop working, while the second low-pass filter and the fourth low-pass filter start working.

10. The signal processing circuit according to claim 9, characterized in that, In the second stage, controlling the envelope generation module to select the third envelope generation strategy to determine the final envelope curve specifically includes: In the first sub-stage of the second stage, the envelope generation module is controlled to select the first envelope generation strategy to determine the final envelope curve. In the second sub-stage of the second stage, the envelope generation module is controlled to select the third envelope generation strategy to determine the final envelope curve. The first sub-stage is the startup stage of the second low-pass filter and the fourth low-pass filter.

11. The signal processing circuit according to claim 8, characterized in that, The envelope control module is also used for: When the amplitude of the envelope curve is greater than or equal to a preset amplitude threshold, it is determined that the first stage is being performed. When the amplitude of the envelope curve is less than the amplitude threshold and the amplitude of the envelope curve gradually decreases, it is determined that the second stage is entered. When the duration of the second stage reaches the specified duration, it is determined that the third stage will begin; Wherein, the envelope curve is the first envelope curve, the second envelope curve, and / or the final envelope curve.

12. The signal processing circuit according to any one of claims 7-11, characterized in that, The envelope generation module includes: The first multiplier is electrically connected to the first amplitude calculation module and is used to receive the first envelope curve output by the first amplitude calculation module and multiply the first envelope curve by the first weighting coefficient to obtain the first envelope curve component. The second multiplier is electrically connected to the second amplitude calculation module and is used to receive the second envelope curve output by the second amplitude calculation module, and multiply the second envelope curve by the second weighting coefficient to obtain the second envelope curve component. An adder, electrically connected to the first multiplier and the second multiplier respectively, is used to receive the first envelope curve component output by the first multiplier and the second envelope curve component output by the second multiplier respectively, and add the first envelope curve component and the second envelope curve component to obtain a weighted result of the first envelope curve and the second envelope curve. A multiplexer is provided, wherein a first input terminal of the multiplexer is electrically connected to the first amplitude calculation module, a second input terminal is electrically connected to the adder, a third input terminal is electrically connected to the second amplitude calculation module, and an enable input terminal is electrically connected to the envelope control module. The multiplexer is used to receive the enable control signal output by the envelope control module and selectively output the first envelope curve, the weighted result of the first envelope curve and the second envelope curve, or the second envelope curve according to the enable control signal.

13. The signal processing circuit according to claim 12, characterized in that, During the process of the multiplexer outputting the weighted result of the first envelope curve and the second envelope curve according to the enable control signal, the first weighting coefficient gradually decreases and the second weighting coefficient gradually increases.

14. The signal processing circuit according to claim 10, characterized in that, The first sub-stage consists of 8 downsampling cycles, and / or the second sub-stage consists of 16 downsampling cycles.

15. The signal processing circuit according to any one of claims 3-5, characterized in that, The first low-pass filter and the third low-pass filter are the same, or the first low-pass filter and the third low-pass filter have the same cutoff frequency; the second low-pass filter and the fourth low-pass filter are the same, or the second low-pass filter and the fourth low-pass filter have the same cutoff frequency.

16. A signal processing method, characterized in that, include: The signal to be processed is sampled to obtain the sampled signal; The sampled signal is converted into a mixed signal; The mixing signal is low-pass filtered based on different cutoff frequencies to obtain a first signal and a second signal. The amplitudes are calculated based on the first signal and the second signal respectively, and the first envelope curve and the second envelope curve are output. The final envelope curve is determined based on the first envelope curve and the second envelope curve; Specifically, the first envelope curve and the second envelope curve are weighted and combined to generate the final envelope curve, and the weighting combination method of the first envelope curve and the second envelope curve is adjusted according to the signal characteristics of different stages.

17. The method according to claim 16, characterized in that, The step of converting the sampled signal into a mixed signal includes: The sampled signals are converted into a first mixed signal and a second mixed signal, respectively. The local signals used to generate the first mixing signal and the second mixing signal are orthogonal to each other.

18. The method according to claim 17, characterized in that, The step of low-pass filtering the mixing signal based on different cutoff frequencies to obtain a first signal and a second signal includes: The first mixing signal is low-pass filtered to obtain the first filtered signal; The first mixing signal is low-pass filtered to obtain the second filtered signal; The second mixing signal is low-pass filtered to obtain the third filtered signal; The second mixing signal is low-pass filtered to obtain the fourth filtered signal; Wherein, the highest frequency of the first filtered signal is greater than that of the second filtered signal, and the highest frequency of the third filtered signal is greater than that of the fourth filtered signal.

19. The method according to claim 18, characterized in that, The step of calculating the amplitude based on the first signal and the second signal respectively, and outputting the first envelope curve and the second envelope curve, includes: The amplitude is calculated based on the first filtered signal and the third filtered signal to obtain the first envelope curve; The amplitude is calculated based on the second filtered signal and the fourth filtered signal to obtain the second envelope curve.

20. The method according to claim 19, characterized in that, Also includes: The first filtered signal, the second filtered signal, the third filtered signal, and the fourth filtered signal are downsampled respectively to obtain a first downsampled signal, a second downsampled signal, a third downsampled signal, and a fourth downsampled signal; The first envelope curve is obtained by calculating the amplitude based on the first downsampled signal and the third downsampled signal, and the second envelope curve is obtained by calculating the amplitude based on the second downsampled signal and the fourth downsampled signal.

21. The method according to claim 16, characterized in that, The step of determining the final envelope curve based on the first envelope curve and the second envelope curve specifically includes: The final envelope curve is determined based on the first envelope generation strategy, the second envelope generation strategy, and / or the third envelope generation strategy. The first envelope generation strategy includes using the first envelope curve as the final envelope curve; the second envelope generation strategy includes using the second envelope curve as the final envelope curve; and the third envelope generation strategy includes weighted combination of the first envelope curve and the second envelope curve to generate the final envelope curve.

22. The method according to claim 21, characterized in that, Also includes: The final envelope curve is determined by selecting the first envelope generation strategy, the second envelope generation strategy, or the third envelope generation strategy.

23. The method according to claim 22, characterized in that, The step of selecting the first envelope generation strategy, the second envelope generation strategy, or the third envelope generation strategy to determine the final envelope curve specifically includes: In the first stage, the first envelope generation strategy is selected to determine the final envelope curve; In the second stage, the third envelope generation strategy is selected to determine the final envelope curve; In the third stage, the second envelope generation strategy is selected to determine the final envelope curve.

24. The method according to claim 23, characterized in that, In the first stage, the first envelope curve is generated; In the second stage, the first envelope curve and the second envelope curve are generated; In the third stage, the second envelope curve is generated.

25. The method according to claim 24, characterized in that, The second stage includes a first sub-stage and a second sub-stage. In the second stage, selecting the third envelope generation strategy to determine the final envelope curve includes: In the first sub-stage, the first envelope generation strategy is selected to determine the final envelope curve; In the second sub-stage, the third envelope generation strategy is selected to determine the final envelope curve.

26. The method according to claim 23, characterized in that, Also includes: When the amplitude of the envelope curve is greater than or equal to a preset amplitude threshold, it is determined that the first stage is being performed. When the amplitude of the envelope curve is less than the amplitude threshold and the amplitude of the envelope curve gradually decreases, it is determined that the system is in the second stage. When the duration of the second stage reaches the specified duration, it is determined that the third stage will begin; Wherein, the envelope curve is the first envelope curve, the second envelope curve, and / or the final envelope curve.

27. The method according to claim 23, characterized in that, The first stage corresponds to the driving stage and the aftershock stage; At least a portion of the second phase corresponds to the aftershock phase, and at least a portion of the second phase corresponds to the receiving phase; The third stage corresponds to the receiving stage.

28. The method according to claim 22, characterized in that, The step of determining the final envelope curve according to the first envelope generation strategy, the second envelope generation strategy, and / or the third envelope generation strategy specifically includes: Multiply the first envelope curve by the first weighting coefficient to obtain the first envelope curve component; Multiply the second envelope curve by the second weighting coefficient to obtain the components of the second envelope curve; The first envelope curve component and the second envelope curve component are added together to obtain a weighted result of the first envelope curve and the second envelope curve; The first envelope curve, the weighted result of the first envelope curve and the second envelope curve, or the second envelope curve are selectively output based on the enable control signal.

29. The method according to claim 28, characterized in that, During the process of selectively outputting the weighted result of the first envelope curve and the second envelope curve according to the enable control signal, the first weight coefficient gradually decreases and the second weight coefficient gradually increases.

30. The method according to claim 25, characterized in that, Also includes: The first sub-stage consists of 8 downsampling cycles, and / or the second sub-stage consists of 16 downsampling cycles.

31. The method according to claim 18, characterized in that, The highest frequency of the first filtered signal is the same as the highest frequency of the third filtered signal, and / or the highest frequency of the second filtered signal is the same as the highest frequency of the fourth filtered signal.

32. An ultrasonic signal processing chip, characterized in that, include: The signal processing circuit according to any one of claims 1-15, wherein the sampling circuit is used to be electrically connected to the ultrasonic transducer, and the signal to be processed includes a driving stage, an aftershock stage, and a receiving stage.

33. An automotive ultrasonic radar device, characterized in that, include: The chip according to claim 32; Ultrasonic transducer; The ultrasonic transducer is electrically connected to the chip.

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