Floating-point number processing method and device, computer device and storage medium

Abstract

The application relates to the field of artificial intelligence, in particular to a floating point number processing method and device, computer equipment, a storage medium and a computer program product. The method comprises the following steps: obtaining a first exponent, a first mantissa and a first leading zero number of a first floating point number, obtaining a second exponent and a second mantissa of a second floating point number superimposed with the first floating point number; in parallel, performing a step processing on the first floating point number and the second floating point number to obtain a first shifted mantissa and a second shifted mantissa, and determining a superimposed exponent according to the first exponent, the first leading zero number and the second exponent; in parallel, superimposing the first shifted mantissa and the second shifted mantissa to obtain a superimposed mantissa, and predicting a second leading zero number of the superimposed mantissa; and determining a floating point number superimposition result of the first floating point number and the second floating point number after superimposition according to the superimposed mantissa, the superimposed exponent and the second leading zero number. The method can improve the superimposition efficiency of the floating point number.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a floating-point number processing method, apparatus, computer device, and storage medium. Background Technology

[0002] In the field of artificial intelligence, there are numerous scenarios involving data overlay, such as overlaying matrices along a single dimension. Overlay operations are divided into fixed-point overlay and floating-point overlay. Fixed-point overlay is relatively simple, and a processor can typically complete the overlay operation within one clock cycle. However, floating-point overlay is more complex. Floating-point addition involves operations such as alignment, shifting, addition, normalization, and rounding, all of which consume significant time paths. This results in the processor completing the overlay operation within one clock cycle, greatly impacting its overlay performance. Summary of the Invention

[0003] Therefore, it is necessary to provide a floating-point number processing method, apparatus, computer equipment, computer-readable storage medium, and computer program product that can improve the superposition efficiency in response to the above-mentioned technical problems.

[0004] Firstly, this application provides a floating-point number processing method, the method comprising:

[0005] Get the first exponent, the first mantissa, and the first number of leading zeros of the first mantissa of the first floating-point number; get the second exponent and the second mantissa of the second floating-point number superimposed on the first floating-point number.

[0006] In parallel, the first floating-point number and the second floating-point number are subjected to alignment processing to obtain the first shifted mantissa of the first mantissa and the second shifted mantissa of the second mantissa, and the superimposed exponent is determined according to the first exponent, the number of the first leading zeros and the second exponent.

[0007] In parallel, the first displacement tail number and the second displacement tail number are superimposed to obtain the superimposed tail number, and the number of second leading zeros of the superimposed tail number is predicted based on the first displacement tail number and the second displacement tail number;

[0008] The result of superimposing the first floating-point number and the second floating-point number is determined based on the superimposed mantissa, the superimposed exponent, and the number of the second leading zeros.

[0009] Secondly, this application also provides a floating-point processing apparatus, the apparatus comprising:

[0010] The data acquisition module is used to acquire the first exponent, the first mantissa, and the first number of leading zeros of the first mantissa of the first floating-point number, and to acquire the second exponent and the second mantissa of the second floating-point number superimposed on the first floating-point number; for the remaining floating-point number processing rounds other than the first floating-point number processing round, the second floating-point number is the floating-point number currently traversed in the floating-point number sequence, and the first floating-point number is the floating-point superposition number obtained by superimposing the floating-point numbers located before the second floating-point number in the floating-point number sequence;

[0011] The parallel processing module is configured to, in parallel, perform order-alignment processing on the first floating-point number and the second floating-point number to obtain a first shifted mantissa of the first mantissa and a second shifted mantissa of the second mantissa, and determine the superimposed exponent based on the first exponent, the first number of leading zeros, and the second exponent; in parallel, superimpose the first shifted mantissa and the second shifted mantissa to obtain the superimposed mantissa, and predict the second number of leading zeros of the superimposed mantissa based on the first shifted mantissa and the second shifted mantissa;

[0012] The data generation module is used to determine the floating-point number superposition result of the first floating-point number and the second floating-point number based on the superposition mantissa, the superposition exponent and the number of the second leading zeros;

[0013] The return module is used to take the superimposed floating-point number in the superimposed floating-point number result as the new first floating-point number, determine the next floating-point number to be traversed in the floating-point number sequence, take the next floating-point number to be traversed as the new second floating-point number, enter the next floating-point number processing round, return to the step of obtaining the first exponent, the first mantissa, and the first number of leading zeros of the first floating-point number and continue to execute until the last floating-point number in the floating-point number sequence is traversed, and obtain the target floating-point number superimposed result after superimposing each floating-point number in the floating-point number sequence.

[0014] In one embodiment, for the first floating-point number processing round, the first floating-point number is the first floating-point number in the floating-point number sequence, and the second floating-point number is the next floating-point number in the floating-point number sequence that is immediately adjacent to the first floating-point number.

[0015] In one embodiment, the parallel processing module is further configured to determine a first difference between the first exponent and the first number of leading zeros, and use the first difference as the true exponent of the first floating-point number; determine a first shift information of the first mantissa and a second shift information of the second mantissa based on the true exponent and the second exponent; and perform shift processing on the first mantissa and the second mantissa in parallel based on the first shift information and the second shift information to obtain a first shifted mantissa and a second shifted mantissa.

[0016] In one embodiment, the first shift information includes a first shift direction and a first shift amount; the second shift information includes a second shift direction and a second shift amount; the parallel processing module is further configured to, when the true exponent is greater than the second exponent, use a preset first direction as the first shift direction and a preset second direction as the second shift direction, determine the first shift amount based on the first number of leading zeros, and determine the second shift amount based on the true exponent and the second exponent; when the true exponent is less than the second exponent, determine the second shift amount to be zero, and determine the first shift direction and the first shift amount based on at least one of the true exponent, the first exponent, and the second exponent.

[0017] In one embodiment, the parallel processing module is further configured to, when the true exponent is greater than the second exponent, use the first number of leading zeros as a first shift amount and the first difference between the true exponent and the second exponent as a second shift amount.

[0018] In one embodiment, the parallel processing module is further configured to: when the true exponent is less than the second exponent, subtract the true exponent from the second exponent to obtain a second difference; when the number of the first leading zeros is greater than the second difference, use a preset first direction as a first shift direction and use a third difference obtained by subtracting the second exponent from the first exponent as a first shift amount; when the number of the first leading zeros is less than the second difference, use a preset second direction as a first shift direction and use a fourth difference obtained by subtracting the first exponent from the second exponent as a first shift amount.

[0019] In one embodiment, the parallel processing module is further configured to: obtain a second shifted mantissa by shifting the second mantissa using a preset first shifter and according to the second shift information; obtain a first candidate shifted mantissa by shifting the first mantissa using a preset second shifter and according to the first shift information; obtain a second shifted mantissa by shifting the first mantissa using a preset third shifter and according to the first shift information; and select a first shifted mantissa from the first candidate shifted mantissa and the second candidate shifted mantissa using a preset selector and according to the first bit information; wherein the first shifter, the second shifter, and the third shifter perform the shifting processing on the corresponding mantissas in parallel.

[0020] In one embodiment, the second shifter is a first-direction shifter; the first-direction shifter is used to shift the mantissa in a first direction; the third shifter is a second-direction shifter; the second-direction shifter is used to shift the mantissa in a second direction; the parallel processing module is further configured to, when the selector determines that the first shift direction in the first shift information is a preset second direction, use the first candidate shift mantissa generated by the second shifter as the first shift mantissa; when the selector determines that the first shift direction in the first shift information is a preset first direction, use the second candidate shift mantissa generated by the third shifter as the first shift mantissa.

[0021] In one embodiment, the target floating-point number superposition result includes the target floating-point superposition number and the number of leading zeros of the third mantissa of the target floating-point superposition number; the floating-point number processing device further includes a format conversion module, used to normalize the target floating-point superposition number according to the number of leading zeros of the third mantissa of the target floating-point superposition number to obtain a normalized floating-point superposition number; and to round the normalized floating-point superposition number to obtain a standard floating-point superposition number.

[0022] In one embodiment, the format conversion module is further configured to add 1 to the third number of leading zeros to obtain a third shift amount; shift the third mantissa to the left by the third shift amount to obtain a fourth mantissa; and subtract the third shift amount from the third exponent to obtain a fourth exponent; and determine the normalized floating-point superposition number based on the fourth exponent and the fourth mantissa.

[0023] In one embodiment, the floating-point processing device is further configured to obtain a first floating-point number and a second floating-point number; the second floating-point number is a floating-point number derived from the field of artificial intelligence; the first floating-point number is determined based on the superposition result of multiple floating-point numbers derived from the field of artificial intelligence; the floating-point number derived from the field of artificial intelligence includes at least one of training data extracted from training samples by a machine learning model, detection data extracted from an object to be detected by a machine learning model, and constructed data constructed by a machine learning model; the floating-point processing method is executed by an artificial intelligence processor, and the superposition result of the first floating-point number and the second floating-point number is generated in a unit clock cycle of the artificial intelligence processor.

[0024] Thirdly, this application also provides a computer device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps in any of the floating-point number processing methods provided in the embodiments of this application.

[0025] Fourthly, this application also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of any of the floating-point number processing methods provided in the embodiments of this application.

[0026] Fifthly, this application also provides a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the floating-point number processing methods provided in the embodiments of this application.

[0027] The aforementioned floating-point number processing method, apparatus, computer equipment, storage medium, and computer program product, by obtaining a first exponent, a first mantissa, a first number of leading zeros, a second mantissa, and a second exponent, can perform an alignment operation using the first and second mantissas to obtain a first shifted mantissa and a second shifted mantissa, and determine the superimposed exponent based on the first exponent, the first number of leading zeros, and the second exponent. By obtaining the first and second shifted mantissas, they can be superimposed to obtain the superimposed position, and the second number of leading zeros of the superimposed mantissa can be predicted based on the first and second shifted mantissas. By obtaining the superimposed mantissa, the superimposed exponent, and the second number of leading zeros, the superimposed floating-point number result obtained by superimposing the first and second floating-point numbers can be obtained. Since the alignment operation and the determination of the superimposed exponent are executed in parallel, the superposition efficiency of floating-point number superposition can be improved; furthermore, since the mantissa superposition process and the leading zero prediction process are also executed in parallel, the superposition efficiency of floating-point number superposition can be further improved. Attached Figure Description

[0028] Figure 1 This is a diagram illustrating the application environment of a floating-point number processing method in one embodiment.

[0029] Figure 2 This is a flowchart illustrating a floating-point number processing method in one embodiment;

[0030] Figure 3 This is a schematic diagram of the storage space in one embodiment;

[0031] Figure 4 This is a schematic diagram of a shifter in one embodiment;

[0032] Figure 5 This is a schematic diagram illustrating the sequential stacking of floating-point numbers in one embodiment;

[0033] Figure 6 This is a schematic diagram of floating-point number stacking in one embodiment;

[0034] Figure 7 This is a schematic diagram of the overall framework for floating-point number stacking in one embodiment;

[0035] Figure 8 This is a schematic diagram of the storage structure of floating-point numbers in one embodiment;

[0036] Figure 9 This is a schematic diagram of the storage structure for floating-point numbers in another embodiment;

[0037] Figure 10 This is a flowchart illustrating a floating-point number processing method in a specific embodiment.

[0038] Figure 11 This is a structural block diagram of a floating-point processing device in one embodiment;

[0039] Figure 12 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0041] The floating-point number processing method provided in this application embodiment can be applied to, for example, Figure 1 In the application environment shown, terminal 102 communicates with server 104 via a network. A data storage system can store the data that server 104 needs to process. The data storage system can be integrated on server 104 or placed on the cloud or other servers. Both terminal 102 and server 104 can be used independently to execute the floating-point number processing method provided in this embodiment. Terminal 102 and server 104 can also work together to execute the floating-point number processing method provided in this embodiment. Taking the example of terminal 102 and server 104 working together to execute the floating-point number processing method provided in this embodiment, a user can initiate a data processing request through terminal 102, which can then send the data processing request to server 104. Server 104 can then obtain the corresponding first floating-point data and second floating-point data based on the received data processing request, and superimpose the first and second floating-point data to obtain superimposed floating-point data. Terminal 102 can be, but is not limited to, various desktop computers, laptops, smartphones, tablets, IoT devices, and portable wearable devices. IoT devices can include smart speakers, smart TVs, smart air conditioners, smart vehicle devices, etc. Portable wearable devices can include smartwatches, smart bracelets, and head-mounted devices. Server 104 can be implemented using a standalone server or a server cluster consisting of multiple servers.

[0042] It should be noted that the floating-point number processing method in this application embodiment can be executed by a computer device, which can be the aforementioned terminal 102 or server 104. The computer device can be deployed with machine learning models having different functions, providing different types of services. For example, the computer device can provide face detection services, face registration services, or identity recognition services through a machine learning model with face detection capabilities. The computer device can also provide image classification services, target object recognition services, or object analysis services through a machine learning model with image processing capabilities (such as a semantic segmentation model or an image classification model). When different machine learning models provide services, floating-point number superposition operations are involved. In this case, the computer device can use an AI processor (also called an artificial intelligence processor) and the floating-point number processing method in this application embodiment to superimpose floating-point numbers to obtain a superposition result. The machine learning model can then use the obtained superposition result for further processing to provide corresponding services. Of course, the floating-point numbers in this application embodiment can also be other data that needs to be superimposed, which may be related to specific application scenarios, and this application embodiment does not limit this.

[0043] It should also be noted that the floating-point number processing methods mentioned in the embodiments of this application are mainly aimed at scenarios where machine learning models implemented through artificial intelligence technology need to superimpose two or more floating-point numbers during computation. Artificial intelligence (AI) is the theory, method, technology, and application system that uses digital computers or machines controlled by digital computers to simulate, extend, and expand human intelligence, perceive the environment, acquire knowledge, and use that knowledge to obtain optimal results. In other words, artificial intelligence is a comprehensive technology in computer science that attempts to understand the essence of intelligence and produce a new kind of intelligent machine that can react in a way similar to human intelligence. Artificial intelligence studies the design principles and implementation methods of various intelligent machines, enabling them to have perception, reasoning, and decision-making functions.

[0044] Artificial intelligence (AI) is a comprehensive discipline encompassing a wide range of fields, including both hardware and software technologies. Fundamental AI technologies generally include sensors, dedicated AI chips, cloud computing, distributed storage, big data processing, operating / interactive systems, and mechatronics. AI software technologies primarily include computer vision, speech processing, natural language processing, and machine learning / deep learning.

[0045] With the research and advancement of artificial intelligence (AI) technology, AI is being studied and applied in various fields, such as smart homes, smart wearable devices, virtual assistants, smart speakers, smart marketing, autonomous driving, drones, robots, smart healthcare, and smart customer service. It is believed that with the development of technology, AI will be applied in more fields and play an increasingly important role.

[0046] It should be noted that the terms "first," "second," and similar terms used in this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Unless the context clearly indicates otherwise, the singular forms "a," "one," or "the," etc., do not indicate a quantity limitation, but rather indicate the presence of at least one. The quantities of "multiple" or "multiple copies" mentioned in the embodiments of this application all refer to a quantity of "at least two," for example, "multiple" means "at least two," and "multiple copies" means "at least two copies."

[0047] In one embodiment, such as Figure 2 As shown, a floating-point number processing method is provided. The method is illustrated using a computer device as an example. The computer device is... Figure 1 The terminal or server in the system. The floating-point number processing method includes the following steps:

[0048] Step 202: Obtain the first exponent, the first mantissa, and the first leading zero count of the first mantissa of the first floating-point number; obtain the second exponent and the second mantissa of the second floating-point number superimposed on the first floating-point number.

[0049] Floating-point numbers are numerical representations of numbers belonging to a specific subset of rational numbers, used in computers to approximate any real number. A floating-point number is obtained by multiplying an integer or fixed-point number by an integer power of a base. For example, any binary floating-point number N can be written as N = S × 2. j In this context, j is the exponent (also called the mantissa), and S is the fractional part (also called the mantissa). That is, a floating-point number includes both an exponent and a mantissa. For example, the binary number 110.11 can be written as 0.11011 × 2^2. 11 In this example, the exponent (also called the exponent code) is 11, and the mantissa is 0.11011. Leading zeros are a formatting feature where zeros are added before the numbers. For example, for the data 1, when the data bits are conventionally set to 3, zeros are added before the 1 to form 001, ensuring format alignment. The number of leading zeros in the mantissa refers to the number of zeros before the first significant digit in the fractional part after the decimal point (i.e., the numerical part of the mantissa). The significant digit position refers to the position of the first non-zero digit. For example, for the floating-point number 0.0011011 × 2... 11The mantissa is 0.0011011, and the fractional part of the mantissa (that is, the numerical part of the mantissa) is 0011011. For this binary number, the first significant digit position starting from the most significant bit refers to the first digit "1" starting from the most significant bit. Therefore, the significant digit position is the third bit. Thus, there are two zeros before the third bit, resulting in the floating-point number 0.0011011 × 2. 11 The number of leading zeros in the mantissa is 2.

[0050] Specifically, when it is necessary to superimpose floating-point numbers, the computer device can obtain the first exponent, the first mantissa, and the first number of leading zeros of the first mantissa of the first floating-point number, and obtain the second exponent and the second mantissa of the second floating-point number to be superimposed on the first floating-point number. The first floating-point number can be the result of superimposing multiple floating-point numbers, and the second floating-point number can be the data to be superimposed on the first floating-point number. For example, for a floating-point number sequence containing multiple floating-point numbers, the first floating-point number can be the result of superimposing the first N floating-point numbers in the sequence, and the second floating-point number can be the (N+1)th number in the sequence. Here, N is a positive integer, and N+1 is less than the number of floating-point numbers included in the sequence. It is easy to understand that when it is necessary to continuously superimpose floating-point numbers in the floating-point number sequence, the superimposed floating-point number obtained by superimposing the first floating-point number and the second floating-point number can be used as the new first floating-point number, and the (N+2)th floating-point number in the floating-point number sequence can be used as the new second floating-point number. Then, the floating-point number superposition can continue to be performed according to the floating-point number processing method of the present application embodiment.

[0051] In one embodiment, when a first floating-point number is obtained, the computer device can identify the components of the first floating-point number to obtain a first exponent, a first mantissa, and a first number of leading zeros in the first mantissa. Similarly, the computer device can also identify the components of a second floating-point number to obtain a second exponent and a second mantissa.

[0052] In one embodiment, a machine learning model may be deployed in the computer device. When the machine learning model provides services to users, it involves processing large amounts of data, including the superposition of floating-point numbers. Therefore, when superposition of floating-point numbers is required, the machine learning model can obtain the first exponent, the first mantissa, and the number of leading zeros of the first mantissa of the first floating-point number to be superimposed, as well as the second exponent and the second mantissa of the second floating-point number to be superimposed. Here, the machine learning model refers to a model that can learn corresponding capabilities through samples. The machine learning model may employ neural network models, dual-path network models (DPN), support vector machines, or logistic regression models, etc.

[0053] Step 204: In parallel, perform order alignment on the first floating-point number and the second floating-point number to obtain the first shifted mantissa of the first mantissa and the second shifted mantissa of the second mantissa, and determine the superimposed exponent based on the first exponent, the number of the first leading zeros, and the second exponent.

[0054] Specifically, for the superposition of floating-point numbers, since the exponent bits in the superposition operation may be different, it is first necessary to perform alignment processing on the first and second floating-point numbers to ensure that the exponents of the first and second floating-point numbers are the same, thus facilitating subsequent addition operations. To ensure that the value of the same floating-point number remains unchanged before and after alignment processing, the mantissa also needs to be shifted simultaneously when the exponent is adjusted. Shifting refers to left-shifting or right-shifting the mantissa. Thus, during the alignment process, the computer device can make the exponents of the first and second floating-point numbers the same by shifting the first and second mantissas. For example, the computer device can shift the first mantissa of the first floating-point number to obtain the first shifted mantissa. Similarly, it can shift the second mantissa to obtain the second shifted mantissa. The shifted mantissa refers to the mantissa generated after left-shifting or right-shifting the mantissa.

[0055] While performing the alignment process, the computer device can also simultaneously perform the step of determining the superimposed exponent. The step of determining the superimposed exponent includes: determining the exponent of the superimposed floating-point number obtained by superimposing the first floating-point number and the second floating-point number based on the first exponent, the second exponent, and the number of the first leading zeros, that is, determining the superimposed exponent.

[0056] In one embodiment, during the alignment process, the computer device can determine a base index based on a first index and a second index, where the base index refers to the index to which the first and second indexes are to be adjusted. For example, the base index can be the midpoint between the first and second indexes. The computer device then adjusts the first index to the base index by shifting the first mantissa; and adjusts the second index to the base index by shifting the second mantissa. For example, when the first floating-point number is 0.0011011 × 2... 3 The second floating-point number is 0.0011111 × 2 5 When the base exponent is determined to be 4, the computer device can make the first exponent of the first floating-point number 4 by shifting the decimal point of the first mantissa one position to the left, that is, by shifting the numerical part of the first mantissa one position to the right. This results in the first floating-point number after exponent adjustment: 0.00011011 × 2. 4In this case, the mantissa of the first floating-point number after the alignment is the first shifted mantissa. Similarly, the computer device can make the second exponent of the second floating-point number 4 by shifting the decimal point of the mantissa one position to the right, that is, by shifting the numerical part of the second mantissa one position to the left, thus obtaining the second floating-point number 0.011111 × 2 after the alignment. 4 In this case, the mantissa of the second floating-point number after the alignment process is the second shift mantissa. This ensures that the exponents of the first and second floating-point numbers after the alignment process are the same.

[0057] In one embodiment, the computer device may determine the superimposed index based on the first index and the second index, for example, by using the midpoint between the first index and the second index as the superimposed index.

[0058] In one embodiment, during the alignment process, the computer device can subtract the first number of leading zeros from the first exponent to obtain the true exponent. The midpoint between the true exponent and the second exponent is used as the base exponent; alternatively, the larger of the true exponent and the second exponent is used as the base exponent; or the smaller of the true exponent and the second exponent is used as the base exponent. Thus, the computer device changes the first exponent to the base exponent and the second exponent to the base exponent by shifting the first and second mantissas. Simultaneously with the alignment process, the computer device can perform a step to determine the superimposed exponent. When the midpoint between the true exponent and the second exponent is chosen as the base exponent, during the process of determining the superimposed exponent, the computer device can subtract the first number of leading zeros from the first exponent to obtain the true exponent, and then average the true exponent with the second exponent to obtain the superimposed exponent. When the larger of the true exponent and the second exponent is chosen as the base exponent, during the process of determining the superimposed exponent, the computer device can subtract the number of leading zeros from the first exponent to obtain the true exponent, and then subtract the second exponent from the true exponent. If the result of subtracting the second exponent from the true exponent is negative, the second exponent is used as the superimposed exponent; if the result of subtracting the second exponent from the true exponent is positive, the true exponent is used as the superimposed exponent. Similarly, when the smaller of the true exponent and the second exponent is chosen as the base exponent, during the process of determining the superimposed exponent, the computer device can determine the smaller of the true exponent and the second exponent and use the exponent with the smaller value as the superimposed exponent.

[0059] In one embodiment, the computer device can use an AI processor to execute the alignment process and the determination process of the superimposed exponent in parallel. For example, the AI ​​processor can open two threads to execute the alignment process and the determination process of the superimposed exponent separately.

[0060] Step 206: In parallel, the first displacement tail number and the second displacement tail number are superimposed to obtain the superimposed tail number, and the number of second leading zeros of the superimposed tail number is predicted based on the first displacement tail number and the second displacement tail number.

[0061] Specifically, after aligning the first and second floating-point numbers to make their exponents the same, the computer device can then add the mantissa of the aligned first and second floating-point numbers together. In other words, it adds the first and second shifted mantissas to obtain the combined mantissa. For example, if the aligned first floating-point number is 0.00011011 × 2... 4 And the second floating-point number after the order adjustment is 0.011111 × 2 4 When the computer device is ready, it can superimpose 0.00011011 and 0.011111 to obtain the superimposed last digit.

[0062] While superimposing the first and second shift mantissas, the computer device can also predict the number of second leading zeros in the superimposed mantissa based on the first and second shift mantissas. For example, if the computer device is equipped with a leading zero prediction model, the computer device can input the first and second shift mantissas into the leading zero prediction model to obtain the number of second leading zeros.

[0063] In one embodiment, the computer device can use an AI processor to execute the mantissa addition process and the leading zero prediction process in parallel. For example, the AI ​​processor can open two threads to execute the mantissa addition process and the leading zero prediction process respectively.

[0064] In one embodiment, the leading zero count prediction is performed only when a positive number is added to a negative number. When the first shift mantissa and the second shift mantissa are one positive and one negative, the leading zero count can be predicted by the leading zero count prediction model based on the superposition result of the first shift mantissa and the second shift mantissa. When it is necessary to predict the leading zero count, the leading zero count prediction model can subtract the second shift mantissa from the first shift mantissa to obtain the target difference portion, and determine the position of the first non-zero value in the target difference portion based on the target difference portion, thereby obtaining the second leading zero count based on the position of the first non-zero value in the target difference portion. For example, since the mantissa of a floating-point number is a pure decimal, the integer part can be ignored, and the numerical part of the first shift mantissa is A = a0a1…a n-1 The numerical part of the second shifted mantissa is B = b0b1…b n-1 When the target difference is determined, it can be defined as R = AB = r0r1…r n-1When both the first and second mantissa parts are binary, r i The value of can be 1, 0, or -1. Therefore, the target difference R can be written in sequence form, such as 0... k 11(x), or 0 k 10(x), or it could be 0. k 1(-1)0(x), etc. Where, 0 k Let K represent K zeros, and x represent any substring. Further, the computer device stores a correspondence between various sequence forms and the calculation rules for the first non-zero position. The computer device can determine the target sequence form matched by the target difference portion R, and determine the first non-zero position in the target difference portion according to the target calculation rules corresponding to the target sequence form in the correspondence. Based on the first non-zero position, the number of zeros preceding the first non-zero position is determined to obtain the second leading zero count. Here, the first non-zero position refers to the position of the first non-zero number appearing from the highest bit. For example, when the target difference portion R is 0011, and the highest bit is conventionally considered the first position, the first non-zero position (i.e., the first 1) is the third bit in 0011.

[0065] In one embodiment, the computer device may also include a leading zero prediction circuit, which can be used to obtain the second number of leading zeros.

[0066] Step 208: Determine the result of superimposing the first floating-point number and the second floating-point number based on the superimposed mantissa, the superimposed exponent, and the number of the second leading zeros.

[0067] The floating-point summation result refers to the result obtained by adding the first floating-point number and the second floating-point number. The floating-point summation result includes the summed floating-point number and the number of leading zeros. The summed floating-point number is a single floating-point number; the mantissa of the summed floating-point number is the mantissa of the summed number, and the exponent of the summed floating-point number is the exponent of the summed floating-point number. For example, if both the first and second floating-point numbers are binary numbers, and the summed mantissa is 0.0011, the summed exponent is 3, and the number of leading zeros is 2, the floating-point summation result is "0.0011 × 2". 3 "lz = 2", the superimposed floating-point number is "0.0011 × 2". 3 "In this context, the symbol lz represents the number of the second leading zeros.

[0068] Specifically, the computer device can obtain the floating-point number superposition result based on the superimposed mantissa, the superimposed exponent, and the number of leading zeros. After obtaining the superimposed floating-point number result, the computer device can continue to obtain the next floating-point number and superimpose it with the superimposed floating-point number result according to the above floating-point number processing method. This process is repeated to obtain the superimposed result of multiple floating-point numbers. When superimposing the next floating-point number with the superimposed floating-point number result, the computer device can directly read the corresponding number of leading zeros from the superimposed floating-point number result, without having to read the values ​​at each position in the mantissa to determine the number of leading zeros. This improves the superposition efficiency of floating-point numbers.

[0069] In one embodiment, when it is no longer necessary to superimpose the floating-point number result with the next floating-point number, the computer device can convert the floating-point number superposition result into a standard floating-point format and output the floating-point number superposition result with the standard floating-point format.

[0070] In the above floating-point number processing method, by obtaining the first exponent, the first mantissa, the first number of leading zeros, the second mantissa, and the second exponent, an alignment operation can be performed on the first mantissa and the second mantissa to obtain the first shifted mantissa and the second shifted mantissa. The superimposed exponent is then determined based on the first exponent, the first number of leading zeros, and the second exponent. By obtaining the first shifted mantissa and the second shifted mantissa, they can be superimposed to obtain the superimposed position. The second number of leading zeros in the superimposed mantissa is then predicted based on the first shifted mantissa and the second shifted mantissa. By obtaining the superimposed mantissa, the superimposed exponent, and the second number of leading zeros, the superposition result of the first floating-point number and the second floating-point number can be obtained. Since the alignment operation and the determination of the superimposed exponent are performed in parallel, the superposition efficiency of floating-point number superposition can be improved. Furthermore, since the mantissa superposition process and the leading zero prediction process are also performed in parallel, the superposition efficiency of floating-point number superposition can be further improved.

[0071] In one embodiment, performing alignment processing on a first floating-point number and a second floating-point number to obtain a first shifted mantissa and a second shifted mantissa of the second mantissa includes: determining a first difference between a first exponent and a first number of leading zeros, and using the first difference as the true exponent of the first floating-point number; determining first shift information of the first mantissa and second shift information of the second mantissa based on the true exponent and the second exponent; and performing shift processing on the first mantissa and the second mantissa in parallel based on the first shift information and the second shift information to obtain the first shifted mantissa and the second shifted mantissa.

[0072] Specifically, when it is necessary to align the first and second floating-point numbers, the computer device can first determine the true exponent of the first floating-point number. The true exponent refers to the exponent that the first floating-point number should correspond to after removing leading zeros from the first mantissa. For example, if the first floating-point number is 0.011111 × 2... 4 When leading zeros are removed from the first mantissa of the first floating-point number, the exponent in the first floating-point number should also change to ensure that the value of the first floating-point number remains unchanged. Thus, the first floating-point number becomes 0.11111 × 2. 3 Therefore, the true index is 3.

[0073] Since the first number of leading zeros represents the number of leading zeros in the first mantissa, when it is necessary to determine the true exponent of the first floating-point number, the computer device can subtract the first number of leading zeros from the first exponent to obtain a first difference, and use the first difference as the true exponent of the first floating-point number. For example, when the first floating-point number is 0.011111 × 2... 4 When the number of leading zeros is 1, the computer device can determine the true exponent as 4-1=3. Further, based on the true exponent and the second exponent, the computer device determines the first shift information in the first mantissa and the second shift information in the second mantissa. The shift information includes the shift direction and the shift amount. The computer device can shift the mantissa according to the shift direction and the shift amount to obtain the shifted mantissa. For example, the computer device can shift the first mantissa according to the first shift direction and the first shift amount in the first shift information to obtain the first shifted mantissa; and shift the second mantissa according to the second shift direction and the second shift amount in the second shift information to obtain the second shifted mantissa. To improve the processing efficiency of the order alignment, the computer device can perform the shifting processing of the first and second mantissas in parallel, thereby greatly shortening the critical path in the superposition process and improving the superposition efficiency.

[0074] In one embodiment, when the true index and the second index are obtained, the computer device may use the larger of the true index and the second index as the base index, or the smaller of the true index and the second index as the base index, or the median of the true index and the second index as the base index, and obtain the first shift information and the second shift information based on the determined base value, thereby performing shift processing on the first mantissa and the second mantissa based on the first shift information and the second shift information to obtain the first shifted mantissa and the second shifted mantissa.

[0075] In the above embodiments, since the true exponent reflects the true exponent size of the first floating-point number, the first shift information and the second shift information determined by the second exponent and the true exponent reflecting the true situation of the exponent can be more accurate, thereby improving the accuracy of floating-point number superposition.

[0076] In one embodiment, the first shift information includes a first shift direction and a first shift amount; the second shift information includes a second shift direction and a second shift amount; determining the first shift information of the first mantissa and the second shift information of the second mantissa based on the true exponent and the second exponent includes: when the true exponent is greater than the second exponent, using a preset first direction as the first shift direction and a preset second direction as the second shift direction, determining the first shift amount based on the true exponent and the second exponent, and determining the second shift amount based on the number of first leading zeros; when the true exponent is less than the second exponent, determining the first shift amount to be zero, and determining the second shift direction and the second shift amount based on at least one of the true exponent, the first exponent, and the second exponent.

[0077] The shift direction refers to the direction in which the mantissa is shifted, and the shift amount refers to the amount in which the mantissa is shifted. For example, for "shifting the mantissa one bit to the left", the shift direction is "left" and the shift amount is "1 bit".

[0078] Specifically, in the embodiments of this application, during the exponent alignment process, it is agreed to align the smaller exponent with the larger exponent. Therefore, the computer device can determine the size of the exponent between the real exponent and the second exponent, and determine the larger value between the real exponent and the second exponent based on the size of the exponent. The exponent with the larger value is used as the reference exponent. The first shift amount and the first shift direction are determined based on the difference between the first exponent and the reference exponent. The second shift amount and the second shift direction are determined based on the difference between the second exponent and the reference exponent.

[0079] For example, when the true exponent is greater than the second exponent, the true exponent can be used as the base exponent. Therefore, in order to ensure that the exponents of the first and second floating-point numbers after alignment are both base exponents, the computer device can use a preset first direction as the first shift direction, a preset second direction as the second shift direction, determine the first shift amount based on the number of leading zeros, and determine the second shift amount based on the true and second exponents. Specifically, the preset first direction can be a "left" direction, and the preset second direction can be a "right" direction. For example, when the first floating-point number is 0.011111 × 2... 5 Furthermore, the number of the first leading zero is 1, and the second floating-point number is 0.11111 × 2. 2When the first exponent of the first floating-point number is determined to be 4, which is greater than the second exponent of 2, the computer device can use the true exponent of 4 as the base exponent. To decrease the first exponent of the first floating-point number from 5 to 4, the computer device can shift the first mantissa of the first floating-point number one bit to the left (decreasing the exponent shifts the mantissa to the left, thus maintaining the numerical value of the floating-point number before and after the shift). Therefore, the first shift direction can be determined as the first direction representing the "left" direction, and the first shift amount can be determined as the first number of leading zeros. To increase the second exponent of the second floating-point number from 2 to 4, the computer device can shift the second mantissa of the second floating-point number to the right (increasing the exponent shifts the mantissa to the right, thus maintaining the numerical value of the floating-point number before and after the shift). Therefore, the second shift direction can be determined as the second direction representing the "right" direction, and the second shift amount can be determined based on the true exponent and the second exponent.

[0080] For example, when the true exponent is less than the second exponent, the second exponent can be used as the base exponent. Since the second exponent is larger than the true exponent, under the agreed shift from the smaller exponent to the larger exponent, the computer device can determine that the second mantissa of the second floating-point number does not need to be shifted. Therefore, the second shift direction can be determined to be none, and the second shift amount to be zero. Furthermore, in order to ensure that the exponents of the first and second floating-point numbers after exponent alignment are both base exponents, the computer device can further determine the first shift direction and the first shift amount specifically based on the first and second exponents. For example, when the first floating-point number is 0.011111 × 2 2 Furthermore, the number of the first leading zero is 1, and the second floating-point number is 0.11111 × 2. 5 When the true exponent is determined to be 1, which is less than the second exponent of 5, the computer device can use the second exponent of 5 as the base exponent. The computer device can determine that the second shift amount corresponding to the second mantissa is zero, and in order to adjust the first exponent of the first floating-point number from 2 to 5, it determines the specific first shift direction and first shift amount based on the first and second exponents. For example, the computer device can subtract the second exponent from the first exponent to obtain the exponent difference, and determine the first shift direction and first shift amount based on the sign and magnitude of the exponent difference. For instance, in the above example, 2 can be subtracted from 5 to obtain the exponent difference of -3. Since -3 is negative, it can be determined that the first exponent needs to be increased. Increasing the exponent requires shifting the mantissa to the right. Therefore, the first shift direction is the second direction representing the "right" direction, and the first shift amount is determined to be 3.

[0081] It is easy to understand that the larger exponent can be aligned with the smaller exponent. The method of aligning the larger exponent with the smaller exponent can refer to the method of aligning the smaller exponent with the larger exponent described above. The embodiments of this application will not be repeated here.

[0082] In one embodiment, when the true exponent is greater than the second exponent, determining a first shift amount based on the number of first leading zeros and determining a second shift amount based on the true exponent and the second exponent includes: when the true exponent is greater than the second exponent, using the number of first leading zeros as the first shift amount and using a first difference between the true exponent and the second exponent as the second shift amount.

[0083] Specifically, when the true exponent is greater than the second exponent, the computer device can use the number of leading zeros as the first shift amount, determine the first difference between the true exponent and the second exponent, and use the first difference as the second shift amount. This allows subsequent shifting of the first mantissa based on the first shift amount and shifting of the second mantissa based on the second shift amount. For example, when the first floating-point number is 0.011111 × 2... 5 Furthermore, the number of the first leading zero is 1, and the second floating-point number is 0.11111 × 2. 2 When the first shift amount is determined to be 1, the second shift amount is determined to be (5-1)-2=2.

[0084] In this embodiment, by using the first number of leading zeros as the first shift amount, during the subsequent shifting of the first mantissa based on the first number of leading zeros, not only can the alignment be achieved, but also the leading zeros in the first mantissa can be removed, ensuring that the first shifted mantissa does not contain leading zeros. This facilitates the subsequent superposition of the first and second shifted mantissas. Furthermore, removing leading zeros while keeping the number of bits in the mantissa unchanged can improve the precision of the mantissa, thereby improving the precision of floating-point number superposition. For example, refer to... Figure 3 For 1 byte of storage space and floating-point numbers of 0.01001 × 2, 1 Before removing leading zeros, the numerical part of the mantissa "01001" was stored as "0100", discarding the last digit of "01001"; after removing leading zeros, the floating-point number became 0.1001 × 2. 0 For the numerical part "1001" in the mantissa, the stored number is "1001", without discarding any digits, thus making the floating-point number 0.1001 × 2 0 It can be stored completely, compared to the 0.0100×2 floating-point numbers stored before the leading zeros. 1 This improved the accuracy of the data. Figure 3 A schematic diagram of the storage space in one embodiment is shown.

[0085] In one embodiment, when the true exponent is less than the second exponent, determining the second shift direction and the second shift amount based on the first exponent and the second exponent includes: subtracting the true exponent from the second exponent to obtain a second difference; when the number of first leading zeros is greater than the second difference, using a preset first direction as the first shift direction and using a third difference obtained by subtracting the second exponent from the first exponent as the first shift amount; when the number of first leading zeros is less than the second difference, using a preset second direction as the first shift direction and using a fourth difference obtained by subtracting the first exponent from the second exponent as the first shift amount.

[0086] Specifically, when the true exponent is less than the second exponent, the computer device can subtract the true exponent from the second exponent to obtain a second difference. The computer device determines whether the number of first leading zeros is greater than the second difference. If the number of first leading zeros is greater than the second difference, it indicates that the first exponent is greater than the second exponent. Since the true exponent should align with the second exponent when it is less than the second exponent, when the first exponent is greater than the second exponent, the first direction representing the "left" direction needs to be used as the first shift direction so that the first exponent can be reduced, and thus the first exponent can align with the second exponent. At this time, the first shift amount is the third difference obtained by subtracting the second exponent from the first exponent. For example, when the first floating-point number is 0.000111 × 2 6 Furthermore, the number of the first leading zero is 3, and the second floating-point number is 0.11111 × 2. 4 At this point, it can be determined that the true exponent is 3, which is less than the second exponent 4, and the second difference is 1. The number of leading zeros in the first position, 3, is greater than the second difference 1. At this time, the first exponent 6 is less than the second exponent 4. In order to align with the second exponent, the first mantissa needs to be shifted 2 positions to the left so that the first exponent decreases from 6 to 4. Thus, the computer determines that the first shift direction is the first direction representing the "left" direction, and the first shift amount is the third difference 2 obtained by subtracting the second exponent from the first exponent.

[0087] If the number of leading zeros is less than the second difference, it indicates that the first exponent is less than the second exponent. Since the true exponent should align with the second exponent when it is less than the second exponent, when the first exponent is less than the second exponent, the second direction representing the "right" direction needs to be used as the first shift direction to increase the first exponent, thus aligning it with the second exponent. In this case, the first shift amount is the fourth difference obtained by subtracting the first exponent from the second exponent. For example, when the first floating-point number is 0.011111 × 2... 2 Furthermore, the number of the first leading zero is 1, and the second floating-point number is 0.11111 × 2. 5At this point, the true exponent is determined to be 1, which is less than the second exponent of 5. The second difference is 4, and the number of leading zeros is 1, which is less than the second difference of 4. Since the first exponent of 2 is less than the second exponent of 5, to align with the second exponent, the first mantissa needs to be shifted 3 positions to the right, increasing the first exponent from 2 to 5. The computer determines that the first shift direction is the second direction representing the "right" direction, and the first shift amount is the fourth difference of 3 obtained by subtracting the first exponent from the second exponent.

[0088] In one embodiment, prior to concatenating the shifted mantissas, an alignment process must be performed. The following is an example of the complete alignment process. Assume the second exponent of the second floating-point number A is exp_a, the first exponent of the first floating-point number partial sum is exp_partial, and the number of leading zeros in the first mantissa is lz. Based on the three inputs exp_a, exp_partial, and lz, the second shift information of the second mantissa mant_a and the first shift information of the first mantissa mant_partial can be obtained.

[0089] The true exponent of the first floating-point number is exp_partial_real = exp_partial - lz. The computer compares exp_partial_real and exp_a to obtain the first and second shift information. If exp_partial_real is greater than exp_a, it needs to be aligned with exp_partial_real; if exp_partial_real is less than exp_a, it needs to be aligned with exp_a. The specific calculation process for the shift direction and shift amount is as follows:

[0090] Assume shift_amt_a is the second shift amount corresponding to the second mantissa.

[0091] (1) If exp_partial_real is greater than exp_a, then the second mant_a needs to be right-shifted, and the second shift amount shift_amt_a = exp_partial_real - exp_a;

[0092] (2) If exp_partial_real is less than exp_a, there is no need to perform a shift operation on the second mant_a, and the second shift amount shift_amt_a = 0.

[0093] Assume that shift_amt_partial is the first shift amount corresponding to the first mantissa.

[0094] (1) If exp_partial_real is greater than exp_a, then the first mant_parital needs to be left-shifted, and the first shift amount shift_amt_partial = lz;

[0095] (2) If exp_partial_real is less than exp_a and lz is greater than exp_a-exp_partial_real, then the first mant_partial needs to be left-shifted, and the first shift amount shift_amt_partial = lz-(exp_a-exp_partial_real) = lz-exp_a+exp_partial-lz = exp_partial-exp_a;

[0096] (3) If exp_partial_real is less than exp_a and lz is less than exp_a-exp_partial_real, then the first mant_partial needs to be right-shifted, and the first shift amount shift_amt_partial = (exp_a-exp_partial_real)-lz = exp_a-exp_partial + lz-lz = exp_a-exp_partial.

[0097] Once the first and second shift information are determined, the computer device can perform shift processing on the first and second mantissas based on the first and second shift information. For example, in the case where the real exponent exp_partial_real is greater than the second exponent exp_a, when the first floating-point number is 0.011111 × 2 5 The second floating-point number is 0.11111 × 2 2 When the first shift amount is determined to be 1, the second shift amount to be 2, the first shift direction to be the first direction representing the "left" direction, and the second shift direction to be the second direction representing the "right" direction, the computer device shifts the first mantissa one bit to the left to obtain the first shifted mantissa 0.11111; the computer device shifts the second mantissa two bits to the right to obtain the second shifted mantissa 0.0011111.

[0098] In the above embodiments, when aligning with the true exponent as the base exponent, the first mantissa is shifted to the left. This not only removes all or part of the leading zeros in the first mantissa but also achieves the purpose of alignment. In other words, in this embodiment, both leading zero removal and alignment can be achieved by performing a single shift on the first mantissa. Compared to the traditional method of removing leading zeros first and then aligning them in the floating-point number superposition process, this application improves the superposition efficiency of floating-point numbers because it can perform both simultaneously. Furthermore, as mentioned above, leading zero removal can also improve the precision of the floating-point numbers stored in the computer. Therefore, this embodiment can also improve the precision of the stored first floating-point number by removing leading zeros, thereby improving the precision of the superimposed floating-point number generated based on the precision-enhanced first floating-point number.

[0099] In one embodiment, during the alignment process, the computer device can also determine the superimposed exponent in parallel. The computer device can determine the superimposed exponent using the formula exp_next = MAX(exp_a, exp_partial-lz), where exp_next is the superimposed exponent, exp_a is the second exponent, and (exp_partial-lz) is the true exponent. That is, since it is agreed that the smaller exponent aligns with the larger exponent, the computer device can use the larger value between the second exponent and the true exponent as the superimposed exponent and store this superimposed exponent in a register.

[0100] In one embodiment, the first mantissa and the second mantissa are shifted in parallel according to the first shift information and the second shift information to obtain the first shifted mantissa and the second shifted mantissa, including: shifting the first mantissa according to the first shift information using a preset first shifter to obtain the first shifted mantissa; shifting the second mantissa according to the second shift information using a preset second shifter to obtain the first candidate shifted mantissa; shifting the second mantissa according to the second shift information using a preset third shifter to obtain the second candidate shifted mantissa; and selecting the second shifted mantissa from the first candidate shifted mantissa and the second candidate shifted mantissa using a preset selector according to the second shift information; wherein the first shifter, the second shifter, and the third shifter perform the shifting process on the corresponding mantissa in parallel.

[0101] Specifically, a shifter can be included in the computer device to shift the corresponding mantissa. For example, as analyzed above, since the second mantissa will only shift in the second direction representing the "right," while the first mantissa may shift in the second direction representing the "right" or in the first direction representing the "left," a reference can be included in the computer device to shift the first and second mantissas in parallel and improve the efficiency of mantissa shifting. Figure 4 The diagram shows three shifters. The first shifter is a second-direction shifter, used to shift the mantissa in the second direction representing the "right" direction; the second shifter is a first-direction shifter, used to shift the mantissa in the first direction representing the "left" direction; and the third shifter is also a second-direction shifter, used to shift the mantissa in the second direction representing the "right" direction.

[0102] Furthermore, since the second mantissa will only shift in the second direction representing the "right" direction, the computer device can input the second mantissa and the second shift information into a first shifter for shifting the mantissa in the second direction, so that the first shifter shifts the second mantissa according to the second shift information to obtain the second shifted mantissa. Since the first mantissa may shift in the first direction representing the "left" direction or in the second direction representing the "right" direction, the computer device can input the first shift information and the first mantissa into a second shifter for shifting the mantissa in the first direction, and input the first shift information and the first mantissa into a third shifter for shifting the mantissa in the second direction. The second shifter outputs a first candidate shifted mantissa according to the input first shift information and the first mantissa, and the third shifter outputs a second candidate mantissa according to the input first shift information and the first mantissa. Furthermore, since both the second and third shifters will output a shift result, a selector is also needed to filter out the first shift mantissa from the first candidate shift mantissa and the second candidate shift mantissa. Figure 4 A schematic diagram of a shifter in one embodiment is shown.

[0103] It is worth noting that the first shifter, the second shifter, and the third shifter work in parallel. By working in parallel, the shifting efficiency of the mantissa is improved, thereby improving the superposition efficiency of floating-point numbers.

[0104] In one embodiment, when the second direction, representing the "left" direction, is used as the first shift direction, since the second shifter is used to shift the mantissa towards the first direction, it cannot properly shift the first mantissa based on the first shift information. In this case, the second shifter can output a randomly generated random number. Since the third shifter is used to shift the mantissa towards the second direction, it can properly shift the first mantissa based on the first shift information, and outputs a normal shift result. When the first direction, representing the "right" direction, is used as the first shift direction, similarly, the second shifter outputs a normal shift result, and the third shifter outputs a random value.

[0105] In one embodiment, the first shifter, the second shifter, and the third shifter can all be shifters programmed by a program or shifters composed of circuits.

[0106] In the above embodiments, by setting three shifters and performing the corresponding mantissa shifting process in parallel using the three shifters, the efficiency of mantissa shifting is greatly improved, thereby improving the efficiency of floating-point number superposition.

[0107] In one embodiment, the first shift mantissa is selected from the first candidate shift mantissa and the second candidate shift mantissa by a preset selector and based on the first bit information. This includes: when the selector determines that the first shift direction in the first shift information is a preset second direction, the selector uses the first candidate shift mantissa generated by the second shifter as the first shift mantissa; when the selector determines that the first shift direction in the first shift information is a preset first direction, the selector uses the second candidate shift mantissa generated by the third shifter as the first shift mantissa.

[0108] Specifically, when the first direction, representing the "left" direction, is used as the first shift direction, since the second shifter is used to shift the mantissa towards the first direction, the selector uses the first candidate mantissa generated by the second shifter as the first shift mantissa. When the second direction, representing the "right" direction, is used as the first shift direction, since the third shifter is used to shift the mantissa towards the second direction, the selector uses the second candidate mantissa generated by the third shifter as the first shift mantissa.

[0109] In one embodiment, for all floating-point processing rounds except the first, the first floating-point number is the result of superimposing a subset of floating-point numbers in the floating-point sequence; the subset of floating-point numbers is the floating-point number in the sequence preceding the currently traversed floating-point number; the second floating-point number is the currently traversed floating-point number in the floating-point sequence; the result of the floating-point number superposition includes the superposition number and the number of leading zeros; after determining the superposition number of the first and second floating-point numbers, the method further includes: proceeding to the next round of floating-point number superposition. The process takes the superimposed floating-point number from the result of the superposition of floating-point numbers as the new first floating-point number, determines the next floating-point number to be traversed in the floating-point number sequence, takes the next floating-point number to be traversed as the new second floating-point number, returns to the step of obtaining the first exponent, the first mantissa, and the number of the first leading zeros of the first mantissa and continues to execute until the last floating-point number in the floating-point number sequence is traversed, and obtains the target superimposed floating-point number after superimposing the floating-point numbers in the floating-point number sequence; converts the target superimposed floating-point number to the standard floating-point number format to obtain the standard superimposed floating-point number.

[0110] Specifically, since there are situations in the field of artificial intelligence where a series of floating-point numbers are continuously superimposed, computer devices can also use the floating-point number processing method mentioned in this application to sequentially superimpose a series of floating-point numbers. More specifically, when it is necessary to sequentially superimpose floating-point numbers in a floating-point number sequence, the computer device can traverse the floating-point numbers in the sequence. The second floating-point number can be the currently traversed floating-point number, and the first floating-point number can be the result of superimposing the floating-point numbers in the sequence preceding the currently traversed floating-point number. That is, the first floating-point number can be the superposition result obtained by superimposing the floating-point numbers in the sequence preceding the second floating-point number. For example, when the currently traversed floating-point number is the fourth digit in the floating-point number sequence, the second floating-point number is the fourth digit in the floating-point number sequence, and the first floating-point number is the superposition result obtained by superimposing the first, second, and third digits in the floating-point number sequence. The computer device can superimpose the floating-point numbers preceding the second floating-point number according to the floating-point number processing method mentioned in this application. For example, in the above example, the computer device can first superimpose the first digit and the second digit in the floating-point number sequence to obtain the corresponding floating-point number superposition result, and then superimpose the corresponding floating-point number superposition result with the third digit in the floating-point number sequence to obtain the first floating-point number.

[0111] Further, the computer device can superimpose the first floating-point number and the second floating-point number according to the method described in steps 202 to 208, thereby obtaining a superimposed floating-point number result. When the superimposed floating-point number result is obtained, the computer device can proceed to the next round of superposition, using the superimposed floating-point number result generated in the previous round as the new first floating-point number, and determining the next floating-point number to be traversed in the floating-point number sequence, using the next traversed floating-point number as the new second floating-point number, and returning to step 202 to continue execution until the last floating-point number in the floating-point number sequence is reached, obtaining the target superimposed floating-point number result after superimposing all the floating-point numbers in the floating-point number sequence. Similar to the superimposed floating-point number result, the target superimposed floating-point number result includes not only the target superimposed floating-point number but also the number of leading zeros in the third mantissa of the target superimposed floating-point number.

[0112] Furthermore, when the target floating-point superposition result is obtained, the computer device can perform format conversion on the target floating-point superposition number in the target floating-point superposition result to obtain a standard superposition number with a standard floating-point number format.

[0113] In one embodiment, reference Figure 5Assume the floating-point sequence contains four numbers (floating-point number A, floating-point number B, floating-point number C, and floating-point number D). In the first round of floating-point number superposition, the computer device can use the first floating-point number in the sequence as A as the first floating-point number, and the second floating-point number B as the second floating-point number. The computer device also identifies the number of leading zeros in the first mantissa of the first floating-point number to obtain the parameter lz. Further, the computer device superimposes floating-point number A and floating-point number B according to the methods described in steps 204 to 208 above, to obtain the floating-point number superposition result a. Further, the computer device enters the next round of floating-point number processing. The computer device uses the superimposed floating-point number in the superimposed result 'a' as the new first floating-point number, and the floating-point number C in the floating-point number sequence as the new second floating-point number. Since the superimposed floating-point number result 'a' already includes the number of leading zeros in the mantissa, that is, it already includes the first number of leading zeros in the new first floating-point number, the computer device does not need to identify the first number of leading zeros again and can directly return to step 202 to continue execution. That is, the computer device directly obtains the corresponding mantissa, corresponding exponent, and corresponding number of leading zeros of the superimposed floating-point number in the superimposed floating-point number result 'a', without needing to identify the number of leading zeros again, and continues execution based on the obtained mantissa, corresponding exponent, and corresponding number of leading zeros to obtain the superimposed floating-point number result 'b'. Here, the superimposed floating-point number result includes the superimposed floating-point number and the number of leading zeros. The superimposed floating-point number is the floating-point number obtained by combining the superimposed exponent and the superimposed mantissa, and the number of leading zeros is the number predicted from the superimposed mantissa. Similarly, the computer device can superimpose the floating-point number b with the floating-point number D in the floating-point number sequence to obtain the floating-point superposition result c. Since the floating-point number D is the last floating-point number in the floating-point number sequence, the computer device uses the floating-point superposition result c as the target floating-point superposition result. Figure 5 A schematic diagram of floating-point numbers stacked sequentially is shown in one embodiment.

[0114] In one embodiment, for the first floating-point number processing round, the first floating-point number is the first floating-point number in the floating-point number sequence, and the second floating-point number is the next floating-point number in the floating-point number sequence that is immediately adjacent to the first floating-point number. For the remaining rounds other than the first floating-point number processing round, the second floating-point number is the floating-point number currently being traversed in the floating-point number sequence, and the first floating-point number is the sum of the floating-point numbers preceding the second floating-point number in the floating-point number sequence.

[0115] In one embodiment, because this application can determine the superimposed exponent based on the first exponent, the number of first leading zeros, and the second exponent while performing order alignment on the first and second floating-point numbers, and predict the number of second leading zeros of the superimposed mantissa based on the first and second shifted mantissas while superimposing the first and second shifted mantissas, and performs parallel shifting on the first and second mantissas during the order alignment process, this application significantly shortens the critical path and can obtain the floating-point number superposition result within one clock cycle. For example, refer to... Figure 6 The computer device can input a floating-point number to be superimposed in each clock cycle, so that in each clock cycle, the computer device can superimpose the superimposed floating-point number with the input floating-point number to be superimposed, and obtain a new superimposed floating-point number result. Here, the clock cycle can specifically be the clock cycle of the AI ​​processor. Figure 6 A schematic diagram of floating-point number stacking is shown in one embodiment.

[0116] In one embodiment, reference Figure 7 In processing step 1, the computer device performs the following steps: "aligning the first and second floating-point numbers; determining the superimposed exponent based on the first exponent, the number of leading zeros, and the second exponent; superimposing the first and second mantissas to obtain the superimposed mantissa; predicting the number of leading zeros in the superimposed mantissa based on the first and second mantissas; and determining the superimposed floating-point number result based on the superimposed mantissa, the superimposed exponent, and the number of leading zeros." In processing step 2, the device performs the following step: "converting the format of the target floating-point number superposition result to obtain a standard floating-point superimposed number with a standard floating-point format." Processing step 1 can be completed within one clock cycle. Format conversion and other operations are performed in processing step 2. In processing step 1, no format conversion or other operations are required; these operations are only performed after all floating-point numbers have been superimposed. This significantly shortens the critical path and saves power consumption. Furthermore, this application shortens the critical path without adding additional computing resources. Therefore, the resources consumed by this application are comparable to those of a regular floating-point adder, and the chip area resources consumed are less, thus reducing area consumption and improving area efficiency. Figure 7 A schematic diagram of the overall framework for floating-point number stacking is shown in one embodiment.

[0117] In one embodiment, the target floating-point number superposition result includes the target floating-point superposition number and the number of leading zeros of the third mantissa of the target floating-point superposition number; the target floating-point number superposition result is format-converted to obtain a standard floating-point superposition number with a standard floating-point number format, including: normalizing the target floating-point superposition number according to the number of leading zeros of the third mantissa of the target floating-point superposition number to obtain a normalized floating-point superposition number; and rounding the normalized floating-point superposition number to obtain a standard floating-point superposition number.

[0118] Specifically, the standard floating-point format can be a floating-point format conforming to the IEEE 754 standard. The IEEE 754 standard logically represents a floating-point number V using a triple {S, E, M}, i.e., V = (-1). s ×(1+M)×2 (E+127) (Single precision); V = (-1) S ×(1+M)×2 (E+1023) (Double precision); Because computer devices store binary numbers, when reflecting them in storage space, refer to... Figure 8 IEEE 754 represents floating-point numbers as three parts: S, E, and M. S is the sign bit, and E is the exponent (including E1…E2). w-1 M is the mantissa (including M1...M) p-1 ). Figure 8 A schematic diagram of the storage structure of floating-point numbers in one embodiment is shown.

[0119] Specifically, the above-mentioned target floating-point number superposition result may include the target floating-point superposition number and the number of leading zeros of the third mantissa of the target floating-point superposition number. For example, the target floating-point superposition result may be "0.0011×2 3 "lz = 2", where the symbol lz represents the number of the third leading zeros. It's easy to understand that since computer devices store data in storage space, and the numbers stored in the storage space are either 0 or 1, for a target floating-point superposition number, the computer device actually stores the 0 or 1 form corresponding to the target floating-point superposition number, such as reference... Figure 9 For floating-point numbers in custom formats, computer devices can use methods such as... Figure 9 The storage space shown is used to store floating-point numbers. For example, for the floating-point number "0.0011 × 2 3 The computer device will convert 0.0011 into its corresponding 0 and 1 form (e.g., convert it to 0011, hiding the highest bit 0), and convert the exponent 3 into its corresponding 0 and 1 form (e.g., convert it to 011), and store the data in 0 and 1 form accordingly in a file such as... Figure 9 In the storage space shown. Figure 9 A schematic diagram of the storage structure of floating-point numbers in one embodiment is shown.

[0120] Furthermore, for IEEE 754 format floating-point numbers, the highest bit of the mantissa is 1, and the exponent needs to be added to 127 or 1023 before being converted to binary for storage. Therefore, in order to convert a custom-format floating-point number to an IEEE 754 format floating-point number, that is, to convert a target floating-point stacked number to a standard floating-point stacked number in standard floating-point format, the computer device first needs to normalize the target floating-point stacked number based on the number of leading zeros in the third mantissa, so as to change the highest bit of the third mantissa of the target floating-point stacked number to 1, thus obtaining a normalized floating-point stacked number. Since the target floating-point stacked number has been normalized to obtain a normalized floating-point number, in order to make the value of the normalized floating-point number as close as possible to the value of the target floating-point stacked number, it is also necessary to round the normalized floating-point stacked number to obtain a standard floating-point stacked number.

[0121] In one embodiment, the target floating-point stack is normalized based on the number of leading zeros in the third mantissa of the target floating-point stack to obtain a normalized floating-point stack. This includes: adding 1 to the number of leading zeros in the third mantissa to obtain a third shift amount; shifting the third mantissa to the left by the third shift amount to obtain a fourth mantissa; and subtracting the third shift amount from the third exponent to obtain a fourth exponent; and determining the normalized floating-point stack based on the fourth exponent and the fourth mantissa.

[0122] Specifically, the computer device adds 1 to the third leading zero, obtaining the third shift amount. Then, it shifts the third bit to the left by the third shift amount to obtain the fourth mantissa, thus ensuring that the most significant bit of the fourth mantissa is 1. Further, because the third mantissa has been shifted, the computer device also needs to adjust the third exponent of the target floating-point stack to maintain its numerical value. The computer device subtracts the third shift amount from the third exponent to obtain the fourth exponent, and then obtains the normalized floating-point stack based on the fourth exponent and the fourth mantissa. For example, the fourth exponent is stored in... Figure 9 When the exponent is represented by a binary number, the computer device adds the binary number corresponding to 127 or 1023 to the fourth exponent to obtain a number conforming to the IEEE 754 format that can be stored in a format such as... Figure 8 The corrected exponent is shown in the exponent field; subsequently, the computer device stores the fourth mantissa. Figure 8 The mantissa in the middle, and storing the corrected instruction to Figure 8 The exponent bits are used to obtain the normalized floating-point superposition number.

[0123] In one embodiment, since the third mantissa of the target floating-point stack is obtained by superimposing the first shifted mantissa and the second shifted mantissa, there is a probability of overflow when the first shifted mantissa and the second shifted mantissa are superimposed. When the superposition of the first shifted mantissa and the second shifted mantissa overflows, the computer device can normalize the third mantissa of the target floating-point stack to the right, that is, shift the third mantissa to the right to obtain a normalized floating-point stack.

[0124] In one embodiment, since the mantissa has been shifted left or right, rounding is required to keep the numerical value as constant as possible. The computer device can perform a rounding operation on the shifted third mantissa (i.e., the fourth mantissa) according to a preset rounding rule to obtain the fifth mantissa. For example, the rounding operation can be performed according to the 0-to-1 method or the constant 1 method, so that the numerical difference between the standard floating-point superposition number and the normalized floating-point superposition number obtained after the rounding operation is less than or equal to the difference threshold.

[0125] In the above embodiments, by performing normalization and rounding operations, the target floating-point superposition number can be converted into a standard floating-point superposition number that conforms to the standard floating-point number format. This makes it easier for the AI ​​processor to perform subsequent processing based on the standard floating-point superposition number that conforms to the standard floating-point number format.

[0126] In one embodiment, the second floating-point number is a floating-point number derived from the field of artificial intelligence; the first floating-point number is determined based on the superposition of multiple floating-point numbers derived from the field of artificial intelligence; the floating-point number derived from the field of artificial intelligence includes at least one of training data extracted from training samples by a machine learning model, detection data extracted from the object to be detected by a machine learning model, and construction data constructed by a machine learning model; the floating-point number processing method is executed by an artificial intelligence processor, and the superposition result of the first floating-point number and the second floating-point number is generated in a unit clock cycle of the artificial intelligence processor.

[0127] Specifically, the second floating-point number can be a floating-point number derived from the field of artificial intelligence, and the first floating-point number can be the result of superimposing multiple floating-point numbers. Floating-point numbers derived from the field of artificial intelligence include at least one of the following: training data extracted from training samples by a machine learning model, detection data extracted from the object to be detected by a machine learning model, and constructed data constructed by a machine learning model. For example, floating-point numbers derived from the field of artificial intelligence can be image features extracted from image samples, speech features extracted from the speech to be detected, or constructed data constructed by a machine learning model, etc. It is easily understood that floating-point numbers derived from the field of artificial intelligence can also be data obtained after further processing of the aforementioned image features, speech features, or constructed data. The floating-point number processing method involved in this application embodiment can be executed by an artificial intelligence processor, and can superimpose the first floating-point number and the second floating-point number within one clock cycle of the artificial intelligence processor to obtain a floating-point number superposition result, greatly improving the processing efficiency of floating-point numbers.

[0128] In this application, by obtaining floating-point numbers from the field of artificial intelligence, the floating-point numbers from the field of artificial intelligence can be superimposed using the floating-point number processing method in the embodiments of this application, thereby improving the data processing efficiency in the field of artificial intelligence.

[0129] In one embodiment, reference Figure 10 , Figure 10 A floating-point number processing method in a specific embodiment is shown, and the steps are as follows:

[0130] S1002, the computer device obtains the first exponent, the first mantissa, and the first leading zero count of the first mantissa of the first floating-point number, and the computer device obtains the second exponent and the second mantissa of the second floating-point number superimposed on the first floating-point number.

[0131] S1004, the computer device determines a first difference between the first exponent and the first number of leading zeros, and uses the first difference as the true exponent of the first floating-point number.

[0132] S1006, when the true index is greater than the second index, the computer device uses the preset first direction as the first shift direction and the preset second direction as the second shift direction, determines the first shift amount based on the number of the first leading zeros, and determines the second shift amount based on the true index and the second index.

[0133] S1008, when the true exponent is greater than the second exponent, the computer device uses the number of first leading zeros as the first shift amount and the first difference between the true exponent and the second exponent as the second shift amount.

[0134] S1010, when the true index is less than the second index, the computer device subtracts the true index from the second index to obtain a second difference; when the number of first leading zeros is greater than the second difference, a preset first direction is used as the first shift direction, and a third difference obtained by subtracting the second index from the first index is used as the first shift amount; when the number of first leading zeros is less than the second difference, a preset second direction is used as the first shift direction, and a fourth difference obtained by subtracting the first index from the second index is used as the first shift amount.

[0135] S1012, the second mantissa is obtained by shifting the second mantissa using a preset first shifter and according to the second shift information.

[0136] S1014, the first candidate shifted mantissa is obtained by shifting the first mantissa using a preset second shifter and according to the first shift information.

[0137] S1016, the second shifted mantissa is obtained by shifting the first mantissa according to the first shift information through a preset third shifter.

[0138] S1018, using a preset selector and based on the first bit information, the first shift mantissa is selected from the first candidate shift mantissa and the second candidate shift mantissa; wherein, the first shifter, the second shifter and the third shifter perform the shifting process on the corresponding mantissa in parallel.

[0139] S1020, during the process of shifting the corresponding mantissa in parallel through the first shifter, the second shifter and the third shifter, the computer device determines the superimposed exponent based on the first exponent, the number of the first leading zeros and the second exponent.

[0140] S1022, the computer device concurrently superimposes the first displacement tail number and the second displacement tail number to obtain the superimposed tail number, and predicts the number of second leading zeros of the superimposed tail number based on the first displacement tail number and the second displacement tail number.

[0141] S1024, The computer device determines the result of superimposing the first floating-point number and the second floating-point number based on the superimposed mantissa, the superimposed exponent, and the number of the second leading zero.

[0142] S1026, proceed to the next round of floating-point number superposition process. The computer device takes the superimposed floating-point number in the superposition result as the new first floating-point number, determines the floating-point number to be traversed in the next round of the floating-point number sequence, takes the floating-point number to be traversed in the next round as the new second floating-point number, and returns to the step of obtaining the first exponent, the first mantissa, and the number of the first leading zeros of the first mantissa to continue execution until the last floating-point number in the floating-point number sequence is traversed, and the target floating-point number superposition result after superimposing each floating-point number in the floating-point number sequence is obtained.

[0143] S1028, The computer device performs format conversion on the target floating-point number superposition result to obtain a standard floating-point superposition number with a standard floating-point number format.

[0144] In this embodiment, since the order alignment and the determination of the exponent after stacking are performed in parallel, the stacking efficiency of floating-point numbers can be improved; and since the mantissa stacking and the prediction of the number of leading zeros are also performed in parallel, the stacking efficiency of floating-point numbers can be further improved.

[0145] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0146] This application also provides an application scenario in which the above-described floating-point number processing method is applied. Specifically, the floating-point number processing method is applied in this scenario as follows:

[0147] A face recognition model runs in the computer device. When the face recognition model obtains the face image to be recognized, the computer device can extract the face feature matrix from the face image to be recognized, and perform superposition operation on the floating-point numbers in the face feature matrix according to the above floating-point number processing method to obtain the target face features, thereby recognizing the face in the face image to be recognized based on the target face.

[0148] This application also provides another application scenario in which the above-described floating-point number processing method is applied. Specifically, the floating-point number processing method is applied in this scenario as follows:

[0149] The computer device runs a speech recognition model. When the speech recognition model acquires the speech to be recognized, the computer device can extract speech features from the speech and perform feature processing on the speech features to obtain a data matrix. The data matrix stores floating-point numbers. The speech recognition model can then superimpose the floating-point numbers in the data matrix according to the above floating-point number processing method to obtain a floating-point number superposition result. The floating-point number superposition result is then processed to obtain the speech recognition result.

[0150] The above application scenarios are merely illustrative. It is understood that the application of the schedule synchronization method provided in the embodiments of this application is not limited to the above scenarios.

[0151] Based on the same inventive concept, this application also provides a floating-point processing apparatus for implementing the floating-point processing method described above. The solution provided by this apparatus is similar to the implementation scheme described in the above method; therefore, the specific limitations in one or more floating-point processing apparatus embodiments provided below can be found in the limitations of the floating-point processing method described above, and will not be repeated here.

[0152] In one embodiment, such as Figure 11 As shown, a floating-point processing device 1100 is provided, comprising a data acquisition module 1102, a parallel processing module 1104, a data generation module 1106, and a return module 1108, wherein:

[0153] The data acquisition module 102 is used to acquire the first exponent, the first mantissa, and the first number of leading zeros of the first mantissa of the first floating-point number, and to acquire the second exponent and the second mantissa of the second floating-point number superimposed on the first floating-point number; for the remaining floating-point number processing rounds other than the first floating-point number processing round, the second floating-point number is the floating-point number currently traversed in the floating-point number sequence, and the first floating-point number is the floating-point superposition number obtained by superimposing the floating-point numbers located before the second floating-point number in the floating-point number sequence.

[0154] The parallel processing module 1104 is used to perform parallel alignment processing on the first floating-point number and the second floating-point number to obtain the first shifted mantissa of the first mantissa and the second shifted mantissa of the second mantissa, and to determine the superimposed exponent based on the first exponent, the first number of leading zeros and the second exponent; to superimpose the first shifted mantissa and the second shifted mantissa in parallel to obtain the superimposed mantissa, and to predict the second number of leading zeros of the superimposed mantissa based on the first shifted mantissa and the second shifted mantissa.

[0155] The data generation module 1106 is used to determine the result of the superposition of the first floating-point number and the second floating-point number based on the superposition mantissa, the superposition exponent, and the number of the second leading zeros.

[0156] The return module 1108 is used to take the superimposed floating-point number in the superimposed floating-point number result as the new first floating-point number, determine the next floating-point number to be traversed in the floating-point number sequence, take the next floating-point number to be traversed as the new second floating-point number, enter the next floating-point number processing round, return to the step of obtaining the first exponent, the first mantissa, and the first number of leading zeros of the first floating-point number and continue to execute until the last floating-point number in the floating-point number sequence is traversed, and obtain the target floating-point number superimposed result after superimposing each floating-point number in the floating-point number sequence.

[0157] In one embodiment, for the first floating-point number processing round, the first floating-point number is the first floating-point number in the floating-point number sequence, and the second floating-point number is the next floating-point number in the floating-point number sequence that is immediately adjacent to the first floating-point number.

[0158] In one embodiment, the parallel processing module 1104 is further configured to determine a first difference between the first exponent and the first number of leading zeros, and use the first difference as the true exponent of the first floating-point number; determine the first shift information of the first mantissa and the second shift information of the second mantissa based on the true exponent and the second exponent; and perform shift processing on the first mantissa and the second mantissa in parallel based on the first shift information and the second shift information to obtain the first shifted mantissa and the second shifted mantissa.

[0159] In one embodiment, the first shift information includes a first shift direction and a first shift amount; the second shift information includes a second shift direction and a second shift amount; the parallel processing module 1104 is further configured to, when the true exponent is greater than the second exponent, use a preset first direction as the first shift direction and a preset second direction as the second shift direction, determine the first shift amount based on the number of first leading zeros, and determine the second shift amount based on the true exponent and the second exponent; when the true exponent is less than the second exponent, determine the second shift amount to be zero, and determine the first shift direction and the first shift amount based on at least one of the true exponent, the first exponent, and the second exponent.

[0160] In one embodiment, the parallel processing module 1104 is further configured to, when the true exponent is greater than the second exponent, use the first number of leading zeros as the first shift amount and the first difference between the true exponent and the second exponent as the second shift amount.

[0161] In one embodiment, the parallel processing module 1104 is further configured to: when the true exponent is less than the second exponent, subtract the true exponent from the second exponent to obtain a second difference; when the number of first leading zeros is greater than the second difference, use a preset first direction as the first shift direction and use a third difference obtained by subtracting the second exponent from the first exponent as the first shift amount; when the number of first leading zeros is less than the second difference, use a preset second direction as the first shift direction and use a fourth difference obtained by subtracting the first exponent from the second exponent as the first shift amount.

[0162] In one embodiment, the parallel processing module 1104 is further configured to: obtain a second shifted mantissa by shifting the second mantissa according to the second shift information using a preset first shifter; obtain a first candidate shifted mantissa by shifting the first mantissa according to the first shift information using a preset second shifter; obtain a second shifted mantissa by shifting the first mantissa according to the first shift information using a preset third shifter; and select the first shifted mantissa from the first candidate shifted mantissa and the second candidate shifted mantissa using a preset selector according to the first bit information; wherein the first shifter, the second shifter, and the third shifter perform the shifting processing on the corresponding mantissa in parallel.

[0163] In one embodiment, the second shifter is a first-direction shifter; the first-direction shifter is used to shift the mantissa in a first direction; the third shifter is a second-direction shifter; the second-direction shifter is used to shift the mantissa in a second direction; the parallel processing module 1104 is further configured to, when the selector determines that the first shift direction in the first shift information is a preset second direction, use the first candidate shift mantissa generated by the second shifter as the first shift mantissa; when the selector determines that the first shift direction in the first shift information is a preset first direction, use the second candidate shift mantissa generated by the third shifter as the first shift mantissa.

[0164] In one embodiment, the target floating-point number superposition result includes the target floating-point superposition number and the number of leading zeros of the third mantissa of the target floating-point superposition number; the floating-point number processing device 1100 further includes a format conversion module 1110, which is used to normalize the target floating-point superposition number according to the number of leading zeros of the third mantissa of the target floating-point superposition number to obtain a normalized floating-point superposition number; and to round the normalized floating-point superposition number to obtain a standard floating-point superposition number.

[0165] In one embodiment, the format conversion module 1110 is further configured to add 1 to the third leading zero quantity to obtain a third shift amount; shift the third mantissa to the left by the third shift amount to obtain a fourth mantissa; and subtract the third shift amount from the third exponent to obtain a fourth exponent; and determine the normalized floating-point superposition number based on the fourth exponent and the fourth mantissa.

[0166] In one embodiment, the floating-point processing device 1100 is further configured to acquire a first floating-point number and a second floating-point number; the second floating-point number is a floating-point number derived from the field of artificial intelligence; the first floating-point number is the result of superimposing multiple floating-point numbers derived from the field of artificial intelligence; the floating-point number derived from the field of artificial intelligence includes at least one of training data extracted from training samples by a machine learning model, detection data extracted from an object to be detected by a machine learning model, and constructed data constructed by a machine learning model; the floating-point processing method is executed by an artificial intelligence processor, and the result of superimposing the first floating-point number and the second floating-point number is generated in a unit clock cycle of the artificial intelligence processor.

[0167] Each module in the aforementioned floating-point processing device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0168] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 12 As shown, this computer device includes a processor, memory, input / output (I / O) interfaces, and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores floating-point processing data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When executed by the processor, the computer program implements a floating-point processing method.

[0169] Those skilled in the art will understand that Figure 12 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0170] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0171] In one embodiment, a computer-readable storage medium is provided storing a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0172] In one embodiment, a computer program product or computer program is provided, the computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and executes the computer instructions, causing the computer device to perform the steps in the above method embodiments.

[0173] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data shall comply with the relevant laws, regulations and standards of the relevant countries and regions.

[0174] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0175] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0176] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A floating-point number processing method, characterized in that, Executed by an artificial intelligence processor, the method includes: Obtain the first exponent, the first mantissa, and the first number of leading zeros of the first mantissa of the first floating-point number; obtain the second exponent and the second mantissa of the second floating-point number superimposed on the first floating-point number; the second floating-point number is a floating-point number derived from the field of artificial intelligence; the first floating-point number is determined based on the superposition result of multiple floating-point numbers derived from the field of artificial intelligence; the floating-point number derived from the field of artificial intelligence includes at least one of the following: training data extracted from training samples by a machine learning model, detection data extracted from the object to be detected by a machine learning model, and constructed data constructed by a machine learning model; In parallel, the first floating-point number and the second floating-point number are subjected to alignment processing to obtain the first shifted mantissa of the first mantissa and the second shifted mantissa of the second mantissa, and the superimposed exponent is determined according to the first exponent, the number of the first leading zeros and the second exponent. In parallel, the first shift mantissa and the second shift mantissa are superimposed to obtain the superimposed mantissa, and the number of second leading zeros of the superimposed mantissa is predicted based on the first shift mantissa and the second shift mantissa; The result of superimposing the first floating-point number and the second floating-point number is determined based on the superimposed mantissa, the superimposed exponent, and the number of the second leading zeros; the result of superimposing the first floating-point number and the second floating-point number is generated in a unit clock cycle of the artificial intelligence processor.

2. The method according to claim 1, characterized in that, The step of performing alignment processing on the first floating-point number and the second floating-point number to obtain the first shifted mantissa of the first mantissa and the second shifted mantissa of the second mantissa includes: Determine the first difference between the first exponent and the first number of leading zeros, and use the first difference as the true exponent of the first floating-point number; Based on the true index and the second index, determine the first shift information of the first mantissa and the second shift information of the second mantissa; Based on the first shift information and the second shift information, the first mantissa and the second mantissa are shifted in parallel to obtain the first shifted mantissa and the second shifted mantissa.

3. The method according to claim 2, characterized in that, The first shift information includes a first shift direction and a first shift amount; the second shift information includes a second shift direction and a second shift amount; determining the first shift information of the first mantissa and the second shift information of the second mantissa based on the true exponent and the second exponent includes: When the true index is greater than the second index, a preset first direction is used as the first shift direction, a preset second direction is used as the second shift direction, a first shift amount is determined based on the number of the first leading zeros, and a second shift amount is determined based on the true index and the second index. When the true index is less than the second index, the second shift amount is determined to be zero, and the first shift direction and the first shift amount are determined based on at least one of the true index, the first index, and the second index.

4. The method according to claim 3, characterized in that, The step of determining a first shift amount based on the number of leading zeros when the true exponent is greater than the second exponent, and determining a second shift amount based on the true exponent and the second exponent, includes: When the true exponent is greater than the second exponent, the first number of leading zeros is used as the first shift amount, and the first difference between the true exponent and the second exponent is used as the second shift amount.

5. The method according to claim 3, characterized in that, When the true index is less than the second index, determining the first shift direction and the first shift amount based on at least one of the true index, the first index, and the second index includes: When the true index is less than the second index, the second index is subtracted from the true index to obtain the second difference. When the number of the first leading zeros is greater than the second difference, the preset first direction is used as the first shift direction, and the third difference obtained by subtracting the second exponent from the first exponent is used as the first shift amount. When the number of the first leading zeros is less than the second difference, the preset second direction is used as the first shift direction, and the fourth difference obtained by subtracting the first exponent from the second exponent is used as the first shift amount.

6. The method according to claim 2, characterized in that, The step of performing parallel shift processing on the first mantissa and the second mantissa based on the first shift information and the second shift information to obtain the first shifted mantissa and the second shifted mantissa includes: The second shifted mantissa is obtained by shifting the second mantissa using a preset first shifter and according to the second shift information. The first candidate shifted mantissa is obtained by using a preset second shifter and shifting the first mantissa according to the first shift information. By using a preset third shifter and shifting the first mantissa according to the first shift information, a second candidate shifted mantissa is obtained. The first shift tail number is selected from the first candidate shift tail number and the second candidate shift tail number by using a preset selector and according to the first shift information; The first shifter, the second shifter, and the third shifter perform shifting operations on the corresponding mantissas in parallel.

7. The method according to claim 6, characterized in that, The second shifter is a first-direction shifter; the first-direction shifter is used to shift the mantissa in a first direction; the third shifter is a second-direction shifter; the second-direction shifter is used to shift the mantissa in a second direction. The step of selecting the first shift tail number from the first candidate shift tail number and the second candidate shift tail number using a preset selector and based on the first shift information includes: When the selector determines that the first shift direction in the first shift information is a preset second direction, the selector will use the first candidate shift mantissa generated by the second shifter as the first shift mantissa; When the selector determines that the first shift direction in the first shift information is a preset first direction, the selector will use the second candidate shift mantissa generated by the third shifter as the first shift mantissa.

8. The method according to claim 1, characterized in that, For all floating-point number processing rounds except the first one, the first floating-point number is the result of superimposing a portion of the floating-point numbers in the floating-point number sequence; the portion of the floating-point numbers is the floating-point number in the floating-point number sequence that precedes the currently traversed floating-point number; the second floating-point number is the currently traversed floating-point number in the floating-point number sequence; the result of the floating-point number superposition includes the superimposed floating-point number and the number of leading zeros. After determining the result of superimposing the first floating-point number and the second floating-point number, the method further includes: The floating-point number in the floating-point number superposition result is taken as the new first floating-point number, and the next floating-point number to be traversed in the floating-point number sequence is determined. The next floating-point number to be traversed is taken as the new second floating-point number, and the next round of floating-point number processing is entered. The process returns to the step of obtaining the first exponent, the first mantissa, and the first number of leading zeros of the first floating-point number and continues to execute until the last floating-point number in the floating-point number sequence is traversed, and the target floating-point number superposition result after superimposing each floating-point number in the floating-point number sequence is obtained. The target floating-point number superposition result is format-converted to obtain a standard floating-point superposition number with a standard floating-point number format.

9. The method according to claim 8, characterized in that, The target floating-point number superposition result includes the target floating-point superposition number and the number of leading zeros of the third mantissa of the target floating-point superposition number; The step of converting the format of the target floating-point number superposition result to obtain a standard floating-point superposition number with a standard floating-point number format includes: Based on the number of third leading zeros in the third mantissa of the target floating-point superposition number, the target floating-point superposition number is normalized to obtain a normalized floating-point superposition number. The normalized floating-point superposition number is rounded to obtain the standard floating-point superposition number.

10. The method according to claim 9, characterized in that, The step of normalizing the target floating-point superposition number based on the number of leading zeros in the third mantissa of the target floating-point superposition number to obtain a normalized floating-point superposition number includes: Add 1 to the number of the third leading zeros to obtain the third shift amount; The third mantissa is shifted to the left by the third shift amount to obtain the fourth mantissa, and the third exponent of the target floating-point superposition number is subtracted from the third shift amount to obtain the fourth exponent; The normalized floating-point superposition number is determined based on the fourth exponent and the fourth mantissa.

11. The method according to claim 1, characterized in that, The floating-point number superposition result refers to the result obtained by superimposing the first floating-point number and the second floating-point number.

12. A floating-point processing device, characterized in that, Deployed on an artificial intelligence processor, the device includes: The data acquisition module is used to acquire the first exponent, the first mantissa, and the first number of leading zeros of the first mantissa of a first floating-point number, and to acquire the second exponent and the second mantissa of a second floating-point number superimposed on the first floating-point number. For all floating-point number processing rounds except the first floating-point number processing round, the second floating-point number is the floating-point number currently traversed in the floating-point number sequence, and the first floating-point number is a superimposed floating-point number obtained by superimposing the floating-point numbers located before the second floating-point number in the floating-point number sequence. The second floating-point number is a floating-point number derived from the field of artificial intelligence. The first floating-point number is determined based on the superposition result of multiple floating-point numbers derived from the field of artificial intelligence. The floating-point numbers derived from the field of artificial intelligence include at least one of the following: training data extracted from training samples by a machine learning model, detection data extracted from the object to be detected by a machine learning model, and constructed data constructed by a machine learning model. A parallel processing module is configured to, in parallel, perform order-alignment processing on the first floating-point number and the second floating-point number to obtain a first shifted mantissa of the first mantissa and a second shifted mantissa of the second mantissa; and determine the superimposed exponent based on the first exponent, the first number of leading zeros, and the second exponent; and, in parallel, superimpose the first shifted mantissa and the second shifted mantissa to obtain the superimposed mantissa; and predict the second number of leading zeros of the superimposed mantissa based on the first shifted mantissa and the second shifted mantissa. The data generation module is used to determine the floating-point number superposition result of the first floating-point number and the second floating-point number based on the superposition mantissa, the superposition exponent and the number of the second leading zeros; The return module is used to take the superimposed floating-point number in the superimposed floating-point number result as the new first floating-point number, determine the next floating-point number to be traversed in the floating-point number sequence, take the next floating-point number to be traversed as the new second floating-point number, enter the next floating-point number processing round, return to the step of obtaining the first exponent, the first mantissa, and the first number of leading zeros of the first floating-point number and continue to execute until the last floating-point number in the floating-point number sequence is traversed, and the target floating-point number superimposed result after superimposing each floating-point number in the floating-point number sequence is obtained; the floating-point number superimposed result after superimposing the first floating-point number and the second floating-point number is generated in a unit clock cycle of the artificial intelligence processor.

13. The apparatus according to claim 12, characterized in that, For the first floating-point number processing round, the first floating-point number is the first floating-point number in the floating-point number sequence, and the second floating-point number is the next floating-point number in the floating-point number sequence that is immediately adjacent to the first floating-point number.

14. The apparatus according to claim 12, characterized in that, The parallel processing module is further configured to determine a first difference between the first exponent and the first number of leading zeros, and use the first difference as the true exponent of the first floating-point number. Based on the true index and the second index, determine the first shift information of the first mantissa and the second shift information of the second mantissa; based on the first shift information and the second shift information, perform shift processing on the first mantissa and the second mantissa in parallel to obtain the first shifted mantissa and the second shifted mantissa.

15. The apparatus according to claim 12, characterized in that, The target floating-point number superposition result includes the target floating-point superposition number and the number of leading zeros of the third mantissa of the target floating-point superposition number; the floating-point number processing device further includes a format conversion module for converting the format of the target floating-point number superposition result to obtain a standard floating-point superposition number with a standard floating-point number format.

16. The apparatus according to claim 15, characterized in that, The format conversion module is further configured to normalize the target floating-point superposition number according to the number of leading zeros of the third mantissa of the target floating-point superposition number, to obtain a normalized floating-point superposition number; and to round the normalized floating-point superposition number to obtain a standard floating-point superposition number.

17. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 11.

18. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 11.

19. A computer program product, comprising a computer program, characterized in that, When executed by a processor, the computer program implements the steps of the method described in any one of claims 1 to 11.

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