信号控制电路、信号控制方法和半导体存储器
CN117012244BActive Publication Date: 2026-07-17CHANGXIN MEMORY TECH INC
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2022-04-29
- Publication Date
- 2026-07-17
AI Technical Summary
Technical Problem
Existing dynamic random access memory (DRAM) cannot completely prevent data errors when subjected to Row Hammer attacks, even with periodic refresh and supplementary refresh operations.
Method used
The generation module accumulates the number of activation operations. When the accumulated value reaches or exceeds the first preset value, a blocking signal is output. The logic module receives and blocks the activation operation signal to prevent further activation operations. The refresh operation is optimized by combining periodic refresh and refresh management signals.
Benefits of technology
It effectively mitigates data errors caused by Row Hammer attacks, while reducing circuit power consumption and improving the reliability and stability of DRAM.
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Smart Images
Figure CN117012244B_ABST
Abstract
本公开实施例提供了一种信号控制电路、信号控制方法和半导体存储器，该信号控制电路包括：生成模块，用于累计激活操作的执行次数，若累计值大于或等于第一预设值，则输出阻断信号；逻辑模块，用于接收激活操作信号和阻断信号，若接收到阻断信号，则阻断激活操作信号的输出；若未收到阻断信号，则输出激活操作信号。这样，信号控制电路能够对激活操作的执行次数进行累计，在累计值大于或等于第一预设值时，通过阻断信号阻断新的激活操作信号，避免激活操作的再次发生，能够缓解行锤攻击带来的问题。
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