Pwm control method and system for low voltage ride through of three-level converter

Abstract

The application discloses a PWM control method and system for low-voltage ride-through of a three-level converter, directly injects zero sequence components into three-phase modulation waves, and does not need to perform table lookup and trigonometric function calculation, so that the execution efficiency is high. According to the modulation method of the application, the behavior that each phase directly converts from a P state to an N state without passing through an O state is avoided, and the excessive action of a switching tube is avoided to increase additional loss and possibly cause a direct current through phenomenon. The PWM control method for low-voltage ride-through of the three-level converter of the application realizes loss balance of the switching tube, discontinuous modulation reduces the overall loss of the three-level converter, improves the efficiency, and simultaneously considers balance control of a direct current midpoint voltage to ensure the quality of an output waveform.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a PWM control method for low-voltage ride-through in a three-level converter. Background Technology

[0002] TNPC converters (three-level converters) can be used to connect AC power generation units and distribution networks, receive new energy power generation or fill load power gaps, realize the absorption of new energy and ensure the power supply of loads, and provide a certain amount of reactive power support, i.e., low voltage ride-through, when the distribution network is subjected to disturbances or faults, improve voltage drop, and maintain the stable operation of the distribution network system.

[0003] Under low voltage ride-through conditions, the voltage at the AC output of the TNPC is low, resulting in a low modulation ratio. When the modulation ratio is low, under traditional PWM modulation, the TNPC suffers from uneven losses between the inner and outer transistors. The effective current carried by the inner transistor is higher than that of the outer transistor, leading to significant differences in the loss distribution between the inner and outer transistors and the junction temperature of the switching transistors. This is a major cause of power device failures in the converter. At the same time, the DC capacitor voltage of the TNPC needs to be kept balanced at all times to maintain the normal operation of the converter. Traditional SVPWM modulation cannot meet these requirements simultaneously. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a PWM control method and system for low voltage ride-through of a three-level converter, which addresses the shortcomings of the existing technology and achieves loss balance of the switching transistors.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a PWM control method for low-voltage ride-through of a three-level converter, comprising the following steps:

[0006] S1, Acquire the phase current i of the three-level converter a i b i c ;change i a i b i c Converted into a current signal i in a two-phase stationary coordinate system α i β According to the active power command value P * and reactive power command value Q * The instantaneous active current i is calculated. * d and reactive current reference command value i * q The instantaneous active current i * d and reactive current reference command value i * qConverted to current signal reference value i in two-phase stationary coordinate system * α i * β ;

[0007] S2, set the current signal reference value i * α i * β With current signal i α i β After subtracting the corresponding values, the difference is sent to the PR controller to obtain the control voltage u. * α u * β ;

[0008] S3, control voltage u * α u * β Converted to a three-phase voltage modulation signal u a u b u c ;

[0009] S4, Three-phase voltage modulation signal u based on a three-level converter a u b u c The spatial vector diagram of the three-level converter is first divided into six large sectors, I-VI. Each large sector is then further divided into multiple numbered smaller sectors. The control voltage u is then... * α u * β Vector synthesis is performed to obtain the reference vector V. ref Determine its sector n and the reference vector V. ref The angle σ between the α axis and the α axis is used to obtain the three-phase modulated wave u through LBDPWM control. * a u * b u * c and the corresponding carrier wave, for the three-phase modulated wave u * a u * b u * c The corresponding carrier wave is modulated using SVPWM to obtain the switching control signal for the three-level converter.

[0010] In step S4, the formula for calculating the included angle σ is:

[0011] In step S5, the carrier acquisition process includes:

[0012] Calculate the absolute value of the voltage difference between the two DC capacitors in a three-level converter |u diff |;

[0013] Judgment | u diff | Has the deviation threshold U been exceeded? DZ If the threshold is not exceeded, then the three-phase modulated wave u is obtained. * a u * b u * c The phase with the largest median is denoted as u. max Phase, determine u max Is the phase current of the phase equal to i? a i b i c If the maximum value in is, then u max The phase clamp is in the P state, that is, the phase switch transistor S. x1 and S x2 On, S x3 and S x4 When turned off, the corresponding three-phase modulation wave is -u. * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc U dc This is the DC side voltage; if u max The phase current of a phase is not equal to i a i b i c The maximum value in the value is used to obtain the three-phase modulated wave u. * a u * b u * c The phase with the smallest median is denoted as u. min Phase, determine u min Phase current i umin Is it equal to the phase current i? a i b i c If the maximum value in is, then u min When the phase clamp is in the N state, the corresponding modulation wave is -u. * a -0.5Udc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0; if not, determine u min Phase current i umin Is it equal to the phase current i? a i b i c If it is the middle value, then u min When the phase clamp is in the N state, the corresponding modulation wave is -u. * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0; if it is not an intermediate value, then u min When the phase clamp is in state P, the corresponding three-phase modulation wave is -u. * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ;

[0014] if |u diff |Exceeding the limit U DZ Then determine whether the value of n%2 is equal to 1:

[0015] If so, then and u diff ·i umax When >0, u min When the phase clamp is in the N state, the corresponding modulation wave is -u. * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dcThe corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0; otherwise, u min When the phase clamp is in state P, the corresponding three-phase modulation wave is -u. * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc n%2 means taking the remainder of n with respect to 2;

[0016] like and u diff ·i umin >0, then u min When the phase clamp is in state P, the corresponding three-phase modulation wave is -u. * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc Otherwise, u min When the phase clamp is in the N state, the corresponding modulation wave is -u. * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0017] If the value of n%2 is not equal to 1:

[0018] Then when and u diff ·i umin When >0, u max When the phase clamp is in state P, the corresponding three-phase modulation wave is -u. * a +0.5U dc -u * b +0.5U dc -u* c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc Otherwise, u max When the phase clamp is in the N state, the corresponding modulation wave is -u. * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0019] like and u diff ·i umin >0, will u min When the phase clamp is in the N state, the corresponding modulation wave is -u. * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0; otherwise, u max When the phase clamp is in state P, the corresponding three-phase modulation wave is -u. * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ;

[0020] The clamping state causes the internal transistor S in the switching transistor to be normally controlled within a switching cycle. x2 S x3 The phase current is transferred to the outer tube S in the switching transistor. x1 S x4This achieves loss equalization. In the above steps, the carrier acquisition process does not employ space vector modulation; instead, zero-sequence components are directly injected into the three-phase modulated wave, eliminating the need for table lookups and trigonometric function calculations, resulting in high efficiency. Carrier modulation using this method avoids the behavior of each phase transitioning directly from the P state to the N state without passing through the O state, thus preventing excessive switching operations that could increase losses and potentially cause DC shoot-through.

[0021] The process of determining n includes: dividing the spatial vector diagram of the three-level converter into six large sectors, each large sector into multiple smaller sectors, and determining the control voltage signal u. * α u * β Adding them together yields the reference vector V. ref Determine the reference vector V ref The sector it is located in and its sector number, where the sector number is the value of n.

[0022] The present invention also provides a PWM control system for low-voltage ride-through of a three-level converter, comprising:

[0023] One or more processors;

[0024] A memory having stored one or more programs that, when executed by one or more processors, cause the one or more processors to perform the steps of the method described above.

[0025] The present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method described above.

[0026] Compared with the prior art, the beneficial effects of the present invention are as follows: the PWM control method for low voltage ride-through of the three-level converter of the present invention realizes the loss balance of the switching transistor, the discontinuous modulation reduces the overall loss of the three-level converter and improves efficiency, while taking into account the balanced control of the DC midpoint voltage to ensure the quality of the output waveform. Attached Figure Description

[0027] Figure 1 For TNPC topology;

[0028] Figure 2 This is a spatial vector diagram of the TNPC in an embodiment of the present invention;

[0029] Figure 3 This is an LBDPWM space vector clamping diagram according to an embodiment of the present invention;

[0030] Figure 4 The LBDPWM execution flow is shown in this embodiment of the invention.

[0031] Figure 5 This is a block diagram of LBDPWM control according to an embodiment of the present invention. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] Figure 1 This is a TNPC topology. Each phase arm of the TNPC bridge contains four switching transistors Sx1 to Sx4 and an anti-parallel diode D for each transistor. x1 ~D x4 Where x = a, b, c, i a i b i c It is the three-phase bridge arm current output by the converter, i o U is the midpoint current of the DC capacitor. dc For DC side voltage, i dc The current is the DC bus current, O is the midpoint of the DC side capacitor, C1 and C2 are the two DC side capacitors, C1 = C2 = C, and the voltage U between the two capacitors under normal conditions is... C1 =U C2 =U dc / 2, with point O as the DC midpoint reference point, the P state indicates the switching transistor S x1 and S x2 On, S x3 and S x4 When shut down, TNPC outputs U at the midpoint of each phase's bridge arm. dc / 2 level, N state indicates the switching transistor S x3 and S x4 On, S x1 and S x2 Shutdown, TNPC outputs -U at the midpoint of each phase's bridge arm. dc / 2 level, 0 state indicates that the switching transistor S x2 and S x3 On, S x1 and S x4 When turned off, the midpoint of each phase bridge arm of the TNPC outputs a 0 level.

[0034] Figure 2 This is a spatial vector diagram of TNPC. It contains 27 vectors, divided into zero vectors (length 0), small vectors (length 1 / 3), and... The median vector and 2 / 3 of the length vector, space vector Figure 1 It is divided into six major sectors, I-VI, and each major sector contains six minor sectors numbered 1-6. Among them, the sectors numbered 1 and 2 are low modulation ratio regions.

[0035] Figure 3 This is the space vector clamping diagram for LBDPWM (Loss Balanced Discontinuous Modulation Strategy). Each large sector low modulation ratio region has two clamping switching sequences: xP represents that the x-phase bridge arm is always clamped in the P state during a switching cycle; xN represents that the x-phase bridge arm is always clamped in the N state during a switching cycle; while max and min represent the clamped phases being the phases with the maximum and minimum instantaneous values ​​of the current modulation wave. Using the xP or xN clamping mode, the phase current originally borne by the inner transistor of the switching transistor is transferred to the outer transistor during a switching cycle, thereby achieving loss balance.

[0036] Figure 4 This is a flowchart of the LBDPWM execution process. max i umax The phase with the largest instantaneous value of the modulated wave and its current, u min i umin The phase with the smallest modulated wave and its current, u diff U is the voltage difference between the DC capacitors. DZ It is the set DC midpoint voltage offset threshold. When the capacitor voltage difference exceeds U... DZ Prioritize balancing the midpoint voltage; otherwise, prioritize balancing losses and reducing losses.

[0037] Figure 5 This is the LBDPWM control block diagram. It samples the phase current i of the TNPC. a i b i c Clark transform will i a i b i c Converted to current signal i in a two-phase stationary coordinate system α i β According to the active power command value P * and reactive power command value Q * The instantaneous active current i is calculated. * d and reactive current reference command value i * q The instantaneous active current i is transformed according to the 2s / 2r transformation. * d and reactive current reference command value i * q Converted to current signal reference value i in two-phase stationary coordinate system * α i *β The current reference command value i * α i * β With actual value i α i β The difference is then fed into the PR controller to achieve zero steady-state error tracking of the AC reference current command value, thus obtaining the control voltage u. * α u * β The control voltage signal u is converted through Clark inverse transform. * α u * β Converted into a three-phase voltage modulation signal u a u b u c Three-phase space voltage vector u based on TNPC a u b u c The TNPC spatial vector map is first divided into six large sectors, I-VI. Each large sector is further divided into smaller sectors numbered 1-6. Sectors numbered 1 and 2 are low modulation ratio regions. The control voltage u... * α u * β Vector synthesis is performed to obtain the reference vector V. ref Determine its sector N and reference vector V. ref The angle σ between the α axis and the α axis is finally obtained by LBDPWM control to obtain the three-phase modulated wave u. * a u * b u * c and the corresponding carrier wave.

[0038] The PWM control method for low-voltage ride-through of a three-level converter according to embodiments of the present invention includes a loss-balanced discontinuous modulation strategy (LBDPWM) and a DC capacitor midpoint voltage balancing strategy. The main implementation process includes:

[0039] S1, Current signal acquisition unit, used to receive the phase current i of the TNPC. a i b i c ;

[0040] S2, Clark transform unit, used to transform i a i b i c Converted to current signal i in a two-phase stationary coordinate system α iβ ;

[0041] S3, Power Calculation Unit, based on the active power command value P * and reactive power command value Q * The instantaneous active current i is calculated. * d and reactive current reference command value i * q ;

[0042] S4, 2s / 2r conversion unit, is used to convert instantaneous active current i * d and reactive current reference command value i * q Converted to current signal reference value i in two-phase stationary coordinate system * α i * β ;

[0043] S5, set the current reference command value i * α i * β With actual value i α i β The difference is then fed into the PR controller to achieve zero steady-state error tracking of the AC reference current command value, thus obtaining the control voltage u. * α u * β ;

[0044] S6, Clark inverse transformer unit, converts the control voltage signal u * α u * β Converted into a three-phase voltage modulation signal u a u b u c ;

[0045] S7, Voltage Sector Judgment Unit, based on the three-phase space voltage vector u of TNPC. a u b u c The TNPC spatial vector diagram is first divided into six large sectors, I-VI, each with a central angle of 60°. Each large sector is further divided into smaller sectors numbered 1-6. Sectors numbered 1 and 2 are low modulation ratio regions. This embodiment of the invention only addresses the case of uneven switching transistor losses in the low modulation ratio region, and adjusts the control voltage u... * α u * β Perform vector synthesis (i.e., u)* α with u * β (Add them together) to obtain the reference vector V ref Determine its sector and sector number n (n = 1, 2), and reference vector V. ref The angle σ between the α axis and the α axis, the formula for calculating σ is as follows:

[0046] S8. Calculate the absolute value of the voltage difference between two DC capacitors C1 and C2, |u diff |;

[0047] S9, LBDPWM control unit, obtains three-phase modulated wave u * a u * b u * c and the corresponding carrier, specifically including;

[0048] S9.1, Judgment |u diff | Has the deviation threshold U been exceeded? DZ If the threshold is not exceeded, then balancing and loss reduction are implemented, specifically including:

[0049] S9.2, Find u in the three-phase modulation wave * a u * b u * c The phase with the largest median is denoted as: u max (u max =a, b, c), determine the phase with the largest instantaneous value of the voltage modulation signal u. max Phase current i umax Is it equal to the phase current i? a i b i c The maximum value in;

[0050] If so, the phase with the largest instantaneous value of the voltage modulation signal u max The clamp is in state P, i.e., the phase arm S. x1 and S x2 On, S x3 and S x4 (x = a, b, c), output U at the midpoint of the bridge arm dc / 2 level, at which point the corresponding three-phase modulation wave is -u * a +0.5U dc -u * b +0.5U dc -u* c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ;

[0051] Among them, U dc This is the DC side voltage;

[0052] S9.3 If not, find u in the three-phase modulation wave. * a u * b u * c The phase with the smallest median is denoted as: u min (u min =a, b, c), determine the phase with the smallest instantaneous value of the voltage modulation signal u. min Phase current i umin Is it equal to the phase current i? a i b i c The maximum value in;

[0053] If so, the phase with the smallest instantaneous value of the voltage modulation signal u min Clamped in the N state, i.e., the phase bridge arm switch S x3 and S x4 On, S x1 and S x2 Shutdown, bridge arm midpoint output -U dc / 2 level, the corresponding modulation wave is -u * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0054] S9.4 If not, determine the phase u with the smallest instantaneous value of the voltage modulation signal. min Phase current i umin Is it equal to the phase current i? a i b i c The middle value in:

[0055] If so, the phase with the smallest instantaneous value of the voltage modulation signal u min Clamped in the N state, i.e., the phase bridge arm switch S x3 and S x4 On, Sx1 and S x2 Shutdown, bridge arm midpoint output -U dc / 2 level, the corresponding modulation wave is -u * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0056] If not, the phase with the largest instantaneous value of the voltage modulation signal u max The switch is clamped in the P state, i.e., the phase bridge arm switch S. x1 and S x2 On, S x3 and S x4 Shutdown, bridge arm midpoint output U dc / 2 level, at which point the corresponding three-phase modulation wave is -u * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ;

[0057] if |u diff |Exceeding the limit U DZ Therefore, midpoint voltage balancing includes:

[0058] S9.5. Determine if the value of n%2 is equal to 1. If so, perform the following judgment:

[0059]

[0060] If so, continue with the judgment:

[0061] u diff ·i umax >0;

[0062] If so, the phase with the smallest instantaneous value of the voltage modulation signal u min Clamped in the N state, i.e., the phase bridge arm switch S x3 and S x4 On, S x1 and S x2 Shutdown, bridge arm midpoint output -Udc / 2 level, the corresponding modulation wave is -u * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0063] If not, the phase with the largest instantaneous value of the voltage modulation signal u max The switch is clamped in the P state, i.e., the phase bridge arm switch S. x1 and S x2 On, S x3 and S x4 Shutdown, bridge arm midpoint output U dc / 2 level, at which point the corresponding three-phase modulation wave is -u * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ;

[0064] S9.6, if Execution judgment:

[0065] u diff ·i umin >0;

[0066] If so, the phase with the largest instantaneous value of the voltage modulation signal u max The switch is clamped in the P state, i.e., the phase bridge arm switch S. x1 and S x2 On, S x3 and S x4 Shutdown, bridge arm midpoint output U dc / 2 level, at which point the corresponding three-phase modulation wave is -u * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc;

[0067] If not, the phase with the smallest instantaneous value of the voltage modulation signal u min Clamped in the N state, i.e., the phase bridge arm switch S x3 and S x4 On, S x1 and S x2 Shutdown, bridge arm midpoint output -U dc / 2 level, the corresponding modulation wave is -u * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0068] S9.7 If the value of N%2 is not equal to 1, continue to perform the judgment:

[0069]

[0070] If so, continue with the judgment:

[0071] u diff ·i umin >0;

[0072] If so, the phase with the largest instantaneous value of the voltage modulation signal u max The clamp is in the P state, i.e., the phase bridge arm switch S is clamped. x1 and S x2 On, S x3 and S x4 Shutdown, bridge arm midpoint output U dc / 2 level, at which point the corresponding three-phase modulation wave is -u * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dc The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ;

[0073] If not, the phase with the smallest instantaneous value of the voltage modulation signal u min Clamped in the N state, i.e., the phase bridge arm switch S x3 and S x4 On, S x1 and Sx2 Shutdown, bridge arm midpoint output -U dc / 2 level, the corresponding modulation wave is -u * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0074] S9.8, if Execution judgment:

[0075] u diff ·i umin >0

[0076] If so, the phase with the smallest instantaneous value of the voltage modulation signal u min Clamped in the N state, i.e., the phase bridge arm switch S x3 and S x4 On, S x1 and S x2 Shutdown, bridge arm midpoint output -U dc / 2 level, the corresponding modulation wave is -u * a -0.5U dc -u * b -0.5U dc -u * c -0.5U dc The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0;

[0077] If not, the phase with the largest instantaneous value of the voltage modulation signal u max The clamp is in the P state, i.e., the phase bridge arm switch S is clamped. x1 and S x2 On, S x3 and S x4 Shutdown, bridge arm midpoint output U dc / 2 level, at which point the corresponding three-phase modulation wave is -u * a +0.5U dc -u * b +0.5U dc -u * c +0.5U dcThe corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ;

[0078] S10, SVPWM modulation unit, obtains the switching transistor control signal S a S b S c And send it to TNPC;

[0079] Example 2

[0080] Embodiment 2 of the present invention provides a terminal device corresponding to Embodiment 1 above. The terminal device can be a processing device for a client, such as a mobile phone, a laptop, a tablet computer, a desktop computer, etc., to execute the method of the above embodiments.

[0081] The terminal device in this embodiment includes a memory, a processor, and a computer program stored in the memory; the processor executes the computer program in the memory to implement the steps of the method in Embodiment 1 described above.

[0082] In some implementations, the memory may be high-speed random access memory (RAM), and may also include non-volatile memory, such as at least one disk storage device.

[0083] In other implementations, the processor can be any type of general-purpose processor, such as a central processing unit (CPU) or a digital signal processor (DSP), and there is no limitation here.

[0084] Example 3

[0085] Embodiment 3 of the present invention provides a computer-readable storage medium corresponding to Embodiment 1 above, on which a computer program / instructions are stored. When the computer program / instructions are executed by a processor, they implement the steps of the method of Embodiment 1 above.

[0086] A computer-readable storage medium can be a tangible device that holds and stores instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination thereof.

[0087] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of this application can be implemented in various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0088] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0089] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0090] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0091] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A PWM control method for low-voltage ride-through in a three-level converter, characterized in that, Includes the following steps: S1. Acquire the phase current of the three-level converter. i b i c ;change i a i b i c Converted into a current signal i in a two-phase stationary coordinate system α i β According to the active power command value and reactive power command value The instantaneous active current was calculated. and reactive current reference command value ; Instantaneous active current and reactive current reference command value Converted to current signal reference value in two-phase stationary coordinate system , ; S2, Set the current signal reference value , With current signal i α i β After subtraction, the difference is sent to the PR controller to obtain the control voltage. , ; S3, control voltage , Converted to a three-phase voltage modulation signal u a u b u c ; S4, Three-phase voltage modulation signal u based on a three-level converter a u b u c The spatial vector diagram of the three-level converter is first divided into six large sectors, I-VI. Each large sector is then further divided into multiple numbered smaller sectors, and the control voltage is... , Vector synthesis is performed to obtain the reference vector V. ref Determine its sector n and the reference vector V. ref Angle with α axis Three-phase modulated wave is obtained through LBDPWM control. , , and the corresponding carrier wave, for the three-phase modulated wave , , SVPWM modulation is performed with the corresponding carrier to obtain the switching control signal of the three-level converter; The carrier acquisition process includes: Calculate the absolute value of the voltage difference between the two DC capacitors in a three-level converter |u diff |; Judgment | u diff | Has the deviation threshold U been exceeded? DZ If the threshold is not exceeded, then the three-phase modulated wave is obtained. , , The phase with the largest median is denoted as u. max Phase, determine u max Is the phase current of the phase equal to i? a i b i c If the maximum value in is, then u max When the phase clamp is in state P, the corresponding three-phase modulation wave is: , , The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc U dc This is the DC side voltage; if u max The phase current of a phase is not equal to i a i b i c The maximum value in the range is used to obtain the three-phase modulated wave. , , The phase with the smallest median is denoted as u. min Phase, determine u min Phase current i umin Is it equal to the phase current i? a i b i c If the maximum value in is, then u min When the phase clamp is in the N state, the corresponding modulation wave is , , The corresponding carrier waveform is an inverted V shape, with a range of [missing information]. If not, determine u min Phase current i umin Is it equal to the phase current i? a i b i c If it is the middle value, then u min When the phase clamp is in the N state, the corresponding modulation wave is , , The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0; if it is not the middle value, then u min When the phase clamp is in state P, the corresponding three-phase modulation wave is: , , The corresponding carrier waveform is V-shaped, with a range of [missing information]. ; if |u diff |Exceeds threshold U DZ Then determine if the value of n%2 is equal to 1: If so, then ,and At that time, u min When the phase clamp is in the N state, the corresponding modulation wave is , , The corresponding carrier waveform is an inverted V shape, with a range of [missing information]. Otherwise, u min When the phase clamp is in state P, the corresponding three-phase modulation wave is: , , The corresponding carrier waveform is V-shaped, with a range of [missing information]. i umax For u max Phase current of the phase; like ,and Then u min When the phase clamp is in state P, the corresponding three-phase modulation wave is: , , The corresponding carrier waveform is V-shaped, with a range of [missing information]. Otherwise, u min When the phase clamp is in the N state, the corresponding modulation wave is , , The corresponding carrier waveform is an inverted V-shape, ranging from -0.5U. dc ~0; n%2 means taking the remainder of n with respect to 2; If the value of n%2 is not equal to 1: Then when ,and At that time, u max When the phase clamp is in state P, the corresponding three-phase modulation wave is: , , The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc Otherwise, u max When the phase clamp is in the N state, the corresponding modulation wave is , , The corresponding carrier waveform is an inverted V shape, with a range of [missing information]. ; like ,and , will u min When the phase clamp is in the N state, the corresponding modulation wave is , , The corresponding carrier waveform is an inverted V shape, with a range of [missing information]. Otherwise, u max When the phase clamp is in state P, the corresponding three-phase modulation wave is: , , The corresponding carrier waveform is V-shaped, ranging from 0 to 0.5U. dc ; n = 1 or 2; The process of determining n includes: dividing the spatial vector diagram of the three-level converter into six large sectors, and further dividing each large sector into smaller sectors numbered 1-6. Sectors numbered 1 and 2 are low modulation ratio regions. To address the uneven switching losses in these low modulation ratio regions, the control voltage signal... , Adding them together yields the reference vector V. ref Determine the reference vector V ref The sector it is located in and its sector number, where the sector number is the value of n.

2. The PWM control method for low-voltage ride-through of a three-level converter according to claim 1, characterized in that, In step S4, the included angle The calculation formula is: .

3. A PWM control system for low-voltage ride-through of a three-level converter, characterized in that, include: One or more processors; A memory having stored one or more programs that, when executed by one or more processors, cause the one or more processors to perform the steps of the method of claim 1 or 2.

4. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed by a processor, implements the steps of the method as described in claim 1 or 2.

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