Printed circuit board and method for manufacturing the same

Abstract

The application discloses a printed circuit board and a preparation method thereof, wherein the build-up method of the printed circuit board comprises the following steps: obtaining a to-be-built-up board and a memory metal layer; sequentially performing pretreatment and chemical roughening treatment on a target side of the memory metal layer to obtain a treated memory metal layer; stacking at least one dielectric layer on at least one side of the to-be-built-up board, and placing the target side of the memory metal layer on the side of the dielectric layer away from the to-be-built-up board, and performing compression treatment to build up the to-be-built-up board; wherein the pretreatment comprises physical roughening treatment and / or electroplating primer layer treatment. In the foregoing manner, the application can improve the bonding force between the memory metal layer and the dielectric layer, reduce the delamination and board explosion of the printed circuit board, and improve the structural stability and reliability of the printed circuit board.

Description

Technical Field

[0001] This invention relates to the technical field of printed circuit boards, and in particular to a printed circuit board and its preparation method. Background Technology

[0002] PCB (Printed Circuit Board), also known as printed circuit board, is a widely used and important electronic component. It serves as the support for electronic components and also as the carrier for the electrical connections of electronic components.

[0003] In multilayer printed circuit boards, conductive metal layers are insulated from each other by dielectric layers. It is necessary to ensure the bonding strength between the metal layers and the insulating dielectric layers. During the manufacturing process of printed circuit boards, the surface of the metal layers is roughened to enhance the bonding strength between the metal layers and the insulating dielectric layers and prevent delamination / board bursting during use.

[0004] Because shape memory metals have "corrosion resistance" properties, the roughening methods currently used are difficult to meet the surface roughening requirements, and in some scenarios, the bonding force between the shape memory metal and the insulating layer may not meet the standards. Summary of the Invention

[0005] This invention provides a printed circuit board and its manufacturing method to solve the problem of insufficient bonding between shape memory metal and insulating dielectric in printed circuit boards.

[0006] To address the aforementioned technical problems, this invention provides a method for adding layers to a printed circuit board, comprising: obtaining a board to be added and a memory metal layer; sequentially performing pretreatment and chemical roughening treatment on the target side of the memory metal layer to obtain a treated memory metal layer; stacking at least one dielectric layer on at least one side of the board to be added, and placing the target side of the memory metal layer on the side of the dielectric layer away from the board to be added, and performing a lamination process to add layers to the board to be added; wherein the pretreatment includes physical roughening treatment and / or electroplating underlayer treatment.

[0007] The steps of performing pretreatment and chemical roughening treatment on the target side of the memory metal layer to obtain the treated memory metal layer include: performing physical roughening treatment on the target side of the memory metal layer; depositing an underlayer on the target side of the physically roughened memory metal layer; and performing chemical roughening treatment on the underlayer of the target side of the memory metal layer to obtain the treated memory metal layer.

[0008] The step of depositing an underlayer on the target side of the physically roughened shape memory metal layer includes: flash plating the target side of the physically roughened shape memory metal layer to deposit an underlayer on the target side; wherein the thickness of the underlayer ranges from 3 to 9 micrometers.

[0009] The step of physically roughening the target side of the memory metal layer includes: grinding, using a ceramic brush, or sandblasting the target side of the memory metal layer; wherein the depth of grinding or using a ceramic brush is 5-15 micrometers, the depth of sandblasting is 2-15 micrometers, and the depth of grinding, using a ceramic brush, or sandblasting is less than one-fifth of the thickness of the memory metal layer.

[0010] The step of physically roughening the target side of the memory metal layer includes: laser drilling the target side of the memory metal layer to uniformly form an array of holes on the target side; wherein the diameter of the holes processed by the laser drilling ranges from 25 to 65 micrometers, the depth ranges from 1.5 to 15 micrometers, and the depth of the laser drilling is less than one-fifth of the thickness of the memory metal layer.

[0011] The step of physically roughening the target side of the memory metal layer includes: performing laser depth control processing and / or water jet depth control processing on the target side of the memory metal layer to uniformly form depth control marks on the target side, including wavy marks, oblique marks, or grid marks; wherein the width range of the laser depth control processing and / or water jet depth control processing is 25-75 micrometers, the depth range is 3-15 micrometers, and the depth of the laser depth control processing and / or water jet depth control processing is less than one-fifth of the thickness of the memory metal layer.

[0012] The step of chemically roughening the underlayer on the target side of the memory metal layer to obtain the processed memory metal layer includes: using an etching solution with sodium persulfate, hydrogen peroxide, hydrochloric acid, sodium hydroxide, or ammonia water system to perform micro-etching, browning, or blackening treatment on the underlayer on the target side of the memory metal layer to perform chemical roughening treatment, thereby obtaining the processed memory metal layer.

[0013] The step of adding layers to the board to be added by stacking at least one dielectric layer on at least one side of the board to be added, and placing the target side of the shape memory metal layer on the side of the dielectric layer away from the board to be added, and performing a lamination process, includes: when the added layer board to be added meets the layer number requirement of the printed circuit board, the added layer board to be added is used as the printed circuit board; when the added layer board to be added does not meet the layer number requirement of the printed circuit board, the added layer board to be added is used as a new added layer board to be added, and the added layers are continued on the new added layer board to be added until the layer number requirement of the printed circuit board is met, so as to obtain the printed circuit board.

[0014] The shape memory metal layer includes one or more of the following: copper-titanium alloy, copper-titanium-iron alloy, copper-tin-phosphorus alloy, copper-zinc-tin alloy, copper-zinc-silicon alloy, and copper-tin alloy.

[0015] To solve the above-mentioned technical problems, the present invention provides a printed circuit board, which is prepared by the layer addition method of any of the above-mentioned printed circuit boards.

[0016] To address the aforementioned technical problems, the layer addition method for printed circuit boards of the present invention utilizes physical roughening treatment. This involves first roughening the target side to increase its surface area and surface three-dimensionality, and then damaging the target side surface. Next, chemical roughening treatment is applied to the roughened and damaged target side, thereby expanding the area of ​​chemical roughening, reducing the difficulty of chemical roughening, increasing the depth of chemical roughening, and ultimately improving the effect of chemical roughening. Furthermore, by pre-plating a metal underlayer onto the target side of the shape memory metal layer, the subsequent chemical roughening treatment can directly roughen the underlayer, thus circumventing the "corrosion resistance" characteristic of the shape memory metal layer. Increasing the roughness of the underlayer improves the adhesion between the target side of the shape memory metal layer and the dielectric layer. Through these pretreatment methods, auxiliary operations are performed to improve the roughening effect of the chemical roughening treatment, reduce the occurrence of delamination and board bursting phenomena in the printed circuit board, and improve the structural stability and reliability of the printed circuit board. Attached Figure Description

[0017] Figure 1 This is a schematic flowchart of an embodiment of the printed circuit board layer addition method provided by the present invention;

[0018] Figure 2 This is a schematic flowchart of another embodiment of the layer addition method for printed circuit boards provided by the present invention;

[0019] Figure 3 yes Figure 2 A schematic diagram of the printed circuit board layer addition process in the embodiment;

[0020] Figure 4 This is a schematic diagram illustrating the effect of a target-side grinding brush or ceramic brush plate with a memory metal layer.

[0021] Figure 5 This is a schematic diagram illustrating the effect of a target side sandblasting treatment of a shape memory metal layer in one embodiment.

[0022] Figure 6 This is a schematic diagram illustrating the effect of a target-side laser drilling treatment of a shape memory metal layer according to an embodiment.

[0023] Figure 7 This is a schematic diagram of the effect of the first embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer;

[0024] Figure 8 This is a schematic diagram of the effect of the second embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer;

[0025] Figure 9 This is a schematic diagram of the effect of the third embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer;

[0026] Figure 10 This is a schematic diagram of the effect of the fourth embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer;

[0027] Figure 11 This is a schematic diagram illustrating the effect of a particular embodiment after laser drilling, laser depth control, and / or water jet depth control on the target side of the shape memory metal layer.

[0028] Figure 12 This is a schematic diagram of a printed circuit board according to an embodiment of the present invention. Detailed Implementation

[0029] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0030] It should be noted that if the embodiments of the present invention involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0031] Furthermore, if the embodiments of this invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0032] Please see Figure 1 , Figure 1 This is a schematic flowchart of an embodiment of the printed circuit board layer addition method provided by the present invention.

[0033] Step S11: Obtain the board to be added and the memory metal layer.

[0034] The board to be added to may include a single-layer board or a multi-layer board that has already been added to but still needs to be added to. That is, the layer addition method of the printed circuit board in this embodiment can be applied to any layer addition step in the printed circuit board manufacturing process.

[0035] Shape memory metal layers possess properties such as corrosion resistance, strong mechanical properties, thermal non-uniformity, high sensitivity, and high temperature resistance. Using shape memory metal layers as conductive lines in printed circuit boards can improve the structural stability and reliability of the conductive lines, thereby enhancing the reliability of the printed circuit board.

[0036] Step S12: The target side of the memory metal layer is pretreated and chemically roughened in sequence to obtain the treated memory metal layer.

[0037] The target side of the memory metal layer is the side where the memory metal needs to be bonded to the dielectric layer. It can be one side or both sides of the memory metal layer, depending on the actual needs.

[0038] The pretreatment includes physical roughening and / or electroplating undercoat treatment.

[0039] In a specific application scenario, the target side of the memory metal layer can be subjected to physical roughening and chemical roughening treatments in sequence to obtain the processed memory metal layer.

[0040] Physical roughening treatments can be achieved through one or more of the following methods: abrasive brushing, ceramic brushing, sandblasting, laser drilling, laser depth control, and waterjet depth control. Chemical roughening treatments can include etching using etching solutions.

[0041] By first physically roughening the memory metal layer to roughen the target side, increasing its surface area and three-dimensionality, and damaging its surface, and then chemically roughening the roughened and damaged target side, the area of ​​chemical roughening is expanded, the difficulty of chemical roughening is reduced, the depth of chemical roughening is increased, and the effect of chemical roughening is improved. In this embodiment, by combining physical and chemical roughening treatments on the target side of the memory metal layer, the chemical roughening treatment can improve its own roughening effect by leveraging the results of physical roughening, thereby improving the bonding force between the memory metal layer and the dielectric layer. Furthermore, the dual roughening treatment of the memory metal in this embodiment can further improve the bonding force between the memory metal layer and the dielectric layer.

[0042] In a specific application scenario, the target side of the memory metal layer is subjected to electroplating as an underlayer treatment and chemical roughening treatment in sequence to obtain the treated memory metal layer.

[0043] Electroplating undercoat treatment involves pre-plating a metal undercoat layer onto the target side of the shape memory metal layer. This allows subsequent chemical roughening treatment to directly roughen the undercoat layer, thereby circumventing the "corrosion-resistant" properties of the shape memory metal layer. By increasing the roughness of the undercoat layer, the bonding force between the target side of the shape memory metal layer and the dielectric layer is improved.

[0044] In a specific application scenario, the target side of the shape memory metal layer can be subjected to physical roughening, electroplating undercoating, and chemical roughening sequentially to obtain the treated shape memory metal layer. This combines the advantages of the two pretreatments mentioned above to improve the adhesion between the target side of the shape memory metal layer and the dielectric layer. Specifically, physical roughening can improve the adhesion between the shape memory metal layer and the undercoating, while chemical roughening can improve the adhesion between the undercoating and the dielectric layer. This approach avoids the "corrosion resistance" characteristic of the shape memory metal layer by increasing the roughness of the undercoating to enhance the adhesion between the target side of the shape memory metal layer and the dielectric layer.

[0045] This step, performed using the pretreatment methods described above, is an auxiliary process prior to the chemical roughening treatment, aiming to improve the roughening effect of the chemical roughening process.

[0046] Step S13: At least one dielectric layer is stacked on at least one side of the board to be added, and the target side of the memory metal layer is placed on the side of the dielectric layer away from the board to be added, and a lamination process is performed to add layers to the board to be added.

[0047] The dielectric layer may include one or more insulating materials such as prepreg, epoxy resin, polyester resin (PET), polyimide, polyimide, polycarbonate (PC), bismaleimide triazine (BT), and ceramic matrix.

[0048] At least one dielectric layer is stacked on at least one side of the board to be added. If the side of the board to be added closest to the dielectric layer is also a shape memory metal layer, the shape memory metal layer on the side of the board to be added closest to the dielectric layer is also subjected to the above-mentioned roughening treatment to improve the bonding force between the board to be added and the dielectric layer.

[0049] The target side of the memory metal layer is placed on the side of the dielectric layer away from the board to be added, and a lamination process is performed to add a layer to the board. If the board still needs to be added after the addition, the addition method of this embodiment is continued to add layers to the board until the layer number requirement of the printed circuit board is met.

[0050] Through the above steps, the printed circuit board layer addition method of this embodiment obtains the board to be added and the memory metal layer; sequentially performs physical roughening treatment and / or electroplating undercoating treatment and chemical roughening treatment on the target side of the memory metal layer to obtain the treated memory metal layer; stacks at least one dielectric layer on at least one side of the board to be added, and places the target side of the memory metal layer on the side of the dielectric layer away from the board to be added, and performs a lamination treatment to add a layer to the board to be added, thereby utilizing physical roughening treatment to roughen the target side first, increasing the surface area and surface finish of the target side. The process involves roughening the surface of the target side by damaging its three-dimensionality, followed by chemical roughening treatment. This expands the roughening area, reduces the difficulty of the roughening process, increases its depth, and ultimately improves its effectiveness. Furthermore, a metal underlayer is pre-plated onto the target side of the shape memory metal layer. This allows subsequent chemical roughening to directly roughen the underlayer, thus mitigating the corrosion resistance of the shape memory metal layer. The increased roughness of the underlayer also enhances the adhesion between the target side of the shape memory metal layer and the dielectric layer. These pretreatment methods, acting as auxiliary processes, improve the roughening effect of the chemical roughening process, reduce delamination and board breakage on the printed circuit board, and improve the structural stability and reliability of the printed circuit board.

[0051] Please see Figure 2-3 , Figure 2 This is a schematic flowchart of another embodiment of the printed circuit board layer addition method provided by the present invention. Figure 3 yes Figure 2 A schematic diagram of the printed circuit board layer addition process in the embodiment.

[0052] Step S21: Obtain the board to be added and the memory metal layer.

[0053] This step is the same as step S11 in the aforementioned embodiment; please refer to the previous text.

[0054] The shape memory metal layer includes one or more of copper-based shape memory alloys such as copper-titanium alloy, copper-titanium-iron alloy, copper-tin-phosphorus alloy, copper-zinc-tin alloy, copper-zinc-silicon alloy, and copper-tin alloy, or other metal alloys.

[0055] Copper-based shape memory alloys possess properties such as corrosion resistance, strong mechanical properties, thermal non-uniformity, high sensitivity, and high temperature resistance.

[0056] Please see Figure 3 a. This embodiment uses the core board to be added as an example. When the core board to be added is another type of board, the method of adding layers is similar to this embodiment and will not be described again.

[0057] The board 13 to be added in this embodiment includes a base layer 12 and conductive circuit layers 11 respectively attached to opposite sides of the base layer 12.

[0058] This embodiment uses the double-sided addition of the layer to be added to the board 13 as an example for illustration. When the single-sided addition of the layer to be added to the board 13 is performed, the steps are similar and will not be repeated.

[0059] Step S22: Perform physical roughening treatment on the target side of the memory metal layer.

[0060] In a specific application scenario, physical roughening treatment can include brushing, ceramic brushing, or sandblasting. In this case, the target side of the shape memory metal layer is subjected to brushing, ceramic brushing, or sandblasting.

[0061] The depth range for abrasive brushes and ceramic brush plates is 5-15 micrometers, specifically 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, or 15 micrometers. The depth range for sandblasting is 2-15 micrometers, specifically 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, or 15 micrometers. Furthermore, the depth of abrasive brushes, ceramic brush plates, or sandblasting treatments must be less than one-fifth of the thickness of the shape memory metal layer before meeting the above depth ranges.

[0062] Brushing, ceramic brushing, or sandblasting within the aforementioned depth range can improve the roughness of the target side of the memory metal layer while avoiding the roughening process from affecting the structural stability and conductivity of the memory metal layer, thus ensuring the reliability of the memory metal layer.

[0063] Please see Figure 4 , Figure 4 This is a schematic diagram illustrating the effect of an embodiment of a target-side grinding brush or ceramic brush plate with a memory metal layer.

[0064] A grinding brush or ceramic brush plate forms grinding marks / brush marks 21 on the target side 20 of the memory metal layer. The grinding marks / brush marks 21 are evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0065] Please see Figure 5 , Figure 5 This is a schematic diagram illustrating the effect of a target side sandblasting treatment of the shape memory metal layer in one embodiment.

[0066] Sandblasting creates blast marks 22 on the target side 20 of the shape memory metal layer. The blast marks 22 are evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0067] In a specific application scenario, physical roughening can include laser drilling. Laser drilling is then performed on the target side of the shape memory metal layer to uniformly form an array of holes on that side.

[0068] The laser drilling process can achieve hole diameters ranging from 25 to 65 micrometers and depths ranging from 1.5 to 15 micrometers. Specific hole diameters can be 25, 28, 30, 32, 35, 37, 39, 40, 42, 44, 46, 48, 50, 51, 53, 57, 59, 60, 62, or 65 micrometers. Specific depths can be 1.5, 2.0, 4.5, 5.6, 7.8, 8.5, 9.2, 10, 10.5, 11.2, 12.5, 13.9, 14.5, or 15 micrometers. Furthermore, the depth achieved by laser drilling is less than one-fifth the thickness of the shape memory metal layer.

[0069] Laser drilling within the aforementioned depth range can improve the roughness of the target side of the memory metal layer while avoiding the roughening process from affecting the structural stability and conductivity of the memory metal layer, thus ensuring the reliability of the memory metal layer.

[0070] Please see Figure 6 , Figure 6 This is a schematic diagram illustrating the effect of a target-side laser drilling treatment of a shape memory metal layer.

[0071] A laser drill forms drill marks 23 on the target side 20 of the shape memory metal layer. The drill marks 23 are evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0072] In a specific application scenario, physical roughening can include laser depth control and / or water jet depth control. Laser depth control and / or water jet depth control are then performed on the target side of the shape memory metal layer to uniformly form depth control marks on the target side. These depth control marks include wavy marks, oblique marks, or mesh marks.

[0073] The width range of laser-controlled depth processing and / or waterjet-controlled depth processing is 25-75 micrometers, specifically 25, 28, 30, 32, 35, 37, 39, 40, 42, 44, 46, 48, 50, 51, 53, 57, 59, 60, 62, 65, 69, 71, 73, or 75 micrometers. The depth range of laser-controlled depth processing and / or waterjet-controlled depth processing is 3-15 micrometers, specifically 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, or 15 micrometers. Furthermore, the depth of laser-controlled depth processing and / or waterjet-controlled depth processing is less than one-fifth of the thickness of the shape memory metal layer.

[0074] Laser-guided depth control and / or waterjet-guided depth control within the aforementioned depth range can improve the roughness of the target side of the memory metal layer while avoiding the impact of roughening treatment on the structural stability and conductivity of the memory metal layer, thus ensuring the reliability of the memory metal layer.

[0075] Please see Figure 7 , Figure 7 This is a schematic diagram illustrating the effect of the first embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer.

[0076] A laser drill forms a beveled mark 24 on the target side 20 of the shape memory metal layer. The beveled marks 24 are evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0077] Please see Figure 8 , Figure 8 This is a schematic diagram illustrating the effect of the second embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer.

[0078] A laser drill forms wavy marks 25 on the target side 20 of the shape memory metal layer. The wavy marks 25 are evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0079] Please see Figure 9 , Figure 9 This is a schematic diagram illustrating the effect of the third embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer.

[0080] A laser drill forms a first grid pattern 26 on the target side 20 of the shape memory metal layer. The first grid pattern 26 is evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0081] Please see Figure 10 , Figure 10This is a schematic diagram illustrating the effect of the fourth embodiment after laser depth control processing and / or water jet depth control processing on the target side of the shape memory metal layer.

[0082] A laser drill forms a second mesh mark 27 on the target side 20 of the shape memory metal layer. The second mesh mark 27 is evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0083] Please see Figure 11 , Figure 11 This is a schematic diagram illustrating the effect of one embodiment after laser drilling, laser depth control, and / or water jet depth control on the target side of the shape memory metal layer.

[0084] A laser drill forms an array of V-shaped marks 28 on the target side 20 of the shape memory metal layer. The array of V-shaped marks 28 are evenly distributed on the target side 20 to uniformly improve the roughness of the target side 20.

[0085] In other application scenarios, the above physical roughening process can also uniformly form other traces on the target side of the memory metal layer, which are not limited here.

[0086] By first physically roughening the memory metal layer to roughen the target side, increasing its surface area and three-dimensionality, and damaging its surface, and then chemically roughening the roughened and damaged target side, the area of ​​chemical roughening is expanded, the difficulty of chemical roughening is reduced, the depth of chemical roughening is increased, and the effect of chemical roughening is improved. In this embodiment, by combining physical and chemical roughening treatments on the target side of the memory metal layer, the chemical roughening treatment can improve its own roughening effect by leveraging the results of physical roughening, thereby improving the bonding force between the memory metal layer and the dielectric layer. Furthermore, the dual roughening treatment of the memory metal in this embodiment can further improve the bonding force between the memory metal layer and the dielectric layer.

[0087] Furthermore, this step increases the surface roughness of the memory metal layer, which helps to enhance the bonding force between the substrate and the memory metal layer in subsequent steps.

[0088] Step S23: Plate an underlayer on the target side of the memory metal layer after physical roughening treatment.

[0089] A thin copper layer is electroplated onto the target side of the physically roughened shape memory metal layer to form an underlayer. Specifically, flash plating can be performed on the target side of the physically roughened shape memory metal layer to form an underlayer.

[0090] Since the target side has been physically roughened, the bonding force between the flash-plated underlayer and the target side of the memory metal layer is good and the bond is stable.

[0091] The thickness of the base coat ranges from 3 to 9 micrometers. Specifically, it can be 3 micrometers, 4 micrometers, 5 micrometers, 6 micrometers, 7 micrometers, 8 micrometers, or 9 micrometers, etc.

[0092] Please refer to further information. Figure 3 b. A base coat 15 is deposited on the target side (not shown in the figure) of the memory metal layer 14 after physical roughening treatment. This embodiment is described with the target side of the memory metal layer 14 being a single side as an example. When the target sides of the memory metal layer 14 are opposite sides, the setting of the base coat 17 is similar and will not be described again.

[0093] Step S24: Perform chemical roughening treatment on the target side of the memory metal layer to obtain the treated memory metal layer.

[0094] The target side of the memory metal layer can be micro-etched, browned, or blackened using etching solutions such as sodium persulfate, hydrogen peroxide, hydrochloric acid, sodium hydroxide, ammonia, or other etching systems to perform chemical roughening treatment, improve the roughness of the bottom layer near the dielectric layer, and obtain the processed memory metal layer.

[0095] Chemical roughening treatment can directly roughen the substrate, thereby circumventing the "corrosion resistance" property of the shape memory metal layer, increasing the roughness of the substrate, and thus improving the adhesion between the substrate and the dielectric layer. Therefore, in this embodiment, the adhesion between the shape memory metal layer and the dielectric layer can be achieved through both physical roughening treatment and chemical roughening treatment, thereby circumventing the "corrosion resistance" property of the shape memory metal layer and improving the adhesion between the target side of the shape memory metal layer and the dielectric layer by increasing the roughness of the substrate.

[0096] Step S25: At least one dielectric layer is stacked on at least one side of the board to be added, and the target side of the memory metal layer is placed on the side of the dielectric layer away from the board to be added, and a lamination process is performed to add layers to the board to be added.

[0097] Please refer to further information. Figure 3 c. Two dielectric layers 16 are stacked on opposite sides of the board 13 to be added, and the target side of the memory metal layer 14 is placed on the side of the dielectric layer 16 away from the board 13 to be added, so that the bottom layer 15 is close to the corresponding dielectric layer 16. Then, a lamination process is performed to add a layer to the board 13 to complete the addition process.

[0098] In one specific application scenario, if the board to be added after this layer-addition process meets the layer count requirement of the printed circuit board (PCB), then the board to be added after this layer-addition process is used as the PCB. In another specific application scenario, if the board to be added after this layer-addition process does not meet the layer count requirement of the PCB, then the board to be added after this layer-addition process is used as a new board to be added, and the layer-addition process continues on the new board to be added until the layer count requirement of the PCB is met, thus obtaining the PCB.

[0099] Through the above steps, the layer addition method of the printed circuit board in this embodiment improves the adhesion between the shape memory metal layer and the dielectric layer by combining physical roughening treatment, electroplating underlayer, and chemical roughening treatment. Specifically, after performing physical roughening treatment on the target side of the shape memory metal layer, electroplating underlayer is then performed. This roughens the target side, increases its surface area and surface three-dimensionality, and damages the target side surface, increasing the contact area with the underlayer and improving the adhesion between them. Then, chemical roughening treatment is performed on the underlayer to increase the roughness of the side of the underlayer near the dielectric layer, thereby improving the adhesion between the underlayer and the dielectric layer. This avoids the "corrosion resistance" characteristic of the shape memory metal layer. By increasing the roughness of the underlayer, the adhesion between the target side of the shape memory metal layer and the dielectric layer is improved, reducing the occurrence of delamination and board bursting on the printed circuit board, and improving the structural stability and reliability of the printed circuit board.

[0100] Please see Figure 12 , Figure 12 This is a schematic diagram of a printed circuit board according to an embodiment of the present invention. The structure of this embodiment is for illustrative purposes only and is not intended to limit the scope of the invention.

[0101] The printed circuit board 30 in this embodiment includes a core board 33, two substrate layers 35, and two memory metal layers 34. The opposite sides of the core board 33 are respectively bonded to the substrate layers 35, and the side of each substrate layer 35 away from the core board 33 is respectively bonded to the corresponding memory metal layer 34.

[0102] The core board 33 includes at least one conductive layer 31 and at least one dielectric layer 32 that are stacked and bonded together in sequence.

[0103] The printed circuit board 30 of this embodiment is prepared by the method of preparing the printed circuit board of any of the above embodiments. Therefore, the printed circuit board of this embodiment can improve the bonding force between the target side of the memory metal layer and the dielectric layer, reduce the phenomenon of delamination and board bursting of the printed circuit board, and improve the structural stability and reliability of the printed circuit board.

[0104] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A method for adding layers to a printed circuit board, characterized in that, The method for adding layers to the printed circuit board includes: The board to be added and the memory metal layer are obtained; wherein, the memory metal layer includes one or more of copper-titanium alloy, copper-titanium-iron alloy, copper-tin-phosphorus alloy, copper-zinc-tin alloy, copper-zinc-silicon alloy, and copper-tin alloy; The target side of the memory metal layer is subjected to pretreatment and chemical roughening treatment in sequence to obtain the treated memory metal layer; wherein, the pretreatment includes physical roughening treatment and electroplating underlayer treatment; At least one dielectric layer is stacked on at least one side of the board to be added, and the target side of the memory metal layer is placed on the side of the dielectric layer away from the board to be added, and a lamination process is performed to add a layer to the board to be added. The process of sequentially pre-treating and chemically roughening the target side of the memory metal layer to obtain the treated memory metal layer includes: The target side of the memory metal layer is physically roughened; an underlayer is deposited on the target side of the physically roughened memory metal layer; the underlayer on the target side of the memory metal layer is chemically roughened to obtain the processed memory metal layer. The physical roughening process on the target side of the memory metal layer includes: The target side of the memory metal layer is subjected to grinding, ceramic brushing, or sandblasting treatment. The depth range of the grinding brush or ceramic brush plate is 5-15 micrometers, the depth range of the sandblasting is 2-15 micrometers, and the depth of the grinding brush, ceramic brush plate or sandblasting treatment is less than one-fifth of the thickness of the memory metal layer.

2. The method for adding layers to a printed circuit board according to claim 1, characterized in that, The step of depositing an underlayer on the target side of the physically roughened shape memory metal layer includes: Flash plating is performed on the target side of the physically roughened shape memory metal layer to deposit an underlayer layer on the target side; The thickness of the base layer ranges from 3 to 9 micrometers.

3. The method for adding layers to a printed circuit board according to claim 1, characterized in that, The step of physically roughening the target side of the shape memory metal layer includes: Laser drilling is performed on the target side of the memory metal layer to uniformly form an array of holes on the target side; The diameter of the hole processed by the laser drilling ranges from 25 to 65 micrometers, and the depth ranges from 1.5 to 15 micrometers. The depth of the laser drilling is less than one-fifth of the thickness of the memory metal layer.

4. The method for adding layers to a printed circuit board according to claim 1, characterized in that, The step of physically roughening the target side of the shape memory metal layer includes: Laser depth control and / or water jet depth control are performed on the target side of the memory metal layer to uniformly form depth control marks on the target side. The depth control marks include wavy marks, oblique marks, or grid marks. The width range of the laser-controlled depth processing and / or water jet-controlled depth processing is 25-75 micrometers, and the depth range is 3-15 micrometers. The depth of the laser-controlled depth processing and / or water jet-controlled depth processing is less than one-fifth of the thickness of the memory metal layer.

5. The method for adding layers to a printed circuit board according to claim 1, characterized in that, The step of chemically roughening the target side of the memory metal layer to obtain the treated memory metal layer includes: The target side of the memory metal layer is subjected to micro-etching, browning, or blackening treatment using an etching solution based on sodium persulfate, hydrogen peroxide, hydrochloric acid, sodium hydroxide, or ammonia to perform chemical roughening treatment, thereby obtaining the treated memory metal layer.

6. The method for adding layers to a printed circuit board according to claim 1, characterized in that, The step of stacking at least one dielectric layer on at least one side of the board to be added to, and placing the target side of the shape memory metal layer on the side of the dielectric layer away from the board to be added to, and performing a lamination process to add a layer to the board to be added to include: When the added-layer board meets the layer requirements of the printed circuit board, the added-layer board is used as the printed circuit board. If the number of layers required for the printed circuit board is not met after the addition of layers, the added layer is used as a new addition layer and the addition process continues until the number of layers required for the printed circuit board is met, thus obtaining the printed circuit board.

7. A printed circuit board, characterized in that, The printed circuit board is prepared by the layer addition method of the printed circuit board according to any one of claims 1-6.

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