A reference source circuit, a power supply chip, a display panel, and a near-eye display device.

Abstract

This invention discloses a reference source circuit, a power supply chip, a display panel, and a near-eye display device. The reference source circuit includes at least one low-dropout linear regulator circuit, which comprises an operational amplifier, a power transistor, a resistor string, and a selection switch unit. The resistor string is connected in a feedback loop between the input of the operational amplifier and the power transistor. The selection switch unit is connected between the resistor string and a current source, and is used to select the connection position of the current source on the resistor string to adjust the voltage output by the power transistor. The reference source circuit of this invention provides a more accurate output voltage and features low power consumption and a small area.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a reference source circuit, a power chip, a display panel, and a near-eye display device. Background Technology

[0002] The reference source circuit generates reference voltage and reference current following the start signal of the power supply start circuit. It can provide stable reference voltage and reference current for other modules, and is therefore widely used in integrated circuits.

[0003] Existing reference source circuits typically consist of a low-dropout linear regulator circuit, which includes an operational amplifier, a power transistor, a resistor string, and a switch. The resistor string is connected in series between the current source and the power transistor; the path of the reference current flowing from the current source to the power transistor is called the current branch. A switch is connected in parallel next to each resistor in the resistor string to select whether the resistor connected in parallel with the switch is included in the current branch. When the switch is closed, the resistor is not included in the current branch; when the switch is open, the resistor is included in the current branch, and the resistance of the current branch is the result of the resistor and the switch's resistance being connected in parallel.

[0004] In existing reference source circuits, the resistance value in the current branch becomes inaccurate due to the influence of the switch resistor, resulting in inaccurate output voltage. In addition, due to leakage current in the switch, the current in the current branch is shunted by the switch. In order to ensure that the current flowing through the resistor in the feedback loop between the operational amplifier input and the power transistor is the desired current value, the reference current provided by the current source must be larger than expected, thus causing high power consumption in the reference source circuit. Since the resistance value in the current branch is the result of the resistor and the switch resistor being connected in parallel, in order not to affect the actual resistance value of the current branch, the size of the switch must be very large, thus the layout area of ​​the reference source circuit is large. Summary of the Invention

[0005] This invention provides a reference source circuit, a power chip, a display panel, and a near-eye display device, which have more accurate output voltage and low power consumption and small area characteristics.

[0006] In a first aspect, embodiments of the present invention provide a reference source circuit, including at least one low-dropout linear regulator circuit. The low-dropout linear regulator circuit includes an operational amplifier, a power transistor, a resistor string, and a selection switch unit. The resistor string is connected to the feedback loop between the input terminal of the operational amplifier and the power transistor. The selection switch unit is connected between the resistor string and a current source, and the selection switch unit is used to select the connection position of the current source on the resistor string to adjust the voltage output by the power transistor.

[0007] Secondly, embodiments of the present invention also provide a power supply chip, including the reference source circuit provided in the above embodiments.

[0008] Thirdly, embodiments of the present invention also provide a display panel, including the power chip provided in the above embodiments.

[0009] Fourthly, embodiments of the present invention also provide a near-eye display device, including the display panel provided in any embodiment.

[0010] In this embodiment of the reference source circuit, a selection switch unit is connected between the resistor string and the current source. The selection switch unit only selects the connection point of the current source, i.e., selects the number of resistor units through which the current source flows. Therefore, the selection switch unit does not participate in the feedback loop of the power transistor or the current branch of the current source, and thus does not affect the resistance value of the resistor units in the current branch of the current source. Therefore, the output voltage of the low-dropout linear regulator changes with the number of resistor units in the reference current branch, unaffected by the voltage or current of the switch. When it is necessary to adjust the output voltage of the low-dropout linear regulator, only the number of resistor units through which the current source flows needs to be changed. Because the branch current of the reference source circuit is a fixed DC current output by the current source, and the DC current is very low, the reference source circuit of this invention has advantages such as low power consumption, small area, accurate output voltage, and high stability.

[0011] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a schematic diagram of a reference source circuit provided by related technologies;

[0014] Figure 2 This is a schematic diagram of a reference source circuit provided in an embodiment of the present invention;

[0015] Figure 3 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention;

[0016] Figure 4 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention;

[0017] Figure 5 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention;

[0018] Figure 6 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention;

[0019] Figure 7 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention;

[0020] Figure 8 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention;

[0021] Figure 9 This is a schematic diagram of the structure of a power chip provided in an embodiment of the present invention;

[0022] Figure 10 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0023] Figure 11 This is a schematic diagram of the structure of a near-eye display device provided in an embodiment of the present invention. Detailed Implementation

[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0026] Figure 1 A schematic diagram of a reference source circuit provided for related technologies. For example... Figure 1 As shown, the reference source circuit provided by the related technology includes a first low-dropout linear regulator circuit 100 and a second low-dropout linear regulator circuit 200; wherein, the first low-dropout linear regulator circuit 100 and the second low-dropout linear regulator circuit 200 are used to generate a stable first reference voltage VEF1 and a second reference voltage VEF2, respectively.

[0027] The first low-dropout linear regulator circuit 100 includes a first operational amplifier EA1, a first power transistor T1, a first resistor series 300, and a first current source unit 400. The first resistor string 300 is connected in the feedback loop between the non-inverting input of the first operational amplifier EA1 and the first power transistor T1; the inverting input of the first operational amplifier EA1 is grounded, and the output of the first operational amplifier EA1 is connected to the gate of the first power transistor T1; the first terminal of the first power transistor T1 serves as the output of the first low-dropout linear regulator circuit 100, and the second terminal of the first power transistor T1 is connected to the first power supply VNN-; the second low-dropout linear regulator circuit 200 includes a second operational amplifier EA2, a second power transistor T2, a second resistor string 500, and a second current source unit 600; the second resistor string 500 is connected in the feedback loop between the non-inverting input of the second operational amplifier EA2 and the second power transistor T2; the inverting input of the second operational amplifier EA2 is grounded, and the output of the second operational amplifier EA2 is connected to the gate of the second power transistor T2; the first terminal of the second power transistor T2 serves as the output of the second low-dropout linear regulator circuit 200, and the second terminal of the second power transistor T2 is connected to the output of the first low-dropout linear regulator circuit 100.

[0028] The first current source unit 400 is used to generate a first reference current I1, and the second current source unit 600 is used to generate a second reference current I2. The path from the first current source unit 400 to the first power transistor T1 is the first reference current branch, and the path from the second current source unit 600 to the second power transistor T2 is the second reference current branch.

[0029] A switch SW is connected in parallel next to each first resistor Ri in the first resistor string 300 and each second resistor Rj in the second resistor string 500. The switch SW is used to select the effective number of resistors in each reference current branch. When the switch SW is closed, the first resistor Ri and the second resistor Rj are short-circuited, and the first resistor Ri is not connected to the first reference current branch, and the second resistor Rj is not connected to the second reference current branch. When the switch SW is open, the first resistor Ri is connected to the first reference current branch, and the second resistor Rj is connected to the second reference current branch.

[0030] The formula for calculating the first reference voltage VEF1 is:

[0031]

[0032] Wherein, VEF1 is the first reference voltage, that is, the output voltage of the first low dropout linear regulator circuit 100, ID1 is the leakage current of the switch SW in the first reference current branch, N is the number of first resistors Ri connected in the first current reference branch, N is a positive integer, Rsw represents the resistance of the switch SW, and ri represents the resistance value of the first resistor Ri.

[0033] The formula for calculating the second reference voltage VEF2 is as follows:

[0034]

[0035] Where VEF2 is the second reference voltage, i.e. the output voltage of the second low-dropout linear regulator circuit 200, ID2 is the leakage current of the switch SW in the second reference current branch, M is the number of second resistors Rj connected in the second reference current branch, M is a positive integer, Rsw represents the resistance of the switch SW, and rj represents the resistance value of the second resistor Rj.

[0036] From the formulas for the first reference voltage VEF1 and the second reference voltage VEF2, and from the formulas for the output voltages of the first low-dropout linear regulator circuit 100 and the second low-dropout linear regulator circuit 200, it can be seen that the output voltage is affected by the resistance of the switch SW and the leakage current of the switch SW. Therefore, the output voltage of the existing reference source circuit is inaccurate. In addition, due to the leakage current of the switch SW, the current in the first reference current branch and the second reference current branch will be shunted by the switch. In order to ensure that the current flowing through the resistor in the feedback loop between the non-inverting input terminal of the first operational amplifier EA1 and the first power transistor T1 is... The current is the desired current value, and the current flowing through the resistor in the feedback loop between the non-inverting input of the second operational amplifier EA2 and the second power transistor T2 is the desired current value. The reference current provided by the first current source unit 400 and the second current source unit 600 is larger than expected, thus causing the power consumption of the reference source circuit to be large. Since the resistance values ​​of the first reference current branch and the second reference current branch are the result of the resistor being connected in parallel with the resistance of the switch SW, in order not to affect the actual resistance values ​​of the first reference current branch and the second reference current branch, the size of the switch SW must be very large, thus the layout area of ​​the reference source circuit is large.

[0037] To address the aforementioned issues, embodiments of the present invention provide a reference source circuit, which is used to provide a reference voltage and a reference current. Figure 2 This is a schematic diagram of a reference source circuit provided in an embodiment of the present invention, suitable for providing a stable reference voltage to other modules. Figure 2 As shown, the reference source circuit 1 includes at least one low-dropout linear regulator circuit 10, wherein, Figure 2 The example illustrates the case where the reference source circuit 1 includes a low-dropout linear regulator circuit 10.

[0038] The low dropout linear regulator circuit 10 includes an operational amplifier OP, a power transistor MP, a resistor series 101, and a selection switch unit 102;

[0039] Resistor string 101 is connected in the feedback loop between the input terminal of operational amplifier OP and power transistor MP; selection switch unit 102 is connected between resistor string 101 and current source 20. Selection switch unit 102 is used to select the connection position of current source 20 on resistor string 101 to adjust the output voltage of power transistor MP.

[0040] Resistor string 101 comprises multiple resistor units connected in series. For example, Figure 2 The resistor string 101 includes a first resistor unit R1, a second resistor unit R2, ..., an (N-1)th resistor unit RN-1, and an Nth resistor unit RN. The resistor string 101 can be connected in the feedback loop between the non-inverting input of the operational amplifier OP and the first terminal of the power transistor MP, or it can be connected in the feedback loop between the inverting input of the operational amplifier OP and the first terminal of the power transistor MP. Figure 2 The diagram illustrates the feedback loop where resistor string 101 is connected between the non-inverting input of operational amplifier OP and power transistor MP. The output of operational amplifier OP is connected to the gate of power transistor MP; the second terminal of power transistor MP is connected to the first power supply VN-.

[0041] The selection switch unit 102 can be a binary tree-type switching circuit, a decoder, or any other circuit or integrated module. The size of the selection switch unit 102 can be set to a minimum size. For example... Figure 2As shown, the selection switch unit 102 includes an input terminal INPUT and multiple output terminals, including a first output terminal T1, a second output terminal T2, ..., an (N-1)th output terminal TN-1, and an Nth output terminal TN. For example, when the input terminal INPUT of the selection switch unit 102 is connected to the first output terminal T1, the reference current IB provided by the current source 20 flows through the input terminal INPUT and the first output terminal T1 of the selection switch unit 102, and then through the first resistor unit R1 in the resistor string 101 to the power transistor MP. At this time, the reference current IB (for convenience, both the reference current and its value are represented by IB) is connected to the first node A of the resistor string 101. The output voltage VOUT of the power transistor at this time is Vref = Vref - IB × R. Where Vref is the reference voltage; more specifically, Vref is the reference voltage connected to the inverting input terminal of the operational amplifier OP. When the inverting input terminal of the operational amplifier OP is grounded, the reference voltage Vref can be 0. IB is the value of the reference current, and R represents the resistance value of the resistor unit; at this time, there is only one resistor unit. When the input terminal INPUT of the selection switch unit 102 is connected to the Nth output terminal TN, the reference current IB provided by the current source 20 flows through the input terminal INPUT and the Nth output terminal TN of the selection switch unit 102, and then sequentially through the (N-1)th resistor RN-1, ..., the first resistor R1 in the resistor string 101 to the power transistor MP. At this time, the reference current IB is connected to the second node B of the resistor string 101. At this time, the output voltage VOUT of the power transistor is Vref = Vref - IB × j × R, where j is the number of resistor units through which the current flows. Therefore, by controlling the selection switch unit 102 to connect the input terminal INPUT to different output terminals, the position of the reference current IB connected to the resistor string 101 can be selected, that is, the connection position of the current source 20 on the resistor string 101 can be selected, and thus the output voltage VOUT of the power transistor can be adjusted.

[0042] Current source 20 is connected to the second power supply VP+. Current source 20 can generate a small reference current IB, for example, less than 10uA. The path of the reference current IB from current source 20 to power transistor MP is the reference current branch. By selecting the starting position of the reference current branch from resistor string 101 (i.e., the position where the reference current IB is connected to resistor string 101) by selection switch unit 102, the reference current IB generated by current source 20 will flow through the resistor unit after the starting position. For example, when the input terminal INPUT of selection switch unit 102 is connected to the first output terminal T1, the starting position of the reference current branch is the first node A, and the resistor unit after the starting position is the first resistor unit R1.

[0043] Continue to refer to Figure 2 The working principle of the reference source measurement circuit 1 provided in this embodiment of the invention is as follows:

[0044] The resistor string 101 of the low-dropout linear regulator circuit 10 is connected in the feedback loop between the non-inverting input of the operational amplifier OP and the power transistor MP, where the inverting input of the operational amplifier OP is grounded. The selection switch unit 102 is used to select the position where the reference current IB is connected to the resistor string 101, i.e., the starting position of the feedback loop, i.e., how many resistor units the reference current IB flows through. The selection switch unit 102 does not participate in the feedback loop or the reference current branch of the current source 20; therefore, the leakage current of the selection switch unit 102 does not affect the current value of the reference current IB, i.e., the leakage current of the selection switch unit 102 does not affect the output voltage VOUT of the low-dropout linear regulator circuit 10. Therefore, the reference voltage generated by the low-dropout linear regulator circuit 10 is accurate and controllable, and has low power consumption.

[0045] The output voltage VOUT of the low-dropout linear regulator circuit 10 (i.e., the output voltage VOUT of the power transistor) depends only on the reference current IB generated by the current source 20 and the number of selected resistor units in the resistor string 101, that is: VOUT = Vref - IB × j × R. Where j represents the number of selected resistor units in the resistor string 101, that is, the number of resistor units through which the reference current IB flows, and R represents the resistance value of the resistor units in the resistor string 101. For example, when the input terminal INPUT of the selection switch unit 102 is connected to the Nth output terminal TN, the unselected resistor units of the reference current IB are the i resistor units between the second node B of the current source 20 and the non-inverting input terminal of the operational amplifier OP; while the selected resistor units of the reference current IB are the j (j=Ni) resistor units between the second node B and the first terminal of the power transistor MP; therefore, the output voltage VOUT of the low dropout linear regulator circuit 10 will also change with the number of resistor units in the reference current branch, and will not be affected by the voltage or current of the switch. When it is necessary to adjust the output voltage VOUT of the low dropout linear regulator circuit 10, it is only necessary to change the number of resistor units through which the reference current IB flows (equivalent to changing the starting position of the reference current branch). The selection switch unit 102 can be controlled to select the position of the reference current IB connected to the resistor string 101, thereby changing the number of resistor units through which the reference current IB flows.

[0046] The reference source circuit of this invention connects a selection switch unit between the resistor string and the current source. The selection switch unit only selects the connection point of the current source, i.e., the number of resistor units through which the current source flows. Therefore, the selection switch unit does not participate in the feedback loop of the power transistor or the current branch of the current source, and thus does not affect the resistance value of the resistor units in the reference current branch of the current source. Therefore, the output voltage of the low-dropout linear regulator circuit changes with the number of resistor units in the reference current branch, unaffected by the voltage or current of the switch. When it is necessary to adjust the output voltage of the low-dropout linear regulator circuit (i.e., the output voltage of the reference source circuit), only the number of resistor units through which the current source flows needs to be changed. Because the current in the reference current branch of the reference source circuit is a fixed reference current output by the current source, and this reference current is very low, the reference source circuit of this invention has advantages such as low power consumption, small area, accurate output voltage, and high stability.

[0047] In this embodiment of the invention, the connection relationship between the selection switch unit 102, the resistor string 101, and the current source 20 can take many forms, as long as the output voltage VOUT of the low dropout linear regulator circuit 10 is independent of the selection switch unit 102.

[0048] The following describes several structural forms of the connection relationship between the selection switch unit 102, the resistor string 101, and the current source 20.

[0049] In one embodiment, reference continues... Figure 2The resistor string 101 includes multiple resistor units connected in series. The selection switch unit 102 includes an input terminal and multiple output terminals. The input terminal of the selection switch unit 102 is connected to the current source 20, and the output terminal of the selection switch unit 102 is connected to the common terminal of two adjacent resistor units. The selection switch unit 102 is used to connect the input terminal to an output terminal according to a control signal. The control signal can be a pulse signal, a high-level signal, or a low-level signal. The multiple output terminals include a first output terminal T1, a second output terminal T2, ..., an (N-1)th output terminal TN-1, and an Nth output terminal TN. The selection switch unit 102 connects the input terminal to an output terminal according to the input control signal. For example, when a first control signal is input, the first control signal controls the input terminal of the selection switch unit 102 to be connected to the first output terminal T1. The reference current IB provided by the current source 20 flows through the input terminal of the selection switch unit 102 and the first output terminal T1, and then through the first resistor unit R1 in the resistor string 101 to the power transistor MP. When a second control signal is input to the selection switch unit, the second control signal controls the input terminal of the selection switch unit 102 to be connected to the Nth output terminal TN. The reference current IB provided by the current source 20 flows through the input terminal of the selection switch unit 102 and the Nth output terminal TN, and then sequentially through the (N-1)th resistor unit RN-1, ..., the first resistor unit R1 in the resistor string 101 to the power transistor MP. Therefore, by controlling the selection switch unit 102 to be connected to different output terminals, the position of the reference current IB connected to the resistor string 101 can be selected.

[0050] For example, the selection switch unit includes a decoder 102. The decoder 102 includes an input terminal and multiple output terminals; the input terminal of the decoder is connected to a current source 20, and the output terminal of the decoder is connected to the common terminal of two adjacent resistor units; the decoder switches between its input terminal and one output terminal according to a control signal. (Continue to refer to...) Figure 2 The output terminals include a first output terminal T1, a second output terminal T2, ..., an Nth output terminal TN. The decoder can be a chip that translates the state of binary code into control signals. Depending on the needs, the control signals can be high-level or low-level signals. For example, the 74138 is a 3-to-8 line decoder with 8 state combinations (000-111). This decoder has three enable input terminals, also known as chip select terminals, used to control whether decoding is enabled or disabled. When the signal input to the enable input terminal is valid, the decoder is in the working state (i.e., decoding is enabled). When the signal input to the enable input terminal is invalid, the decoder is disabled. When the decoder is in the working state, and the input control signals are different (i.e., the states of the input binary code are different), different control signals control the same input terminal and different output terminals to conduct, thereby changing the position of the current source 20 connected to the resistor series 101.

[0051] For example, when the first control signal input to the decoder controls the input terminal of the decoder 102 to be connected to the first output terminal T1, the reference current IB provided by the current source 20 flows through the input terminal INPUT of the decoder 102 and the first output terminal T1, and then through the first resistor unit R1 in the resistor string 101 to the power transistor MP. When the second control signal input to the decoder 102 controls the input terminal of the decoder to be connected to the Nth output terminal TN, the reference current IB provided by the current source 20 flows through the input terminal INPUT of the decoder 102 and the Nth output terminal TN, and then sequentially through the (N-1)th resistor unit RN-1, ..., the first resistor unit R1 in the resistor string 101 to the power transistor MP. Therefore, by controlling the input terminal of the decoder 102 to be connected to different output terminals, the position of the reference current IB connected to the resistor string 101 can be selected.

[0052] Figure 3 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention. As an embodiment, the switching unit 102 is selected to adopt a binary tree-type switching circuit. Figure 3 As shown, the resistor string 101 includes multiple resistor units connected in series, and the selection switch unit 102 includes multiple switches, which are used to turn on or off according to a control signal; when at least one switch is turned on, the number of resistor units on the resistor string 101 through which the current source 20 flows is selected so that the voltage output by the power transistor MP is independent of the switch.

[0053] For example, the multiple switches include a first switch S1, multiple second switches S2, multiple third switches S3, multiple fourth switches S4, ..., multiple Nth switches SN; one end of each of the multiple Nth switches is connected to the common terminal of adjacent resistor units, and the multiple Nth switches SN are also connected in parallel with each other and in series with a (N-1)th switch SN-1, ..., the multiple fourth switches S4 are connected in parallel with each other and in series with a third switch S3, the multiple third switches S3 are connected in parallel with each other and in series with a second switch S2, and the multiple second switches S2 are connected in parallel with each other and in series with the first switch S1. The multiple resistor units include a first resistor unit R1, a second resistor unit R2, a third resistor unit R3, ..., a Nth resistor unit RN. When the first switch S1, the multiple second switches S2, the multiple third switches S3, the multiple fourth switches S4, ..., the multiple Nth switches SN are all closed, the reference current IB provided by the current source 20 is transmitted to the power transistor MP through the Nth resistor unit RN. In other embodiments, the number of resistor units through which the reference current IB passes can also be selected in other ways by controlling the binary tree-type switching circuit. Therefore, by controlling the closing of different switches in the selection switch unit 102, the position of the reference current IB connected to the resistor string 101 can be selected, that is, the number of resistor units on the resistor string 101 through which the current source 20 flows can be selected, so that the voltage output by the power transistor MP is independent of the switch.

[0054] Figure 4 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention, as shown below. Figure 4 As shown, the resistor string 101 includes multiple resistor units connected in series, and the selection switch unit 102 includes multiple switches. The switches are used to turn on or off according to a control signal. When at least one switch is on, the number of resistor units in the resistor string 101 through which the current source 20 flows is selected, so that the voltage output by the power transistor MP is independent of the switch. The common terminal of every two adjacent resistor units is connected to the first terminal of a switch, and the second terminal of each switch is connected to the current source 20.

[0055] refer to Figure 4 For example, multiple switches include a first switch S1, a second switch S2, ..., an Nth switch SN; one side of each switch is connected to the common side of adjacent resistor units, and the other side of each switch is connected to a current source 20. Multiple resistor units include a first resistor unit R1, a second resistor unit R2, a third resistor unit R3, ..., an Nth resistor unit RN. When the Nth switch SN is closed, the reference current IB provided by the current source 20 is transmitted to the power transistor MP through the Nth resistor unit RN. At this time, the output voltage VOUT of the power transistor is Vref - IB × R. Here, R represents the resistance value of the resistor unit, and at this time, there is only one resistor unit. When the first switch S1 is closed, the reference current IB provided by the current source 20 is transmitted sequentially through the second resistor unit R2 to the Nth resistor unit RN and then to the power transistor MP. At this time, the output voltage VOUT of the power transistor is Vref - IB × (N-1) × R, and at this time, there are N-1 resistance values ​​for the resistor units. Therefore, by controlling the closing of different switches in the selection switch unit 102, the position of the reference current IB connected to the resistor string 101 can be selected, that is, the number of resistor units on the resistor string 101 through which the current source 20 flows can be selected, so that the voltage output by the power transistor MP is independent of the switch. To clarify, Vref is the reference voltage; more specifically, Vref is the reference voltage connected to the inverting input terminal of the operational amplifier OP. When the inverting input terminal of the operational amplifier OP is grounded, the reference voltage Vref can be 0.

[0056] The reference source circuit provided in this embodiment of the invention may also include multiple low-dropout linear regulator circuits 10. For example, when the reference source circuit uses two low-dropout linear regulator circuits 10, the output of the first low-dropout linear regulator circuit serves as the reference voltage for the power transistor MP of the second low-dropout linear regulator circuit 10, so that the reference voltage generated by the first low-dropout linear regulator circuit is isolated within a stable voltage domain, thereby making the output voltage of the second low-dropout linear regulator circuit more accurate. The structure of the two low-dropout linear regulator circuits 10 may each include an operational amplifier OP, a power transistor MP, a resistor string 101, and a selection switch unit 102; wherein, the resistor string 101 is connected to the feedback loop between the input terminal of the operational amplifier OP and the power transistor MP; the selection switch unit 102 is connected between the resistor string 101 and the current source 20, and the selection switch unit 102 is used to select the connection position of the current source 20 on the resistor string 101, or one of the low-dropout linear regulator circuits may adopt the above-described low-dropout linear regulator circuit 10 structure.

[0057] Figure 5 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention, as shown below. Figure 5 As shown, at least one low-dropout linear regulator circuit 10 includes a first low-dropout linear regulator circuit LDO1 and a second low-dropout linear regulator circuit LDO2.

[0058] The first low-dropout linear regulator circuit LDO1 includes a first operational amplifier OP1, a first power transistor MP1, a first resistor string 101_1, and a first selection switch unit MUX1. The first resistor string 101_1 is connected between the non-inverting input terminal of the first operational amplifier OP1 and the first terminal of the first power transistor MP1. The inverting input terminal of the first operational amplifier OP1 is grounded, and the output terminal of the first operational amplifier OP1 is connected to the gate of the first power transistor MP1. The second terminal of the first power transistor MP1 is connected to the first power supply VN-. The first selection switch unit MUX1 is connected between the first resistor string 101_1 and the current source 20. The first selection switch unit 20 is used to select the connection position of the current source 20 on the first resistor string 101_1 to adjust the output voltage of the first power transistor MP1.

[0059] The second low-dropout linear regulator circuit LDO2 includes a second operational amplifier OP2, a second power transistor MP2, a second resistor string 101_2, and a second selection switch unit MUX2. The second resistor string 101_2 is connected between the non-inverting input of the second operational amplifier OP2 and the first terminal of the second power transistor MP2. The inverting input of the second operational amplifier OP2 is grounded, and the output of the second operational amplifier OP2 is connected to the gate of the second power transistor MP2. The second terminal of the second power transistor MP2 is connected to the output of the first low-dropout linear regulator circuit LDO1. The second selection switch unit MUX2 is connected between the second resistor string 101_2 and the current source 20. The second selection switch unit MUX2 is used to select the connection position of the current source 20 on the second resistor string 101_2 to adjust the output voltage of the second power transistor MP2. Optionally, the current sources connected to the first low-dropout linear regulator circuit LDO1 and the second low-dropout linear regulator circuit LDO2 can be the same current source or different current sources.

[0060] In the first low-dropout linear regulator circuit LDO1, the output voltage of the first power transistor MP1 serves as the reference voltage for the second power transistor MP2 in the second low-dropout linear regulator circuit LDO2. The first low-dropout linear regulator circuit LDO1 employs the structure of any of the low-dropout linear regulator circuits 10 provided in the above embodiments. The output voltage of the first low-dropout linear regulator circuit LDO1 is isolated within a stable voltage domain, unaffected by external circuits or signals. The output voltage of the first low-dropout linear regulator circuit LDO1 is provided to the second power transistor MP2 of the second low-dropout linear regulator circuit LDO2 as a reference voltage. Furthermore, the second low-dropout linear regulator circuit LDO2 also employs the low-dropout linear regulator circuit 10 structure provided in any of the above embodiments. Therefore, the second low-dropout linear regulator circuit LDO2 can output a more accurate output voltage.

[0061] The reference source circuit 1 also includes a third resistor string RX for outputting multiple reference voltages; the third resistor string RX includes multiple first resistors RX1; the first resistors RX1 are connected in series between the output terminal of the second low dropout linear regulator circuit LDO2 and ground.

[0062] Continue to refer to Figure 5 The working principle of the reference source circuit 1 provided in this embodiment of the invention is as follows:

[0063] The first low-dropout linear regulator circuit LDO1 and the second low-dropout linear regulator circuit LDO2 are used to generate stable first reference voltage LDO_VN and second reference voltage Vrefn, respectively. As can be seen from the above embodiments, the first selection switch unit MUX1 is used to select the connection point of the first reference current IB1 on the first resistor string 101_1, that is, to select how many resistor units the first reference current IB1 flows through. The first selection switch unit MUX1 does not participate in the first reference current branch (in the first low-dropout linear regulator circuit LDO1, the path of the first reference current IB1 from the current source 20 to the first power transistor MP1 is the first reference current branch). Therefore, the switch of the selection switch unit MUX1 can be designed with a very small size, and the leakage current of the switch will not affect the current value of the first reference current IB1. In summary, the first reference voltage LDO_VN generated by the first low-dropout linear regulator circuit LDO1 is accurate and controllable, and has low power consumption.

[0064] The power supply for the second low-dropout linear regulator circuit LDO2 is the first reference voltage LDO_VN. The second selection switch unit MUX2 is used to select the connection point of the second reference current IB2 on the second resistor string 101_2, that is, to select the number of resistor units through which the second reference current IB2 flows. Similarly, the second selection switch unit MUX2 does not participate in the second reference current branch of the second low-dropout linear regulator circuit LDO2 (in the second low-dropout linear regulator circuit LDO2, the path of the second reference current IB2 from the current source 20 to the second power transistor MP2 is the second reference current branch). Therefore, the switching size of the second selection switch unit MUX2 can be minimized, and the leakage current of the switch will not affect the current value of the second reference current IB2.

[0065] In summary, the first reference voltage LDO_VN is only related to the first reference current IB1 and the number of resistor units selected in the first resistor string 101_1, that is: First reference voltage LDO_VN = Vref - IB1 × j × r1. Here, j represents the number of resistor units selected in the first resistor string 101_1, and r1 represents the resistance value of each resistor unit in the first resistor string 101_1. That is, the first reference voltage LDO_VN changes with the number of resistor units in the first reference current branch, and is not affected by the voltage or current of the switch. When it is necessary to adjust the first reference voltage LDO_VN, only the number of resistor units through which the first reference current IB1 flows needs to be changed. To clarify, Vref is the reference voltage; more specifically, Vref is the reference voltage connected to the inverting input terminal of the first operational amplifier OP1. When the inverting input terminal of the first operational amplifier OP1 is grounded, the reference voltage Vref can be 0.

[0066] The second low-dropout linear regulator circuit LDO2 is connected between the second power supply VP+ and the first reference voltage LDO_VN. The starting position of the second reference current branch is also selected from the second resistor string 101_2 by the second selection switch unit MUX2. Therefore, the second reference voltage Vrefn is only related to the number of resistor units selected in the second reference current IB2 and the second resistor string 101_2, that is: Vrefn = Vref - IB2 × q × r2. Where q represents the number of resistor units selected in the second resistor string 101_2, and r2 represents the resistance value of the resistor units in the second resistor string 101_2. That is, the second reference voltage Vrefn changes with the number of resistor units in the second reference current branch and is not affected by the voltage or current of the switch. When it is necessary to adjust the second reference voltage Vrefn, its voltage value can also be changed by changing the number of resistor units through which the second reference current IB2 flows. To clarify, Vref is the reference voltage. More specifically, Vref is the reference voltage connected to the inverting input terminal of the second operational amplifier OP2. When the inverting input terminal of the second operational amplifier OP2 is grounded, the reference voltage Vref can be 0.

[0067] After obtaining the expected second reference voltage Vrefn, a third resistor string RX is added between it and ground. The reference voltage required by each subsequent module can be selected from the output of the third resistor string RX. As needed, the voltage across each resistor in the third resistor string RX can be 1mV, or a lower or higher voltage can be selected. This reference source circuit has a simple power supply, with only the first power supply VN-, the second power supply VP+, and ground potential. With fewer potentials, it is easy to operate and less prone to errors when powering on or off the power system.

[0068] Figure 6 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention. Based on the above embodiments, as follows... Figure 6 As shown, at least one low-dropout linear regulator circuit includes a first low-dropout linear regulator circuit LDO1 and a second low-dropout linear regulator circuit LDO2; the first low-dropout linear regulator circuit LDO1 includes a first operational amplifier OP1, a first power transistor MP1, a first resistor string 101_1 and a first selection switch unit MUX1; the second low-dropout linear regulator circuit LDO2 includes a second operational amplifier OP2, a second power transistor MP2, a second resistor string 101_2 and a second selection switch unit MUX2.

[0069] The current source 20 includes a reference current generating unit 201, a first current source unit 202, and a second current source unit 203. The output terminal of the reference current generating unit 201 is connected to the first terminal of the first current source unit 201 and is used to provide a reference current to the first current source unit 201.

[0070] The second terminal of the first current source unit 202 is connected to the first selection switch unit MUX1, the third terminal of the first current source unit 202 is connected to the second power supply VP+, and the fourth terminal of the first current source unit 202 is connected to the third power supply VBP. The first current source unit 202 is used to mirror the reference current to form the first reference current IB1.

[0071] The first end of the second current source unit 203 is connected to the first end of the first current source unit 202. The second end of the second current source unit 203 is connected to the second selection switch unit MUX2. The third end of the second current source unit 203 is connected to the second power supply VP+. The fourth end of the second current source unit 203 is connected to the fourth end of the first current source unit 202. The second current source unit 203 is used to mirror the first reference current IB1 to form the second reference current IB2.

[0072] The first reference current IB1 is used to provide current to the first resistor string 101_1 of the first low dropout linear regulator circuit LDO1, and the second reference current IB2 is used to provide current to the second resistor string 101_2 of the second low dropout linear regulator circuit LDO2.

[0073] Figure 7 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention. Figure 6 Based on the embodiments, such as Figure 7 As shown, optionally, the reference current generation unit 201 includes a third operational amplifier OP3, a third power transistor MP3, and a second resistor RX2.

[0074] The non-inverting input of the third operational amplifier OP3 is connected to the first terminal of the third power transistor MP3, and the inverting input of the third operational amplifier OP3 is connected to the reference voltage V1. The output of the third operational amplifier OP1 is connected to the gate of the third power transistor MP3 and the output of the reference current generation unit 201. The second terminal of the third power transistor MP3 is connected to the second power supply VP+. The first terminal of the second resistor R2 is connected to the first terminal of the third power transistor MP3, and the second terminal of the second resistor RX2 is grounded.

[0075] Optionally, the first current source unit 202 includes a first transistor M1 and a second transistor M2; the second current source unit 203 includes a third transistor M3 and a fourth transistor M4.

[0076] The gate of the first transistor M1 is connected to the first terminal of the first current source unit 202, the first electrode of the first transistor M1 is connected to the third terminal of the first current source unit 202, and the second electrode of the first transistor M1 is connected to the first electrode of the second transistor M2; the gate of the second transistor M2 is connected to the fourth terminal of the first current source unit 202, and the second electrode of the second transistor M2 is connected to the second terminal of the first current source unit 202; the gate of the third transistor M3 is connected to the first terminal of the second current source unit 203, the first electrode of the third transistor M3 is connected to the third terminal of the second current source unit 203, and the second electrode of the third transistor M3 is connected to the first electrode of the fourth transistor M4; the gate of the fourth transistor M4 is connected to the fourth terminal of the second current source unit 203, and the second electrode of the fourth transistor M4 is connected to the second terminal of the second current source unit 203.

[0077] Typically, the second power supply VP+ is a higher positive power supply voltage, and the first power supply VN- is a lower negative power supply voltage. To ensure that the first reference current IB1 and the second reference current IB2 are not affected by the voltage change between the source and drain of the third power transistor MP3, the first current source unit 202 and the second current source unit 203 can be selected as PMOS cascode current mirror structures (i.e., Figure 7 The embodiments provide the structure of the first current unit 202 and the second current source unit 203, thereby obtaining a stable and unchanging first reference current IB1 and second reference current IB2.

[0078] Figure 8 This is a schematic diagram of another reference source circuit provided in an embodiment of the present invention, as shown below. Figure 8 As shown, optionally, the reference source circuit includes at least one low-dropout linear regulator circuit; the at least one low-dropout linear regulator circuit includes a first low-dropout linear regulator circuit LDO1 and a second low-dropout linear regulator circuit LDO2; the first low-dropout linear regulator circuit LDO1 includes a first operational amplifier OP1, a first power transistor MP1, a first resistor string 101_1, and a first selection switch unit MUX1; the second low-dropout linear regulator circuit LDO2 includes a second operational amplifier OP2, a second power transistor MP2, and a second resistor string 101_2. The second selection switch unit MUX2; the reference source circuit also includes a third resistor string RX; the third resistor string RX includes multiple first resistors RX1; the current source 20 includes a reference current generation unit 201, a first current source unit 202 and a second current source unit 203; the reference current generation unit 201 includes a third operational amplifier OP3, a third power transistor MP3 and a second resistor RX2; the first current source unit 202 includes a first transistor M1 and a second transistor M2; the second current source unit 202 includes a third transistor M3 and a fourth transistor M4.

[0079] Based on the same inventive concept, this invention also provides a power supply chip. Figure 9 This is a schematic diagram of a power chip structure provided in an embodiment of the present invention, for reference. Figure 9 The power chip 2 includes the reference source circuit 1 provided in any of the above embodiments. Therefore, the power chip 2 provided in the embodiments of the present invention has the beneficial effects described in the above embodiments, which will not be repeated here.

[0080] This invention also provides a display panel. Figure 10 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, for reference. Figure 10 The display panel 3 includes the power chip 2 of any of the above embodiments. The display panel 2 is a silicon-based OLED microdisplay panel.

[0081] This invention also provides a near-eye display device. Figure 11 This is a schematic diagram of a near-eye display device provided in an embodiment of the present invention, with reference to... Figure 11 The near-eye display device 4 includes the aforementioned silicon-based OLED microdisplay panel.

[0082] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A reference source circuit, characterized in that, It includes at least one low-dropout linear regulator circuit, which includes an operational amplifier, a power transistor, a resistor string, and a selection switch unit; The resistor is connected in series in the feedback loop between the input terminal of the operational amplifier and the power transistor; The selection switch unit is connected between the resistor string and the current source. The selection switch unit is used to select the connection position of the current source on the resistor string to adjust the voltage output by the power transistor. The voltage output by the power transistor is independent of the selection switch unit. The resistor string includes multiple resistor units connected in series. The selection switch unit includes an input terminal and multiple output terminals. The input terminal of the selection switch unit is connected to the current source, and the output terminal of the selection switch unit is connected to the common terminal of two adjacent resistor units. The selection switch unit is used to connect the input terminal to one of the output terminals according to a control signal. The resistor string is connected in the feedback loop between the non-inverting input of the operational amplifier and the first terminal of the power transistor, or in the feedback loop between the inverting input of the operational amplifier and the first terminal of the power transistor; the first resistor unit in the resistor string is connected to the input of the operational amplifier, and the last resistor unit in the resistor string is connected to the first terminal of the power transistor; the output of the current source is not connected to the first end of the first resistor unit in the resistor string, and the first end of the first resistor unit is the end connected to the input of the operational amplifier; The output voltage of a low-dropout linear regulator circuit is equal to the output voltage of the power transistor, and the output voltage of the power transistor is equal to the voltage at its first terminal.

2. The reference source circuit according to claim 1, characterized in that, The selection switch unit includes a decoder.

3. The reference source circuit according to claim 1, characterized in that, The resistor string includes multiple resistor units connected in series, and the selection switch unit includes multiple switches, which are used to turn on or off according to a control signal; when at least one of the switches is turned on, the number of resistor units in the resistor string through which the current source flows is selected so that the voltage output by the power transistor is independent of the switch.

4. The reference source circuit according to claim 3, characterized in that, The selection switch unit includes a binary tree-type switch circuit.

5. The reference source circuit according to claim 3, characterized in that, The common terminal of each pair of adjacent resistor units is connected to the first terminal of a switch, and the second terminal of each switch is connected to the current source.

6. The reference source circuit according to any one of claims 1-5, characterized in that, At least one of the low-dropout linear regulator circuits includes a first low-dropout linear regulator circuit and a second low-dropout linear regulator circuit. The voltage output by the power transistor of the first low-dropout linear regulator circuit is used as the reference voltage for the power transistor of the second low-dropout linear regulator circuit.

7. The reference source circuit according to claim 6, characterized in that, The first low-dropout linear regulator circuit includes a first operational amplifier, a first power transistor, a first resistor string, and a first selection switch unit; The first resistor is connected in series between the non-inverting input of the first operational amplifier and the first terminal of the first power transistor; The inverting input terminal of the first operational amplifier is grounded, and the output terminal of the first operational amplifier is connected to the gate of the first power transistor; the second terminal of the first power transistor is connected to the first power supply. The first selection switch unit is connected between the first resistor string and the current source. The first selection switch unit is used to select the connection position of the current source on the first resistor string in order to adjust the voltage output of the first power transistor.

8. The reference source circuit according to claim 6, characterized in that, The second low-dropout linear regulator circuit includes a second operational amplifier, a second power transistor, a second resistor string, and a second selection switch unit; The second resistor is connected in series between the non-inverting input of the second operational amplifier and the first terminal of the second power transistor; The inverting input terminal of the second operational amplifier is grounded, and the output terminal of the second operational amplifier is connected to the gate of the second power transistor; the second terminal of the second power transistor is connected to the output terminal of the first low-dropout linear regulator circuit. The second selection switch unit is connected between the second resistor string and the current source. The second selection switch unit is used to select the connection position of the current source on the second resistor string in order to adjust the voltage output of the second power transistor.

9. The reference source circuit according to claim 7 or 8, characterized in that, It also includes a third resistor string for outputting multiple reference voltages; The third resistor string includes multiple first resistors; the first resistors are connected in series between the output terminal of the second low-dropout linear regulator circuit and ground.

10. The reference source circuit according to claim 1, characterized in that, At least one of the low dropout linear regulator circuits includes a first low dropout linear regulator circuit and a second low dropout linear regulator circuit; the first low dropout linear regulator circuit includes a first selection switch unit, and the second low dropout linear regulator circuit includes a second selection switch unit. The current source includes a reference current generating unit, a first current source unit, and a second current source unit; The output terminal of the reference current generating unit is connected to the first terminal of the first current source unit, and is used to provide a reference current to the first current source unit. The second end of the first current source unit is connected to the first selection switch unit, the third end of the first current source unit is connected to the second power supply, and the fourth end of the first current source unit is connected to the third power supply. The first current source unit is used to mirror the reference current to form a first reference current. The first end of the second current source unit is connected to the first end of the first current source unit, the second end of the second current source unit is connected to the second selection switch unit, the third end of the second current source unit is connected to the second power supply, and the fourth end of the second current source unit is connected to the fourth end of the first current source unit. The second current source unit is used to mirror the first reference current to form a second reference current. The first reference current is used to provide current to the resistor string of the first low-dropout linear regulator circuit, and the second reference current is used to provide current to the resistor string of the second low-dropout linear regulator circuit.

11. The reference source circuit according to claim 10, characterized in that, The reference current generating unit includes a third operational amplifier, a third power transistor, and a second resistor; The non-inverting input of the third operational amplifier is connected to the first terminal of the third power transistor, the inverting input of the third operational amplifier is connected to a reference voltage, the output of the third operational amplifier is connected to the gate of the third power transistor and the output of the reference current generating unit, respectively; the second terminal of the third power transistor is connected to a second power supply. The first end of the second resistor is connected to the first terminal of the third power transistor, and the second end of the second resistor is grounded.

12. The reference source circuit according to claim 10, characterized in that, The first current source unit includes a first transistor and a second transistor; the second current source unit includes a third transistor and a fourth transistor; The gate of the first transistor is connected to the first terminal of the first current source unit, the first electrode of the first transistor is connected to the third terminal of the first current source unit, and the second electrode of the first transistor is connected to the first electrode of the second transistor. The gate of the second transistor is connected to the fourth terminal of the first current source unit, and the second terminal of the second transistor is connected to the second terminal of the first current source unit. The gate of the third transistor is connected to the first terminal of the second current source unit, the first terminal of the third transistor is connected to the third terminal of the second current source unit, and the second terminal of the third transistor is connected to the first terminal of the fourth transistor. The gate of the fourth transistor is connected to the fourth terminal of the second current source unit, and the second terminal of the fourth transistor is connected to the second terminal of the second current source unit.

13. A power supply chip, characterized in that, Includes the reference source circuit as described in any one of claims 1-12.

14. A display panel, characterized in that, Includes the power chip as described in claim 13.

15. The display panel according to claim 14, characterized in that, The display panel is a silicon-based OLED microdisplay panel.

16. A near-eye display device, characterized in that, Including the silicon-based OLED microdisplay panel as described in claim 15.

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