Methods, apparatus, media, and wafer processing methods for detecting wafer defect types

By receiving and analyzing the features and morphological characteristics of wafer transition region images, the defect types in the wafer transition region can be identified, solving the problem of incomplete detection in existing technologies and improving the accuracy of detection and product quality.

CN117038490BActive Publication Date: 2026-11-06XIAN ESWIN MATERIAL TECHNOLOGY CO LTD +1
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Patent Information

Application Number
CN202311092298.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-28
Publication Date
2026-11-06
Estimated Expiration
2043-08-28

AI Technical Summary

Technical Problem

In existing technologies, defects in the transition region of wafers cannot be effectively detected, resulting in incomplete detection, which increases the missed detection rate of defects and the risk of shipment.

Method used

By receiving images of the transition region and using a combination of image features and morphological features, the defect types in the wafer transition region can be identified, including determining the region to be identified and obtaining the morphological features of the defects, thereby improving the comprehensiveness and accuracy of the detection.

Benefits of technology

It improves the comprehensiveness and yield of wafer inspection, reduces the missed detection rate and shipment risk of defects, and ensures the product quality of the integrated circuit manufacturing process.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present application disclose a method and device for detecting a type of wafer defect, a medium and a wafer processing method. The method for detecting a type of wafer defect comprises the following steps: receiving a transition area image of a wafer to be detected; the transition area is an area of 2mm to 5mm between a radial surface and an edge of the wafer; determining a to-be-identified area with a defect according to an image feature of the transition area image; obtaining a topographic feature of the defect in the to-be-identified area; and determining a type of the defect in the to-be-identified area according to the topographic feature and a feature of the to-be-identified area.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a method, apparatus, medium and wafer processing method for detecting wafer defect types. Background Technology

[0002] In the process of integrated circuit manufacturing, defects can form on the wafer at any stage of the process. With the development of semiconductor technology, semiconductor devices are becoming increasingly miniaturized, and the impact of wafer defects on the semiconductor process is becoming more and more significant. Therefore, in the process of integrated circuit manufacturing, it is necessary to perform defect detection on the wafer, analyze the causes of defects based on the detection results, and adjust the production process or process equipment to reduce the generation of defects. Summary of the Invention

[0003] In view of this, embodiments of the present invention aim to provide a method, apparatus, medium, and wafer processing method for detecting wafer defect types; capable of detecting defect types in the transition region from the radial surface of the wafer to the wafer edge, improving the comprehensiveness and yield of wafer inspection, and reducing the missed detection rate and shipping risk of defects.

[0004] The technical solution of this invention is implemented as follows:

[0005] In a first aspect, embodiments of the present invention provide a method for detecting wafer defect types, including:

[0006] Receive the acquired image of the transition region of the wafer under test; the transition region is a 2mm to 5mm area between the radial surface and the edge of the wafer;

[0007] The defective region to be identified is determined based on the image features of the transition region image;

[0008] Obtain the morphological features of the defects existing in the region to be identified;

[0009] The type of defect existing in the region to be identified is determined based on the morphological features and the features of the region to be identified.

[0010] Secondly, embodiments of the present invention provide an apparatus for detecting wafer defect types, the apparatus comprising: a receiving portion, a determining portion, an acquiring portion, and an identifying portion; wherein;

[0011] The receiving section is configured to receive the acquired transition region image of the wafer under test; the transition region is a 2mm to 5mm area existing between the radial surface and the edge of the wafer;

[0012] The determining part is configured to determine the region to be identified that has defects based on the image features of the transition region image;

[0013] The acquisition part is configured to acquire the morphological features of defects existing in the region to be identified;

[0014] The identification section is configured to determine the type of defect present in the region to be identified based on the morphological features and the features of the region to be identified.

[0015] Thirdly, embodiments of the present invention provide a computing device, the computing device comprising: a processor and a memory; the processor being configured to execute instructions stored in the memory to implement the method for detecting wafer defect types as described in the first aspect.

[0016] Fourthly, embodiments of the present invention provide a computer storage medium storing at least one instruction, the at least one instruction being executed by a processor to implement the method for detecting wafer defect types as described in the first aspect.

[0017] Fifthly, embodiments of the present invention provide a wafer fabrication method, the method comprising:

[0018] Multiple wafers are obtained by performing wafer processing on single-crystal silicon ingots pulled by a set method;

[0019] Edge detection is performed on each of the plurality of wafers to obtain the edge detection results of the wafers;

[0020] Wafers with good edge detection results are inspected using the method for detecting wafer defect types described in the first aspect to determine the type of defects present in the transition region of the wafer.

[0021] This invention provides a method, apparatus, medium, and wafer processing method for detecting wafer defect types. For transition region images of wafers, after acquiring the region to be identified containing defects, the defect type in the transition region is identified by combining the features of the region to be identified that can be bounded by the defects and the morphological features of the defects. This improves the comprehensiveness and yield of wafer inspection, and reduces the false negative rate and shipping risk of defect detection. Attached Figure Description

[0022] Figure 1(a) is a schematic diagram of the structure of a wafer provided in an embodiment of the present invention;

[0023] Figure 1(b) is a schematic diagram of the transition region provided in an embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram of the implementation environment provided for an embodiment of the present invention;

[0025] Figure 3 This is a schematic flowchart of a method for identifying wafer edge defect types according to an embodiment of the present invention;

[0026] Figure 4 A schematic diagram illustrating the types of defects present in the transition region provided in this embodiment of the invention;

[0027] Figure 5 This is a schematic diagram of the region to be identified provided in an embodiment of the present invention;

[0028] Figure 6 This is a schematic diagram of a device for detecting wafer defect types provided in an embodiment of the present invention;

[0029] Figure 7 A schematic diagram of the structure of a computing device provided in an embodiment of the present invention;

[0030] Figure 8 This is a schematic diagram of a wafer fabrication method provided in an embodiment of the present invention;

[0031] Figure 9 This is a schematic diagram of a small scratch defect in EZB defects provided in an embodiment of the present invention. Detailed Implementation

[0032] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0033] After obtaining a single-crystal silicon ingot through the Czochralski method, the single-crystal silicon ingot can be processed by cutting, grinding, polishing, cleaning and other processes to obtain a polished wafer. In some cases, an epitaxial layer of single-crystal silicon can be formed on the radial surface of the polished wafer by chemical vapor deposition or other methods to obtain an epitaxial wafer.

[0034] Regardless of whether it's a polished wafer or an epitaxial wafer, the defects they contain have an increasingly significant impact on subsequent integrated circuit manufacturing processes and product yield. As shown in Figure 1(a), wafer 1 has an upper surface 2 and a lower surface 3. Since these two surfaces are aligned with the radial direction of wafer 1, they can also be referred to as the radial surfaces of the wafer in this embodiment of the invention. Furthermore, wafer 1 also has an edge portion at its peripheral end, formed by a chamfered surface 4 on the upper surface side, a chamfered surface 5 on the lower surface side, and an edge surface 6. In addition, wafer 1 also includes an outermost peripheral portion 7a of the upper surface adjacent to the chamfered surface 4 on the upper surface side and an outermost peripheral portion 7b of the lower surface adjacent to the chamfered surface 5 on the lower surface side.

[0035] For the edge portion, the chamfered surface 4 on the upper surface and the chamfered surface 5 on the lower surface are inclined relative to the upper surface 2 and the lower surface 3. The edge surface 6 is the portion of the edge portion excluding the chamfered surface 4 on the upper surface and the chamfered surface 5 on the lower surface, and is perpendicular to the upper surface 2 and the lower surface 3. The edge surface 6 may also be a slightly curved surface. The boundaries between the chamfered surface 4 on the upper surface and the chamfered surface 5 on the lower surface and the edge surface 6 are shown in Figure 1(a), and are generally formed smoothly. The outermost periphery 7a of the upper surface and the outermost periphery 7b of the lower surface may be formed by a portion of the upper surface 2 and the lower surface 3, respectively, and are respectively in the same plane as the upper surface 2 and the lower surface 3.

[0036] As shown in Figure 1(b), most current solutions target the upper and lower surfaces of the wafer (e.g., upper surface 2 and lower surface 3 in Figure 1(a)) and the edge portion of the wafer (e.g., chamfered surface 4 on the upper surface, chamfered surface 5 on the lower surface, and edge surface 6 in Figure 1(a)). However, they all neglect a transition region of approximately 2mm to 5mm between the radial surface and the edge of the wafer, such as 7a and 7b in Figure 1(a). For this transition region, since downstream manufacturers typically do not use the area approximately 3mm from the wafer edge during wafer processing, this unused area is not detected during the radial surface inspection of the wafer. Therefore, defects in the wafer transition region cannot be detected by either the radial surface defect detection method or the wafer edge detection method, resulting in a vacuum area or "blind zone" in current wafer defect detection solutions. However, if there are defects in this transition region, it will also affect the product yield of subsequent integrated circuit manufacturing processes.

[0037] Based on this, embodiments of the present invention provide a defect detection scheme for the transition region in a wafer, which improves the comprehensiveness and yield of wafer inspection, and reduces the missed detection rate and shipping risk of defects.

[0038] See Figure 2 The diagram illustrates an implementation environment provided by an embodiment of the present invention. The wafer under test (W) is placed horizontally, and the light source 20 emits a light beam towards the transition region of the wafer W, for example... Figure 2 The laser is shown. The scanning camera 30 acquires reflected or refracted light rays (as indicated by the dashed arrows) from the transition region of the wafer W under test, generating an image of the transition region of the wafer W and transmitting it to the computing device 40. The computing device 40 can execute the technical solution of this embodiment of the invention based on the received transition region image, thereby confirming the edge defect type of the wafer under test.

[0039] In some examples, the wafer under test (W) can be supported by a support member (not shown) that can rotate about a central axis, so that the scanning camera 30 can acquire a complete transition region image of the wafer W based on the rotation of the support member. In some examples, the light source 20 can be set coaxially with the scanning camera 30 or off-axis with the scanning camera 30; this will not be elaborated in the embodiments of the present invention. In some examples, since the wafer W under test includes a top surface and a bottom surface, two scanning cameras 30 can be set in the implementation environment, such as... Figure 2 As shown, 30-1 and 30-2 respectively acquire reflected or refracted light rays from the transition regions of the upper and lower surfaces of the wafer W under test to form corresponding images of the transition region (EZT) on the upper surface and the transition region (EZB) on the lower surface of the wafer W under test. In some examples, the number of scanning cameras 30 can also be set to one, which, under the control of a motion mechanism (not shown in the figure), acquires reflected or refracted light rays from the transition regions of the upper and lower surfaces of the wafer W under test, thereby generating images of the transition regions of the upper and lower surfaces of the wafer W under test.

[0040] It should be noted that, Figure 2 The implementation environment shown is for illustrative purposes only and is not intended to limit the scope of the invention. It is understood that those skilled in the art can acquire images of the transition region of the wafer W under test using other methods or systems; the embodiments of the present invention will not be described in detail here.

[0041] In some examples, computing device 40 can be at least one of devices such as smartphones, smartwatches, desktop computers, laptops, virtual reality terminals, augmented reality terminals, wireless terminals, and laptop computers. Computing device 40 has communication capabilities and can access wired or wireless networks. Computing device 40 can refer to one of multiple terminals; those skilled in the art will understand that the number of such terminals can be more or less. In some examples, computing device 40 can receive transition area images transmitted by scanning camera 30 based on the accessed wired or wireless network. It is understood that computing device 40 undertakes the calculation and processing work of the technical solution of this invention, and the embodiments of this invention do not limit this aspect.

[0042] See Figure 3 This illustrates a method for identifying wafer edge defect types according to an embodiment of the present invention. This method can be executed by the computing device 40 shown in FIG. 1, and may include:

[0043] S310: Receives the acquired image of the transition region of the wafer under test;

[0044] In this embodiment of the invention, the wafer under test typically has a notch. Figure 2 Taking the illustrated implementation environment as an example, due to the rotation of the carrier around its axis, a complete transition region image can be acquired. This complete transition region image starts from and ends with a notch-shaped pattern. Therefore, in this embodiment of the invention, the image portion between two notch patterns in the complete image can be processed as the transition region image of the wafer under test.

[0045] In some examples, since the transition region of the wafer W under test includes a transition region (EZT) on the upper surface and a transition region (EZB) on the lower surface, the transition region image may accordingly include an EZT image and an EZB image.

[0046] In some examples, the original image of the edge of the wafer under test can be binarized by setting the pixel grayscale value in the image to the range of 0 to 255; compared with the original image, it is possible to more clearly distinguish the normal part and the defective part of the wafer under test in the transition region.

[0047] S320: Determine the region to be identified that has defects based on the image features of the transition region image;

[0048] In this embodiment of the invention, the defective region to be identified can be determined based on the changes in grayscale values ​​in the image. It should be noted that for defect-free portions of the wafer transition region, the laser will undergo specular reflection at these locations, resulting in a larger laser beam captured by the scanning camera 30, and the corresponding portion in the image will appear brighter in grayscale. For defective portions of the wafer transition region, the laser will undergo diffuse reflection at the defect locations, resulting in a smaller laser beam captured by the scanning camera 30, and the grayscale value of the defective portion in the image will change significantly and become darker. Based on the above description of the characteristics of defects in the image, if a region with a significant change in grayscale value and a darker appearance appears in the transition region image, then it can be determined that a defect exists in that region. In some examples, the shape of the region to be identified can be rectangular, and it can completely encompass the defect within it.

[0049] S330: Obtain the morphological features of the defects existing in the area to be identified;

[0050] In this embodiment of the invention, after confirming the area to be identified according to the above steps, the morphological features of the defects existing in that area can be obtained in the image. For various transition region defect types, due to their different formation mechanisms, the morphology appearing in the transition region of the wafer is also different. Furthermore, the morphological features presented in the image are also not entirely the same. Morphological features can directly characterize the shape, size, area, and other morphological parameters of the defects in the transition region of the wafer, and compared to image features such as grayscale values, can provide a more accurate basis for defect type identification. Continuing in combination... Figure 4 As shown, the four most common types of defects in the transition region are: small notch defects, elongated defects, large notch defects, and small scratch defects. From... Figure 4 As can be seen from the morphology presented, the morphological differences of these four types of defects are quite obvious, which can provide a more accurate basis for identifying defect types. S340: Determine the type of defect existing in the region to be identified based on the morphological features and the features of the region to be identified.

[0051] In this embodiment of the invention, in addition to morphological features, since the region to be identified can completely encompass the defects within it, the feature parameters of that region can also characterize the morphology of the defects in some aspects. Based on this, this embodiment of the invention combines morphological features and features of the region to be identified to jointly identify the type of defects in the transition region, which improves the accuracy of defect type identification compared to using morphological features or features of the region to be identified alone.

[0052] Regarding the above technical solution, in the embodiments of the present invention, after obtaining the region to be identified that has defects in the transition region image of the wafer, the defect type in the transition region is identified by combining the features of the region to be identified that can be bounded by the defects and the morphological features of the defects, thereby improving the comprehensiveness and yield of wafer inspection and reducing the false negative rate and shipping risk of defect detection.

[0053] for Figure 3 In some possible implementations of the technical solution shown, determining the defective region to be identified based on the image features of the transition region image includes:

[0054] In the grayscale image corresponding to the transition region image, the grayscale value at the position where the grayscale fluctuation value is less than the set first threshold is selected as the reference value;

[0055] The region where the grayscale fluctuation amplitude is greater than the set second threshold relative to the benchmark value is designated as the region to be expanded.

[0056] Using the center of the area to be expanded, obtain the longest distance of the boundary of the area to be expanded along the horizontal and vertical directions respectively, to form the width and height sides of the area to be identified;

[0057] The region to be identified is determined based on the width and height of the region to be identified and the center of the region to be expanded.

[0058] It should be noted that in the grayscale image corresponding to the transition region image, the defect-free parts of the wafer's transition region appear as brighter grayscale values ​​with relatively smooth fluctuations, or roughly consistent grayscale values. Conversely, defective parts of the wafer's transition region appear as significantly different and darker grayscale values. In this implementation, a first threshold and a second threshold are used to characterize the degree of grayscale fluctuation. Specifically, if the grayscale fluctuation is less than the first threshold, the fluctuation is relatively smooth, and the wafer's transition region and the corresponding area with relatively smooth fluctuations in the image are defect-free. If the grayscale fluctuation is greater than the second threshold, the fluctuation is significant, and the wafer's transition region and the corresponding area with significant fluctuations in the image have defects. Areas with significant grayscale fluctuations in the image can be identified as having defects, but complete delimitation of these defects is not possible. Therefore, these areas are considered as areas to be expanded to form regions capable of delimiting defects.

[0059] The implementation process of expanding the area to be expanded into the area to be identified can be detailed as follows: Figure 5 As shown, the darker gray areas represent the areas to be expanded that contain defects. Using the centroid of the defect area within the expanded area as the center, the longest distances along both the horizontal and vertical directions (as indicated by the arrows in the horizontal and vertical directions) are used to form the area to be identified (e.g., the boundary of the defect). Figure 5 The width and height of the Box identifier are used to define the region to be identified. The region to be identified is formed based on the width and height of the region to be identified and the center of the region to be expanded.

[0060] for Figure 3 In some possible implementations of the technical solution shown, the morphological features of the defect include: the area ratio of the defect in the region to be identified and the ratio of the longest axis to the shortest axis of the defect; the features of the region to be identified include the width and height lengths of the region to be identified and the brightness standard deviation (IntStdDev) of the region occupied by the defect.

[0061] In the above implementation methods, in some examples, the process of obtaining the morphological features of defects can specifically be as follows: On the one hand, the area ratio of the defect in the area to be identified can be obtained based on the ratio of the area occupied by the defect to the area of ​​the area to be identified. On the other hand, within the area to be identified, the two ends of the area occupied by the defect can be connected by a line, and the line with the longest distance can be taken as the major axis of the defect; and the line with the shortest distance can be taken as the minor axis of the defect.

[0062] In the example above, specifically, the area containing grayscale is the area occupied by the defect within the region to be identified, denoted as the Defect area. The area of ​​the region to be identified (Box area) is the product of the width and height sides. The percentage of the defect's area within the region to be identified can be obtained using the following formula:

[0063] Fill Ratio=Defect area / Box area.

[0064] Furthermore, within the area to be identified, since the light scattering degree is high when the scanning camera collects light in the transition area, the features of the area to be identified can also include the gray values ​​of the brightest and darkest sub-regions within the area occupied by the defect, as well as the ratio of the highest brightness to the lowest brightness (Contrast) obtained from Brightest and Darkest. The standard deviation of the brightness of the area occupied by the defect can also be obtained from the luminance value of the area occupied by the defect (IntStdDev).

[0065] It should be noted that, through the above implementation method and its examples, after determining the defective areas to be identified and obtaining the morphological features of the defects within those areas, defect type identification can be performed for each defect within the identified areas. Combined with the aforementioned... Figure 4 The four common types of defects in the transition region of the wafer shown have distinct morphologies and shapes of the regions to be identified that are formed by the corresponding defect morphologies.

[0066] For small notch defects, the edges appear notched, similar to chip defects, primarily caused by chip defects extending into the wafer. In areas where this type of defect exists, the width and high-speed edge lengths of the region to be identified are relatively close, the defect occupies a small area within the identified region, and the longest axis of the defect deflection relative to a set reference angle does not have a fixed range.

[0067] For elongated defects, the main cause is the extension of cracks from edge defects into the wafer interior. They appear as elongated shapes in the image, and the area to be identified also appears as a thin strip, with the defect occupying a relatively small area within that region.

[0068] Large notch defects are characterized by large-area missing edges and are primarily caused by chip defects extending into the wafer. Compared to small notch defects, they have a larger area proportion within the identified region, and the width and high-speed edge lengths of the identified region are more similar.

[0069] For small scratch defects, similar to scratches in edge defects, most are caused by cracks extending into the wafer from edge defects. Compared to elongated defects, although the size parameters are smaller, they can be distinguished by the brightness standard deviation (IntStdDev) of the area occupied by the defect.

[0070] Based on the above analysis of the four types of defects, and combined with the morphological features of the defects and the features of the region to be identified obtained from the aforementioned implementation methods and examples, this embodiment of the invention provides the feature parameter ranges of the four types of defects presented in the image, as shown in Table 1. In Table 1, the units of Box Width, Box Height, Major Axis, and Minor Axis parameters are all μm. When setting the threshold for the characterization judgment condition based on these parameters, they are usually set to the minimum value, that is, the minimum value of these parameters is used as the threshold for the characterization judgment condition.

[0071]

[0072] Table 1

[0073] In some examples, determining the type of defect present in the region to be identified based on the morphological features and the features of the region to be identified includes:

[0074] If the area ratio of the defect in the area to be identified is not less than a set first area ratio threshold, the type of defect existing in the area to be identified is initially determined to be a small notch defect or a large notch defect.

[0075] Based on the preliminary determination of small or large notch defects, if the length of the width and height of the defect in the area to be identified is greater than the set length threshold, then the defect type in the area to be identified is determined to be a large notch defect; otherwise, it is determined to be a small notch defect.

[0076] If the area ratio of the defect in the area to be identified is less than the set first area ratio threshold, and / or the ratio of the longest axis (Major Axis) to the shortest axis (Minor Axis) of the defect is greater than the set length ratio threshold, the type of defect existing in the area to be identified is initially determined to be a narrow defect or a small scratch defect.

[0077] Based on the initially determined elongated defects or small scratch defects, if the brightness standard deviation (IntStdDev) of the area occupied by the defect is greater than the set standard deviation threshold, then the defect type in the area to be identified is determined to be a small scratch defect; otherwise, it is determined to be an elongated defect.

[0078] For the example above, combined Figure 4 The defects shown in the image and the feature parameter ranges of the four types of defects shown in Table 1 are illustrated. Specifically, small or large notch defects have higher Fill Ratio values, while elongated defects or small scratches have lower Fill Ratio values. Based on this, a first area proportion threshold can be set for the Fill Ratio value to initially determine whether a small or large notch defect is a defect, thus distinguishing it from elongated defects and small scratches. Furthermore, since the area of ​​a large notch defect is larger than that of a small notch defect, the Box Width and Box Height of the area to be identified where a large notch defect is located are usually significantly larger than those of the area to be identified where a small notch defect is located. Therefore, a length threshold can be set for Box Width and Box Height to distinguish large and small notch defects.

[0079] For elongated defects and small scratches, both are elongated in shape in the image, with a small area and a small proportion of the area to be identified, which also appears as a thin strip. Based on this, the proportion and / or shape of the area to be identified can be used as preliminary criteria for determining elongated defects and small scratches, thus distinguishing them from small or large notch defects. For example, the proportion of the area to be identified can be characterized by being less than a first area proportion threshold, and the elongated shape of the area to be identified can be characterized by the ratio of the longest axis (Major Axis) to the shortest axis (Minor Axis) of the defect being greater than a set length ratio threshold. After initially identifying elongated defects and small scratches, since the IntStdDev index of small scratches differs significantly from other types of defects, the brightness standard deviation (IntStdDev) of the area occupied by the defect can be used to distinguish between elongated defects and small scratches.

[0080] Through the above examples and their specific implementation process, based on the morphological features of defects in the image and the features of the region to be identified used to select defects, the defect types in the transition region of the wafer can be accurately distinguished, improving the comprehensiveness and yield of wafer inspection, and reducing the false negative rate and shipping risk of defect detection.

[0081] Based on the same inventive concept as the aforementioned technical solution, see [link to inventive concept]. Figure 6 This illustration shows an apparatus 60 for detecting wafer defect types according to an embodiment of the present invention. The apparatus 60 includes: a receiving part 601, a determining part 602, an acquiring part 603, and an identifying part 604; wherein,

[0082] The receiving section 601 is configured to receive the acquired transition region image of the wafer under test; the transition region is a 2mm to 5mm area existing between the radial surface and the edge of the wafer;

[0083] The determining part 602 is configured to determine the region to be identified that has defects based on the image features of the transition region image;

[0084] The acquisition part 603 is configured to acquire the morphological features of defects existing in the region to be identified;

[0085] The identification section 604 is configured to determine the type of defect existing in the region to be identified based on the morphological features and the features of the region to be identified.

[0086] In some examples, the determining portion 602 is configured as follows:

[0087] In the grayscale image corresponding to the transition region image, the grayscale value at the position where the grayscale fluctuation value is less than the set first threshold is selected as the reference value;

[0088] The region where the grayscale fluctuation amplitude is greater than the set second threshold relative to the benchmark value is designated as the region to be expanded.

[0089] Using the center of the area to be expanded, obtain the longest distance of the boundary of the area to be expanded along the horizontal and vertical directions respectively, to form the width and height sides of the area to be identified;

[0090] The region to be identified is determined based on the width and height of the region to be identified and the center of the region to be expanded.

[0091] In some examples, the morphological features include: the area ratio of the defect within the region to be identified and the ratio between the longest and shortest axes of the defect; the features of the region to be identified include the horizontal and vertical lengths of the region to be identified and the standard deviation of the brightness of the area occupied by the defect.

[0092] In some examples, the identification portion 604 is configured as follows:

[0093] If the area ratio of the defect in the area to be identified is not less than a set first area ratio threshold, the type of defect existing in the area to be identified is initially determined to be a small notch defect or a large notch defect.

[0094] Based on the preliminary determination of small or large notch defects, if the length of the width side and the length of the height side of the defect in the area to be identified are both greater than the set length threshold, then the defect type in the area to be identified is determined to be a large notch defect; otherwise, it is determined to be a small notch defect.

[0095] If the area ratio of the defect in the area to be identified is less than a set first area ratio threshold, and / or the ratio of the longest axis to the shortest axis of the defect is greater than a set length ratio threshold, the type of defect existing in the area to be identified is initially determined to be a narrow defect or a small scratch defect.

[0096] Based on the initially determined elongated defects or small scratches, if the standard deviation of the brightness of the area occupied by the defect is greater than the set standard deviation threshold, then the defect type in the area to be identified is determined to be a small scratch; otherwise, it is determined to be an elongated defect.

[0097] In some examples, the acquisition section 603 is configured as follows:

[0098] Within the area to be identified, the two ends of the area occupied by the defect are connected by a line, and the line with the longest distance is determined as the longest axis of the defect, and the line with the shortest distance is determined as the shortest axis of the defect.

[0099] Please refer to Figure 7This diagram illustrates a structural block diagram of a computing device provided in an exemplary embodiment of this application. In some examples, the computing device 70 can be at least one of devices such as a smartphone, smartwatch, desktop computer, laptop, virtual reality terminal, augmented reality terminal, wireless terminal, and laptop computer. The computing device 70 has communication capabilities and can access wired or wireless networks. The computing device 70 can refer to one of multiple terminals, and those skilled in the art will understand that the number of such terminals can be more or less. In some examples, the computing device 70 can receive transition region image data of the wafer under test based on the accessed wired or wireless network. It is understood that the computing device 70 undertakes the calculation and processing work of the technical solution of this invention, and the embodiments of this invention do not limit this aspect.

[0100] like Figure 7 As shown, the computing device in this application may include one or more of the following components: processor 710 and memory 720.

[0101] Optionally, the processor 710 connects various parts within the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 720, and by calling data stored in the memory 720. Optionally, the processor 710 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 710 can integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Specifically, the CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required to be displayed on the touch screen; the NPU is used to implement Artificial Intelligence (AI) functions; and the baseband chip is used to handle wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor 710, but may be implemented using a separate chip.

[0102] The memory 720 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 720 may include a non-transitory computer-readable storage medium. The memory 720 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 720 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0103] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, WiFi module, power supply, Bluetooth module, etc., which will not be described in detail here.

[0104] This application also provides a computer-readable storage medium storing at least one instruction, which is executed by a processor to implement the method for detecting wafer defect types as described in the above embodiments.

[0105] This application also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform the method for detecting wafer defect types as described in the above embodiments.

[0106] Those skilled in the art will recognize that the functions described in the embodiments of this application in one or more of the above examples can be implemented using hardware, software, firmware, or any combination thereof. When implemented using software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0107] Based on the above-described scheme for identifying wafer edge defect types, see [link to relevant documentation]. Figure 8 This illustrates a wafer fabrication method provided by an embodiment of the present invention, which may include:

[0108] S801: Perform wafer processing on a single-crystal silicon ingot pulled by a set method to obtain multiple wafers;

[0109] S802: Perform edge detection on each of the plurality of wafers to obtain the edge detection result of the wafer;

[0110] S803: The wafer with a good edge detection result is tested by the method for detecting wafer defect type described in any of the foregoing embodiments to determine the type of defect present in the transition region of the wafer.

[0111] In some examples of the wafer fabrication method, the method further includes:

[0112] If a defect exists in the transition region corresponding to the bottom of the wafer, the wafer is reworked to remove the defect.

[0113] for Figure 8 The technical solution shown, in detail, is that since edge detection is an important part of the wafer inspection process, in some examples, the defect detection scheme for transition regions described in the aforementioned embodiments can be used as an auxiliary judgment condition for edge detection. Although both EZT and EZB can have various types of defects, in actual production, it can be found that some EZB defects do not pose a shipping risk. These EZB defects can be eliminated after re-staining double-sided polishing (Re-DSP), for example... Figure 9 The small scratches shown in the EZB defects can be eliminated after Re-DSP.

[0114] Based on the above explanation, it can be determined that in actual production, EZB defects can be set to RD level, meaning they can be eliminated through rework. However, EZT defects cannot be eliminated through rework; therefore, EZT defects are usually set to RJ level.

[0115] It should be noted that the technical solutions described in the embodiments of the present invention can be combined arbitrarily without conflict.

[0116] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for detecting wafer defect types, characterized in that, include: Receive the acquired image of the transition region of the wafer under test; the transition region is a 2mm to 5mm area between the radial surface and the edge of the wafer; The defective region to be identified is determined based on the image features of the transition region image; The morphological features of defects existing in the region to be identified are obtained, and the morphological features include: the area ratio of the defect in the region to be identified and the ratio between the longest axis and the shortest axis of the defect; The type of defect existing in the region to be identified is determined based on the morphological features and the features of the region to be identified; If the area ratio of the defect in the area to be identified is less than a set first area ratio threshold, and / or the ratio of the longest axis to the shortest axis of the defect is greater than a set length ratio threshold, the type of defect existing in the area to be identified is initially determined to be a narrow defect or a small scratch defect. Based on the initially determined elongated defects or small scratches, if the standard deviation of the brightness of the area occupied by the defect is greater than the set standard deviation threshold, then the defect type in the area to be identified is determined to be a small scratch; otherwise, it is determined to be an elongated defect.

2. The method according to claim 1, characterized in that, The step of determining the defective region to be identified based on the image features of the transition region image includes: In the grayscale image corresponding to the transition region image, the grayscale value at the position where the grayscale fluctuation value is less than the set first threshold is selected as the reference value; The region where the grayscale fluctuation amplitude is greater than the set second threshold relative to the benchmark value is designated as the region to be expanded. Using the center of the area to be expanded, obtain the longest distance of the boundary of the area to be expanded along the horizontal and vertical directions respectively, to form the width and height sides of the area to be identified; The region to be identified is determined based on the width and height of the region to be identified and the center of the region to be expanded.

3. The method according to claim 1, characterized in that, The features of the region to be identified include the horizontal length and vertical length of the region to be identified, as well as the standard deviation of the brightness of the area occupied by the defect.

4. The method according to claim 3, characterized in that, Determining the type of defect present in the region to be identified based on the morphological features and the features of the region to be identified includes: If the area ratio of the defect in the area to be identified is not less than a set first area ratio threshold, the type of defect existing in the area to be identified is initially determined to be a small notch defect or a large notch defect. Based on the preliminary determination of small or large notch defects, if the length of the width side and the length of the height side of the defect in the area to be identified are both greater than the set length threshold, then the defect type in the area to be identified is determined to be a large notch defect; otherwise, it is determined to be a small notch defect.

5. The method according to claim 1, characterized in that, The step of acquiring the morphological features of defects existing in the region to be identified includes: Within the area to be identified, the two ends of the area occupied by the defect are connected by a line, and the line with the longest distance is determined as the longest axis of the defect, and the line with the shortest distance is determined as the shortest axis of the defect.

6. An apparatus for detecting wafer defect types, characterized in that, The device includes: a receiving section, a determining section, an acquiring section, and an identifying section; wherein, The receiving section is configured to receive the acquired transition region image of the wafer under test; the transition region is a 2mm to 5mm area existing between the radial surface and the edge of the wafer; The determining part is configured to determine the region to be identified that has defects based on the image features of the transition region image; The acquisition part is configured to acquire the morphological features of defects existing in the region to be identified, the morphological features including: the area ratio of the defect in the region to be identified and the ratio between the longest axis and the shortest axis of the defect; The identification section is configured to determine the type of defect present in the region to be identified based on the morphological features and the features of the region to be identified; The identification section is further configured to initially determine the type of defect existing in the area to be identified as a narrow defect or a small scratch defect, corresponding to the area ratio of the defect in the area to be identified being less than a set first area ratio threshold, and / or the ratio of the longest axis to the shortest axis of the defect being greater than a set length ratio threshold; based on the initially determined narrow defect or small scratch defect, if the standard deviation of the brightness of the area occupied by the defect is greater than a set standard deviation threshold, then the type of defect existing in the area to be identified is determined to be a small scratch defect; otherwise, it is determined to be a narrow defect.

7. A computing device, characterized in that, The computing device includes a processor and a memory; the processor is configured to execute instructions stored in the memory to implement the method for detecting wafer defect types as described in any one of claims 1 to 5.

8. A computer storage medium, characterized in that, The storage medium stores at least one instruction, which is executed by a processor to implement the method for detecting wafer defect types as described in any one of claims 1 to 5.

9. A wafer fabrication method, characterized in that, The method includes: Multiple wafers are obtained by performing wafer processing on single-crystal silicon ingots pulled by a set method; Edge detection is performed on each of the plurality of wafers to obtain the edge detection results of the wafers; The wafer with a good edge detection result is inspected by the method for detecting wafer defect type as described in any one of claims 1 to 5 to determine the type of defect present in the transition region of the wafer.

10. The method according to claim 9, characterized in that, The method further includes: If a defect exists in the transition region at the bottom of the wafer, the wafer is reworked to remove the defect.

Citation Information

Patent Citations

  • Classification and detection method of wafer appearance defects

    CN103674965A

  • Method for detecting edge defect of wafer

    CN104282587A

  • Defect detection method, device and equipment and computer readable storage medium

    CN114332012A

  • Inspection method, inspection device and manufacturing method for silicon wafer

    TW202006850A