Image processing apparatus, method, electronic device, and storage medium

Abstract

The present disclosure provides an image processing apparatus, method, electronic device and storage medium, which can be applied to the technical field of display. The image processing apparatus comprises: a clipping circuit configured to clip an original image to obtain a clipped image; a determination circuit configured to determine a target image and a non-target image from the original image and the clipped image; a processing circuit configured to perform image processing on the target image to obtain an intermediate image; and a fusion circuit configured to fuse the non-target image and the intermediate image to obtain a fused image.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more specifically, to an image processing apparatus, method, electronic device, and storage medium. Background Technology

[0002] During video image processing, it's necessary to display the before and after effects to evaluate whether the processing meets expectations. However, due to the real-time nature of video playback, simply playing the unprocessed and processed images separately doesn't provide a clear comparison of the processing results. Summary of the Invention

[0003] In view of the above, this disclosure provides an image processing apparatus, method, electronic device, and storage medium.

[0004] One aspect of this disclosure provides an image processing apparatus, comprising:

[0005] The cropping circuit is configured to crop the original image to obtain a cropped image;

[0006] The circuit is configured to determine the target image and the non-target image from the original image and the cropped image.

[0007] The processing circuit is configured to perform image processing on the target image to obtain an intermediate image; and

[0008] The fusion circuit is configured to fuse the aforementioned non-target image and the aforementioned intermediate image to obtain a fused image.

[0009] According to embodiments of this disclosure, the above-mentioned trimming circuit includes:

[0010] The counter is configured to count multiple pixels of the original image to obtain the column value and row value of each pixel, wherein the column value represents the horizontal position information of the pixel and the row value represents the vertical position information of the pixel.

[0011] The cropping region configuration register is configured to store preset cropping region information; and

[0012] The comparison sub-circuit is configured to, for each of the plurality of pixels, determine at least one valid pixel among the plurality of pixels based on the preset cropping region information, the horizontal position information of the pixel, and the vertical position information of the pixel, and obtain the cropped image based on the at least one valid pixel.

[0013] According to embodiments of this disclosure, the above-mentioned fusion circuit includes a first fusion sub-circuit;

[0014] The aforementioned first fusion sub-circuit is configured as follows:

[0015] When the original image is determined to be the target image and the cropped image is determined to be the non-target image, the rendering color of the overlapping area between the non-target image and the intermediate image is set to the rendering color of the non-target image, and the non-overlapping area between the non-target image and the intermediate image is set to the rendering color of the intermediate image; or,

[0016] When the cropped image is determined as the target image and the original image is determined as the non-target image, the rendering color of the overlapping area between the non-target image and the intermediate image is set to the rendering color of the intermediate image, and the rendering color of the non-overlapping area between the non-target image and the intermediate image is set to the rendering color of the non-target image.

[0017] According to embodiments of this disclosure, the above-mentioned fusion circuit includes:

[0018] The transparency parameter configuration register is configured to store preset transparency values ​​corresponding to the aforementioned non-target image and the aforementioned intermediate image; and

[0019] The second fusion sub-circuit is configured to fuse the non-target image and the intermediate image according to a preset transparency corresponding to the non-target image and the intermediate image to obtain the fused image.

[0020] According to embodiments of this disclosure, the second fusion sub-circuit is further configured as follows:

[0021] When the original image is determined to be the non-target image, the transparency corresponding to the non-target image is a first preset value, and the transparency corresponding to the intermediate image is a second preset value, the rendering color of the fused image is set to the rendering color of the original image.

[0022] According to embodiments of this disclosure, the second fusion sub-circuit is further configured as follows:

[0023] When the cropped image is determined to be the non-target image, the transparency corresponding to the non-target image is set to a second preset value, and the transparency corresponding to the intermediate image is set to a first preset value, the rendering color of the fused image is set to the rendering color of the intermediate image.

[0024] According to embodiments of this disclosure, the above-described fusion circuit further includes:

[0025] The third fusion sub-circuit is configured to set the rendering color of the non-overlapping area between the fused image and the display area to a preset color when the size of the fused image is smaller than the size of the display area of ​​the image processing device.

[0026] According to embodiments of this disclosure, when the preset clipping area is a rectangle, the preset clipping area information includes first preset position information and second preset position information, wherein the first preset position information and the second preset position information are the position information of two opposite vertices in the rectangle; or, the preset clipping area information includes the first preset position information and preset rectangle size information, wherein the first preset position information represents the position information of the preset vertices of the rectangle.

[0027] When the preset cropping area is circular, the preset cropping area information includes preset center position information and preset radius information;

[0028] When the preset clipping area is an ellipse, the preset clipping area information includes preset focal point position information, preset major axis information, and preset minor axis information.

[0029] Another aspect of this disclosure provides an image processing method, comprising:

[0030] The original image is cropped to obtain the cropped image;

[0031] The target image and non-target image are determined from the original image and the cropped image described above;

[0032] Image processing is performed on the target image to obtain an intermediate image; and

[0033] The non-target image and the intermediate image are fused together to obtain a fused image.

[0034] Another aspect of this disclosure provides an image display device, comprising:

[0035] The aforementioned image processing apparatus; and

[0036] The display circuit is configured to display the fused image obtained by the image processing device described above.

[0037] Another aspect of this disclosure provides an electronic device, including: one or more processors; and a memory for storing one or more instructions, wherein when the one or more instructions are executed by the one or more processors, they cause the one or more processors to implement the method described above.

[0038] Another aspect of this disclosure provides a computer-readable storage medium storing computer-executable instructions that, when executed by a processor, cause the processor to implement the method described above.

[0039] Another aspect of this disclosure provides a computer program product including computer-executable instructions that, when executed, are used to implement the method described above.

[0040] According to the technical solution of this disclosure, by configuring a cropping circuit, a determining circuit, and a fusion circuit in the image processing device to assist the processing circuit, the fused image is made to have a demonstration window effect. The fused image is obtained by fusing the non-target image before processing and the target image after processing, allowing for a direct comparison of the image processing effects based on the fused image. Thus, the image processing device achieves a demonstration window function even when the processing circuit itself does not have this function, without requiring modifications to the processing circuit. Since implementing a demonstration window function in the processing circuit would increase implementation difficulty, this solution reduces implementation difficulty, thereby shortening the development cycle and lowering development costs. Furthermore, since the cropping circuit, determining circuit, and fusion circuit can cooperate with the processing circuit without requiring modifications to the processing circuit, the applicability of the image processing device is improved. Attached Figure Description

[0041] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0042] Figure 1 A schematic diagram of the structure of an image processing apparatus according to an embodiment of the present disclosure is shown;

[0043] Figure 2 A schematic diagram of the structure of a trimming circuit according to an embodiment of the present disclosure is shown;

[0044] Figure 3 A schematic diagram of a preset cropping region of a rectangle according to an embodiment of the present disclosure is shown;

[0045] Figure 4 An equivalent circuit diagram of an image processing apparatus is shown in the case where the target image is a cropped image, according to an embodiment of the present disclosure.

[0046] Figure 5 An equivalent circuit diagram of an image processing apparatus is shown in the case where the target image is an original image, according to an embodiment of the present disclosure.

[0047] Figure 6 A schematic diagram of the structure of an image processing apparatus according to an embodiment of the present disclosure is shown when the processing circuitry is HDR.

[0048] Figure 7 A signal timing diagram of an image processing apparatus according to an embodiment of the present disclosure is shown;

[0049] Figure 8A A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to an embodiment of the present disclosure;

[0050] Figure 8B A schematic diagram of image fusion is shown in the case where the target image is the original image, according to an embodiment of the present disclosure;

[0051] Figure 9 A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to another embodiment of the present disclosure;

[0052] Figure 10 A schematic diagram of image fusion is shown in the case where the target image is the original image, according to another embodiment of the present disclosure;

[0053] Figure 11A A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to another embodiment of the present disclosure;

[0054] Figure 11B A schematic diagram of image fusion is shown in the case where the target image is the original image, according to another embodiment of the present disclosure;

[0055] Figure 11C A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to another embodiment of the present disclosure;

[0056] Figure 11D A schematic diagram of image fusion is shown in the case where the target image is the original image, according to another embodiment of the present disclosure;

[0057] Figure 12 A flowchart of an image processing method according to an embodiment of the present disclosure is shown;

[0058] Figure 13 A schematic diagram of the structure of an image display device according to an embodiment of the present disclosure is shown; and

[0059] Figure 14 A block diagram of an electronic device suitable for implementing the methods described above, according to embodiments of the present disclosure, is illustrated schematically. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Based on the described embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure. In the following description, some specific embodiments are for descriptive purposes only and should not be construed as limiting this disclosure in any way, but are merely examples of embodiments of this disclosure. Conventional structures or constructions will be omitted where they may cause confusion in understanding this disclosure. It should be noted that the shapes and dimensions of the components in the figures do not reflect actual size and proportion, but are only schematic representations of the contents of the embodiments of this disclosure.

[0061] Unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should have the ordinary meaning understood by those skilled in the art. It should be noted that the terms used herein should be interpreted in a manner consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.

[0062] The figures illustrate several block diagrams and / or flowcharts. It should be understood that some blocks, or combinations thereof, in the block diagrams and / or flowcharts can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that, when executed by the processor, these instructions can create means for implementing the functions / operations described in these block diagrams and / or flowcharts. The technology disclosed herein can be implemented in hardware and / or software (including firmware, microcode, etc.). Alternatively, the technology disclosed herein can take the form of a computer program product stored on a computer-readable storage medium, which is available for use by or in conjunction with an instruction execution system.

[0063] To more intuitively compare the effects of video image processing, related technologies typically use a demo window to display the effects before and after image processing. This involves dividing the same video image into one or more regions, displaying the processed image in a designated region, and the unprocessed image in the remaining regions. A demo window can be, for example, a Highlight Window (HLW).

[0064] However, some image processing methods that employ special algorithms are not suitable for directly adding a demo window, or the image processing methods included in well-developed mature image processing software or purchased third-party image processing software do not support demo windows. If these image processing methods are required to have demo window functionality, they need to be redeveloped, making it difficult, time-consuming, and costly to implement a demo window to display the before and after image processing effects. Therefore, this disclosure provides an image processing apparatus, method, electronic device, and storage medium.

[0065] Figure 1 A schematic diagram of the structure of an image processing apparatus according to an embodiment of the present disclosure is shown.

[0066] like Figure 1 As shown, the image processing device 100 may include a cropping circuit 110, a determining circuit 120, a processing circuit 130, and a fusion circuit 140.

[0067] Cropping circuit 110 can be configured to crop the original image to obtain a cropped image. Determining circuit 120 can be configured to determine the target image and non-target image from the original image and the cropped image. Processing circuit 130 can be configured to perform image processing on the target image to obtain an intermediate image. Fusion circuit 140 can be configured to fuse the non-target image and the intermediate image to obtain a fused image.

[0068] According to embodiments of this disclosure, the original image may include at least one of a static image and a dynamic image. The dynamic image may include a video image. The original image may include multiple pixels. The target image may represent the image to be processed. The target image may be the original image or a cropped image. If the target image is the original image, the non-target image is a cropped image. If the target image is a cropped image, the non-target image is the original image.

[0069] According to embodiments of this disclosure, processing circuit 110 may refer to processing circuit that does not have a presentation window function. For example, processing circuit 110 may be a pre-developed circuit that does not have a presentation window function.

[0070] According to embodiments of this disclosure, when the target image is the original image and the non-target image is a cropped image, for pixels located in the overlapping region between the intermediate image and the cropped image, a first statistical value of the pixel can be determined based on the pixel value of the pixel in the cropped image and the pixel value of the pixel in the intermediate image, and this first statistical value is determined as the pixel value of the pixel in the fused image. For example, the first statistical value may include a first average value. Alternatively, the pixel value of the pixel in the intermediate image may also be determined as the pixel value of the pixel in the fused image. For pixels located in the non-overlapping region between the intermediate image and the cropped image, the pixel value of the pixel in the intermediate image may be determined as the pixel value of the pixel in the fused image.

[0071] According to embodiments of this disclosure, when the target image is a cropped image and the non-target image is the original image, for pixels located in the overlapping region between the intermediate image and the original image, a second statistical value of the pixel can be determined based on the pixel value of the pixel in the intermediate image and the pixel value of the pixel in the original image, and this second statistical value is then used as the pixel value of the pixel in the fused image. For example, the second statistical value may include a second average value. Alternatively, the pixel value of the pixel in the intermediate image may also be used as the pixel value of the pixel in the fused image. For pixels located in the non-overlapping region between the intermediate image and the original image, the pixel value of the pixel in the original image may be used as the pixel value of the pixel in the fused image.

[0072] According to embodiments of this disclosure, when the processing circuit lacks a demonstration window function, a cropping circuit, a determining circuit, and a fusion circuit are configured in the image processing device to assist the processing circuit, thereby enabling the fused image to have a demonstration window effect. The fused image is obtained by fusing the non-target image before processing and the target image after processing, allowing for a direct comparison of the image processing effects based on the fused image. Thus, even when the processing circuit lacks a demonstration window function, and no modifications are needed to incorporate this function, the image processing device can still possess a demonstration window function. Since implementing a demonstration window function in the processing circuit itself would increase implementation difficulty, this approach reduces implementation difficulty, thereby shortening the development cycle and lowering development costs. Furthermore, since the cropping circuit, determining circuit, and fusion circuit can cooperate with the processing circuit without requiring modifications, the applicability of the image processing device is improved.

[0073] Figure 2 A schematic diagram of a trimming circuit according to an embodiment of the present disclosure is shown.

[0074] like Figure 2 As shown, the trimming circuit 210 may include a counter 211, a position parameter configuration register 212, and a comparator sub-circuit 213.

[0075] Counter 211 can be configured to count multiple pixels in the original image to obtain the column and row values ​​of each pixel. Position parameter configuration register 212 can be configured to store preset cropping region information. Comparison sub-circuit 213 can be configured to, for each of the multiple pixels, determine at least one valid pixel based on the preset cropping region information, the pixel's horizontal position information, and the pixel's vertical position information, and obtain the cropped image based on at least one valid pixel.

[0076] According to embodiments of this disclosure, Figure 2 The trimming circuit 210 in the middle can be combined with Figure 1 The clipping circuit 110 in the example has a similar structure and function. Column values ​​can represent the horizontal position information of pixels. Row values ​​can represent the vertical position information of pixels.

[0077] According to embodiments of this disclosure, the preset cropping area information may include preset position information and preset size information of the preset cropping area. The preset cropping area information may also include preset position information of the preset cropping area. The shape of the preset cropping area can be configured according to actual business needs and is not limited herein. For example, the shape of the preset cropping area may include at least one of a regular shape and an irregular shape. A regular shape may include at least one of a rectangle, a circle, and an ellipse.

[0078] For example, when the preset clipping area is a rectangle, the preset clipping area information may include preset position information. The preset position information may include first preset position information and second preset position information. The first and second preset position information may be the position information of two opposite vertices of the rectangle. Alternatively, the preset clipping area information may include preset position information and preset size information. The preset position information may include first preset position information. The preset size information may include preset rectangle size information. The first preset position information may represent the position information of preset vertices of the rectangle.

[0079] For example, when the preset cutting area is circular, the preset cutting area information may include preset position information and preset size information. The preset position information may include preset center position information. The preset size information may include preset radius information.

[0080] For example, when the preset clipping area is an ellipse, the preset clipping area information may include preset position information and preset size information. The preset position information may include preset focal point position information. The preset size information may include preset major axis information and preset minor axis information.

[0081] According to embodiments of this disclosure, the comparison circuit 213 can determine a pixel as a valid pixel if it is determined that the pixel is located within the preset cropping area based on preset cropping area information, the horizontal position information of the pixel, and the vertical position information of the pixel. The comparison circuit 213 can also determine a pixel as an invalid pixel if it is determined that the pixel is not located within the preset cropping area based on the preset cropping area information, the horizontal position information of the pixel, and the vertical position information of the pixel.

[0082] According to embodiments of the present disclosure, the comparator circuit 213 may also be configured to associate the column value and row value of a pixel with a preset identifier when it is determined that the pixel is a valid pixel.

[0083] According to embodiments of this disclosure, a preset identifier can characterize a pixel as a valid pixel. The preset identifier can be configured according to actual business needs, and is not limited thereto.

[0084] According to embodiments of the present disclosure, the comparator circuit 213 can also be configured to set the horizontal and vertical signals corresponding to the pixel to a high level when it is determined that the pixel is a valid pixel.

[0085] According to embodiments of this disclosure, the comparator circuit 213 can also be configured to set the horizontal and vertical signals corresponding to the pixel to a low level when it is determined that the pixel is an invalid pixel.

[0086] According to embodiments of the present disclosure, the comparison circuit 213 can determine at least one valid pixel among a plurality of pixels by the following operation: when it is determined that the pixel is located within the preset cropping area based on the preset cropping area information, the horizontal position information of the pixel, and the vertical position information of the pixel, the pixel is determined to be a valid pixel.

[0087] According to embodiments of this disclosure, the cropping circuit can obtain cropped images of arbitrary shapes using a counter, a position parameter configuration register, and a comparator circuit to suit various image display scenarios.

[0088] According to embodiments of this disclosure, Figure 2 The counter 2ll in the image can include a horizontal counter and a vertical counter. The horizontal counter can be configured to count multiple pixels of the original image along the horizontal direction to obtain the column value of each pixel. The vertical counter can be configured to count multiple pixels of the original image along the vertical direction to obtain the row value of each pixel.

[0089] Figure 3 A schematic diagram of a preset cropping region of a rectangle according to an embodiment of the present disclosure is shown.

[0090] like Figure 3As shown, the original image 301 can be cropped using a cropping circuit to obtain a cropped image 302. The preset cropping area corresponding to the cropped image 302 is a rectangle. The horizontal offset corresponding to the cropped image 302 is offset_h, the vertical offset corresponding to the cropped image 302 is offset_v, the width of the cropped image 302 is act_h, and the height of the cropped image 302 is act_v.

[0091] The horizontal offset_h and vertical offset_v can be used as the first preset position information corresponding to the cropped image 302. The width act_h and height act_v can be used as the preset rectangle size information corresponding to the cropped image 302. Figure 3 The parameters offset_h, offset_v, act_h, and act_v are stored in Figure 2 The position parameter configuration register 212 is used in the system.

[0092] exist Figure 2 When the parameters stored in the position parameter configuration register 212 are offset h, offset v, act h, and act v, for each pixel out of multiple pixels, Figure 2 The comparator circuit 213 can compare the column value of the pixel output by the horizontal counter with offset_h and offset_h+act_h respectively, and compare the row value of the pixel output by the vertical counter with offset v and offset v+act v respectively.

[0093] The comparison circuit 213 can determine a pixel as a valid pixel if it is determined that the column value of the pixel is greater than or equal to offset h and less than or equal to offset h + act h, and the row value of the pixel is greater than or equal to offset v and less than or equal to offset v + act v. The comparison circuit 213 can determine a pixel as an invalid pixel if at least one of the following conditions is met: the column value of the pixel is less than offset h; the column value of the pixel is greater than offset h + act h; the row value of the pixel is less than offset v; or the row value of the pixel is greater than offset v + act v. The comparison circuit 213 can obtain the cropped image 302 using the above method, thereby determining that pixels located in the cropped image 302 are valid pixels, and pixels located in the original image 301 outside the image area where the cropped image 302 is located are invalid pixels.

[0094] According to embodiments of this disclosure, by using horizontal and vertical counters to obtain the column and row values ​​of multiple pixels respectively, the position information of the pixels in the original image is obtained, providing support for the comparison sub-circuit to determine whether a pixel is a valid pixel based on the position information of the pixel in the original image.

[0095] Figure 4 An equivalent circuit diagram of an image processing apparatus is shown in the case where the target image is a cropped image, according to an embodiment of the present disclosure. Figure 5 An equivalent circuit diagram of an image processing apparatus is shown in the case where the target image is an original image, according to an embodiment of the present disclosure. Figure 6 A schematic diagram of the structure of an image processing apparatus according to an embodiment of the present disclosure is shown when the processing circuit is HDR.

[0096] like Figure 4 As shown, when the target image is a cropped image, the image processing apparatus 400 may include a cropping circuit 410, a processing circuit 430, and a fusion circuit 440. The cropping circuit 410 is connected to the processing circuit 430.

[0097] like Figure 5 As shown, when the target image is the original image, the image processing apparatus 500 may include a cropping circuit 510, a processing circuit 530, and a fusion circuit 540. The cropping circuit 510 is connected to the fusion circuit 540.

[0098] like Figure 6 As shown, when the processing circuit is HDR (High-Dynamic Range) rendering, the image processing apparatus 600 may include a cropping circuit 610, a determination circuit 620, an HDR circuit 630, and a blending circuit 640. The image processing apparatus 600 may form an equivalent circuit identical to that of the image processing apparatus 400. Alternatively, the image processing apparatus 600 may form an equivalent circuit identical to that of the image processing apparatus 500.

[0099] According to embodiments of this disclosure, image processing apparatus 400, image processing apparatus 500 and image processing apparatus 600 may have similar structures and functions to image processing apparatus 100.

[0100] Figure 7 A signal timing diagram of an image processing apparatus according to an embodiment of the present disclosure is shown.

[0101] Next, we will refer to Figures 1-5 as well as Figure 7 This will describe in detail how an image processing apparatus according to embodiments of the present disclosure obtains a fused image.

[0102] Let's take a video image as an example. For instance, the original image could be the i-th frame or the (i+1)-th frame of the video. The i-th frame and the (i+1)-th frame can be determined based on... Figure 7 The timing sequence shown is input sequentially. Figure 1 In the image processing apparatus 100, the image processing apparatus 100 can process the i-th frame image and the (i+1)-th frame image respectively to obtain a fused image corresponding to each of the i-th frame image and the (i+1)-th frame image. The following explanation uses the i-th frame image as an example.

[0103] Figure 1 The horizontal counter of the cropping circuit 110 can count multiple pixels of the i-th frame image along the horizontal direction based on the horizontal signal Sig0_h corresponding to the i-th frame image, and obtain the column value of each pixel. The duration of a high level of the horizontal signal Sig0_h represents the duration of a row of pixels in the i-th frame image.

[0104] Figure 1 The vertical counter of the cropping circuit 110 can count multiple pixels of the i-th frame image along the vertical direction based on the vertical signal Sig0_v corresponding to the i-th frame image, and obtain the row value of each pixel. The duration of a high level in the vertical signal Sig0_v represents the duration of the i-th frame image.

[0105] For each pixel out of a total of pixels, Figure 2 The comparator circuit 213 can determine whether the column value of the pixel output by the horizontal counter is greater than or equal to... Figure 3 The offset_h is less than or equal to Figure 3 The offset_h + act_h in the value, and the row value of the pixel output by the vertical counter, are greater than or equal to... Figure 2 The offset_v is less than or equal to Figure 2 When offset_v + act_v is specified, the pixel can be considered a valid pixel, and the corresponding horizontal signal Sig1_h and vertical signal Sig1_v are set to high. When the pixel is determined to be invalid, the corresponding horizontal signal Sig1_h and vertical signal Sig1_v are set to low. See the explanation above regarding how to determine if a pixel is invalid; it will not be repeated here.

[0106] The duration of a high level in the horizontal signal Sig1_h represents the duration of a row of pixels in the cropped image. The duration of a high level in the vertical signal Sig1_v represents the duration of the cropped image.

[0107] exist Figure 1 The image processing device 100 in the middle is formed with Figure 4 In the case of the same equivalent circuit as the image processing device 400, Figure 1 The fusion circuit 140 can fuse the intermediate image and the original image according to the horizontal signal Sig0_h, the vertical signal Sig0_v, the horizontal signal Sig1_h, and the vertical signal Sig1_v to obtain a fused image.

[0108] For example, when the horizontal signal Sig0_h is high, the vertical signal Sig0_v is high, the horizontal signal Sig1_h is low, and the vertical signal Sig1_v is low during time period t1, the fusion circuit 140 obtains the pixel value of the pixel in the original image corresponding to time period t1. Thus, the pixel value of the pixel in the fused image corresponding to time period t1 is the pixel value of the pixel in the original image corresponding to time period t1.

[0109] When the horizontal signal Sig0_h is high, the vertical signal Sig0_v is high, the horizontal signal Sig1_h is high, and the vertical signal Sig1_v is low during time period t2, the fusion circuit 140 obtains the pixel value of the pixel in the original image corresponding to time period t2. Thus, the pixel value of the pixel in the fused image corresponding to time period t2 is the pixel value of the pixel in the original image corresponding to time period t2.

[0110] When the horizontal signal Sig0_h is high, the vertical signal Sig0_v is high, the horizontal signal Sig1_h is low, and the vertical signal Sig1_v is high during time period t3, the fusion circuit 140 obtains the pixel value of the pixel in the original image corresponding to time period t3. Thus, the pixel value of the pixel in the fused image corresponding to time period t3 is the pixel value of the pixel in the original image corresponding to time period t3.

[0111] When the horizontal signal Sig0_h, vertical signal Sig0_v, horizontal signal Sig1_h, and vertical signal Sig1_v are all high during time period t4, the fusion circuit 140 obtains the pixel value of the pixel in the intermediate image corresponding to time period t4. Thus, the pixel value of the pixel in the fused image corresponding to time period t4 is the pixel value of the pixel in the intermediate image corresponding to time period t4.

[0112] exist Figure 1 The image processing device 100 in the middle is formed with Figure 5 In the case of the same equivalent circuit as the image processing device 500, Figure 1 The fusion circuit 140 can fuse the intermediate image and the cropped image according to the horizontal signal Sig0_h, the vertical signal Sig0_v, the horizontal signal Sig1_h, and the vertical signal Sig1_v to obtain a fused image.

[0113] For example, when the horizontal signal Sig0_h is high, the vertical signal Sig0_v is high, the horizontal signal Sig1_h is low, and the vertical signal Sig1_v is low during time period t1, the fusion circuit 140 obtains the pixel value of the pixel in the intermediate image corresponding to time period t1. Thus, the pixel value of the pixel in the fused image corresponding to time period t1 is the pixel value of the pixel in the intermediate image corresponding to time period t1.

[0114] When the horizontal signal Sig0_h is high, the vertical signal Sig0_v is high, the horizontal signal Sig1h is high, and the vertical signal Sig1_v is low during time period t2, the fusion circuit 140 obtains the pixel value of the pixel in the intermediate image corresponding to time period t2. Thus, the pixel value of the pixel in the fused image corresponding to time period t2 is the pixel value of the pixel in the intermediate image corresponding to time period t2.

[0115] When the horizontal signal Sig0_h is high, the vertical signal Sig0_v is high, the horizontal signal Sig1_h is low, and the vertical signal Sig1_v is high during time period t3, the fusion circuit 140 obtains the pixel value of the pixel in the intermediate image corresponding to time period t3. Thus, the pixel value of the pixel in the fused image corresponding to time period t3 is the pixel value of the pixel in the intermediate image corresponding to time period t3.

[0116] When the horizontal signal Sig0_h, vertical signal Sig0_v, horizontal signal Sig1_h, and vertical signal Sig1_v are all high during time period t4, the fusion circuit 140 obtains the pixel value of the pixel in the cropped image corresponding to time period t4. Thus, the pixel value of the pixel in the fusion image corresponding to time period t4 is the pixel value of the pixel in the cropped image corresponding to time period t4.

[0117] According to embodiments of this disclosure, the fusion circuit may include a first fusion sub-circuit.

[0118] The first fusion sub-circuit can be configured to, when the cropped image is determined to be the target image and the original image is determined to be a non-target image, set the rendering color of the overlapping area between the non-target image and the intermediate image to the rendering color of the intermediate image, and set the rendering color of the non-overlapping area between the non-target image and the intermediate image to the rendering color of the non-target image.

[0119] According to embodiments of this disclosure, the rendering color of the overlapping area between the non-target image and the intermediate image can be set to the rendering color of the intermediate image by the following operation: for a pixel located in the overlapping area between the non-target image and the intermediate image, the pixel value of the pixel in the intermediate image can be determined as the pixel value of the pixel in the fused image.

[0120] According to embodiments of this disclosure, the rendering color of the non-overlapping region between the non-target image and the intermediate image can be set to the rendering color of the non-target image by the following operation: for a pixel located in the non-overlapping region between the non-target image and the intermediate image, the pixel value of the pixel in the non-target image can be determined as the pixel value of the pixel in the fused image.

[0121] According to embodiments of this disclosure, when the cropped image is determined as the target image and the original image is determined as the non-target image, the first fusion sub-circuit can set the rendering color of the overlapping area between the non-target image and the intermediate image, as well as the non-overlapping area between the non-target image and the intermediate image, to achieve image processing effects on the image region corresponding to the cropped image in the fused image.

[0122] Figure 8A A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to an embodiment of the present disclosure.

[0123] like Figure 8A As shown, when the cropped image is determined as the target image, the non-target image is the original image. Therefore, the color of the overlapping area between the intermediate image 802 and the original image 801 is the color of the intermediate image 802, and the color of the non-overlapping area between the intermediate image 802 and the original image 801 is the color of the original image 801.

[0124] According to embodiments of this disclosure, the first fusion sub-circuit can also be configured to, when the original image is determined to be the target image and the cropped image is determined to be a non-target image, set the rendering color of the overlapping area between the non-target image and the intermediate image to the rendering color of the non-target image, and set the non-overlapping area between the non-target image and the intermediate image to the rendering color of the intermediate image.

[0125] According to embodiments of this disclosure, the rendering color of the overlapping area between the non-target image and the intermediate image can be set to the rendering color of the non-target image by the following operation: for a pixel in the overlapping area between the non-target image and the intermediate image, the pixel value of the pixel in the non-target image can be determined as the pixel value of the pixel in the fused image.

[0126] According to embodiments of this disclosure, the non-overlapping region between the non-target image and the intermediate image can be set as the rendering color of the intermediate image by the following operation: for a pixel in the non-overlapping region between the non-target image and the intermediate image, the pixel value of that pixel in the intermediate image can be determined as the pixel value of that pixel in the fused image.

[0127] According to embodiments of this disclosure, when the original image is determined as the target image and the cropped image is determined as the non-target image, the first fusion sub-circuit can set the rendering color of the overlapping area between the non-target image and the intermediate image, as well as the non-overlapping area between the non-target image and the intermediate image, to achieve image processing effects for other image areas in the fused image besides the image area corresponding to the cropped image.

[0128] Figure 8B A schematic diagram of image fusion is shown in the case where the target image is the original image, according to an embodiment of the present disclosure.

[0129] like Figure 8B As shown, when the original image is determined as the target image, the non-target image is the cropped image. Therefore, the color of the overlapping area between the intermediate image 803 and the cropped image 804 is the color of the cropped image 804, and the color of the non-overlapping area between the intermediate image 803 and the cropped image 804 is the color of the intermediate image 803.

[0130] According to embodiments of this disclosure, the fusion circuit may further include a transparency parameter configuration register and a second fusion sub-circuit.

[0131] The transparency parameter configuration register can be configured to store preset transparency values ​​corresponding to the non-target image and the intermediate image. The second fusion sub-circuit can be configured to fuse the non-target image and the intermediate image according to the preset transparency values ​​corresponding to the non-target image and the intermediate image to obtain a fused image.

[0132] According to embodiments of this disclosure, the fusion circuit uses a transparency parameter configuration register and a second fusion sub-circuit to fuse a non-target image and an intermediate image to obtain a fused image. This allows the fused image to be not only the image resulting from the fusion of the non-target image and the intermediate image, but also one of the non-target image and the intermediate image, thus diversifying the form of the fused image and improving the applicability of the image processing device.

[0133] According to embodiments of this disclosure, the second fusion sub-circuit can also be configured to set the rendering color of the fused image to the rendering color of the original image when the original image is determined to be a non-target image, the transparency corresponding to the non-target image is a first preset value, and the transparency corresponding to the intermediate image is a second preset value.

[0134] According to embodiments of this disclosure, the rendering color of the fused image is set to the rendering color of the original image by the following operation: for a pixel of the fused image, the pixel value of that pixel in the original image can be determined as the pixel value of that pixel in the fused image.

[0135] According to embodiments of this disclosure, the first preset value and the second preset value can be configured according to actual business needs, and are not limited herein. For example, the first preset value can be 1, and the second preset value can be 0.

[0136] Figure 9 A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to another embodiment of the present disclosure.

[0137] like Figure 9 As shown, when the cropped image is determined as the target image, the original image is determined as the non-target image, the transparency corresponding to the non-target image is a first preset value of 1, and the transparency corresponding to the intermediate image is a second preset value of 0, the rendering color of the fused image 901 is the rendering color of the original image.

[0138] According to embodiments of this disclosure, the second fusion sub-circuit can also be configured to set the rendering color of the fused image to the rendering color of the intermediate image when the cropped image is determined to be a non-target image, the transparency corresponding to the non-target image is a second preset value, and the transparency corresponding to the intermediate image is a first preset value.

[0139] According to embodiments of this disclosure, the rendering color of the fused image is set to the rendering color of the intermediate image by the following operation: for a pixel of the fused image, the pixel value of that pixel in the intermediate image can be determined as the pixel value of that pixel in the fused image.

[0140] Figure 10 A schematic diagram of image fusion is shown in the case where the target image is the original image, according to another embodiment of the present disclosure.

[0141] like Figure 10 As shown, when the original image is determined as the target image, the cropped image is determined as the non-target image, the transparency corresponding to the non-target image is a second preset value of 0, and the transparency corresponding to the intermediate image is a first preset value of 1, the rendering color of the fused image 1001 is the rendering color of the intermediate image.

[0142] According to embodiments of this disclosure, the fusion circuit may further include a third fusion sub-circuit.

[0143] According to embodiments of this disclosure, the third fusion sub-circuit can be configured to set the rendering color of the non-overlapping area between the fused image and the display area to a preset color when the size of the fused image is smaller than the size of the display area of ​​the image processing device.

[0144] According to embodiments of this disclosure, the rendering color of the non-overlapping area between the fused image and the display area is set to a preset color by the following operation: for pixels in the non-overlapping area between the fused image and the display area, the pixel value corresponding to the preset color can be determined as the pixel value of that pixel in the fused image.

[0145] According to embodiments of this disclosure, the preset color can be configured according to actual business needs, and is not limited thereto. For example, the preset color can be one of black, red, and blue.

[0146] According to embodiments of this disclosure, the fusion circuit utilizes a third fusion sub-circuit to set the rendering color of the non-overlapping area between the fused image and the display area to a preset color when the size of the fused image is smaller than the size of the display area of ​​the image processing device, thereby highlighting the fused image and enhancing the display effect of the fused image of the image processing device.

[0147] Figure 11A A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to another embodiment of the present disclosure. Figure 11B A schematic diagram of image fusion is shown in the case where the target image is the original image, according to another embodiment of the present disclosure. Figure 11C A schematic diagram of image fusion is shown in the case where the target image is a cropped image, according to another embodiment of the present disclosure. Figure 11D A schematic diagram of image fusion is shown in the case where the target image is the original image, according to another embodiment of the present disclosure.

[0148] like Figure 11A As shown, when the cropped image is the target image, the size of the fused image is smaller than the size of the display area of ​​the image processing device, and the transparency corresponding to the non-target image and the transparency corresponding to the intermediate image are both the first preset value 1, the non-overlapping area between the fused image and the display area 1101 is presented in black, the overlapping area between the intermediate image 1102 and the original image is presented in the color of the intermediate image 1102, and the non-overlapping area between the intermediate image 1102 and the original image is presented in the color of the original image.

[0149] like Figure 11BAs shown, when the original image is the target image, the size of the fused image is smaller than the size of the display area of ​​the image processing device, and the transparency corresponding to the non-target image and the transparency corresponding to the intermediate image are both the first preset value 1, the non-overlapping area between the fused image and the display area 1103 is presented in black, the overlapping area between the intermediate image and the cropped image 1104 is presented in the color of the cropped image 1104, and the non-overlapping area between the intermediate image and the cropped image 1104 is presented in the color of the intermediate image.

[0150] like Figure 11C As shown, when the cropped image is the target image, the size of the fused image is smaller than the size of the display area of ​​the image processing device, the transparency corresponding to the non-target image is a first preset value of 1 and the transparency corresponding to the intermediate image is a second preset value of 0, the color of the non-overlapping area between the fused image and the display area 1105 is black, and the color of the fused image is the same as the color of the original image.

[0151] like Figure 11D As shown, when the original image is the target image, the size of the fused image is smaller than the size of the display area of ​​the image processing device, the transparency corresponding to the non-target image is a second preset value of 0 and the transparency corresponding to the intermediate image is a first preset value of 1, the color of the non-overlapping area between the fused image and the display area 1106 is black, and the color of the fused image is the same as the color of the intermediate image.

[0152] Figure 12 A flowchart of an image processing method according to an embodiment of the present disclosure is shown.

[0153] like Figure 12 As shown, the image processing method of this embodiment may include operations S1210 to S1240.

[0154] In operation S1210, the original image is cropped to obtain a cropped image.

[0155] In operation S1220, the target image and non-target image are determined from the original image and the cropped image.

[0156] In operation S1230, image processing is performed on the target image to obtain an intermediate image.

[0157] In operation S1240, the non-target image and the intermediate image are fused to obtain a fused image.

[0158] It should be noted that, unless it is explicitly stated that there is a sequential order of execution between different operations, or that there is a sequential order of execution between different operations in terms of technical implementation, the execution order between multiple operations may not be significant, and multiple operations may be executed simultaneously.

[0159] It should also be noted that the image processing method in the embodiments of this disclosure corresponds to the image processing device in the embodiments of this disclosure, and will not be described again here.

[0160] Figure 13 A schematic diagram of the structure of an image display device according to an embodiment of the present disclosure is shown.

[0161] like Figure 13 As shown, the image display device 1300 may include an image processing device 1310 and a display circuit 1320.

[0162] The image processing device 1310 may have a similar structure and function to the image processing device 100.

[0163] The display circuit is configured to display the fused image obtained by the image processing device.

[0164] According to embodiments of this disclosure, the display circuit can be configured according to actual business needs, and is not limited thereto. For example, the display circuit can be: a circuit including a display using a CRT (Cathode Ray Tube), a circuit including an LCD (Liquid Crystal Display), or a circuit including a display using an OLED (Organic Light-Emitting Diode).

[0165] According to embodiments of this disclosure, when the display circuit is a circuit including an LCD, the LCD may be, for example, a display including a TFT (Thin Film Transistor), a display including a VA (Vertical Alignment) panel, or a display including an IPS (In-Plane Switching).

[0166] According to embodiments of this disclosure, when the display circuit is a circuit that includes a display using an OLED, the OLED may be, for example, a PMOLED (Passive Matrix OLED) or an AMOLED (Active-Matrix OLED).

[0167] Figure 14 A block diagram of an electronic device suitable for implementing the methods described above, according to embodiments of the present disclosure, is illustrated schematically. Figure 14 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments disclosed herein.

[0168] like Figure 14 As shown, an electronic device 1400 according to an embodiment of the present disclosure includes a processor 1401, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1402 or a program loaded from a storage portion 1408 into a random access memory (RAM) 1403. The processor 1401 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 1401 may also include onboard memory for caching purposes. The processor 1401 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present disclosure.

[0169] RAM 1403 stores various programs and data required for the operation of system 1400. Processor 1401, ROM 1402, and RAM 1403 are interconnected via bus 1404. Processor 1401 performs various operations of the method flow according to embodiments of the present disclosure by executing programs in ROM 1402 and / or RAM 1403. It should be noted that programs may also be stored in one or more memories other than ROM 1402 and RAM 1403. Processor 1401 may also perform various operations of the method flow according to embodiments of the present disclosure by executing programs stored in one or more memories.

[0170] According to embodiments of this disclosure, system 1400 may further include an input / output (I / O) interface 14014, and an input / output (I / O) interface 1405 is also connected to bus 1404. System 1400 may also include one or more of the following components connected to I / O interface 1405: an input section 1406 including a keyboard, mouse, etc.; an output section 1407 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 1408 including a hard disk, etc.; and a communication section 1409 including a network interface card such as a LAN card, modem, etc. The communication section 1409 performs communication processing via a network such as the Internet. A drive 1410 is also connected to I / O interface 1405 as needed. A removable medium 1411, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 1410 as needed so that computer programs read from it can be installed into storage section 1408 as needed.

[0171] According to embodiments of this disclosure, the method flow according to embodiments of this disclosure can be implemented as a computer software program. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable storage medium, the computer program containing program code for performing the methods shown in the flowchart. In such embodiments, the computer program can be downloaded and installed from a network via communication section 1409, and / or installed from removable medium 1411. When the computer program is executed by processor 1401, it performs the functions defined in the system of embodiments of this disclosure. According to embodiments of this disclosure, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0172] This disclosure also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into the device / apparatus / system. The computer-readable storage medium carries one or more programs that, when executed, implement the method according to the embodiments of this disclosure.

[0173] According to embodiments of this disclosure, the computer-readable storage medium can be a non-volatile computer-readable storage medium. Examples include, but are not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this disclosure, the computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0174] For example, according to embodiments of this disclosure, a computer-readable storage medium may include one or more memories other than the ROM 1402 and / or RAM 1403 described above.

[0175] Embodiments of this disclosure also include a computer program product comprising a computer program containing program code for performing the methods provided in the embodiments of this disclosure. When the computer program product is run on an electronic device, the program code is used to enable the electronic device to implement the graphics processing methods provided in the embodiments of this disclosure.

[0176] When the computer program is executed by the processor 1401, it performs the functions defined in the system / apparatus of this disclosure embodiments. According to embodiments of this disclosure, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0177] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and may be downloaded and installed via the communication section 1409, and / or installed from the removable medium 1411. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0178] According to embodiments of this disclosure, program code for executing the computer programs provided in embodiments of this disclosure can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can execute entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0179] Any one or more of the modules, submodules, units, and subunits according to embodiments of the present disclosure, or at least part of the functions of any one or more of them, can be implemented in one module. Any one or more of the modules, submodules, units, and subunits according to embodiments of the present disclosure can be implemented by dividing them into multiple modules. Any one or more of the modules, submodules, units, and subunits according to embodiments of the present disclosure can be at least partially implemented as hardware circuitry, such as Field Programmable Gate Arrays (FPGAs), Programmable Logic Arrays (PLAs), Systems-on-Chip, Systems-on-Substrate, Systems-on-Package, Application-Specific Integrated Circuits (ASICs), or implemented in hardware or firmware by any other reasonable means of integrating or packaging circuitry, or implemented in software, hardware, or firmware, or in any suitable combination of any of these three implementation methods. Alternatively, one or more of the modules, submodules, units, and subunits according to embodiments of the present disclosure can be at least partially implemented as computer program modules, which, when run, can perform corresponding functions.

[0180] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions. Those skilled in the art will understand that the features recited in the various embodiments and / or claims of this disclosure can be combined and / or combined in various ways, even if such combinations or combinations are not expressly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure may be combined and / or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0181] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. The scope of this disclosure is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.

Claims

1. An image processing apparatus, comprising: The cropping circuit is configured to crop the original image to obtain a cropped image; The circuit is configured to determine a target image and a non-target image from the original image and the cropped image, wherein when the target image is the original image, the non-target image is the cropped image, and when the target image is the cropped image, the non-target image is the original image. A processing circuit is configured to perform image processing on the target image to obtain an intermediate image, wherein the processing circuit is a pre-developed circuit without a presentation window function; and The fusion circuit is configured to fuse the non-target image and the intermediate image to obtain a fused image; The fusion circuit includes a first fusion sub-circuit, configured to: when the original image is determined to be the target image and the cropped image is determined to be the non-target image, set the rendering color of the overlapping area between the non-target image and the intermediate image to the rendering color of the non-target image, and set the non-overlapping area between the non-target image and the intermediate image to the rendering color of the intermediate image; or... When the cropped image is determined as the target image and the original image is determined as the non-target image, the rendering color of the overlapping area between the non-target image and the intermediate image is set to the rendering color of the intermediate image, and the rendering color of the non-overlapping area between the non-target image and the intermediate image is set to the rendering color of the non-target image.

2. The apparatus according to claim 1, wherein, The trimming circuit includes: A counter is configured to count multiple pixels in the original image to obtain column and row values ​​for each pixel, wherein the column value represents the horizontal position information of the pixel and the row value represents the vertical position information of the pixel. The cropping region configuration register is configured to store preset cropping region information; and The comparison sub-circuit is configured to, for each of the plurality of pixels, determine at least one valid pixel among the plurality of pixels based on the preset cropping region information, the horizontal position information of the pixel, and the vertical position information of the pixel, and obtain the cropped image based on the at least one valid pixel.

3. The apparatus according to claim 1 or 2, wherein, The fusion circuit also includes: A transparency parameter configuration register is configured to store preset transparency values ​​corresponding to the non-target image and the intermediate image; and The second fusion sub-circuit is configured to fuse the non-target image and the intermediate image according to a preset transparency corresponding to the non-target image and the intermediate image to obtain the fused image.

4. The apparatus according to claim 3, wherein, The second fusion sub-circuit is further configured as follows: When the original image is determined to be the non-target image, the transparency corresponding to the non-target image is a first preset value, and the transparency corresponding to the intermediate image is a second preset value, the rendering color of the fused image is set to the rendering color of the original image.

5. The apparatus according to claim 3, wherein, The second fusion sub-circuit is further configured as follows: When the cropped image is determined to be the non-target image, the transparency corresponding to the non-target image is a second preset value, and the transparency corresponding to the intermediate image is a first preset value, the rendering color of the fused image is set to the rendering color of the intermediate image.

6. The apparatus according to claim 1 or 2, wherein, The fusion circuit also includes: The third fusion sub-circuit is configured to set the rendering color of the non-overlapping area between the fused image and the display area to a preset color when the size of the fused image is smaller than the size of the display area of ​​the image processing device.

7. The apparatus according to claim 2, wherein, When the preset clipping area is a rectangle, the preset clipping area information includes first preset position information and second preset position information, where the first preset position information and the second preset position information are the position information of two opposite vertices of the rectangle; or, the preset clipping area information includes the first preset position information and preset rectangle size information, where the first preset position information represents the position information of the preset vertices of the rectangle; When the preset cutting area is circular, the preset cutting area information includes preset center position information and preset radius information; When the preset clipping area is an ellipse, the preset clipping area information includes preset focal point position information, preset major axis information, and preset minor axis information.

8. An image processing method, comprising: The cropping circuit crops the original image to obtain a cropped image; The determining circuit determines the target image and the non-target image from the original image and the cropped image, wherein when the target image is the original image, the non-target image is the cropped image, and when the target image is the cropped image, the non-target image is the original image; The processing circuit performs image processing on the target image to obtain an intermediate image, wherein the processing circuit is a pre-developed circuit without a presentation window function; and The fusion circuit fuses the non-target image and the intermediate image to obtain a fused image, including: when the original image is determined as the target image and the cropped image is determined as the non-target image, setting the rendering color of the overlapping area between the non-target image and the intermediate image to the rendering color of the non-target image, and setting the non-overlapping area between the non-target image and the intermediate image to the rendering color of the intermediate image; or, When the cropped image is determined as the target image and the original image is determined as the non-target image, the rendering color of the overlapping area between the non-target image and the intermediate image is set to the rendering color of the intermediate image, and the rendering color of the non-overlapping area between the non-target image and the intermediate image is set to the rendering color of the non-target image.

9. An image display device, comprising: The image processing apparatus as described in any one of claims 1 to 7; as well as The display circuit is configured to display the fused image obtained by the image processing device.

10. An electronic device, comprising: One or more processors; Memory, used to store one or more programs. Wherein, when the one or more programs are executed by the one or more processors, the one or more processors perform the method according to claim 8.

Images