Buck-boost circuit and its energy replenishment circuit

Abstract

The application discloses a buck-boost circuit and an energy supplement circuit thereof, wherein the energy supplement circuit comprises a first energy supplement module and a second energy supplement module, the first energy supplement module is arranged between a first bootstrap node and a first switch node, and the second energy supplement module is arranged between a second bootstrap node and a second switch node; the first energy supplement module and the second energy supplement module each comprise a first clamping unit, a mode control unit, a control transistor and a current adjusting unit, the current adjusting unit comprises a current mirror; the mode control unit is used for controlling on-off of the control transistor, so as to control a working mode of the energy supplement module; the control transistor and the first clamping unit are used for controlling a voltage between the corresponding bootstrap node and the switch; and the current adjusting unit is used for adjusting a current of the first clamping unit through the current mirror. The application can improve the efficiency of the corresponding circuit.

Description

Technical Field

[0001] This application relates to the field of circuit technology, specifically to a buck boost circuit and its energy replenishment circuit. Background Technology

[0002] The buck-boost circuit includes a buck mode for step-down and a boost mode for step-up, to... Figure 1 Taking the buck-boost circuit shown as an example, this is a 4N transistor buck-boost circuit. When operating in buck mode, switches Mn5 and Nn6 adjust their duty cycles according to the load and input / output voltage values, while Mn8 remains off. Mn7, as the output stage, needs to be always on. When operating in boost mode, switches Mn7 and Nn8 adjust their duty cycles according to the load and input / output voltage values, while Mn6 remains off. Mn5, as the input stage, needs to be always on. The gate control voltages for the upper transistors MN5 and MN7 are BT1 / BT2 for high potential and SW1 / SW2 for low potential. The gate control voltages for the lower transistors MN6 and MN8 are VCC for high potential and ground for low potential. VCC is generated by an LDO circuit, while BT1 and BT2 are generated by a charge pump capacitor. When the input voltage is higher than the output voltage, the chip operates in buck mode. At one moment, MN5 is turned on, and MN6 is turned off to charge the inductor. At the next moment, MN5 is turned off, and MN6 is turned on to freewheel the inductor. Therefore, when MN6 is turned on, the voltage across SW1 is 0 (ideally). At this time, the diode (also called the switching transistor) between BT1 and VCC is open, so the voltage across capacitor C1 is VCC / 0. When MN5 is turned on, SW1 = VIN. According to the principle of the charge pump, the voltage across C1 is VIN + VCC / VIN. Therefore, the voltage of BT1 is floating; it is VCC when MN6 is turned on, and VIN + VCC when MN5 is turned on. Ideally, according to the rule that the voltage across a capacitor will not change abruptly, the voltage difference across it should always be VCC, ensuring that the upper transistor can turn on normally.

[0003] In buck mode, the voltage across SW2 equals the output voltage (ideally, assuming the MOSFET impedance is very small and the voltage difference is almost zero, but in reality, there will be a voltage difference). If MN7 is to remain on, then the voltage across HD2 equals the voltage across BT2, which is higher than the voltage across SW2. However, there is no switching transistor across capacitor C2 to charge or pump the capacitor. Therefore, a clamping circuit is needed to maintain the voltage difference between HD2 and SW2, ensuring the switching transistor is on and replenishing energy to capacitor C2 in a timely manner. This prevents BT2 from dropping due to insufficient energy replenishment when the internal switching transistor flips or when a small current load is applied, thus preventing inefficiency in the entire buck-boost circuit or affecting normal function. In boost mode, which is the opposite of buck mode, capacitor C1 does not have a switching transistor to control the charging and pumping voltage of C1. Therefore, when working in boost mode, a clamping circuit is needed to control the voltage between BT1 and SW1 to ensure that the voltage difference is large enough to allow the power transistor to conduct fully without affecting efficiency. Secondly, energy needs to be supplied to capacitor C1 to ensure that BT1 does not decrease in internal circuit switching and load capacity, thus affecting the operation of the entire chip. Summary of the Invention

[0004] In view of this, this application provides a buck_boost circuit and its energy replenishment circuit to improve the efficiency of the buck_boost circuit.

[0005] This application provides an energy replenishment circuit for a buck-boost circuit. The buck-boost circuit includes a buck module and a boost module. The buck module has a first bootstrap node, a first switching node, and a first bootstrap capacitor disposed between the first bootstrap node and the first switching node. The boost module has a second bootstrap node, a second switching node, and a second bootstrap capacitor disposed between the second bootstrap node and the second switching node. The energy replenishment circuit includes a first energy replenishment module and a second energy replenishment module. The first energy replenishment module is disposed between the first bootstrap node and the first switching node, and the second energy replenishment module is disposed between the second bootstrap node and the second switching node. Both the first energy replenishment module and the second energy replenishment module include a first clamping unit, a mode control unit, a control transistor, and a current adjustment unit, wherein the current adjustment unit includes a current mirror; The first terminal of the control transistor is connected to the corresponding bootstrap node, the control terminal is connected to the first terminal of the mode control unit and the first terminal of the first clamping unit respectively, and the second terminal is connected to the current adjustment unit; the second terminal of the first clamping unit is connected to the second terminal of the mode control unit and the corresponding switching node respectively. The mode control unit is used to control the on / off state of the control transistor in order to control the working mode of the energy replenishment module. The control transistor and the first clamping unit are used to control the voltage between the corresponding bootstrap node and the switch; The current adjustment unit is used to adjust the current of the first clamping unit through the current mirror.

[0006] Optionally, the current regulation unit further includes a first MOSFET, a second MOSFET, a first resistor subunit, and a second resistor subunit; the first end of the first resistor subunit is connected to the second end of the control transistor, and the second end is connected to the gate of the second MOSFET and the drain of the first MOSFET respectively; the first end of the second resistor subunit is connected to the second end of the control transistor, and the second end is connected to the source of the second MOSFET; the drain of the second MOSFET is connected to the control terminal of the control transistor; the gate of the first MOSFET is used to connect to a reference voltage, and the source is grounded through the current mirror.

[0007] Optionally, the control transistor includes a third MOS transistor; the source of the third MOS transistor is the first terminal of the control transistor, the gate is the control terminal of the control transistor, and the drain is the second terminal of the control transistor.

[0008] Optionally, the current mirror includes a fourth MOS transistor, a fifth MOS transistor, a MOS transistor group, and a current source. The MOS transistor group includes at least a plurality of MOS transistors connected in parallel. The drain of the fourth MOS transistor is connected to the source of the first MOS transistor and the drain of each MOS transistor in the MOS transistor group. The gate of the fourth MOS transistor is connected to the gate of each MOS transistor in the MOS transistor group, the gate of the fifth MOS transistor, the drain of the fifth MOS transistor, and the output terminal of the current source. The source of the fourth MOS transistor is connected to the source of each MOS transistor in the MOS transistor group and ground. The input terminal of the current source is used to connect a set voltage.

[0009] Optionally, the MOS transistor group further includes a switch corresponding to each MOS transistor, and each switch is connected between the source of the first MOS transistor and the drain of the corresponding MOS transistor.

[0010] Optionally, each of the switches uses a one-time programmable memory to control the on / off state of the corresponding branch.

[0011] Optionally, the MOSFET group includes a sixth MOSFET, a seventh MOSFET, a first switch, and a second switch; the first terminal of the first switch is connected to the source of the first MOSFET, and the second terminal is connected to the drain of the sixth MOSFET; the gate of the sixth MOSFET is connected to the output terminal of the current source, and its source is grounded; the first terminal of the second switch is connected to the source of the first MOSFET, and the second terminal is connected to the drain of the seventh MOSFET; the gate of the seventh MOSFET is connected to the output terminal of the current source, and its source is grounded.

[0012] Optionally, the first energy replenishment module and the second energy replenishment module each further include a second clamping unit; the second clamping unit is connected between the corresponding bootstrap node and the switching node, and is used to limit the voltage between the bootstrap node and the switching node.

[0013] Optionally, the first clamping unit and the second clamping unit respectively include an eighth MOS transistor, a ninth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, a twelfth MOS transistor, a thirteenth MOS transistor, a fourteenth MOS transistor, a fifteenth MOS transistor, a sixteenth MOS transistor, a seventeenth MOS transistor, an eighteenth MOS transistor, and a first resistor; the drain of the eighth MOS transistor serves as the first terminal of the first clamping unit and the second clamping unit, and is respectively connected to the gate of the eighth MOS transistor, the drain of the fourteenth MOS transistor, and the gate of the fourteenth MOS transistor, and the source of the eighth MOS transistor is respectively connected to the drain of the ninth MOS transistor and the gate of the ninth MOS transistor; the source of the ninth MOS transistor is respectively connected to the drain of the tenth MOS transistor and the gate of the tenth MOS transistor; the source of the eleventh MOS transistor is respectively connected to the drain of the eleventh MOS transistor and the gate of the eleventh MOS transistor; the source of the eleventh MOS transistor is respectively connected to the drain of the eleventh MOS transistor and the gate of the eleventh MOS transistor. The drain and gate of the twelfth MOS transistor are connected respectively; the source of the twelfth MOS transistor is connected to the drain and gate of the thirteenth MOS transistor respectively; the source of the thirteenth MOS transistor is connected to the first terminal of the first resistor and the gate of the eighteenth MOS transistor respectively; the second terminal of the first resistor serves as the second terminal of the first clamping unit and the second clamping unit, and is connected to the source of the eighteenth MOS transistor; the source of the fourteenth MOS transistor is connected to the drain and gate of the fifteenth MOS transistor respectively; the source of the fifteenth MOS transistor is connected to the drain and gate of the sixteenth MOS transistor respectively; the source of the sixteenth MOS transistor is connected to the drain and gate of the seventeenth MOS transistor respectively; the source of the seventeenth MOS transistor is connected to the drain of the eighteenth MOS transistor.

[0014] Optionally, the first resistor subunit includes a second resistor, with a first end connected to the drain of the third MOS transistor and a second end connected to the drain of the first MOS transistor.

[0015] Optionally, the second resistor subunit includes a third resistor, the first end of which is connected to the drain of the third MOS transistor, and the second end of which is connected to the source of the second MOS transistor.

[0016] This application also provides a buck_boost circuit, including any of the above-described energy replenishment circuits for a buck_boost circuit.

[0017] In the buck_boost circuit and its energy replenishment circuit provided in this application, the current adjustment unit can adjust the current of the first clamping unit through the current mirror, thereby adjusting the clamping voltage between the corresponding bootstrap node and the switching node. By controlling the transistor and the first clamping unit to cooperate with each other, the voltage between the corresponding set of bootstrap nodes and the switching node can be controlled, so that the corresponding bootstrap node and the switching node have a reasonable clamping value. The relevant power transistors of the buck_boost circuit can be fully turned on, the on-resistance is minimized, and the efficiency of the entire buck_boost circuit can be improved.

[0018] Furthermore, the current of the current mirror can be adjusted by efuse, allowing the current mirror to be designed with medium-voltage transistors without needing to switch to the high-voltage region. This saves the corresponding current layout area and improves the circuit response speed and the efficiency of the corresponding switching power supply. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the buck_boost circuit structure during the research process; Figure 2 This is a schematic diagram of an energy replenishment circuit structure according to an embodiment of this application; Figure 3 This is a schematic diagram of the energy replenishment circuit structure according to another embodiment of this application; Figure 4 This is a schematic diagram of the clamping unit structure in one embodiment of this application; Figure 5 This is a schematic diagram of the energy replenishment circuit structure according to another embodiment of this application; Figure 6This is a schematic diagram of the energy replenishment circuit structure according to another embodiment of this application; Figure 7 This is a schematic diagram of the energy replenishment circuit structure according to another embodiment of this application; Figure 8 This is a schematic diagram of the energy replenishment circuit structure according to another embodiment of this application; Figure 9 This is a schematic diagram of the energy replenishment circuit structure in other schemes. Detailed Implementation

[0021] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0022] A first aspect of this application provides an energy replenishment circuit for a buck_boost circuit, the buck_boost circuit comprising, as shown in the example... Figure 1 The 4N transistor buck-boost circuit shown includes a buck module and a boost module. Figure 1 As shown, the buck module has a first bootstrap node BT1, a first switching node SW1, and a first bootstrap capacitor C1 disposed between the first bootstrap node BT1 and the first switching node SW1. The boost module has a second bootstrap node BT2, a second switching node SW2, and a second bootstrap capacitor C2 disposed between the second bootstrap node BT2 and the second switching node SW2.

[0023] The energy replenishment circuit includes a first energy replenishment module and a second energy replenishment module. The first energy replenishment module is located between the first bootstrap node BT1 and the first switching node SW1, and the second energy replenishment module is located between the second bootstrap node BT2 and the second switching node SW2. The circuit structures of the first energy replenishment module and the second energy replenishment module can be referenced. Figure 2 As shown, the system includes a first clamping unit 110, a mode control unit 120, a control transistor 130, and a current adjustment unit 180. The current adjustment unit 180 includes a current mirror 140. The current mirror 140 can be used to adjust the electrical signal of the branch it is in, thereby realizing the current adjustment function of the current adjustment unit 180.

[0024] The first terminal of the control transistor 130 is connected to the corresponding bootstrap node BT, and the control terminal is connected to the first terminal of the mode control unit 120 and the first terminal of the first clamping unit 110, respectively. The second terminal is connected to the current adjustment unit 180. The second terminal of the first clamping unit 110 is connected to the second terminal of the mode control unit 120 and the corresponding switching node SW, respectively. The bootstrap node BT can also be referred to as the high-voltage terminal of the external power stage gate charging, including the first bootstrap node BT1 and the second bootstrap node BT2. The switching node SW can also be referred to as the inductor connection terminal, including the first switching node SW1 and the second switching node SW2. Specifically, in the first energy replenishment module, the first terminal of the control transistor 130 can be connected to the first bootstrap node BT1, and the second terminal of the first clamping unit 110 and the second terminal of the mode control unit 120 are respectively connected to the first switching node SW1. In the second energy replenishment module, the first terminal of the control transistor 130 can be connected to the second bootstrap node BT2, and the second terminal of the first clamping unit 110 and the second terminal of the mode control unit 120 are respectively connected to the second switching node SW2.

[0025] The mode control unit 120 is used to control the on / off state of the control transistor to control the operating mode of the energy replenishment module. If the control transistor is a MOSFET, the mode control unit 120 can control the gate voltage of the control transistor; for example, when the buck_boost circuit operates in boost mode, the mode control unit 120 of the first energy replenishment module provides a high voltage to the gate of its control transistor 130, turning on the control transistor 130 and operating the first energy replenishment module; the mode control unit 120 of the second energy replenishment module provides a low voltage to the gate of its control transistor 130, turning off the control transistor 130 and putting the second energy replenishment module into sleep mode. When the buck_boost circuit operates in buck mode, the mode control unit 120 of the first energy replenishment module provides a low voltage to the gate of its control transistor 130, turning off the control transistor 130 and putting the first energy replenishment module into sleep mode; the mode control unit 120 of the second energy replenishment module provides a high voltage to the gate of its control transistor 130, turning on the control transistor 130 and operating the second energy replenishment module. Optionally, the mode control unit 120 can be implemented using related control logic circuits and MOSFETs.

[0026] The control transistor 130 and the first clamping unit 110 are used to control the voltage between the corresponding bootstrap node BT and the switching node SW; for example, the control transistor 130 and the first clamping unit 110 in the first energy replenishment module are used to control the voltage between the first bootstrap node BT1 and the first switching node SW1, and the control transistor 130 and the first clamping unit 110 in the second energy replenishment module are used to control the voltage between the second bootstrap node BT2 and the second switching node SW2.

[0027] The current adjustment unit 180 is used to adjust the current of the first clamping unit 110 through the current mirror 140 so as to have a reasonable clamping value between the first bootstrap node BT1 and the first switch node SW1 in boost mode, and a reasonable clamping value between the second bootstrap node BT2 and the second switch node SW2 in buck mode.

[0028] In one embodiment, the current regulation unit 180 further includes a first MOSFET M1, a second MOSFET M2, a first resistor subunit 150, and a second resistor subunit 160. The first terminal of the first resistor subunit 150 is connected to the second terminal of the control transistor 130, and the second terminal is connected to the gate of the second MOSFET M2 and the drain of the first MOSFET M1, respectively. The first terminal of the second resistor subunit 160 is connected to the second terminal of the control transistor 130, and the second terminal is connected to the source of the second MOSFET M2. The drain of the second MOSFET M2 is connected to the control terminal of the control transistor 130. The gate of the first MOSFET M1 is used to connect to a reference voltage VREF, and the source is grounded through the current mirror 140.

[0029] Optionally, the first MOSFET M1, the second MOSFET M2, the first resistor subunit 150, the second resistor subunit 160, and the current mirror 140 can cooperate with each other to adjust the current of the first clamping unit 110 and realize the current adjustment function of the current adjustment unit 180.

[0030] Optionally, the first MOSFET M1 may include an NMOS transistor, and the second MOSFET M2 may include a PMOS transistor.

[0031] In one embodiment, the control transistor 130 may include a third MOS transistor M3; the source of the third MOS transistor M3 is the first terminal of the control transistor 130, the gate is the control terminal of the control transistor 130, and the drain is the second terminal of the control transistor 130.

[0032] Specifically, the third MOSFET M3 can be an NMOS transistor with its body and source connected together. A parasitic diode runs from the corresponding bootstrap node BT to the BT_COM terminal. The diode's forward voltage drop is approximately 0.7V. The voltage at the BT_COM terminal is either BT1 - 0.7V or BT2 - 0.7V; the larger of these two voltages determines the voltage at the BT_COM terminal. The BT_COM terminal is the drain of the third MOSFET M3. When one module in the buck-boost circuit operates, the reference voltage VREF is used as a reference voltage, generating current through the first resistor unit 140. Simultaneously, the second MOSFET M2 turns on, generating current I2 which flows into the first clamping unit 110, producing a Vclamp voltage. The clamping voltage between the bootstrap node BT and the corresponding switching node SW is then Vclamp2 - V_clamp. GS3 To determine this, Vclamp2 represents the Vclamp voltage on the first clamping unit 110, V GS3 This represents the gate-source voltage of the third MOSFET M3. Simultaneously, current flows through a bootstrap node BT, via its parasitic diode, to the BT_COM terminal, and then through the conducting third MOSFET M3 to charge the capacitor between the other bootstrap node BT and the switching node SW. In the buck-boost circuit, the voltage values ​​of BT (the first bootstrap node BT1 in buck mode and the second bootstrap node BT2 in boost mode) at the switch-controlled end, the capacitor charging end, and the pump voltage end are variable. When the lower power transistor is on, the BT voltage is VCC, where VCC is the power supply voltage connected to the buck-boost circuit. When the upper power transistor is on, the BT voltage is VIN+VCC (BUCK mode) / VOU+VCC (boost mode), where VIN represents the input voltage of the buck-boost circuit, and VOU represents the output voltage. When the switch-controlled capacitor causes the BT voltage to become VCC, the BT_COM terminal is turned on through the parasitic diode of the third MOSFET M3, and current flows from the capacitor at the energy replenishment end to the BT_COM terminal. This process repeats itself to ensure that capacitors without switch control can be replenished with energy in a timely manner, maintaining a reasonable clamping value to improve the efficiency of the entire buck-boost circuit.

[0033] In one embodiment, reference Figure 3As shown, the first energy replenishment module and the second energy replenishment module each further include a second clamping unit 170. The second clamping unit 170 is connected between the corresponding bootstrap node BT and the switching node SW. For example, the second clamping unit 170 in the first energy replenishment module is connected between the first bootstrap node BT1 and the first switching node SW1, and the second clamping unit 170 in the second energy replenishment module is connected between the second bootstrap node BT2 and the second switching node SW2. The aforementioned second clamping unit 170 can be used to limit the voltage between the corresponding set of bootstrap nodes BT and the switching node SW, so as to prevent the voltage between the corresponding set of bootstrap nodes BT and the switching node SW from being too large or causing sudden changes, thereby improving the stability of the energy replenishment circuit.

[0034] Optionally, the first clamping unit 110 and the second clamping unit 170 can be implemented using related clamping circuits.

[0035] Optionally, refer to Figure 4As shown, the first clamping unit 110 and the second clamping unit 170 respectively include an eighth MOSFET M8, a ninth MOSFET M9, a tenth MOSFET M10, an eleventh MOSFET M11, a twelfth MOSFET M12, a thirteenth MOSFET M13, a fourteenth MOSFET M14, a fifteenth MOSFET M15, a sixteenth MOSFET M16, a seventeenth MOSFET M17, an eighteenth MOSFET M18 and a first resistor R4. The drain of the eighth MOS transistor M8 serves as the first terminal of the first clamping unit 110 and the second clamping unit 170, respectively connected to the gate of the eighth MOS transistor M8, the drain of the fourteenth MOS transistor M14, and the gate of the fourteenth MOS transistor M14. Its source is connected to the drain and gate of the ninth MOS transistor M9. The source of the ninth MOS transistor M9 is connected to the drain and gate of the tenth MOS transistor M10. The source of the tenth MOS transistor M10 is connected to the drain and gate of the eleventh MOS transistor M11. The source of the eleventh MOS transistor M11 is connected to the drain and gate of the twelfth MOS transistor M12. The source of the twelfth MOS transistor M12 is connected to the drain and gate of the thirteenth MOS transistor M13. The gate of the thirteenth MOS transistor M13; the source of the thirteenth MOS transistor M13 is connected to the first terminal of the first resistor R4 and the gate of the eighteenth MOS transistor M18; the second terminal of the first resistor R4 serves as the second terminal of the first clamping unit 110 and the second clamping unit 170, and is connected to the source of the eighteenth MOS transistor M18; the source of the fourteenth MOS transistor M14 is connected to the drain of the fifteenth MOS transistor M15 and the gate of the fifteenth MOS transistor M15; the source of the fifteenth MOS transistor M15 is connected to the drain of the sixteenth MOS transistor M16 and the gate of the sixteenth MOS transistor M16; the source of the sixteenth MOS transistor M16 is connected to the drain of the seventeenth MOS transistor M17 and the gate of the seventeenth MOS transistor M17; the source of the seventeenth MOS transistor M17 is connected to the drain of the eighteenth MOS transistor M18.

[0036] Optionally, the eighth MOSFET M8 to the eighteenth MOSFET M18 mentioned above are all NMOS transistors.

[0037] In one embodiment, reference Figure 5 As shown, the first resistor subunit 150 includes a second resistor R2; the first end of the second resistor R2 is connected to the drain of the third MOS transistor M3, and the second end is connected to the drain of the first MOS transistor M1.

[0038] Optionally, such as Figure 5As shown, the second resistor subunit 160 includes a third resistor R3; the first end of the third resistor R3 is connected to the drain of the third MOS transistor M3, and the second end is connected to the source of the second MOS transistor M2.

[0039] In one embodiment, the current mirror 140 includes a fourth MOSFET M4, a fifth MOSFET M5, a MOSFET group 141, and a current source 142. The MOSFET group 141 includes at least a plurality of MOSFETs connected in parallel. The drain of the fourth MOSFET M4 is connected to the source of the first MOSFET M1 and the drain of each MOSFET in the MOSFET group 141. The gate of the fourth MOSFET M4 is connected to the gate of each MOSFET in the MOSFET group 141, the gate of the fifth MOSFET M5, the drain of the fifth MOSFET M5, and the output terminal of the current source 142. The source of the fifth MOSFET M5 is connected to the source of each MOSFET in the MOSFET group 141 and ground. The input terminal of the current source 142 is used to connect a set voltage to provide a corresponding current signal. Optionally, the fourth MOSFET M4 and the fifth MOSFET M5 can be NMOS transistors. Optionally, the number of MOSFETs included in the MOSFET group 141 can be set according to factors such as the clamping range and / or related accuracy of the energy replenishment circuit. The MOSFET group 141 can typically include 1 to 5 MOSFETs, for example, the MOSFET group 141 can include 1 MOSFET, 2 MOSFETs, 4 MOSFETs or 5 MOSFETs, etc.

[0040] In one example, refer to Figure 7 As shown, the MOS transistor group 141 also includes switches corresponding to each of the MOS transistors, and each switch is connected between the source of the first MOS transistor and the drain of the corresponding MOS transistor.

[0041] Optionally, each of the above switches can be implemented using relays. Each switch can connect the corresponding MOSFET to the corresponding circuit when closed and stop the corresponding MOSFET from working when open, thereby controlling the number of MOSFETs connected to the corresponding circuit in the MOSFET group 141, thereby adjusting the current flowing through the second resistor R2, and thus adjusting the clamping voltage corresponding to the first clamping unit 110.

[0042] Optionally, the aforementioned switches are implemented using a one-time programmable memory (efuse), that is, the one-time programmable memory is used to control the on / off state of the corresponding branch, which provides greater flexibility in the control process. Furthermore, efuse can be performed at low voltage. The current mirror 140 adjusts the current of the current regulating unit 180 through efuse. Even if the reference voltage VREF is a medium-voltage reference (between 1.8 and 5V), and although the bootstrap node BT, switching node SW, and BT_COM terminals are high voltage, possibly as high as 50V, the current mirror 140 can still be designed using a medium-voltage transistor, without needing to switch to the high-voltage region. This saves the corresponding current layout area and improves the circuit's response speed and the efficiency of the corresponding switching power supply.

[0043] Optionally, refer to Figure 8 As shown, the MOSFET group 140 includes a sixth MOSFET M6, a seventh MOSFET M7, a first switch S1, and a second switch S2. The first terminal of the first switch S1 is connected to the source of the first MOSFET M1, and the second terminal is connected to the drain of the sixth MOSFET M6; the gate of the sixth MOSFET M6 is connected to the output terminal of the current source 142, and its source is grounded. The first terminal of the second switch S2 is connected to the source of the first MOSFET M1, and the second terminal is connected to the drain of the seventh MOSFET M7; the gate of the seventh MOSFET M7 is connected to the output terminal of the current source 142, and its source is grounded.

[0044] The inventors discovered that in some designs, the current regulating unit 180 uses a resistor, for example... Figure 9 The fourth resistor R1 shown achieves its corresponding current regulation. The inventor... Figure 9 The energy replenishment circuit shown and the energy replenishment circuit provided in this application (such as...) Figures 5 to 8 The following is a comparative analysis (as shown in the figure). Figure 9 The energy replenishment circuit shown, when in operation, the source current I1 of the first MOSFET M1 includes: , Indicates the reference voltage. This represents the gate-source voltage of the first MOSFET M1. This indicates the resistance of the fourth resistor, R1.

[0045] The current I2 of the first clamping unit 110 includes: , This indicates the transconductance of the second MOSFET M2. This represents the gate-source voltage of the second MOSFET M2. This represents the threshold voltage of the second MOSFET M2. This indicates the resistance of the second resistor, R2. This indicates the resistance of the third resistor, R3.

[0046] Simplifying the formulas for the current I2 above, we get: .

[0047] Therefore, the voltage Vclamp (i.e., the clamping voltage) on the first clamping unit 110 can be expressed as: , This represents the equivalent resistance of the first clamping unit 110. This formula indicates that the clamping voltage Vclamp changes with VREF, V GS1 The ratio of R2 / R1, R3, gm2 (transconductance of M2), V TH2 V GS3 The clamping range (the range of clamping voltage variation) fluctuates with changes in PVT (process, voltage, and temperature). Figure 9 The energy replenishment circuit shown can easily affect the efficiency of the corresponding switching power supply.

[0048] like Figures 6 to 8 In the MOSFET group 141, the dimensions of each MOSFET are consistent. For example, the dimensions of each MOSFET in the MOSFET group 141 are the same as the dimensions of the fifth MOSFET M5. The inventors analyzed the energy replenishment circuit provided in this application and found that the current I1 at the source of the first MOSFET M1 and the current I2 in the first clamping unit 110 respectively include: , , Where n represents the number of MOSFETs connected to the corresponding circuit in MOSFET group 141, and I represents the current flowing through one MOSFET in MOSFET group 141. This indicates the transconductance of the second MOSFET M2. This represents the threshold voltage of the second MOSFET M2. This indicates the resistance of the second resistor, R2. This indicates the resistance of the third resistor, R3.

[0049] Compared to Figure 9 The energy replenishment circuit in other schemes shown in this application Figures 5 to 8 The energy replenishment circuit shown eliminates V GS1The effects of changes in VREF and resistor R1 can be adjusted by regulating the current I1 via efuse, thereby regulating the entire clamping range. This allows the clamping range to fluctuate within a relatively small, fixed range. When adapting to a large input / output range, the clamping value can remain relatively stable, preventing the corresponding buck-boost circuit or chip from having its lifespan affected by overvoltage of the relevant MOSFETs, and preventing the on-resistance of the power transistors from being affected by a low clamping voltage. Furthermore, efuse is performed at low voltage, without needing to switch to high voltage, saving corresponding circuit area. Adjusting the clamping value under PVT conditions via efuse can improve the efficiency of the corresponding switching power supply.

[0050] In the above energy replenishment circuit, the current adjustment unit 180 can adjust the current of the first clamping unit 110 through the current mirror 140, thereby adjusting the clamping voltage between the corresponding bootstrap node BT and the switching node SW. The control transistor 130 and the first clamping unit 110 cooperate with each other to control the voltage between the corresponding set of bootstrap nodes BT and switching nodes SW, so that the corresponding bootstrap nodes BT and switching nodes SW have a reasonable clamping value. The relevant power transistors of the buck_boost circuit can be fully turned on, the on-resistance is minimized, and the efficiency of the entire buck_boost circuit can be improved. The current of the current mirror 140 can be adjusted by efuse, so that the current mirror 140 can be designed with medium voltage transistors without switching to the high voltage region, which can save the corresponding current layout area and improve the response speed of the circuit and the efficiency of the corresponding switching power supply.

[0051] A second aspect of this application provides a buck_boost circuit, which includes the energy replenishment circuit for the buck_boost circuit described in any of the above embodiments.

[0052] The aforementioned buck_boost circuit may include, for example: Figure 1 The 4N transistor buck-boost circuit shown includes a buck module and a boost module. The buck module has a first bootstrap node BT1, a first switching node SW1, and a first bootstrap capacitor C1 disposed between the first bootstrap node BT1 and the first switching node SW1. The boost module has a second bootstrap node BT2, a second switching node SW2, and a second bootstrap capacitor C2 disposed between the second bootstrap node BT2 and the second switching node SW2.

[0053] The aforementioned energy replenishment circuit may include a first energy replenishment module and a second energy replenishment module. The first energy replenishment module is located between the first bootstrap node BT1 and the first switching node SW1, and the second energy replenishment module is located between the second bootstrap node BT2 and the second switching node SW2. When the buck_boost circuit operates in buck mode, the second energy replenishment module operates between the BT2 terminal and the SW2 terminal. When the buck_boost circuit operates in boost mode, the first energy replenishment module operates between the BT1 terminal and the SW1 terminal.

[0054] Specifically, in buck mode, the input of the buck-boost circuit is naturally greater than its output. The voltage of BT1 is VCC / VIN+VCC (the voltage of BT1 varies depending on the turn-on of different control transistors). The required voltage of BT2 is VOUT+VCC. Therefore, when the voltage of BT1 is VIN+VCC, capacitor C2 is charged, and the charging voltage of BT2 is clamped to VOUT+VCC. When BT1 > BT2, BT1 replenishes the energy of BT2. In boost mode, the output is naturally greater than its input. The voltage of BT2 is VCC / VOUT+VCC depending on the turn-on of different power transistors. The required clamping voltage of BT1 is VIN+VCC. Therefore, when BT2 > BT1, energy needs to be replenished to BT1. The above energy replenishment circuit can provide the function of a clamping circuit, providing timely energy replenishment in buck mode. Figure 1 The capacitor C2 in the buck-boost circuit shown provides energy to BT2, ensuring that it doesn't become inefficient when the internal switch flips or when a small current load is applied, thus maintaining the efficiency of the entire buck-boost circuit. In boost mode, the voltage difference between BT1 and SW1 is controlled to ensure a sufficiently large voltage difference, allowing the power transistor to conduct fully and guaranteeing circuit efficiency. This also provides energy to capacitor C1, preventing BT1 from becoming inefficient during internal switching and under load, thus improving overall chip performance and further enhancing circuit efficiency. Furthermore, the buck-boost circuit described above possesses all the beneficial effects of the energy replenishment circuit for buck-boost circuits described in any of the above embodiments, which will not be elaborated further here.

[0055] A third aspect of this application provides a chip that includes the buck_boost circuit described in any of the above embodiments or the energy replenishment circuit for the buck_boost circuit described in any of the above embodiments. This chip possesses all the beneficial effects of the energy replenishment circuit for the buck_boost circuit described in any of the above embodiments, or all the beneficial effects of the energy replenishment circuit described in any of the above embodiments, which will not be elaborated further here.

[0056] Although this application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on a reading and understanding of this specification and the accompanying drawings. This application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the aforementioned components, the terminology used to describe such components is intended to correspond to any component (unless otherwise indicated) that performs the specified function of said component (e.g., is functionally equivalent to it), even if structurally not equivalent to the disclosed structure performing the functions in the exemplary implementations of this specification shown herein.

[0057] That is, the above description is only an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, such as the combination of technical features between different embodiments, or direct or indirect application in other related technical fields, are similarly included within the patent protection scope of this application.

[0058] Furthermore, for structural elements with the same or similar characteristics, this application may use the same or different reference numerals for identification. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0059] In this application, the term "exemplary" is used to mean "serving as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as more preferred or advantageous than other embodiments. This application has been provided above to enable any person skilled in the art to implement and use it. Various details have been set forth in the above description for purposes of explanation. It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed herein.

Claims

1. An energy replenishment circuit for a buck-boost circuit, the buck-boost circuit comprising a buck module and a boost module, the buck module having a first bootstrap node, a first switching node, and a first bootstrap capacitor disposed between the first bootstrap node and the first switching node, the boost module having a second bootstrap node, a second switching node, and a second bootstrap capacitor disposed between the second bootstrap node and the second switching node, characterized in that, The energy replenishment circuit includes a first energy replenishment module and a second energy replenishment module. The first energy replenishment module is located between the first bootstrap node and the first switch node, and the second energy replenishment module is located between the second bootstrap node and the second switch node. Both the first energy replenishment module and the second energy replenishment module include a first clamping unit, a mode control unit, a control transistor, and a current adjustment unit, wherein the current adjustment unit includes a current mirror; The first terminal of the control transistor is connected to the corresponding bootstrap node, the control terminal is connected to the first terminal of the mode control unit and the first terminal of the first clamping unit respectively, and the second terminal is connected to the current adjustment unit; the second terminal of the first clamping unit is connected to the second terminal of the mode control unit and the corresponding switching node respectively. The mode control unit is used to control the on / off state of the control transistor in order to control the working mode of the energy replenishment module. The control transistor and the first clamping unit are used to control the voltage between the corresponding bootstrap node and the switch; The current adjustment unit is used to adjust the current of the first clamping unit through the current mirror.

2. The energy replenishment circuit according to claim 1, characterized in that, The current regulation unit further includes a first MOSFET, a second MOSFET, a first resistor subunit, and a second resistor subunit; The first end of the first resistor subunit is connected to the second end of the control transistor, and the second end is connected to the gate of the second MOS transistor and the drain of the first MOS transistor respectively; the first end of the second resistor subunit is connected to the second end of the control transistor, and the second end is connected to the source of the second MOS transistor; the drain of the second MOS transistor is connected to the control terminal of the control transistor; the gate of the first MOS transistor is used to connect to the reference voltage, and the source is grounded through the current mirror.

3. The energy replenishment circuit according to claim 2, characterized in that, The control transistor includes a third MOS transistor; the source of the third MOS transistor is the first terminal of the control transistor, the gate is the control terminal of the control transistor, and the drain is the second terminal of the control transistor.

4. The energy replenishment circuit according to claim 2, characterized in that, The current mirror includes a fourth MOS transistor, a fifth MOS transistor, a MOS transistor group, and a current source, wherein the MOS transistor group includes at least a plurality of MOS transistors connected in parallel; The drain of the fourth MOS transistor is connected to the source of the first MOS transistor and the drain of each MOS transistor in the MOS transistor. The gate is connected to the gate of each MOS transistor in the MOS transistor, the gate of the fifth MOS transistor, the drain of the fifth MOS transistor, and the output terminal of the current source. The source is connected to the source of each MOS transistor in the MOS transistor and the ground terminal. The input terminal of the current source is used to connect a set voltage.

5. The energy replenishment circuit according to claim 4, characterized in that, The MOS transistor group also includes switches corresponding to each MOS transistor, and each switch is connected between the source of the first MOS transistor and the drain of the corresponding MOS transistor.

6. The energy replenishment circuit according to claim 4, characterized in that, Each of the aforementioned switches uses a one-time programmable memory to control the on / off state of the corresponding branch.

7. The energy replenishment circuit according to claim 4, characterized in that, The MOSFET group includes a sixth MOSFET, a seventh MOSFET, a first switch, and a second switch; The first terminal of the first switch is connected to the source of the first MOSFET, and the second terminal is connected to the drain of the sixth MOSFET; the gate of the sixth MOSFET is connected to the output terminal of the current source, and the source is grounded; the first terminal of the second switch is connected to the source of the first MOSFET, and the second terminal is connected to the drain of the seventh MOSFET. The gate of the seventh MOS transistor is connected to the output terminal of the current source, and the source is grounded.

8. The energy replenishment circuit according to claim 1, characterized in that, The first energy replenishment module and the second energy replenishment module each further include a second clamping unit; the second clamping unit is connected between the corresponding bootstrap node and the switching node, and is used to limit the voltage between the bootstrap node and the switching node.

9. The energy replenishment circuit according to claim 8, characterized in that, The first clamping unit and the second clamping unit respectively include an eighth MOS transistor, a ninth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, a twelfth MOS transistor, a thirteenth MOS transistor, a fourteenth MOS transistor, a fifteenth MOS transistor, a sixteenth MOS transistor, a seventeenth MOS transistor, an eighteenth MOS transistor, and a first resistor; The drain of the eighth MOS transistor serves as the first terminal of the first clamping unit and the second clamping unit, and is respectively connected to the gate of the eighth MOS transistor, the drain of the fourteenth MOS transistor, and the gate of the fourteenth MOS transistor, while the source is respectively connected to the drain of the ninth MOS transistor and the gate of the ninth MOS transistor. The source of the ninth MOS transistor is connected to the drain of the tenth MOS transistor and the gate of the tenth MOS transistor, respectively. The source of the tenth MOS transistor is connected to the drain and gate of the eleventh MOS transistor, respectively; the source of the eleventh MOS transistor is connected to the drain and gate of the twelfth MOS transistor, respectively; the source of the twelfth MOS transistor is connected to the drain and gate of the thirteenth MOS transistor, respectively; the source of the thirteenth MOS transistor is connected to the first terminal of the first resistor and the gate of the eighteenth MOS transistor, respectively; the second terminal of the first resistor serves as the second terminal of the first clamping unit and the second clamping unit, and is connected to the source of the eighteenth MOS transistor; The source of the fourteenth MOS transistor is connected to the drain and gate of the fifteenth MOS transistor, respectively; the source of the fifteenth MOS transistor is connected to the drain and gate of the sixteenth MOS transistor, respectively; the source of the sixteenth MOS transistor is connected to the drain and gate of the seventeenth MOS transistor, respectively. The source of the seventeenth MOS transistor is connected to the drain of the eighteenth MOS transistor.

10. The energy replenishment circuit according to claim 3, characterized in that, The first resistor subunit includes a second resistor, the first end of which is connected to the drain of the third MOS transistor, and the second end of which is connected to the drain of the first MOS transistor; And / or, the second resistor subunit includes a third resistor, the first end of which is connected to the drain of the third MOS transistor, and the second end of which is connected to the source of the second MOS transistor.

11. A buck-boost circuit, characterized in that, Includes the energy replenishment circuit for the buck_boost circuit as described in any one of claims 1 to 10.

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