Differential low noise amplifier and noise cancellation method based on two-path noise cancellation

Abstract

The present application relates to low noise amplifier, specifically relates to a kind of differential low noise amplifier and noise cancellation method based on double-path noise cancellation, solve the technical problem that the existing low noise amplifier can only eliminate the noise generated by main amplifier tube.The differential low noise amplifier provided by the present application includes positive half edge circuit and negative half edge circuit which are same in structure and are cross-coupled by capacitive coupler, and the positive half edge circuit and the negative half edge circuit both adopt common-source common-gate structure and resistance negative feedback structure, the noise generated by common-source common-gate structure is cancelled by resistance negative feedback structure, and the noise generated by resistance negative feedback structure is cancelled by common-source common-gate structure, can realize the noise generated by multiple devices of low noise amplifier to be completely cancelled or partially cancelled, effectively reduce the noise figure of circuit, with the advantages of low noise, high linearity, low power consumption, and can be applied in low noise, high linearity, low power consumption requirement high application.The present application also provides a kind of noise cancellation method.

Description

Technical Field

[0001] This invention relates to low-noise amplifiers, and more specifically to a differential low-noise amplifier and noise cancellation method based on dual-path noise cancellation. Background Technology

[0002] In recent years, with the rapid development of wireless communication technology, the application of radio frequency (RF) wireless transceiver front-end circuits has become increasingly widespread. Low-noise amplifiers (LNAs) are a crucial circuit module in RF wireless transceiver front-end circuits. To ensure the performance of these circuits, LNAs need to amplify signals while introducing as little noise as possible. Therefore, reducing the noise figure of LNAs is a very popular research topic.

[0003] The current common method is to use noise cancellation technology to effectively reduce the noise figure of low-noise amplifiers. There are two common noise cancellation techniques with different circuit structures, namely... Figure 1 The resistive negative feedback structure shown and as follows Figure 2 The common-gate, common-source structure is shown. The main problem with these two structures is that only the noise generated by the main amplifier transistor can be canceled, while the noise from other devices cannot. Therefore, noise cancellation techniques need to be optimized to cancel noise introduced by more devices. Summary of the Invention

[0004] The purpose of this invention is to solve the technical problem that existing low-noise amplifiers based on noise cancellation technology can only eliminate the noise generated by the main amplification tube, and to provide a differential low-noise amplifier and noise cancellation method based on dual-path noise cancellation.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] A differential low-noise amplifier based on dual-path noise cancellation is characterized by including positive half-circuit and negative half-circuit with identical structures and cross-coupled by coupling capacitors.

[0007] Both the positive half-circuit and the negative half-circuit adopt a common-source-common-gate structure and a resistive negative feedback structure;

[0008] The positive half-circuit includes a first common-source amplifier and a first common-gate amplifier cascaded together, and a first DC bias circuit; the first common-source amplifier, the first common-gate amplifier, and the first DC bias circuit form a first common-source-common-gate structure, and the first common-source amplifier and the first common-gate amplifier form a first resistive negative feedback structure; the input terminal of the first common-source amplifier and one input terminal of the first common-gate amplifier are connected to the radio frequency input signal VP, one output terminal of the first common-source amplifier is connected to the other input terminal of the first common-gate amplifier, and the other output terminal is grounded; one output terminal of the first common-gate amplifier is grounded through the first DC bias circuit, and the other output terminal is connected to the VOP output terminal; wherein, the first common-source amplifier includes a first feedback resistor connected between its input terminal and one output terminal, and between its input terminal and the other output terminal;

[0009] The negative half-circuit includes a second common-source amplifier and a second common-gate amplifier cascaded together, as well as a second DC bias circuit; the second common-source amplifier, the second common-gate amplifier, and the second DC bias circuit form a second common-source-common-gate structure, and the second common-source amplifier and the second common-gate amplifier form a first resistive negative feedback structure; the input terminal of the second common-source amplifier and one input terminal of the second common-gate amplifier are connected to the RF input signal VN, one output terminal of the second common-source amplifier is connected to the other input terminal of the second common-gate amplifier, and the other output terminal is grounded; one output terminal of the second common-gate amplifier is grounded through the second DC bias circuit, and the other output terminal is connected to the VON output terminal; wherein, the second common-source amplifier includes a second feedback resistor connected between its input terminal and one output terminal, and between its input terminal and the other output terminal;

[0010] The first common-gate amplifier and the second common-gate amplifier are cross-coupled by a coupling capacitor, and the coupling capacitor is connected to the radio frequency input signal VP and the radio frequency input signal VN respectively, so as to realize the differential interconnection of the first common-gate amplifier and the second common-gate amplifier, and the inverse amplification of the noise of their main amplifier tubes.

[0011] Furthermore, the coupling capacitor includes capacitor C1 and capacitor C2;

[0012] The first common-source amplifier includes transistor M1, transistor M2 and resistor R1; the first common-gate amplifier includes transistor M3 and transistor M4; and the first DC bias circuit includes transistor M5; wherein, resistor R1 is a first feedback resistor.

[0013] The gates of transistors M1, M2, and M4, one end of resistor R1, and one side plate of capacitor C1 are connected to the radio frequency input signal VP. The drains of transistors M1 and M2 are connected and connected to the other end of resistor R1 and the gate of transistor M3. The source of transistor M1 is grounded.

[0014] The source of transistor M2 and the drain of transistor M3 are connected to power supply VDD; the source of transistor M3 and the drain of transistor M4 are connected to the VOP output terminal; the source of transistor M4 and the drain of transistor M5 are connected to one side plate of capacitor C2; the gate of transistor M5 is connected to bias voltage VB, and the source is grounded.

[0015] Furthermore, the second common-source amplifier includes transistors M6 and M7 and resistor R2, the second common-gate amplifier includes transistors M8 and M9, and the second DC bias circuit includes transistor M10; the resistor R2 is a second feedback resistor.

[0016] The gates of transistors M6, M7, and M9, one end of resistor R2, and the other end of capacitor C2 are connected to the radio frequency input signal VN. The drains of transistors M6 and M7 are connected and connected to the other end of resistor R2 and the gate of transistor M8. The source of transistor M6 is grounded.

[0017] The source of transistor M7 and the drain of transistor M8 are connected to power supply VDD; the source of transistor M8 and the drain of transistor M9 are connected to the VON output terminal; the source of transistor M9 and the drain of transistor M10 are connected to the other plate of capacitor C1; the gate of transistor M10 is connected to bias voltage VB, and the source is grounded.

[0018] Furthermore, in order to completely cancel out the noise generated by transistors M1 and M2, transistors M3 and M4 and resistor R1 satisfy the following formula:

[0019]

[0020] Among them, R s R is the internal resistance of the signal source, R1 is the resistance value of resistor R1, g m3 For the transconductance of transistor M3, g m4 This represents the transconductance of transistor M4.

[0021] Furthermore, in order to cancel out the noise generated by transistor M4, transistors M1, M2, M3, M4, and resistor R1 satisfy the following formula:

[0022]

[0023]

[0024]

[0025] Among them, g m1 For the transconductance of transistor M1, g m2 This represents the transconductance of transistor M2.

[0026] Furthermore, in order to completely cancel out the noise generated by transistors M6 and M7, transistors M8 and M9 and resistor R2 satisfy the following formula:

[0027]

[0028] Among them, R s R1 is the internal resistance of the signal source, R2 is the resistance value of resistor R2, and g is the resistance of the signal source. m8 For the transconductance of transistor M8, g m3 This represents the transconductance of transistor M3.

[0029] Furthermore, in order to cancel out the noise generated by transistor M9, transistors M6, M7, M8, M9, and resistor R2 satisfy the following formula:

[0030]

[0031]

[0032]

[0033] Among them, g m6 For the transconductance of transistor M6, g m7 This represents the transconductance of transistor M7.

[0034] Furthermore, the first DC bias circuit and the second DC bias circuit are implemented by tail current sources.

[0035] A noise cancellation method, based on the aforementioned differential low-noise amplifier with dual-path noise cancellation, is characterized by comprising the following steps:

[0036] Step 1: Turn on the first DC bias circuit, and the first common-source-common-gate structure starts to work. The RF input signal VP enters the positive half circuit and is amplified by the first common-source amplifier. The main amplifying transistor of the first common-source amplifier generates noise. The noise generated by the main amplifying transistor of the first common-source amplifier is in phase between its input and output terminals.

[0037] Step 2: The noise generated by the main amplifying tube of the first common source amplifier enters the first common grid amplifier along with the RF input signal VP at its input and output terminals respectively. After being amplified by the first resistor negative feedback structure, the noise output at the VOP output terminal is out of phase and is completely canceled.

[0038] Step 3: The RF input signal VP enters the first common-gate amplifier for amplification. The main amplifying transistor of the first common-gate amplifier generates noise, and the noise generated by the main amplifying transistor of the first common-gate amplifier is out of phase between its two output terminals.

[0039] Step 4: The noise at one output terminal of the first common-gate amplifier is directly output at the VOP output terminal, and the noise at the other output terminal is amplified in reverse by the coupling capacitor. Then, it enters the first common-source-common-gate structure along with the RF input signal VP for amplification. The noise at the VOP output terminal is in phase with the noise at the other output terminal of the first common-gate amplifier. The noise in phase with the noise at the other output terminal of the first common-gate amplifier and the noise at one output terminal of the first common-gate amplifier partially cancel each other at the VOP output terminal.

[0040] Step 5: The RF input signal VN enters the negative half circuit. Following the methods in steps 1-4, it completely cancels the noise generated by the main amplifying transistor of the second common source amplifier and partially cancels the noise generated by the main amplifying transistor of the second common gate amplifier.

[0041] Compared with the prior art, the present invention has the following beneficial technical effects:

[0042] The differential low-noise amplifier based on dual-path noise cancellation provided by this invention employs both a common-source-common-gate structure and a resistive negative feedback structure for noise cancellation, achieving complete or partial cancellation of noise from multiple components in the differential low-noise amplifier. This effectively reduces the noise figure of the circuit and offers advantages such as low noise, high linearity, and low power consumption, making it suitable for applications with high noise and power consumption requirements. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of a low-noise amplifier structure that uses a traditional resistive negative feedback structure for noise cancellation.

[0044] Figure 2 This is a schematic diagram of a low-noise amplifier structure that uses a traditional common-source-common-gate structure for noise cancellation.

[0045] Figure 3 This is a schematic diagram of the structure of an embodiment of the differential low-noise amplifier based on dual-path noise cancellation of the present invention;

[0046] Figure 4 This is a simplified circuit diagram of the positive half of the differential low-noise amplifier embodiment based on dual-path noise cancellation of the present invention;

[0047] Figure 5 This is a schematic diagram illustrating the principle of noise cancellation generated by transistors M1 and M2 in a differential low-noise amplifier embodiment based on dual-path noise cancellation of the present invention.

[0048] Figure 6 This is a schematic diagram illustrating the principle of noise cancellation generated by transistor M4 in a differential low-noise amplifier embodiment based on dual-path noise cancellation of the present invention. Detailed Implementation

[0049] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the differential low-noise amplifier and noise cancellation method based on dual-path noise cancellation proposed in this invention. Those skilled in the art should understand that these embodiments are merely illustrative of the technical principles of this invention and are not intended to limit the scope of protection of this invention.

[0050] A differential low-noise amplifier based on dual-path noise cancellation is composed of a common-source-common-gate structure and a resistive negative feedback structure. In the common-source-common-gate structure, the noise of the main amplifying transistor can be canceled by the resistive negative feedback structure, and vice versa, thus achieving dual-path noise cancellation. The differential low-noise amplifier provided in this embodiment includes positive and negative half-circuits with identical structures and cross-coupled by coupling capacitors.

[0051] The positive half-side circuit includes a first common-source amplifier and a first common-gate amplifier cascaded together, as well as a first DC bias circuit. The first common-source amplifier, the first common-gate amplifier, and the first DC bias circuit form a first common-source-common-gate structure, and the first common-source amplifier and the first common-gate amplifier form a first resistive negative feedback structure. The first common-source amplifier includes a first feedback resistor connected between its input and output terminals.

[0052] like Figure 3As shown, the coupling capacitors include capacitors C1 and C2. In the positive half-circuit, the first common-source amplifier includes transistors M1 and M2 and resistor R1; the first common-gate amplifier includes transistors M3 and M4; and the first DC bias circuit includes transistor M5. Resistor R1 is the first feedback resistor. The gates of transistors M1, M2, and M4, one end of resistor R1, and one side plate of capacitor C1 are connected to the RF input signal VP. The drains of transistors M1 and M2 are connected and connected to the other end of resistor R1 and the gate of transistor M3, respectively. The sources of transistors M1 and M5 are grounded. The source of transistor M2 and the drain of transistor M3 are connected to the power supply VDD. The source of transistor M3 and the drain of transistor M4 are connected to the VOP output terminal of the differential amplifier. The source of transistor M4 and the drain of transistor M5 are connected to one side plate of capacitor C2. The gate of transistor M5 is connected to the bias voltage VB. In this structure, transistors M1, M2, M3, M4 and resistor R1 form the first resistive negative feedback structure. The first common-source amplifier composed of transistors M1, M2 and resistor R1 is cascaded with the first common-gate amplifier composed of transistors M3 and M4, and together with transistor M5, they form a common-source-common-gate structure. The positive half circuit is cross-coupled with the negative half circuit through capacitors C1 and C2.

[0053] The negative half of the circuit includes a second common-source amplifier and a second common-gate amplifier cascaded together, as well as a second DC bias circuit. The second common-source amplifier, the second common-gate amplifier, and the second DC bias circuit form a second common-source-common-gate structure, and the second common-source amplifier and the second common-gate amplifier form a first resistive negative feedback structure. The second common-source amplifier includes a second feedback resistor connected between its input and output terminals.

[0054] like Figure 3 As shown, in the negative half of the circuit, the second common-source amplifier includes transistors M6 and M7, the second common-gate amplifier includes transistors M8 and M9, the second feedback resistor includes resistor R2, and the second DC bias circuit includes transistor M10. Resistor R2 is the second feedback resistor. The gates of transistors M6, M7, and M9, one end of resistor R2, and the other end of capacitor C2 are connected to the RF input signal VN. The drains of transistors M6 and M7 are connected and connected to the other end of resistor R2 and the gate of transistor M8, respectively. The sources of transistors M6 and M10 are grounded. The source of transistor M7 and the drain of transistor M8 are connected to the power supply VDD. The source of transistor M8 and the drain of transistor M9 are connected to the VON output terminal of the differential amplifier. The source of transistor M9 and the drain of transistor M10 are connected to the other end of capacitor C1. The gate of transistor M10 is connected to the bias voltage VB.

[0055] The first and second common-gate amplifiers are cross-coupled by coupling capacitors, which are used to achieve differential interconnection and to invert the noise of the main amplifier transistors of the first and second common-gate amplifiers. The structure of the first and second DC bias circuits is implemented by tail current sources.

[0056] The noise generated by the first common-source-common-gate structure is canceled by the first resistor negative feedback structure; the noise generated by the second common-source-common-gate structure is canceled by the second resistor negative feedback structure. The noise generated by the first common-source amplifier is completely canceled at the VOP output of the differential amplifier, and the noise generated by the second common-source amplifier is completely canceled at the VON output of the differential amplifier. The noise generated by the first common-gate amplifier is partially canceled at the VOP output of the differential amplifier, and the noise generated by the second common-gate amplifier is partially canceled at the VON output of the differential amplifier.

[0057] like Figure 4 The diagram shown is a simplified circuit diagram of the positive half-side circuit of the differential low-noise amplifier based on dual-path noise cancellation provided in this embodiment. The function of capacitors C1 and C2 is equivalent to realizing -1 inverted amplification between the gate and source of transistor M4 in the common-gate amplifier. This can realize the inversion of the noise generated by transistor M4 between the gate and the source, so that the noise between the gate and the source can be canceled at the output.

[0058] The positive half-side circuit of the differential low-noise amplifier based on dual-path noise cancellation provided in this embodiment includes two gain paths: a first gain path composed of transistors M1, M2, and M3, and a second gain path composed of transistors M3 and M4. The gain expressions for the first and second gain paths are as follows:

[0059] A V1 =1-(g m1 +g m2 R1

[0060]

[0061] Among them, A V1 For the gain of the first gain path, A V2 For the gain of the second gain path, g m1 For the transconductance of transistor M1, g m2 For the transconductance of transistor M2, g m3 For the transconductance of transistor M3, g m4 R1 is the transconductance of transistor M4, and R1 is the resistance value of resistor R1.

[0062] like Figure 5 The diagram shows the principle of noise cancellation in the main amplifying transistors (transistors M1 and M2) of the first common-source amplifier. The noise generated by transistors M1 and M2 is in phase between their gates and drains. Assuming that the noise is positively phased at the gates and drains of transistors M1 and M2, the noise is also positively phased when it reaches the source of transistor M3; however, it is negatively phased when it reaches the drain of transistor M4. Therefore, at the output, the positive and negative phase noises can cancel each other out.

[0063] To completely cancel out the noise generated by the main amplifying transistors (transistors M1 and M2) of the first common-source amplifier, transistors M3 and M4 and resistor R1 must satisfy the following formula:

[0064]

[0065] Among them, R s R is the internal resistance of the signal source, R1 is the resistance value of resistor R1, g m3 For the transconductance of transistor M3, g m4 This represents the transconductance of transistor M4.

[0066] like Figure 6 The diagram shows the principle of noise cancellation generated by the main amplifying transistor (transistor M4) of the first common-gate amplifier. The noise generated by transistor M4 is out of phase between its source and drain. Assuming the noise phase at the source of transistor M4 is positive, the noise phase at the drain of transistor M4 is negative. After passing through a -1 inverting amplifier, the noise phase at the gates of transistors M1, M2, and M4 is negative. The noise phase at the gate of transistor M3 is then positive, resulting in positive-phase noise at the output. This noise cancels out the negative-phase noise at the drain of transistor M4.

[0067] The noise generated by the main amplifying transistor (transistor M4) of the first common-gate amplifier can only be partially canceled, and the cancellation ratio varies depending on the device parameters.

[0068] Transistor M1, transistor M2, transistor M3, transistor M4, and resistor R1 satisfy the following formula:

[0069]

[0070]

[0071]

[0072] Among them, g m1 For the transconductance of transistor M1, g m2This represents the transconductance of transistor M2.

[0073] Therefore, the noise generated at the output terminal of transistor M4 is expressed as:

[0074]

[0075] Among them, V n 2 I is the noise power generated at the output of transistor M4. n 2 It is the noise current power generated by transistor M4, which can achieve up to 75% noise cancellation.

[0076] The principle of noise cancellation for each component in the negative half-circuit is the same as that in the positive half-circuit, and the parameters of each component must also meet the same conditions. Transistor M8, transistor M9, and resistor R2 satisfy the following formula:

[0077]

[0078] Among them, R s R1 is the internal resistance of the signal source, R2 is the resistance value of resistor R2, and g is the resistance of the signal source. m8 For the transconductance of transistor M8, g m3 This represents the transconductance of transistor M3.

[0079] Transistor M6, transistor M7, transistor M8, transistor M9, and resistor R2 satisfy the following formula:

[0080]

[0081]

[0082]

[0083] Among them, g m6 For the transconductance of transistor M6, g m7 This represents the transconductance of transistor M7.

[0084] This embodiment also provides a noise cancellation method, based on the aforementioned differential low-noise amplifier with dual-path noise cancellation, including the following steps:

[0085] Step 1: Turn on the first DC bias circuit, and the first common-source-common-gate structure starts to work. The RF input signal VP enters the positive half circuit and is amplified by the first common-source amplifier. The main amplifying transistor of the first common-source amplifier generates noise. The noise generated by the main amplifying transistor of the first common-source amplifier is in phase between its input and output terminals.

[0086] Step 2: The noise generated by the main amplifying tube of the first common source amplifier enters the first common grid amplifier along with the RF input signal VP at its input and output terminals respectively. After being amplified by the first resistor negative feedback structure, the noise output at the VOP output terminal is out of phase and is completely canceled.

[0087] Step 3: The RF input signal VP enters the first common-gate amplifier for amplification. The main amplifying transistor of the first common-gate amplifier generates noise, and the noise generated by the main amplifying transistor of the first common-gate amplifier is out of phase between its two output terminals.

[0088] Step 4: The noise at one output terminal of the first common-gate amplifier is directly output at the VOP output terminal, and the noise at the other output terminal is amplified by the coupling capacitor and then enters the first common-source-common-gate structure with the RF input signal VP for amplification. The noise at the VOP output terminal is in phase with the noise at the other output terminal of the first common-gate amplifier. The noise in phase with the noise at the other output terminal of the first common-gate amplifier and the noise at one output terminal of the first common-gate amplifier are partially canceled at the VOP output terminal.

[0089] Step 5: The RF input signal VN enters the negative half circuit. Following the methods in steps 1-4, it completely cancels the noise generated by the main amplifying transistor of the second common source amplifier and partially cancels the noise generated by the main amplifying transistor of the second common gate amplifier.

Claims

1. A differential low-noise amplifier based on dual-path noise cancellation, characterized in that: It includes a positive half-circuit and a negative half-circuit with the same structure and cross-coupled by a coupling capacitor; both the positive half-circuit and the negative half-circuit adopt a common source-common gate structure and a resistive negative feedback structure; The positive half-circuit includes a first common-source amplifier and a first common-gate amplifier cascaded together, as well as a first DC bias circuit; the negative half-circuit includes a second common-source amplifier and a second common-gate amplifier cascaded together, as well as a second DC bias circuit; the first common-gate amplifier and the second common-gate amplifier are cross-coupled through coupling capacitors. The coupling capacitors include capacitors C1 and C2, the first common-source amplifier includes transistor M1, transistor M2 and resistor R1, the first common-gate amplifier includes transistor M3 and M4, and the first DC bias circuit includes transistor M5. The gates of transistors M1, M2, and M4, one end of resistor R1, and one side plate of capacitor C1 are connected to the radio frequency input signal VP. The drain of transistor M1 is connected to the drain of transistor M2, and is connected to the other end of resistor R1 and the gate of transistor M3. The source of transistor M1 is grounded. The source of transistor M2 and the drain of transistor M3 are connected to power supply VDD; the source of transistor M3 and the drain of transistor M4 are connected to the VOP output terminal; the source of transistor M4 and the drain of transistor M5 are connected to one side plate of capacitor C2; the gate of transistor M5 is connected to bias voltage VB, and the source is grounded. The second common-source amplifier includes transistors M6 and M7 and resistor R2; the second common-gate amplifier includes transistors M8 and M9; and the second DC bias circuit includes transistor M10. The gates of transistors M6, M7, and M9, one end of resistor R2, and the other end of capacitor C2 are connected to the radio frequency input signal VN. The drains of transistors M6 and M7 are connected and connected to the other end of resistor R2 and the gate of transistor M8. The source of transistor M6 is grounded. The source of transistor M7 and the drain of transistor M8 are connected to power supply VDD; the source of transistor M8 and the drain of transistor M9 are connected to the VON output terminal; the source of transistor M9 and the drain of transistor M10 are connected to the other plate of capacitor C1; the gate of transistor M10 is connected to bias voltage VB, and the source is grounded.

2. The differential low-noise amplifier based on dual-path noise cancellation according to claim 1, characterized in that, The transistors M3 and M4 and the resistor R1 satisfy the following formula: ； Among them, R s R is the internal resistance of the signal source, R1 is the resistance value of resistor R1, g m3 For the transconductance of transistor M3, g m4 This represents the transconductance of transistor M4.

3. The differential low-noise amplifier based on dual-path noise cancellation according to claim 2, characterized in that, The transistors M1, M2, M3, M4, and resistor R1 satisfy the following formula: ； ； ； Among them, g m1 For the transconductance of transistor M1, g m2 This represents the transconductance of transistor M2.

4. The differential low-noise amplifier based on dual-path noise cancellation according to claim 1, characterized in that, The transistors M8 and M9 and the resistor R2 satisfy the following formula: ； Among them, R s R1 is the internal resistance of the signal source, R2 is the resistance value of resistor R2, and g is the resistance of the signal source. m8 For the transconductance of transistor M8, g m3 This represents the transconductance of transistor M3.

5. The differential low-noise amplifier based on dual-path noise cancellation according to claim 4, characterized in that, The transistors M6, M7, M8, and M9, and the resistor R2 satisfy the following formula: ； ； ； Among them, g m6 For the transconductance of transistor M6, g m7 This represents the transconductance of transistor M7.

6. The differential low-noise amplifier based on dual-path noise cancellation according to any one of claims 1-5, characterized in that: The first DC bias circuit and the second DC bias circuit are implemented by tail current sources.

7. A noise cancellation method, based on the differential low-noise amplifier based on dual-path noise cancellation as described in any one of claims 1-6, characterized in that, Includes the following steps: Step 1: Turn on the first DC bias circuit to enable the first common-source-common-gate structure to start working. The RF input signal VP enters the positive half circuit and is amplified by the first common-source amplifier. The main amplifying transistor of the first common-source amplifier generates noise. The noise generated by the main amplifying transistor of the first common-source amplifier is in phase between its input and output terminals. Step 2: The noise generated by the main amplifying tube of the first common source amplifier enters the first common grid amplifier along with the RF input signal VP at its input and output terminals respectively. After being amplified by the first resistor negative feedback structure, the noise output at the VOP output terminal is out of phase and is completely canceled. Step 3: The RF input signal VP enters the first common-gate amplifier for amplification, and the main amplifying transistor of the first common-gate amplifier generates noise; the noise generated by the main amplifying transistor of the first common-gate amplifier is out of phase between its two output terminals; Step 4: The noise at one output terminal of the first common-gate amplifier is directly output at the VOP output terminal, and the noise at the other output terminal is amplified in reverse by the coupling capacitor. Then, it enters the first common-source-common-gate structure along with the RF input signal VP for amplification. The noise at the VOP output terminal is in phase with the noise at the other output terminal of the first common-gate amplifier. The noise in phase with the noise at the other output terminal of the first common-gate amplifier and the noise at one output terminal of the first common-gate amplifier partially cancel each other at the VOP output terminal. Step 5: The RF input signal VN enters the negative half circuit. Following the methods in steps 1-4, it completely cancels the noise generated by the main amplifying transistor of the second common source amplifier and partially cancels the noise generated by the main amplifying transistor of the second common gate amplifier.

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