Photoelectric artificial synapse devices and their fabrication methods

Abstract

This invention proposes a photoelectric artificial synapse device and its fabrication method. The photoelectric artificial synapse device includes a transistor unit and a photosensitive unit, with the photosensitive unit being a perovskite photosensitive layer. The photosensitive unit is integrated at the gate electrode of the transistor unit. The photosensitive unit senses ambient light of different intensities, converting the ambient light into a negative bias voltage at the gate electrode of the transistor unit, thereby increasing the threshold for channel current generation and achieving the transistor's ability to distinguish input laser signals under illumination. This invention also proposes a fabrication method for the photoelectric artificial synapse device, which forms the device. This invention utilizes the combination of a synaptic transistor and a perovskite photosensitive layer to achieve anti-interference against ambient light noise, improves the ability to distinguish input laser signals, is beneficial for simulating biological visual nervous systems, and is suitable for building photoelectric neural network systems.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and in particular to photoelectric artificial synapse devices and methods for preparing photoelectric artificial synapse devices. Background Technology

[0002] The von Neumann architecture, also known as the Princeton architecture, is a memory architecture that combines program instruction memory and data memory. Program instruction memory addresses and data memory addresses point to different physical locations within the same memory, thus ensuring that program instructions and data have the same width. The human brain performs cognitive, learning, and memory tasks through highly parallelized neuronal interactions, enabling high-speed computation and featuring integrated storage and computation, ultra-low power consumption, self-learning capabilities, and the ability to predict future events.

[0003] Traditional von Neumann architectures struggle to mimic this process, requiring additional complex functional modules such as event-driven, adaptive, parallel / convolutional computation, and multimodal plasticity. Neuromorphic computing, simulating brain function, is one of the keys to overcoming the "von Neumann bottleneck." Artificial synaptic devices overcome the excessive power consumption limitations of existing von Neumann computing methods. Realizing semiconductor devices that utilize brain-based information transmission methods requires a high-performance analog artificial synaptic device capable of expressing various synaptic connection strengths. This method utilizes signals transmitted between neurons when neurons generate spike signals. Brain-like neural networks typically consist of various artificial synaptic devices, such as memristors and transistors, which transmit and process information by updating synaptic weights. Existing optoelectronic artificial synaptic devices cannot achieve immunity to ambient light noise. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention proposes an optoelectronic artificial synapse device and a method for fabricating such a device. By combining a synaptic transistor with a perovskite photosensitive layer, it achieves anti-interference against ambient light noise, enhances the ability to distinguish input laser signals, facilitates the simulation of biological visual nervous systems, and is suitable for building optoelectronic neural network systems.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] Optoelectronic artificial synapse devices, including transistor units and photosensitive units;

[0007] A photosensitive unit is integrated at the gate electrode 106 of the transistor unit;

[0008] The photosensitive unit is used to sense ambient light of different intensities and convert the ambient light into a negative bias voltage of the gate electrode 106 in the transistor unit, thereby increasing the threshold of channel current generation and realizing the transistor's response to input laser light under illumination.

[0009] Furthermore, the photosensitive unit is a FAPbI3 perovskite photosensitive layer 103.

[0010] Furthermore, the transistor unit includes a bottom electrode 101, a hole transport layer 102, an electron transport layer 104, a passivation layer 105, a gate electrode 106, an insulating layer 107, a charge trapping layer 108, a tunneling layer 109, a channel layer 110, a drain electrode 111, and a source electrode 112.

[0011] Furthermore, the FAPbI3 perovskite photosensitive layer 103 is located between the hole transport layer 102 and the electron transport layer 104; the hole transport layer 102 is located below the FAPbI3 perovskite photosensitive layer 103; and the electron transport layer 104 is located above the FAPbI3 perovskite photosensitive layer 103.

[0012] Furthermore, the bottom electrode 101 is located below the hole transport layer 102.

[0013] Furthermore, above the electron transport layer 104 is a passivation layer 105; above the passivation layer 105 are, in sequence, a gate electrode 106, an insulating layer 107, a charge trapping layer 108, a tunneling layer 109, and a channel layer 110.

[0014] Furthermore, the passivation layer 105 is transparent.

[0015] Furthermore, a drain electrode 111 and a source electrode 112 are disposed above the channel layer 110;

[0016] Before fabrication, the drain electrode 111 and the source electrode 112 are first etched with holes on the surface of the passivation layer 105 using a mask so that they can contact the channel layer 110.

[0017] Furthermore, the RGB visible incident laser applied to the channel layer 110 and the negative voltage signal applied to the gate electrode 106 are used as presynaptic voltages to modulate the transistor channel conductance.

[0018] This invention also proposes a method for fabricating a photoelectric artificial synapse device, the method being used to form the aforementioned photoelectric artificial synapse device, the method comprising:

[0019] Before fabrication, holes are etched on the surface of the passivation layer 105 using a mask for the drain electrode 111 and the source electrode 112 to make contact with the channel layer 110.

[0020] The bottom electrode 101 is prepared by thermal evaporation; the hole transport layer 102, FAPbI3 perovskite photosensitive layer 103, electron transport layer 104, passivation layer 105, and charge trapping layer 108 are all prepared by spin-coating solution method; the gate electrode 106 is prepared by magnetron sputtering method; the insulating layer 107 and tunneling layer 109 are prepared by atomic layer deposition method; the channel layer 110 is prepared by chemical vapor deposition method; and the drain electrode 111 and source electrode 112 are both prepared by electron beam evaporation.

[0021] The effects described in the invention are merely those of the embodiments, and not all the effects of the invention. One of the above technical solutions has the following advantages or beneficial effects:

[0022] This invention proposes a photoelectric artificial synapse device and its fabrication method. The photoelectric artificial synapse device includes a transistor unit and a photosensitive unit. The photosensitive unit is integrated at the gate electrode of the transistor unit. The photosensitive unit is used to sense ambient light of different intensities and converts the ambient light into a negative bias voltage at the gate electrode of the transistor unit, thereby increasing the threshold for channel current generation and achieving the transistor's response differentiation to input laser light under illumination. This invention also proposes a fabrication method for the photoelectric artificial synapse device. Before fabrication, holes are etched into the surface of the passivation layer using a mask to facilitate contact with the channel layer. The bottom electrode is fabricated using thermal evaporation. The hole transport layer, FAPbI3 perovskite photosensitive layer, electron transport layer, passivation layer 105, and charge trapping layer are all fabricated using a spin-coating solution method. The gate electrode is fabricated using magnetron sputtering. The insulating layer and tunneling layer are fabricated using atomic layer deposition. The channel layer is fabricated using chemical vapor deposition. Both the drain electrode and the source electrode are fabricated using electron beam evaporation. This invention utilizes a combination of synaptic transistors and perovskite photosensitive layers to achieve anti-interference against ambient light noise, improves the ability to distinguish input laser signals, facilitates the simulation of biological visual nervous systems, and is suitable for building optoelectronic neural network systems.

[0023] This invention inherits the perovskite photovoltaic sensing structure at the gate electrode of the synaptic transistor, enabling the detection of ambient light, generating a bias voltage for the transistor, adaptively adjusting the transistor channel opening threshold, and improving the device's response discrimination to input laser light under strong light. Attached Figure Description

[0024] Figure 1 This is a side view of the optoelectronic artificial synapse device structure proposed in Embodiment 1 of the present invention;

[0025] Figure 2 This is a top view of the optoelectronic artificial synapse device structure proposed in Embodiment 1 of the present invention;

[0026] Figure 3Here is a flowchart of the preparation method of the photoelectric artificial synapse device proposed in Embodiment 2 of the present invention;

[0027] Legend: 101-bottom electrode, 102-hole transport layer, 103-FAPbI3 perovskite photosensitive layer, 104-electron transport layer, 105-passivation layer, 106-gate electrode, 107-insulating layer, 108-charge trapping layer, 109-tunneling layer, 110-channel layer, 111-drain electrode, and 112-source electrode. Detailed Implementation

[0028] The present disclosure will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the disclosure. Furthermore, it should be noted that, for ease of description, only the parts relevant to the present disclosure are shown in the accompanying drawings.

[0029] It should be noted that, where there is no conflict, the embodiments and features described in this disclosure can be combined with each other. The technical solutions of this disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0030] Unless otherwise stated, the exemplary implementations / embodiments shown are to be understood as providing exemplary features of various details that provide ways in which the technical concepts of this disclosure can be implemented in practice. Therefore, unless otherwise stated, the features of various implementations / embodiments may be additionally combined, separated, interchanged and / or rearranged without departing from the technical concepts of this disclosure.

[0031] The use of crosshairs and / or shading in the accompanying drawings is generally used to clarify the boundaries between adjacent components. Thus, unless otherwise stated, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for the specific material, material properties, dimensions, proportions, commonalities between the illustrated components, or any other characteristics, properties, etc., of the components. Furthermore, in the accompanying drawings, the dimensions and relative dimensions of components may be exaggerated for clarity and / or descriptive purposes. When exemplary embodiments can be implemented differently, a specific process sequence may be performed in a different order than that described. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of their description. Moreover, the same reference numerals denote the same components.

[0032] When a component is referred to as being "on" or "above" another component, "connected to," or "joined to" another component, the component may be directly on, directly connected to, or directly joined to the other component, or there may be intermediate components. However, when a component is referred to as being "directly on" another component, "directly connected to," or "directly joined to" another component, there are no intermediate components. Therefore, the term "connection" can refer to a physical connection, an electrical connection, etc., and may or may not have intermediate components.

[0033] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms “a” and “the” are intended to include the plural forms as well. Furthermore, when the terms “comprising” and / or “including” and variations thereof are used in this specification, it indicates the presence of the stated features, integrals, steps, operations, parts, components, and / or groups thereof, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, parts, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximate terms rather than as terms of degree, thus explaining the inherent biases in measurements, calculated values, and / or provided values ​​that would be recognized by one of ordinary skill in the art.

[0034] Example 1

[0035] The optoelectronic artificial synapse device proposed in Embodiment 1 of this invention is used to solve the problems of "memory wall" and "power consumption wall" in the existing "von Neumann architecture" computer.

[0036] This invention designs a novel artificial synaptic device that enables integrated optical input and storage computing. To achieve interference immunity against ambient light noise during operation, this invention inherits a perovskite photovoltaic sensing structure at the gate electrode of the synaptic transistor. This allows for the detection of ambient light, the generation of a bias voltage for the transistor, and adaptive adjustment of the transistor channel turn-on threshold, thereby improving the device's response discrimination against input laser light under strong light conditions.

[0037] An RGB visible incident laser beam applied to the channel and a negative voltage signal applied to the gate electrode are used as the Vpre signal to modulate the transistor channel conductance. Here, Vpre (presynaptic voltage) is the presynaptic voltage. The transistor channel conductance is output as drain / source current as a synaptic weight. A perovskite solar cell is integrated on the back of the transistor's gate electrode. A bias voltage is provided to the gate electrode according to the ambient light intensity; the higher the ambient light intensity, the more negative the bias voltage, making the input bias more pronounced and thus achieving noise reduction.

[0038] Optoelectronic artificial synapse devices, including transistor units and photosensitive units;

[0039] A photosensitive unit is integrated at the gate electrode 106 of the transistor unit;

[0040] The photosensitive unit is used to sense ambient light of different intensities and convert the ambient light into a negative bias voltage of the gate electrode 106 in the transistor unit, thereby increasing the threshold of channel current generation and realizing the transistor's response to input laser light under illumination.

[0041] Figure 1 This is a side view of the optoelectronic artificial synapse device structure proposed in Embodiment 1 of the present invention; the photosensitive unit is a FAPbI3 perovskite photosensitive layer 103. The transistor unit includes a bottom electrode 101, a hole transport layer 102, an electron transport layer 104, a passivation layer 105, a gate electrode 106, an insulating layer 107, a charge trapping layer 108, a tunneling layer 109, a channel layer 110, a drain electrode 111, and a source electrode 112.

[0042] The bottom electrode 101 is an Ag bottom electrode 101; the hole transport layer 102 is a MoO3 / spiro-OMeTAD stacked hole transport layer 102; the electron transport layer 104 is a SnO2 electron transport layer 104; the passivation layer 105 is a PMMA passivation layer 105, and the passivation layer 105 is transparent; the gate electrode 106 is an ITO transistor G electrode 106; the insulating layer 107 is an Al2O3 insulating layer 107; the charge trapping layer 108 is an Ag NP charge trapping layer 108; the tunneling layer 109 is an Al2O3 tunneling layer 109; the channel layer 110 is an N-type channel layer 110 of MoS2; the drain electrode 111 is a graphene D electrode 111; and the source electrode 112 is a graphene S electrode 112.

[0043] Among them, MoS2 (Molybdenum Disulfide):

[0044] Molybdenum disulfide; Al2O3 (Aluminum Oxide): Aluminum trioxide;

[0045] Ag (Argentum) silver;

[0046] AgNP (Argentum nanoparticles) silver nanoparticles;

[0047] Indium tin oxide (ITO).

[0048] PMMA (polymethyl methacrylate);

[0049] SnO2 (Tin Dioxide);

[0050] FAPbI3 (Formamidinium Iodide) is lead triiodide;

[0051] spiro-OMeTAD

[0052] (2,2',7,7'-tetrakis(N,N-di-p-methoxyphenyl-amine)-9,9'-spirobifluorene)2,2,7,7-tetra[N,N-di(4-methoxyphenyl)amino]-9,9-spirobifluorene;

[0053] MoO3 (Molybdenum trioxide) is a type of molybdenum trioxide.

[0054] Perovskite materials absorb ambient light to generate photogenerated carriers, which are then applied to the gate electrode of the transistor via an electron transport layer. This increases the N-channel turn-on threshold of the transistor and improves the ability to distinguish between different intensities of laser light input into the channel.

[0055] Figure 2 This is a top view of the optoelectronic artificial synapse device structure proposed in Embodiment 1 of the present invention;

[0056] The FAPbI3 perovskite photosensitive layer 103 is located between the hole transport layer 102 and the electron transport layer 104; the hole transport layer 102 is located below the FAPbI3 perovskite photosensitive layer 103; and the electron transport layer 104 is located above the FAPbI3 perovskite photosensitive layer 103.

[0057] The bottom electrode 101 is located below the hole transport layer 102.

[0058] Above the electron transport layer 104 is a passivation layer 105; above the passivation layer 105 are, in sequence, a gate electrode 106, an insulating layer 107, a charge trapping layer 108, a tunneling layer 109, and a channel layer 110. The passivation layer 105 is transparent. The passivation layer is the passivated portion. Passivation is a method of transforming the metal surface into a state that is not easily oxidized, thereby slowing down the corrosion rate of the metal. Additionally, the phenomenon of an active metal or alloy, in which its chemical activity is greatly reduced, becoming a noble metal state, is also called passivation. The mechanism of passivation can be explained by thin film theory, which states that passivation is due to the interaction between the metal and oxidizing substances, during which a very thin, dense, well-covering, and firmly adsorbed passivation film is formed on the metal surface. This film exists as an independent phase, usually a compound of oxidized metal. It completely isolates the metal from the corrosive medium, preventing contact between the metal and the corrosive medium, thereby essentially stopping the metal's dissolution and forming a passive state to achieve corrosion protection.

[0059] A drain electrode 111 and a source electrode 112 are disposed above the channel layer 110. Before fabrication, the drain electrode 111 and the source electrode 112 are first etched with holes on the surface of the passivation layer 105 through a mask so that they can contact the channel layer 110.

[0060] The RGB visible incident laser applied to the channel layer 110 and the negative voltage signal applied to the gate electrode 106 are used as the presynaptic voltage to modulate the transistor channel conductance.

[0061] In this application, the Vpre input is an RGB incident laser directly incident on the channel layer 110. The channel conductivity can be increased by generating electron-hole pairs in the channel layer 110, and a higher incident light intensity will cause a higher conductivity increase.

[0062] The barrier effect formed by the charge trapping layer 108 and the tunneling layer 109 allows the increase in channel conductivity to be retained for a long time after Vpre disappears, thus achieving the storage function.

[0063] Since ambient light can interfere with the device's response differentiation to Vpre input, which is equivalent to noise, this invention specifically designs a perovskite photovoltaic sensing part on the back of the gate electrode, which can convert ambient light into a negative bias voltage of the gate electrode of the transistor device, increase the threshold of channel current generation, and increase the device's response differentiation to inputs of different intensities in a strong light environment.

[0064] The device's multi-level conductance changes and storage characteristics can be used to simulate the response process of neural synapses, while its threshold, which adjusts itself according to ambient light, is suitable for simulating adaptive threshold systems for biological visual nerve systems.

[0065] The photoelectric artificial synapse device proposed in this invention belongs to the category of photoelectric storage and computing integrated devices, and can be used as a core component to build a hardware neural network system.

[0066] The photoelectric artificial synapse device proposed in Embodiment 1 of this invention utilizes a combination of synaptic transistors and perovskite photosensitive layers to achieve anti-interference effect against ambient light noise, improves the ability to distinguish input laser signals, is beneficial for simulating biological visual nervous systems, and is suitable for building photoelectric neural network systems.

[0067] The photoelectric artificial synapse device proposed in Embodiment 1 of this invention inherits the perovskite photovoltaic sensing structure at the gate electrode of the synaptic transistor, which can realize the detection of ambient light, generate bias voltage for the transistor, adaptively adjust the transistor channel opening threshold, and improve the device's response discrimination to input laser under strong light.

[0068] Example 2

[0069] Embodiment 2 of the present invention also proposes a method for fabricating an optoelectronic artificial synapse device. The fabrication method is used to form the optoelectronic artificial synapse device, which inherits the perovskite photovoltaic sensing structure at the gate electrode of the synaptic transistor. It can realize the detection of ambient light, generate bias voltage for the transistor, adaptively adjust the transistor channel opening threshold, and improve the device's response discrimination to input laser under strong light.

[0070] Figure 3 Here is a flowchart of the fabrication method of the photoelectric artificial synapse device proposed in Embodiment 2 of the present invention; the fabrication method includes:

[0071] In step S300, before fabrication, the drain electrode 111 and the source electrode 112 are prepared by etching holes on the surface of the passivation layer 105 through a mask so that they can contact the channel layer 110.

[0072] In step S310, the bottom electrode 101 is prepared by thermal evaporation; the hole transport layer 102, the FAPbI3 perovskite photosensitive layer 103, the electron transport layer 104, the passivation layer 105, and the charge trapping layer 108 are all prepared by spin-coating solution method; the gate electrode 106 is prepared by magnetron sputtering; the insulating layer 107 and the tunneling layer 109 are prepared by atomic layer deposition; the channel layer 110 is prepared by chemical vapor deposition; and the drain electrode 111 and the source electrode 112 are both prepared by electron beam evaporation. In this invention, all electrodes from the bottom electrode 101 to the source electrode 112 are prepared in-house.

[0073] Thermal evaporation refers to the process of placing the substrate or workpiece to be coated in a vacuum chamber, heating the coating material to evaporate and vaporize it, and depositing it on the surface of the substrate or workpiece to form a thin film or coating.

[0074] Solution spin coating is a process that coats a solution onto a substrate. It utilizes the force of rotation to achieve uniform, continuous, and efficient coating, and is suitable for coating various materials, such as metals, polymers, and ceramics.

[0075] Magnetron sputtering involves filling a high vacuum with an appropriate amount of argon gas and applying a DC voltage of several hundred kiloliters between the cathode (cylindrical or planar target) and the anode (coating chamber wall). This generates a magnetron-controlled abnormal glow discharge within the coating chamber, ionizing the argon gas. Magnetron sputtering is the most commonly used method for preparing CoPt magnetic thin films. Argon ions are accelerated by the cathode and bombard the target surface, sputtering atoms from the target surface and depositing them onto the substrate to form a thin film. By changing the target material and controlling the sputtering time, films of different materials and thicknesses can be obtained. Magnetron sputtering offers advantages such as strong adhesion between the deposited layer and the substrate, resulting in dense and uniform films.

[0076] Atomic layer deposition (ALD) is a method that deposits materials onto a substrate surface layer by layer in the form of single-atom films. ALD shares similarities with conventional chemical deposition. However, in ALD, the chemical reaction of the new atomic layer is directly related to the previous layer, ensuring that only one atomic layer is deposited per reaction.

[0077] Chemical vapor deposition (CVD) is a process that utilizes gaseous or vaporous substances to react at the gas phase or gas-solid interface to form solid deposits. The CVD process consists of three important stages: diffusion of reactant gases to the substrate surface, adsorption of reactant gases onto the substrate surface, and chemical reactions occurring on the substrate surface to form solid deposits, as well as the detachment of gaseous byproducts from the substrate surface. The most common CVD reactions include thermal decomposition, chemical synthesis, and chemical transport reactions. Typically, for depositing TiC or TiN, gases such as TiCl4, H2, and CH4 are introduced into a reaction chamber at 850–1100°C, resulting in a chemical reaction that forms a coating on the substrate surface.

[0078] Electron beam evaporation is a method of vacuum deposition, developed from tungsten filament evaporation. An electron beam is a high-speed electron stream. Electron beam evaporation is currently a mature and dominant deposition method in vacuum coating technology, solving the problem of easy mixing between the film material and the deposition source material in resistance heating methods due to direct contact.

[0079] Electron beam evaporation is a type of vacuum evaporation deposition. It involves directly heating and evaporating the material under vacuum conditions using an electron beam, causing the material to vaporize and be transported to a substrate, where it condenses to form a thin film. In the electron beam heating apparatus, the material to be heated is placed in a water-cooled crucible, preventing reactions between the evaporating material and the crucible wall that could affect the film quality. Therefore, electron beam evaporation deposition can prepare high-purity thin films. Furthermore, multiple crucibles can be placed in the same evaporation deposition apparatus to achieve simultaneous or separate evaporation and deposition of various different materials. Any material can be evaporated using electron beam evaporation; different materials require different types of depletion agents to achieve the desired evaporation rate.

[0080] This preparation method is used to form the photoelectric artificial synapse device proposed in Embodiment 1 of the present invention. The synapse device specifically includes a transistor unit and a photosensitive unit.

[0081] A photosensitive unit is integrated at the gate electrode 106 of the transistor unit;

[0082] The photosensitive unit is used to sense ambient light of different intensities and convert the ambient light into a negative bias voltage of the gate electrode 106 in the transistor unit, thereby increasing the threshold of channel current generation and realizing the transistor's response to input laser light under illumination.

[0083] Figure 1 This is a side view of the optoelectronic artificial synapse device structure proposed in Embodiment 1 of the present invention; the photosensitive unit is a FAPbI3 perovskite photosensitive layer 103. The transistor unit includes a bottom electrode 101, a hole transport layer 102, an electron transport layer 104, a passivation layer 105, a gate electrode 106, an insulating layer 107, a charge trapping layer 108, a tunneling layer 109, a channel layer 110, a drain electrode 111, and a source electrode 112.

[0084] The bottom electrode 101 is an Ag bottom electrode 101; the hole transport layer 102 is a MoO3 / spiro-OMeTAD stacked hole transport layer 102; the electron transport layer 104 is a SnO2 electron transport layer 104; the passivation layer 105 is a PMMA passivation layer 105, and the passivation layer 105 is transparent; the gate electrode 106 is an ITO transistor G electrode 106; the insulating layer 107 is an Al2O3 insulating layer 107; the charge trapping layer 108 is an Ag NP charge trapping layer 108; the tunneling layer 109 is an Al2O3 tunneling layer 109; the channel layer 110 is an N-type channel layer 110 of MoS2; the drain electrode 111 is a graphene D electrode 111; and the source electrode 112 is a graphene S electrode 112.

[0085] Perovskite materials absorb ambient light to generate photogenerated carriers, which are then applied to the gate electrode of the transistor via an electron transport layer. This increases the N-channel turn-on threshold of the transistor and improves the ability to distinguish between different intensities of laser light input into the channel.

[0086] Figure 2 This is a top view of the optoelectronic artificial synapse device structure proposed in Embodiment 1 of the present invention;

[0087] The FAPbI3 perovskite photosensitive layer 103 is located between the hole transport layer 102 and the electron transport layer 104; the hole transport layer 102 is located below the FAPbI3 perovskite photosensitive layer 103; and the electron transport layer 104 is located above the FAPbI3 perovskite photosensitive layer 103.

[0088] The bottom electrode 101 is located below the hole transport layer 102.

[0089] Above the electron transport layer 104 is a passivation layer 105; above the passivation layer 105 are, in sequence, a gate electrode 106, an insulating layer 107, a charge trapping layer 108, a tunneling layer 109, and a channel layer 110. The passivation layer 105 is transparent. The passivation layer is the passivated portion. Passivation is a method of transforming the metal surface into a state that is not easily oxidized, thereby slowing down the corrosion rate of the metal. Additionally, the phenomenon of an active metal or alloy, in which its chemical activity is greatly reduced, becoming a noble metal state, is also called passivation. The mechanism of passivation can be explained by thin film theory, which states that passivation is due to the interaction between the metal and oxidizing substances, during which a very thin, dense, well-covering, and firmly adsorbed passivation film is formed on the metal surface. This film exists as an independent phase, usually a compound of oxidized metal. It completely isolates the metal from the corrosive medium, preventing contact between the metal and the corrosive medium, thereby essentially stopping the metal's dissolution and forming a passive state to achieve corrosion protection.

[0090] A drain electrode 111 and a source electrode 112 are disposed above the channel layer 110. Before fabrication, the drain electrode 111 and the source electrode 112 are first etched with holes on the surface of the passivation layer 105 through a mask so that they can contact the channel layer 110.

[0091] The RGB visible incident laser applied to the channel layer 110 and the negative voltage signal applied to the gate electrode 106 are used as the presynaptic voltage to modulate the transistor channel conductance.

[0092] In this application, the Vpre input is an RGB incident laser directly incident on the channel layer 110. The channel conductivity can be increased by generating electron-hole pairs in the channel layer 110, and a higher incident light intensity will cause a higher conductivity increase.

[0093] The barrier effect formed by the charge trapping layer 108 and the tunneling layer 109 allows the increase in channel conductivity to be retained for a long time after Vpre disappears, thus achieving the storage function.

[0094] Since ambient light can interfere with the device's response differentiation to Vpre input, which is equivalent to noise, this invention specifically designs a perovskite photovoltaic sensing part on the back of the gate electrode, which can convert ambient light into a negative bias voltage of the gate electrode of the transistor device, increase the threshold of channel current generation, and increase the device's response differentiation to inputs of different intensities in a strong light environment.

[0095] The device's multi-level conductance changes and storage characteristics can be used to simulate the response process of neural synapses, while its threshold, which adjusts itself according to ambient light, is suitable for simulating adaptive threshold systems for biological visual nerve systems.

[0096] The photoelectric artificial synapse device proposed in this invention belongs to the category of photoelectric storage and computing integrated devices, and can be used as a core component to build a hardware neural network system.

[0097] The method for fabricating an optoelectronic artificial synapse device proposed in Embodiment 2 of this invention is used to fabricate an optoelectronic artificial synapse device. By combining a synaptic transistor with a perovskite photosensitive layer, it achieves anti-interference effect against ambient light noise, improves the ability to distinguish input laser signals, is beneficial for simulating biological visual nervous systems, and is suitable for building optoelectronic neural network systems.

[0098] The method for fabricating an optoelectronic artificial synapse device proposed in Embodiment 2 of this invention is used to fabricate an optoelectronic artificial synapse device. It inherits the perovskite photovoltaic sensing structure at the gate electrode of the synaptic transistor, which can realize the detection of ambient light, generate bias voltage for the transistor, adaptively adjust the transistor channel opening threshold, and improve the device's response discrimination to input laser under strong light.

[0099] The description of the relevant parts in the preparation method of the photoelectric artificial synapse device provided in Embodiment 2 of this application can be found in the detailed description of the corresponding parts in the photoelectric artificial synapse device provided in Embodiment 1 of this application, and will not be repeated here.

[0100] In the description of this specification, the references to terms such as "one embodiment / mode," "some embodiments / modes," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment / mode or example is included in at least one embodiment / mode or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment / mode or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments / modes or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments / modes or examples described in this specification, as well as the features of different embodiments / modes or examples.

[0101] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0102] While specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art can make other modifications or variations based on the above description. It is neither necessary nor possible to exhaustively describe all embodiments here. Various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.

Claims

1. An optoelectronic artificial synapse device, characterized in that, Includes transistor units and photosensitive units; A photosensitive unit is integrated at the gate electrode (106) of the transistor unit; The photosensitive unit is used to sense ambient light of different intensities, convert the ambient light into a negative bias voltage of the gate electrode (106) in the transistor unit, increase the threshold of channel current generation, and realize the transistor's response to input laser light under illumination. The photosensitive unit and transistor unit, from bottom to top, are: bottom electrode (101), hole transport layer (102), perovskite photosensitive layer (103), electron transport layer (104), gate electrode (106), insulating layer (107), charge trapping layer (108), tunneling layer (109), channel layer (110), drain electrode (111), and source electrode (112). The RGB visible incident laser applied to the channel layer (110) and the negative voltage signal applied to the gate electrode (106) are used as the presynaptic voltage to modulate the transistor channel conductance.

2. The photoelectric artificial synapse device according to claim 1, characterized in that, The photosensitive unit is a FAPbI3 perovskite photosensitive layer (103).

3. The photoelectric artificial synapse device according to claim 1, characterized in that, The hole transport layer (102) is located below the FAPbI3 perovskite photosensitive layer (103); the electron transport layer (104) is located above the FAPbI3 perovskite photosensitive layer (103). The perovskite photosensitive layer (103) absorbs ambient light to generate photogenerated carriers, which are then applied to the gate electrode (106) of the transistor via the electron transport layer (104) to increase the N-type channel turn-on threshold of the transistor. The combination of the synaptic transistor and the perovskite photosensitive layer (103) achieves the anti-interference effect against ambient light noise and improves the differentiation of different intensities of laser input to the channel. This is beneficial for the simulation of the biological visual nervous system and is suitable for the construction of optoelectronic neural network systems.

4. The photoelectric artificial synapse device according to claim 1, characterized in that, The top of the channel layer (110) is a passivation layer (105).

5. The photoelectric artificial synapse device according to claim 4, characterized in that, The passivation layer (105) is transparent.

6. The photoelectric artificial synapse device according to claim 4, characterized in that, A drain electrode (111) and a source electrode (112) are disposed above the channel layer (110). Before fabrication, the drain electrode (111) and source electrode (112) are first etched with holes on the surface of the passivation layer (105) using a mask so that they can contact the channel layer (110).

7. A method for fabricating an optoelectronic artificial synapse device, characterized in that, The preparation method is used to form the photoelectric artificial synapse device according to any one of claims 1-6, and the preparation method includes: Before fabrication, the drain electrode (111) and source electrode (112) are first etched with holes on the surface of the passivation layer (105) using a mask so that they can contact the channel layer (110); The bottom electrode (101) is prepared by thermal evaporation; the hole transport layer (102), FAPbI3 perovskite photosensitive layer (103), electron transport layer (104), passivation layer (105) and charge trapping layer (108) are all prepared by spin-coating solution method; the gate electrode (106) is prepared by magnetron sputtering method; the insulating layer (107) and tunneling layer (109) are prepared by atomic layer deposition method; the channel layer (110) is prepared by chemical vapor deposition method; the drain electrode (111) and source electrode (112) are both prepared by electron beam evaporation.

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