Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a forming method thereof, the structure comprising: a substrate comprising a device region; a shielding ring structure on the substrate of the device region, the shielding ring structure having an opening therein for dividing the shielding ring structure into a first shielding structure and a second shielding structure isolated along a first direction; a conductive structure on the substrate of the device region, comprising a first conductive structure on the same side of the first shielding structure and a second conductive structure on the same side of the second shielding structure, the first conductive structure and the second conductive structure each comprising a first lead extending along a second direction and a second lead extending along the first direction and electrically connected to the first lead, along the first direction, the first leads are respectively located on both sides of the shielding ring structure, wherein the second lead of the first conductive structure is electrically connected to the second shielding structure, and the second lead of the second conductive structure is electrically connected to the first shielding structure, the conductive structure is grounded, and the second direction is perpendicular to the first direction. The application is beneficial to improve the working performance of the device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a semiconductor structure and a method for forming the same. Background Technology

[0002] In integrated circuits (ICs), such as CMOS radio frequency integrated circuits (RFICs), sensing devices are crucial electrical components whose performance parameters directly impact the overall performance of the IC. Most sensing devices in integrated circuits are planar inductors, such as planar spiral inductors. Compared to traditional wire-wound inductors, planar inductors offer advantages such as lower cost, easier integration, lower noise, and lower power consumption. Furthermore, planar inductors have high compatibility with existing integrated circuit manufacturing processes.

[0003] An important indicator for measuring the performance of a sensing device is the quality factor (Q). The higher the quality factor, the better the performance of the sensing device. Summary of the Invention

[0004] The problem addressed by the embodiments of the present invention is to provide a semiconductor structure and a method for forming the same, thereby improving the performance of the device.

[0005] To address the aforementioned problems, embodiments of the present invention provide a semiconductor structure, comprising: a substrate including a device region; a shielding ring structure located on the substrate of the device region, the shielding ring structure having an opening for dividing the shielding ring structure into a first shielding structure and a second shielding structure isolated along a first direction; and a conductive structure located on the substrate of the device region, the conductive structure including a first conductive structure on the same side as the first shielding structure and a second conductive structure on the same side as the second shielding structure, both the first and second conductive structures including a first lead extending along a second direction and a second lead extending along the first direction and electrically connected to the first lead, the first leads being located on opposite sides of the shielding ring structure along the first direction, wherein the second lead of the first conductive structure is electrically connected to the second shielding structure, the second lead of the second conductive structure is electrically connected to the first shielding structure, the conductive structure is grounded, and the second direction is perpendicular to the first direction.

[0006] This invention also provides a method for forming a semiconductor structure, comprising: providing a substrate including a device region; forming a shielding ring structure and a conductive structure electrically connected to the shielding ring structure on the substrate of the device region, wherein the conductive structure is grounded; wherein the shielding ring structure has an opening for dividing the shielding ring structure into a first shielding structure and a second shielding structure isolated along a first direction; the conductive structure includes a first conductive structure on the same side as the first shielding structure and a second conductive structure on the same side as the second shielding structure, both the first and second conductive structures include a first lead extending along a second direction and a second lead extending along the first direction and electrically connected to the corresponding second lead, wherein the first lead is located on both sides of the shielding ring structure along the first direction, wherein the second lead of the first conductive structure is electrically connected to the second shielding structure, and the second lead of the second conductive structure is electrically connected to the first shielding structure, and the second direction is perpendicular to the first direction.

[0007] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0008] In the semiconductor structure provided by this invention, the conductive structure includes a first conductive structure on the same side as the first shielding structure and a second conductive structure on the same side as the second shielding structure. The second lead of the first conductive structure is electrically connected to the second shielding structure, and the second lead of the second conductive structure is electrically connected to the first shielding structure. During the operation of the semiconductor structure, the grounded shielding ring structure generates a relatively strong induced signal due to the influence of the devices in the device area. This induced signal from the shielding ring structure affects the first lead electrically connected to it. Compared to a scheme where the second leads are all electrically connected to the shielding ring structure on the same side, in this invention, the second lead of the first conductive structure extends into the second shielding structure, and the second lead of the second conductive structure extends into the first shielding structure. This increases the spacing between the first shielding structure and the corresponding electrically connected first lead, as well as the spacing between the second shielding structure and the corresponding electrically connected first lead. This helps to reduce the influence of the induced signal from the first shielding structure on the first lead electrically connected to it, and the influence of the induced signal from the second shielding structure on the first lead electrically connected to it. Correspondingly, it reduces the intensity of the induced signal in the first lead, thereby reducing signal crosstalk between the first lead and the devices in the device area during the operation of the semiconductor structure, and thus improving the device's performance.

[0009] In the forming method provided by this embodiment of the invention, a conductive structure is formed on the substrate, including a first conductive structure on the same side as the first shielding structure and a second conductive structure on the same side as the second shielding structure. A second lead of the first conductive structure is electrically connected to the second shielding structure, and a second lead of the second conductive structure is electrically connected to the first shielding structure. During the operation of the semiconductor structure, the grounded shielding ring structure will generate a relatively strong induced signal due to the influence of devices in the device area. This induced signal from the shielding ring structure will then affect the first lead electrically connected to it. Compared to a scheme where all second leads are electrically connected to the shielding ring structure on the same side, in this embodiment of the invention, the first... The second lead of the conductive structure extends into the second shielding structure, and the second lead of the second conductive structure extends into the first shielding structure. This solution increases the spacing between the first shielding structure and the corresponding electrically connected first lead, as well as the spacing between the second shielding structure and the corresponding electrically connected first lead. This helps to reduce the influence of the induced signal of the first shielding structure on the first lead electrically connected to it, and the influence of the induced signal of the second shielding structure on the first lead electrically connected to it. Correspondingly, it reduces the intensity of the induced signal in the first lead, thereby helping to reduce signal crosstalk between the first lead and the device in the device area during the operation of the semiconductor structure, and thus helping to improve the operating performance of the device. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of a semiconductor structure.

[0011] Figures 2 to 4 This is a schematic diagram of a semiconductor structure according to an embodiment of the present invention;

[0012] Figures 5 to 6 This is a schematic diagram of another embodiment of the semiconductor structure of the present invention;

[0013] Figures 7 to 9 This is a schematic diagram of the structure corresponding to each step in one embodiment of the method for forming a semiconductor structure of the present invention;

[0014] Figures 10 to 11 This is a schematic diagram of the structure corresponding to each step in another embodiment of the method for forming the semiconductor structure of the present invention. Detailed Implementation

[0015] As can be seen from the background technology, the current performance of the device is relatively poor.

[0016] We will now analyze the reasons for the poor performance of current devices by taking a semiconductor structure as an example.

[0017] Figure 1 This is a schematic diagram of a semiconductor structure.

[0018] The semiconductor structure includes: a substrate (not shown) including a device region 10a; and a shielding ring structure 20 located on the substrate of the device region 10a, the shielding ring structure 20 having an opening 10c for extending the shielding ring structure 20 along a first direction (e.g., Figure 1 (As shown in the X direction) It is divided into a first shielding structure 21 and a second shielding structure 22 that are isolated from each other; a conductive structure 30 is located on the substrate of the device region 10a. The conductive structure 30 includes a first conductive structure 31 on the same side as the first shielding structure 21 and a second conductive structure 32 on the same side as the second shielding structure 22. Both the first conductive structure 31 and the second conductive structure 32 include a conductive structure along the second direction (as shown in the X direction). Figure 1 The first lead 33 extends along the Y direction and is electrically connected to the first lead 33 along the first direction. The first lead 33 is located on both sides of the shielding ring structure 20 along the first direction. The second lead 34 of the first conductive structure 31 is electrically connected to the first shielding structure 21, and the second lead 34 of the second conductive structure 32 is electrically connected to the second shielding structure 22. The conductive structure 30 is grounded, and the second direction is perpendicular to the first direction.

[0019] During the operation of the semiconductor structure, the grounded shielding ring structure 20 will generate a relatively strong induced signal due to the influence of the devices in the device region 10a. The induced signal of the shielding ring structure 20 will then affect the first lead 33 electrically connected to it. The second lead 34 of the first conductive structure 31 is electrically connected to the first shielding structure 21, and the second lead 34 of the second conductive structure 32 is electrically connected to the second shielding structure 22. In other words, the second leads are all electrically connected to the shielding ring structure 20 on the same side. Therefore, the first lead 33 of the conductive structure 30 is affected by the shielding ring structure 20 on the same side. Since the distance between the first lead 33 and the shielding ring structure 20 on the same side is small, the induced signal of the shielding ring structure 20 is likely to have a greater impact on the first lead 33 electrically connected to it, thereby increasing the intensity of the induced signal in the first lead 33. This can easily lead to severe signal crosstalk between the first lead 33 and the devices in the device region 10a during the operation of the semiconductor structure, thus affecting the operating performance of the devices.

[0020] To address the aforementioned technical problem, embodiments of the present invention provide a semiconductor structure, comprising: a substrate including a device region; a shielding ring structure located on the substrate of the device region, the shielding ring structure having an opening for dividing the shielding ring structure into a first shielding structure and a second shielding structure isolated along a first direction; and a conductive structure located on the substrate of the device region, the conductive structure including a first conductive structure on the same side as the first shielding structure and a second conductive structure on the same side as the second shielding structure, both the first and second conductive structures including a first lead extending along a second direction and a second lead extending along the first direction and electrically connected to the first lead, the first lead being located on both sides of the shielding ring structure along the first direction, wherein the second lead of the first conductive structure is electrically connected to the second shielding structure, the second lead of the second conductive structure is electrically connected to the first shielding structure, the conductive structure is grounded, and the second direction is perpendicular to the first direction.

[0021] Compared to schemes where the second leads are all electrically connected to the shielding ring structure on the same side, in this embodiment of the invention, the second leads of the first conductive structure extend into the second shielding structure, and the second leads of the second conductive structure extend into the first shielding structure. This scheme increases the spacing between the first shielding structure and the corresponding electrically connected first leads, as well as the spacing between the second shielding structure and the corresponding electrically connected first leads. This helps to reduce the influence of the induced signal of the first shielding structure on the first leads electrically connected to it, and the influence of the induced signal of the second shielding structure on the first leads electrically connected to it. Correspondingly, it reduces the intensity of the induced signal in the first leads, thereby helping to reduce signal crosstalk between the first leads and the devices in the device area during the operation of the semiconductor structure, and thus helping to improve the operating performance of the device.

[0022] To make the above-mentioned objects, features and advantages of the embodiments of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0023] Figures 2 to 4 This is a schematic diagram of a semiconductor structure according to an embodiment of the present invention.

[0024] refer to Figures 2 to 4 , Figure 2 This is a top view of the semiconductor structure. Figure 3 This is a cross-sectional view along the extension direction of the first leader. Figure 4 This is a cross-sectional view along the extension direction of the second lead. The semiconductor structure includes: a substrate (not shown) including a device region 100a; and a shielding ring structure 200 located on the substrate of the device region 100a, the shielding ring structure 200 having an opening 100c for dividing the shielding ring structure 200 along a first direction (e.g., ...). Figure 2A first shielding structure 210 and a second shielding structure 220 isolated in the X direction (as shown in the middle X direction); a conductive structure 300, located on the substrate of device region 100a, includes a first conductive structure 310 on the same side as the first shielding structure 210 and a second conductive structure 320 on the same side as the second shielding structure 220. Both the first conductive structure 310 and the second conductive structure 320 include a first conductive structure 310 on the same side as the first shielding structure 210 and a second conductive structure 320 on the same side as the second shielding structure 220. Figure 2 The first lead 330 extends along the Y direction and is electrically connected to the first lead 330 along the first direction. The first lead 330 is located on both sides of the shielding ring structure 200 along the first direction. The second lead 340 of the first conductive structure 310 is electrically connected to the second shielding structure 220, and the second lead 340 of the second conductive structure 320 is electrically connected to the first shielding structure 210. The conductive structure 300 is grounded, and the second direction is perpendicular to the first direction.

[0025] In integrated circuits, such as CMOS radio frequency integrated circuits, sensors are crucial electrical components whose performance parameters directly impact the overall performance of the integrated circuit. A semiconductor structure is typically formed beneath the sensor in an integrated circuit to isolate the sensor from the substrate and reduce substrate losses.

[0026] Specifically, the semiconductor structure also includes a coil device 500, located above the shielding ring structure 200 and the conductive structure 300, with the projection of the coil device 500 on the substrate located within the area where the shielding ring structure 200 is situated.

[0027] The coil device 500 is the inductive device. In this embodiment, the coil device 500 includes an inductor.

[0028] Correspondingly, the semiconductor structure also includes: signal leads (not shown), which are electrically connected to the coil device 500, and the signal leads are used to load signals onto the coil device 500.

[0029] The substrate is used to provide a process platform for the fabrication of semiconductor structures, wherein the device region 100a is used to form a shielding ring structure 200, a conductive structure 300, and a coil device 500.

[0030] In this embodiment, the substrate also includes a loading region 100b located on the side of the device region 100a along the second direction, for grounding the semiconductor structure and loading signals onto the coil device 500.

[0031] Specifically, the semiconductor structure also includes: signal pads 520 located on the substrate of the loading region 100b, and ground pads 510 located on both sides of the signal pads 520 along the first direction.

[0032] In this embodiment, the signal pad 520 is used to load a signal onto the sensing device, and the ground pad 510 is used to ground the semiconductor structure. Accordingly, the signal pad 520 and the ground pad 510 constitute a ground-signal-ground (GSG) structure.

[0033] Accordingly, in this embodiment, the signal lead extends from the device area 100a to the loading area 100b and is electrically connected to the signal pad 520, thereby realizing the signal loading of the coil device 500.

[0034] In integrated circuits, a key indicator for evaluating the performance of sensing devices is the quality factor (Q). A higher quality factor indicates better performance. One important factor affecting the quality factor of a sensing device is substrate loss at high frequencies.

[0035] In this embodiment, the shielding ring structure 200 is disposed below the sensing device (e.g., an inductor). The shielding ring structure 200 is used to shield the electric field lines and induced magnetic field lines of the sensing device, so that most of the electric field lines and induced magnetic field lines generated by the sensing device terminate at the shielding ring structure 200 and do not enter the substrate, thereby reducing substrate loss and correspondingly improving the quality factor of the sensing device.

[0036] Specifically, the shielding ring structure 200 is a patterned ground shield (PGS) structure.

[0037] In this embodiment, the noise current generated in the shielding ring structure 200 is grounded by grounding the shielding ring structure 200.

[0038] In this embodiment, the shielding ring structure 200 has an opening 100c, dividing the shielding ring structure 200 into a first shielding structure 210 and a second shielding structure 220 that are isolated along a first direction. This helps to reduce the resistance of the shielding ring structure 200, thereby reducing the parasitic resistance of the shielding ring structure 200 and improving the Q value of the sensing device. Moreover, dividing the shielding ring structure 200 into the mutually isolated first shielding structure 210 and second shielding structure 220 can also effectively suppress the formation of eddy currents in the shielding ring structure 200 caused by the magnetic field generated by the sensing device, thereby reducing the energy loss of the sensing device by the shielding ring structure 200 and improving the Q value of the sensing device.

[0039] In this embodiment, the shielding ring structure 200 includes multiple shielding layers (not shown) stacked sequentially on the substrate from bottom to top, and adjacent shielding layers are electrically connected to each other.

[0040] In this embodiment, by employing multiple shielding layers, the coupling capacitance and coupling inductance between the shielding layers and the substrate are effectively reduced. Adjacent shielding layers are electrically connected to each other, and the shielding layers are grounded. Therefore, when the sensing device is operating, the noise current generated by the upper shielding layer can be transmitted to the lower shielding layer and ultimately to ground, thereby suppressing the generation of crosstalk noise.

[0041] In this embodiment, the shielding ring structure 200 includes a plurality of concentric conductive rings 230 arranged at intervals, and each conductive ring 230 includes a semi-ring (not shown) located in the first shielding structure 210 and the second shielding structure 220 respectively.

[0042] The shielding ring structure 200, composed of concentric conductive rings 230 arranged at intervals, helps to ensure uniform shielding of the electric field lines and induced magnetic field lines of the sensing device. Specifically, the conductive rings 230 can be octagonal, triangular, square, or circular in shape.

[0043] In this embodiment, the material of the shielding ring structure 200 is a conductive material, including Cu, W or Al.

[0044] It should be noted that, depending on actual needs, in other embodiments, both the first shielding structure and the second shielding structure may include multiple sub-shielding structures that are electrically isolated along the first direction.

[0045] The conductive structure 300 is used to ground the shielding ring structure 200. Specifically, the first conductive structure 310 is used to ground the second shielding structure 320, and the second conductive structure 320 is used to ground the first shielding structure 310.

[0046] Compared to the scheme where the second leads are all electrically connected to the shielding ring structure on the same side, in this embodiment, the second lead 340 of the first conductive structure 310 extends into the second shielding structure 220, and the second lead 340 of the second conductive structure 320 extends into the first shielding structure 210. This scheme increases the spacing between the first shielding structure 210 and the corresponding electrically connected first lead 330, as well as the spacing between the second shielding structure 220 and the corresponding electrically connected first lead 330. This helps to reduce the influence of the induced signal of the first shielding structure 210 on the first lead 330 electrically connected to it, and the influence of the induced signal of the second shielding structure 220 on the first lead 330 electrically connected to it. Correspondingly, it reduces the intensity of the induced signal in the first lead 330, thereby helping to reduce the signal crosstalk between the first lead 330 and the device in the device region 100a during the operation of the semiconductor structure, and thus helping to improve the operating performance of the device.

[0047] In this embodiment, the second lead 340 of the first conductive structure 310 extends to be electrically connected to the innermost semi-ring of the second shielding structure 220, and the second lead 340 of the second conductive structure 320 extends to be electrically connected to the innermost semi-ring of the first shielding structure 210. This is beneficial to use the shortest possible second lead 340 to ensure electrical connection between the first conductive structure 310 and the second shielding structure 220, and between the second conductive structure 320 and the first shielding structure 210, thereby saving costs.

[0048] Accordingly, in this embodiment, the material of the conductive structure 200 is a conductive material, including Cu, W or Al.

[0049] In this embodiment, the first lead 330 extends from the device region 100a to the loading region 100b and is electrically connected to the grounding pad 510, thereby grounding the first conductive structure 310.

[0050] In this embodiment, the coil device 500 is an inductor. Since inductors typically occupy a large area, the length of the first lead 330 extending from the loading region 100b to the device region 100a is usually large. As a result, the first lead 330 is prone to generating a large induced signal. Therefore, the semiconductor structure using an inductor is particularly suitable for the semiconductor structure of this embodiment, reducing the intensity of the induced signal in the first lead 330. This helps to reduce signal crosstalk between the first lead 330 and the inductor during the operation of the semiconductor structure, thereby improving the working performance of the inductor.

[0051] In this embodiment, the second lead 340 is located above the first lead 330, so that the first lead 330 and the second lead 340 are along the longitudinal direction (e.g., Figure 3 Electrical connection (as shown in the Z direction).

[0052] Correspondingly, both the first conductive structure 310 and the second conductive structure 320 further include: a first longitudinal interconnection structure 410, located between the second lead 340 and the first lead 330, for electrically connecting the second lead 340 and the first lead 330 in the longitudinal direction.

[0053] In this embodiment, the first lead 330 is on the same layer as the bottommost shielding layer of the shielding ring structure 200, and the second lead 340 is located above the topmost shielding layer of the shielding ring structure 200. Thus, the conductive structure 300 formed by the first lead 330 and the second lead 340 can be electrically connected to the shielding ring structure 200 without interfering with the structure of the shielding ring structure 200, thereby requiring less modification to the existing semiconductor structure. Furthermore, this embodiment can form the bottommost shielding layer of the shielding ring structure 200 and the first lead 330 in the same process, simplifying the process flow, improving process efficiency, and saving process costs.

[0054] In this embodiment, the first vertical interconnect structure 410 and the remaining shielding structure 200 above the bottommost shielding layer are located on the same layer, and in the vertical direction, the first vertical interconnect structure 410 and the remaining shielding ring structure above the bottommost shielding layer have the same cross-sectional structure.

[0055] It should be noted that, for the sake of clarity of the illustration, Figure 3 and Figure 4 Only the first conductive structure 310 is shown.

[0056] In this embodiment, the first vertical interconnect structure 410 and the remaining shielding structure 200 above the bottommost shielding layer are located on the same layer, thereby enabling the formation of the first vertical interconnect structure 410 and the remaining shielding ring structure 200 above the bottommost shielding layer in the same process, simplifying the process flow, improving process efficiency, and saving process costs.

[0057] In this embodiment, both the first conductive structure 210 and the second conductive structure 220 further include: a second longitudinal interconnect structure 420, located between the first longitudinal interconnect structure 410 and the second lead 340, and electrically connected to the first longitudinal interconnect structure 410 and the second lead 340; and a third longitudinal interconnect structure 430, located between the second lead 340 and the topmost shielding layer of the corresponding electrically connected shielding ring structure 200, and electrically connected to the second lead 340 and the corresponding topmost shielding layer.

[0058] The second vertical interconnect structure 420 is used to electrically connect the first vertical interconnect structure 410 and the second lead 340, thereby realizing the electrical connection between the first lead 330 and the second lead 340.

[0059] The third vertical interconnect structure 430 is used to electrically connect the second lead 340 and the corresponding top shielding layer, thereby realizing the electrical connection between the conductive structure 300 and the shielding ring structure 200.

[0060] In this embodiment, the straight line extending along the first direction and passing through the center point of the shielding ring structure 200 is the reference line. The second leads 340 of the first conductive structure 310 and the second conductive structure 320 are located on both sides of the reference line, so that the second leads 340 of the first conductive structure 310 and the second conductive structure 320 can not interfere with each other.

[0061] In this embodiment, the spacing between each second lead 340 and the reference line is equal, so that each second lead 340 is symmetrical along the reference line. This helps to ensure the symmetry of the first conductive structure 310 and the second conductive structure 320. Thus, during the operation of the semiconductor structure, the induced signals of the first leads 330 of the first conductive structure 310 and the second conductive structure 320 have symmetrical influence on the signal of the device in the device region 100a. This helps to reduce the probability of device signal instability caused by asymmetry in the influence of the conductive structure 300 on the device signal, thereby ensuring the working performance of the device.

[0062] It should be noted that in this embodiment, the distance between each second lead 340 and the reference line should not be too large or too small. If the distance between each second lead 340 and the reference line is too large, the length of the first lead 300 of one of the conductive structures 300 will be larger. The longer first lead 330 is more likely to generate a larger induced signal, which may have an excessive adverse effect on the device in the device region 100a, thereby affecting the device's operating performance. If the distance between each second lead 340 and the reference line is too small, the distance between the second leads 340 on both sides of the reference line will be too small, which may increase the difficulty of forming the second leads 340. Moreover, during the formation of the second leads 340, the probability of adjacent second leads 340 accidentally contacting each other due to process errors may increase, thereby affecting the function of the first conductive structure 310 and the second conductive structure 320. Consequently, the first shielding structure 210 and the second shielding structure 220 may be difficult to electrically isolate each other, affecting the operating performance of the semiconductor structure. Therefore, in this embodiment, the distance between each second lead 340 and the reference line is 0.5μm to 5μm.

[0063] It should also be noted that, along the first direction, the minimum distance between the edge of the shielding ring structure 200 and the adjacent first lead 330 should not be too large or too small. If the minimum distance between the edge of the shielding ring structure 200 and the adjacent first lead 330 is too large, it can easily lead to an excessively large area occupied by the semiconductor structure, resulting in unnecessary area waste. If the minimum distance between the edge of the shielding ring structure 200 and the adjacent first lead 330 is too small, it can easily increase the process difficulty of forming the first lead 320 and the shielding ring structure 200. Moreover, it can easily lead to accidental contact between the edge of the shielding ring structure 200 and the adjacent first lead 330 due to process errors, affecting the working performance of the semiconductor structure. Therefore, in this embodiment, along the first direction, the minimum distance between the edge of the shielding ring structure 200 and the adjacent first lead 330 is 10μm to 200μm.

[0064] In other embodiments, both the first and second shielding structures include multiple sub-shielding structures electrically isolated along the first direction. Correspondingly, the first conductive structure includes multiple second leads, each corresponding to and electrically connected to a sub-shielding structure in the second shielding structure. This grounding of each sub-shielding structure, along with increased spacing between each sub-shielding structure and its corresponding electrically connected first lead, helps reduce the impact of the induced signal from each sub-shielding structure on the electrically connected first lead, thereby reducing the intensity of the induced signal in the first lead. This, in turn, helps reduce signal crosstalk between the first lead and the devices in the device region during semiconductor structure operation, thus improving device performance. Similarly, the second conductive structure also includes multiple second leads, each corresponding to and electrically connected to a sub-shielding structure in the first shielding structure.

[0065] Figures 5 to 6 This is a schematic diagram of another embodiment of the semiconductor structure of the present invention.

[0066] The similarities between this embodiment and the previous embodiment will not be repeated here. The difference in this embodiment is that the second lead and the first lead are located on the same layer.

[0067] Reference Figure 5 and Figure 6 , Figure 5 This is a cross-sectional view along the extension direction of the first leader. Figure 6 This is a cross-sectional view along the extension direction of the second lead. In this embodiment, the second lead 341 and the first lead 331 are located on the same layer, so the second lead 341 and the first lead 331 can be directly electrically connected in the same layer. The implementation of the electrical connection between the second lead 341 and the first lead 331 is simple and easy to operate.

[0068] To ground the first lead 331 and the second lead 341, in this embodiment, the semiconductor structure further includes a first vertical interconnect structure 411 located between the first lead 331 and the substrate 101, and electrically connected to the first lead 331 in the vertical direction. The first vertical interconnect structure 411 is grounded.

[0069] In this embodiment, the shielding ring structure includes multiple shielding layers stacked sequentially on the substrate 101 from bottom to top, and adjacent shielding layers are electrically connected to each other. Correspondingly, the first lead 331 and the second lead 341 are both located above the topmost shielding layer in the shielding ring structure. Thus, the conductive structure formed by the first lead 331 and the second lead 341 can be electrically connected to the shielding ring structure without interfering with the structure of the shielding ring structure, thereby requiring less modification to the existing semiconductor structure.

[0070] In this embodiment, the first longitudinal interconnect structure 411 and the shielding ring structure are located on the same layer, and in the longitudinal direction, the first longitudinal interconnect structure 411 and the shielding ring structure have the same cross-sectional structure.

[0071] It should be noted that, for the sake of clarity of the illustration, Figure 5 and Figure 6 Only the first conductive structure is shown.

[0072] In this embodiment, the first vertical interconnect structure 411 and the shielding ring structure are located on the same layer, thereby enabling the first vertical interconnect structure 411 and the shielding ring structure to be formed in the same process, simplifying the process flow, improving process efficiency, and saving process costs.

[0073] In this embodiment, both the first conductive structure and the second conductive structure further include: a second longitudinal interconnect structure 421, located between the first longitudinal interconnect structure 411 and the first lead 331, and electrically connected to the first longitudinal interconnect structure 411 and the second lead 341; and a third longitudinal interconnect structure 431, located between the second lead 341 and the topmost shielding layer of the corresponding electrically connected shielding structure, and electrically connected to the second lead 341 and the corresponding topmost shielding layer.

[0074] The second vertical interconnect structure 421 is used to electrically connect the first vertical interconnect structure 411 and the first lead 331, thereby grounding the first lead 331.

[0075] The third vertical interconnect structure 431 is used to electrically connect the second lead 341 and the corresponding top shielding layer, thereby realizing the electrical connection between the conductive structure and the shielding ring structure.

[0076] The present invention also provides a method for forming a semiconductor structure, with reference to Figures 7 to 9 This is a schematic diagram of the structure corresponding to each step in one embodiment of the semiconductor structure formation method of the present invention.

[0077] Reference Figures 7 to 9 , Figure 7 This is a top view of an embodiment of the semiconductor structure formation method of the present invention. Figure 8 This is a cross-sectional view along the extension direction of the first leader. Figure 9 A cross-sectional view along the extension direction of the second lead is provided, including a substrate (not shown) and a device region 102a.

[0078] In integrated circuits, such as CMOS radio frequency integrated circuits, sensors are crucial electrical components whose performance parameters directly impact the overall performance of the integrated circuit. A semiconductor structure is typically formed beneath the sensor in an integrated circuit to isolate the sensor from the substrate and reduce substrate losses.

[0079] The substrate is used to provide a process platform for the fabrication of semiconductor structures, wherein the device region 102a is used to form a shielding ring structure, a conductive structure, and a sensing device.

[0080] In this embodiment, the substrate also includes a second direction (e.g., Figure 7 The loading region 102b (as shown in the Y direction) is located on the side of the device region 102a and is used to ground the semiconductor structure and to load signals for the sensing device.

[0081] Specifically, the substrate also includes: a signal pad 522 located on the substrate of the loading region 102b, and grounding pads 512 located on both sides of the signal pad 522 along the first direction.

[0082] In this embodiment, the signal pad 522 is used to load a signal onto the sensing device, and the ground pad 512 is used to ground the semiconductor structure. Accordingly, the signal pad 522 and the ground pad 512 constitute a ground-signal-ground structure.

[0083] Continue to refer to Figure 7 A shielding ring structure 202 and a conductive structure 302 electrically connected to the shielding ring structure 202 are formed on the substrate of the device region 102a. The conductive structure 302 is grounded.

[0084] In integrated circuits, a key indicator for evaluating the performance of sensing devices is the quality factor (Q). A higher quality factor indicates better performance. One important factor affecting the quality factor of a sensing device is substrate loss at high frequencies.

[0085] In this embodiment, a shielding ring structure 202 is formed below the sensing device (e.g., an inductor). The shielding ring structure 202 is used to shield the electric field lines and induced magnetic field lines of the sensing device, so that most of the electric field lines and induced magnetic field lines generated by the sensing device terminate at the shielding ring structure 202 and do not enter the substrate, thereby reducing substrate loss and correspondingly improving the quality factor of the sensing device.

[0086] Specifically, the shielding ring structure 202 is a patterned grounding shielding structure.

[0087] In this embodiment, the noise current generated in the shielding ring structure 202 is grounded by grounding the shielding ring structure 202.

[0088] In this embodiment, the shielding ring structure 202 has an opening 102c, which is used to divide the shielding ring structure 202 into sections along a first direction (e.g., Figure 7 The first shielding structure 212 and the second shielding structure 222 are isolated from each other (shown in the X direction), with the first direction perpendicular to the second direction.

[0089] In this embodiment, the shielding ring structure 202 has an opening 102c, dividing the shielding ring structure 202 into a first shielding structure 212 and a second shielding structure 222 that are isolated along the first direction. This helps to reduce the resistance of the shielding ring structure 202, thereby reducing the parasitic resistance of the shielding ring structure 202 and improving the Q value of the sensing device. Moreover, dividing the shielding ring structure 202 into the mutually isolated first shielding structure 212 and second shielding structure 222 can also effectively suppress the formation of eddy currents in the shielding ring structure 202 caused by the magnetic field generated by the sensing device, thereby reducing the energy loss of the sensing device by the shielding ring structure 202 and improving the Q value of the sensing device.

[0090] In this embodiment, the shielding ring structure 202 includes a plurality of concentric conductive rings 232 arranged at intervals, and each conductive ring 232 includes a half-ring (not shown) located in the first shielding structure 212 and the second shielding structure 222 respectively.

[0091] The shielding ring structure 202, composed of concentric conductive rings 232 arranged at intervals, helps to ensure uniform shielding of the electric field lines and induced magnetic field lines of the sensing device. Specifically, the conductive rings 232 can be octagonal, triangular, square, or circular in shape.

[0092] In this embodiment, the material of the shielding ring structure 202 is a conductive material, including Cu, W or Al.

[0093] It should be noted that, depending on actual needs, in other embodiments, both the first shielding structure and the second shielding structure may include multiple sub-shielding structures that are electrically isolated along the first direction.

[0094] In this embodiment, the conductive structure 302 includes a first conductive structure 312 on the same side as the first shielding structure 212 and a second conductive structure 222 on the same side as the second shielding structure 322. Both the first conductive structure 212 and the second conductive structure 222 include a first lead 332 extending along a second direction and a second lead 342 extending along a first direction and electrically connected to the first lead 332. Along the first direction, the first lead 332 is located on both sides of the shielding ring structure 202. The second lead 342 of the first conductive structure 312 is electrically connected to the second shielding structure 222, and the second lead 342 of the second conductive structure 322 is electrically connected to the first shielding structure 312.

[0095] The conductive structure 302 is used to ground the shielding ring structure 202. Specifically, the first conductive structure 312 is used to ground the second shielding structure 322, and the second conductive structure 322 is used to ground the first shielding structure 312.

[0096] Compared to the scheme where the second leads are all electrically connected to the shielding ring structure on the same side, in this embodiment, the second lead 340 of the first conductive structure 312 extends into the second shielding structure 222, and the second lead 340 of the second conductive structure 322 extends into the first shielding structure 212. This scheme increases the spacing between the first shielding structure 212 and the corresponding electrically connected first lead 332, as well as the spacing between the second shielding structure 222 and the corresponding electrically connected first lead 332. This helps to reduce the influence of the induced signal of the first shielding structure 212 on the first lead 332 electrically connected to it, and the influence of the induced signal of the second shielding structure 222 on the first lead 332 electrically connected to it. Correspondingly, it reduces the intensity of the induced signal in the first lead 332, thereby helping to reduce the signal crosstalk between the first lead 332 and the device in the device region 100a during the operation of the semiconductor structure, and thus helping to improve the operating performance of the device.

[0097] In this embodiment, the second lead 340 of the first conductive structure 312 extends to be electrically connected to the innermost semi-ring of the second shielding structure 222, and the second lead 340 of the second conductive structure 322 extends to be electrically connected to the innermost semi-ring of the first shielding structure 212. This is beneficial to use the shortest possible second lead 340 to ensure the electrical connection between the first conductive structure 312 and the second shielding structure 222, as well as the electrical connection between the second conductive structure 322 and the first shielding structure 212, thereby saving costs.

[0098] Accordingly, in this embodiment, the material of the conductive structure 202 is a conductive material, including Cu, W or Al.

[0099] In this embodiment, the first lead 332 extends from the device region 102a to the loading region 102b and is electrically connected to the grounding pad 512, thereby grounding the first conductive structure 312.

[0100] In this embodiment, the step of forming the conductive structure 302 includes: forming a first lead 332 extending along a second direction on a substrate, wherein the first lead 332 is grounded; forming a longitudinal (e.g., ...) structure on the top of the first lead 332. Figure 8 A first longitudinal interconnect structure 411 extends (as shown in the Z direction); a second lead 342 electrically connected to the first longitudinal interconnect structure 411 is formed on the top of the first longitudinal interconnect structure 411.

[0101] In this embodiment, the second lead 342 is located above the first lead 332, so that the first lead 330 and the second lead 342 are electrically connected in the longitudinal direction, and the first longitudinal interconnection structure 412 is electrically connected to the second lead 342 and the first lead 332 in the longitudinal direction.

[0102] In this embodiment, the step of forming a shielding ring structure 202 on the substrate of device region 102a includes: performing multiple stacking processes on the substrate to form multiple shielding layers (not shown) stacked sequentially on the substrate from bottom to top, and adjacent shielding layers being electrically connected to each other.

[0103] In this embodiment, by employing multiple shielding layers, the coupling capacitance and coupling inductance between the shielding layers and the substrate are effectively reduced. Adjacent shielding layers are electrically connected to each other, and the shielding layers are grounded. Therefore, when the sensing device is operating, the noise current generated by the upper shielding layer can be transmitted to the lower shielding layer and ultimately to ground, thereby suppressing the generation of noise crosstalk.

[0104] Specifically, in this embodiment, a first lead 332 is formed during the first stacking process; and a first longitudinal interconnect structure 412 of the stacked structure is formed during the remaining stacking processes.

[0105] In this embodiment, the first lead 332 and the bottommost shielding layer of the shielding ring structure 202 are formed in the same process. The conductive structure 302 formed by the first lead 332 and the second lead 342 can be electrically connected to the shielding ring structure 202 without interfering with the structure of the shielding ring structure 202, thus requiring less modification to the existing semiconductor structure. At the same time, the formation of the first vertical interconnect structure 412 and the remaining shielding ring structure 202 above the bottommost shielding layer in the same process simplifies the process flow, improves process efficiency, and saves process costs.

[0106] In this embodiment, the step of forming a second lead 342 electrically connected to the first longitudinal interconnect structure 412 on top of the first longitudinal interconnect structure 412 includes: forming a second longitudinal interconnect structure 422 on top of the first longitudinal interconnect structure 412, the second longitudinal interconnect structure 422 being used to electrically connect to the first longitudinal interconnect structure 412; forming a third longitudinal interconnect structure 432 on top of the topmost shielding layer of the shielding ring structure 202 to be electrically connected, the third longitudinal interconnect structure 432 being used to electrically connect to the corresponding topmost shielding layer; and forming a second lead 342 covering the top of the second longitudinal interconnect structure 422 and the third longitudinal interconnect structure 432, the second lead 342 being used to electrically connect the second longitudinal interconnect structure 422 and the third longitudinal interconnect structure 432.

[0107] The second vertical interconnect structure 422 is used to electrically connect the first vertical interconnect structure 412 and the second lead 342, thereby realizing the electrical connection between the first lead 330 and the second lead 342.

[0108] The third vertical interconnect structure 430 is used to electrically connect the second lead 342 and the corresponding top shielding layer, thereby realizing the electrical connection between the conductive structure 300 and the shielding ring structure 202.

[0109] Specifically, in this embodiment, the first stacking process is referred to as the first stacking process, and the remaining stacking processes are referred to as the second stacking process. The steps of the first stacking process include: forming a first dielectric layer 602 covering the substrate; forming a first lead 332 and a bottom shielding layer in the first dielectric layer 602, with the top of the first lead 332 and the shielding layer exposed in the first dielectric layer 602. The steps of the second stacking process include: forming a second dielectric layer 612 covering the first dielectric layer 602, the first lead 332 and the shielding layer; forming a vertical sub-interconnect structure above the top of the first lead 332 and a shielding layer above the bottom shielding layer in the second dielectric layer 612, with the top of the vertical sub-interconnect structure and the shielding layer exposed in the second dielectric layer 612.

[0110] The first dielectric layer 602 serves as an operating platform for forming the first lead 332, and the second dielectric layer 612 serves as an operating platform for forming the longitudinal sub-interconnect structure.

[0111] In the two consecutive stacking processes, the sub-vertical interconnect structure formed in the later stacking process is electrically connected to the first lead or vertical sub-interconnect structure formed in the previous stacking process, and the shielding layer formed in the later stacking process is electrically connected to the shielding layer formed in the previous stacking process. This achieves the formation of the first vertical interconnect structure 412 and the remaining shielding ring structure 202 above the bottom layer in the same process, and the formation of the first lead 332 and the bottom layer of the shielding ring structure 202 in the same process.

[0112] In this embodiment, the steps of forming the second vertical interconnect structure 422, the third vertical interconnect structure 432, and the second lead 342 include: after performing a stacking process, forming a third dielectric layer 622 covering the second dielectric layer 612, forming a second vertical interconnect structure 422 electrically connected to the first vertical interconnect structure 412, a third vertical interconnect structure 432 electrically connected to the shielding layer, and a second lead 342 covering the top of the second vertical interconnect structure 422 and the third vertical interconnect structure 432 in the third dielectric layer 622.

[0113] The third dielectric layer 622 serves as an operating platform for forming the second longitudinal interconnect structure 422, the third longitudinal interconnect structure 432, and the second lead 342.

[0114] In this embodiment, the straight line extending along the first direction and passing through the center point of the shielding ring structure 202 is the reference line. The second leads 342 of the first conductive structure 312 and the second conductive structure 322 are located on both sides of the reference line, so that the second leads 342 of the first conductive structure 312 and the second conductive structure 322 can not interfere with each other and are electrically connected to the first shielding structure 212 and the second shielding structure 222 respectively.

[0115] In this embodiment, the spacing between each second lead 342 and the reference line is equal, so that each second lead 342 is symmetrical along the reference line. This helps to ensure the symmetry of the first conductive structure 312 and the second conductive structure 322. Thus, during the operation of the semiconductor structure, the induced signals of the first leads 332 of the first conductive structure 312 and the second conductive structure 322 have symmetrical influence on the signal of the device in the device region 102a. This helps to reduce the probability of the device signal being unstable due to the asymmetry of the influence of the conductive structure 302 on the device signal, thereby ensuring the working performance of the device.

[0116] It should be noted that in this embodiment, the distance between each second lead 342 and the reference line should not be too large or too small. If the distance between each second lead 342 and the reference line is too large, the length of the first lead 332 of one of the conductive structures 302 will be larger. The longer first lead 332 is more likely to generate a larger induced signal, which may have an excessive adverse effect on the device in the device region 102a, thereby affecting the working performance of the device. If the distance between each second lead 342 and the reference line is too small, the distance between the second leads 342 on both sides of the reference line will be too small, which may increase the difficulty of forming the second lead 342. Moreover, during the formation of the second lead 342, the probability of adjacent second leads 342 accidentally contacting each other due to process errors may increase, thereby affecting the function of the first conductive structure 312 and the second conductive structure 322. Consequently, the first shielding structure 212 and the second shielding structure 222 may be difficult to electrically isolate each other, affecting the working performance of the semiconductor structure. Therefore, in this embodiment, the distance between each second lead 342 and the reference line is 0.5μm to 5μm.

[0117] It should also be noted that, along the first direction, the minimum distance between the edge of the shielding ring structure 202 and the adjacent first lead 332 should not be too large or too small. If the minimum distance between the edge of the shielding ring structure 202 and the adjacent first lead 332 is too large, it can easily lead to an excessively large area occupied by the semiconductor structure, resulting in unnecessary area waste. If the minimum distance between the edge of the shielding ring structure 202 and the adjacent first lead 332 is too small, it can easily increase the process difficulty of forming the first lead 322 and the shielding ring structure 202. Moreover, it can easily lead to accidental contact between the edge of the shielding ring structure 202 and the adjacent first lead 332 due to process errors, affecting the working performance of the semiconductor structure. Therefore, in this embodiment, along the first direction, the minimum distance between the edge of the shielding ring structure 202 and the adjacent first lead 332 is 10μm to 200μm.

[0118] In other embodiments, both the first and second shielding structures include multiple sub-shielding structures electrically isolated along the first direction. Correspondingly, the first conductive structure forms multiple second leads, each corresponding to and electrically connected to a sub-shielding structure in the second shielding structure. This grounding of each sub-shielding structure, while increasing the spacing between each sub-shielding structure and its corresponding electrically connected first lead, helps reduce the impact of the induced signal from each sub-shielding structure on the electrically connected first lead, thereby reducing the intensity of the induced signal in the first lead. This, in turn, helps reduce signal crosstalk between the first lead and the devices in the device region during the operation of the semiconductor structure, thus improving device performance. Similarly, the second conductive structure also forms multiple second leads, each corresponding to and electrically connected to a sub-shielding structure in the first shielding structure.

[0119] In this embodiment, after forming the shielding ring structure 202 and the conductive structure 302, the method further includes forming a coil device 502, located above the shielding ring structure 202 and the conductive structure 302, with the projection of the coil device 502 on the substrate located within the area where the shielding ring structure 202 is located.

[0120] The coil device 502 is the induction device.

[0121] In this embodiment, the coil device 502 includes an inductor.

[0122] Since inductors typically occupy a large area, the length of the first lead 332 extending from the loading region 102b to the device region 102a is usually large. As a result, the first lead 332 is prone to generating a large induced signal. Therefore, the semiconductor structure using an inductor is particularly suitable for the semiconductor structure of this embodiment, reducing the intensity of the induced signal in the first lead 332. This helps to reduce signal crosstalk between the first lead 332 and the inductor during the operation of the semiconductor structure, thereby improving the working performance of the inductor.

[0123] Correspondingly, it also includes: a signal lead that forms an electrical connection with the coil device 502, the signal lead being a signal applied to the coil device 502.

[0124] Accordingly, in this embodiment, the signal lead extends from the device region 102a to the loading region 102b and is electrically connected to the signal pad 522, thereby realizing the signal loading of the coil device 502.

[0125] Figures 10 to 11 This is a schematic diagram of the structure corresponding to each step of another embodiment of the semiconductor structure formation method of the present invention.

[0126] The similarities between this embodiment and the previous embodiment will not be repeated here. The difference in this embodiment is that the second lead and the first lead are located on the same layer.

[0127] Reference Figure 10 and Figure 11 , Figure 10 This is a cross-sectional view along the extension direction of the first leader. Figure 11 The cross-sectional view is shown along the extension direction of the second lead. In this embodiment, the step of forming the conductive structure includes: forming a first longitudinal interconnect structure 414 extending longitudinally on the substrate, the first longitudinal interconnect structure 414 being grounded; forming a first lead 334 extending in a second direction and a second lead 344 extending in a first direction on the top of the first longitudinal interconnect structure 414, the first lead 334 being electrically connected to the first longitudinal interconnect structure 414, so that the second lead 344 and the first lead 334 can be directly electrically connected in the same layer, and the implementation of the electrical connection between the second lead 344 and the first lead 334 is simple and easy to operate.

[0128] The first vertical interconnect structure 414 is used to ground the first lead 334 and the second lead 344.

[0129] In this embodiment, the step of forming a shielding ring structure on the substrate of the device region includes: performing multiple stacking processes on the substrate to form multiple shielding layers stacked sequentially on the substrate from bottom to top, and adjacent shielding layers being electrically connected to each other.

[0130] In this embodiment, a first vertical interconnect structure 414 is formed during multiple stacking processes, thereby enabling the formation of the first vertical interconnect structure 414 and the shielding ring structure in the same process, simplifying the process flow, improving process efficiency, and saving process costs.

[0131] In this embodiment, after multiple stacking processes, a first lead 334 and a second lead 344 are formed on the top of the first vertical interconnect structure 414. The first lead 334 and the second lead 344 are both located above the top layer of the shielding ring structure. The conductive structure formed by the first lead 334 and the second lead 344 can be electrically connected to the shielding ring structure without interfering with the structure of the shielding ring structure, thus requiring less modification to the existing semiconductor structure.

[0132] The steps of forming a first lead 334 and a second lead 344 on top of the first vertical interconnect structure 414 include: forming a second vertical interconnect structure 424 on top of the first vertical interconnect structure 414, the second vertical interconnect structure 424 being used to electrically connect the first vertical interconnect structure 414; forming a third vertical interconnect structure 434 on top of the topmost shielding layer of the shielding structure to be electrically connected, the third vertical interconnect structure 434 being used to electrically connect the corresponding topmost shielding layer; forming a first lead 334 covering the top of the second vertical interconnect structure 424 and a second lead 344 covering the top of the third vertical interconnect structure 434, the first lead 334 being electrically connected to the second vertical interconnect structure 424 and the second lead 344 being electrically connected to the third vertical interconnect structure 434.

[0133] The second vertical interconnect structure 424 is used to electrically connect the first vertical interconnect structure 414 and the first lead 334, thereby grounding the first lead 334.

[0134] The third vertical interconnect structure 434 is used to electrically connect the second lead 344 and the corresponding top shielding layer, thereby realizing the electrical connection between the conductive structure and the shielding ring structure.

[0135] Specifically, in this embodiment, the stacking process includes: forming a first dielectric layer 604 covering the substrate; forming a longitudinal sub-interconnect structure and a shielding layer in the first dielectric layer 604, with the top of the longitudinal sub-interconnect structure and the shielding layer exposed.

[0136] The first dielectric layer 604 is used as an operating platform for forming the vertical sub-interconnect structure.

[0137] In the two consecutive stacking processes, the vertical sub-interconnect structure formed by the later stacking process is electrically connected to the vertical sub-interconnect structure formed by the previous stacking process, and the shielding layer formed by the later stacking process is electrically connected to the shielding layer formed by the previous stacking process.

[0138] In this embodiment, after the stacking process, the step of forming a first lead 334 and a second lead 344 on top of the first longitudinal interconnect structure 414 includes: forming a second dielectric layer 614 covering the first dielectric layer 604; forming a second longitudinal interconnect structure 424 electrically connected to the longitudinal sub-interconnect structure and a third longitudinal interconnect structure 434 electrically connected to the shielding layer in the second dielectric layer 614; forming a first lead 334 covering the top of the second longitudinal interconnect structure 424; and forming a second lead 344 covering the top of the third longitudinal interconnect structure 434.

[0139] The third dielectric layer 624 serves as an operating platform for forming the second longitudinal interconnect structure 424, the third longitudinal interconnect structure 434, and the second lead 344.

[0140] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: Substrate, including the device region; A shielding ring structure is located on the substrate of the device region. The shielding ring structure has an opening for dividing the shielding ring structure into a first shielding structure and a second shielding structure that are isolated along a first direction. A conductive structure is located on the substrate of the device region. The conductive structure includes a first conductive structure on the same side as the first shielding structure and a second conductive structure on the same side as the second shielding structure. Both the first and second conductive structures include a first lead extending along a second direction and a second lead extending along the first direction and electrically connected to the first lead. Along the first direction, the first leads are located on both sides of the shielding ring structure. The second lead of the first conductive structure is electrically connected to the second shielding structure, and the second lead of the second conductive structure is electrically connected to the first shielding structure. The conductive structure is grounded, and the second direction is perpendicular to the first direction. A coil device is located above the shielding ring structure and the conductive structure, and the coil device is an inductive device.

2. The semiconductor structure as described in claim 1, characterized in that, The second lead is located above the first lead; Both the first conductive structure and the second conductive structure further include: a first longitudinal interconnect structure located between the second lead and the first lead, for electrically connecting the second lead and the first lead in the longitudinal direction.

3. The semiconductor structure as described in claim 2, characterized in that, The shielding ring structure includes multiple shielding layers stacked sequentially on the substrate from bottom to top, and adjacent shielding layers are electrically connected to each other. The first lead is on the same layer as the bottommost shielding layer in the shielding ring structure, and the second lead is located above the topmost shielding layer in the shielding ring structure.

4. The semiconductor structure as described in claim 3, characterized in that, The first vertical interconnect structure and the remaining shielding ring structure above the bottommost shielding layer are located on the same layer, and in the vertical direction, the first vertical interconnect structure and the remaining shielding ring structure above the bottommost shielding layer have the same cross-sectional structure. Both the first conductive structure and the second conductive structure further include: a second longitudinal interconnect structure located between the first longitudinal interconnect structure and the second lead, and electrically connected to the first longitudinal interconnect structure and the second lead; The third vertical interconnect structure is located between the second lead and the topmost shielding layer of the corresponding electrically connected shielding ring structure, and is electrically connected to the second lead and the corresponding topmost shielding layer.

5. The semiconductor structure as described in claim 1, characterized in that, The second lead is on the same layer as the first lead; The semiconductor structure further includes: a first vertical interconnect structure located between the first lead and the substrate, and electrically connected to the first lead in the vertical direction, wherein the first vertical interconnect structure is grounded.

6. The semiconductor structure as described in claim 5, characterized in that, The shielding ring structure includes multiple shielding layers stacked sequentially on the substrate from bottom to top, and adjacent shielding layers are electrically connected to each other. The first lead and the second lead are both located above the topmost shielding layer in the shielding structure.

7. The semiconductor structure as described in claim 6, characterized in that, The first longitudinal interconnect structure and the shielding ring structure are located in the same layer, and in the longitudinal direction, the first longitudinal interconnect structure and the shielding ring structure have the same cross-sectional structure; Both the first conductive structure and the second conductive structure further include: a second longitudinal interconnect structure located between the first longitudinal interconnect structure and the second lead, and electrically connected to the first longitudinal interconnect structure and the first lead; The third vertical interconnect structure is located between the second lead and the topmost shielding layer of the corresponding electrically connected shielding ring structure, and is electrically connected to the second lead and the corresponding topmost shielding layer.

8. The semiconductor structure according to any one of claims 1 to 7, characterized in that, Using a straight line extending along the first direction and passing through the center point of the shielding ring structure as a reference line, the second leads of the first conductive structure and the second conductive structure are located on both sides of the reference line.

9. The semiconductor structure as described in claim 8, characterized in that, The spacing between each of the second leads and the reference line is equal.

10. The semiconductor structure as described in claim 9, characterized in that, The distance between each second lead and the reference line is 0.5 μm to 5 μm.

11. The semiconductor structure according to any one of claims 1 to 7, characterized in that, The shielding ring structure includes a plurality of concentric conductive rings arranged at intervals, and each conductive ring includes a half-ring located in the first shielding structure and the second shielding structure respectively. The second lead of the first conductive structure extends to be electrically connected to the innermost semi-ring of the second shielding structure, and the second lead of the second conductive structure extends to be electrically connected to the innermost semi-ring of the first shielding structure.

12. The semiconductor structure according to any one of claims 1 to 7, characterized in that, Both the first shielding structure and the second shielding structure include multiple sub-shielding structures that are electrically isolated along the first direction; The first conductive structure includes a plurality of second leads, and the second leads of the first conductive structure correspond one-to-one with the sub-shielding structures in the second shielding structure and are electrically connected. The second conductive structure includes a plurality of second leads, and the second leads of the second conductive structure correspond one-to-one with the sub-shielding structures in the first shielding structure and are electrically connected.

13. The semiconductor structure according to any one of claims 1 to 7, characterized in that, Along the first direction, the minimum distance between the edge of the shielding ring structure and the adjacent first lead is 10 μm to 200 μm.

14. The semiconductor structure according to any one of claims 1 to 7, characterized in that, The projection of the coil device onto the substrate is located within the area of ​​the shielding ring structure; The signal lead is electrically connected to the coil device, and the signal lead is used to apply a signal to the coil device.

15. The semiconductor structure as described in claim 14, characterized in that, The substrate further includes a loading region located on the side of the device region along the second direction; The semiconductor structure further includes: signal pads located on the substrate of the loading region, and ground pads located on both sides of the signal pads along the first direction; The first lead extends from the device region into the loading region and is electrically connected to the grounding pad. The signal lead extends from the device area to the loading area and is electrically connected to the signal pad.

16. The semiconductor structure as claimed in claim 14, characterized in that, The coil device includes an inductor.

17. A method for forming a semiconductor structure, characterized in that, include: Provide a substrate, including the device region; A shielding ring structure and a conductive structure electrically connected to the shielding ring structure are formed on the substrate of the device region, and the conductive structure is grounded; The shielding ring structure has an opening for dividing the shielding ring structure into a first shielding structure and a second shielding structure that are isolated from each other along a first direction; The conductive structure includes a first conductive structure on the same side as the first shielding structure and a second conductive structure on the same side as the second shielding structure. Both the first and second conductive structures include a first lead extending along a second direction and a second lead extending along the first direction and electrically connected to the first lead. Along the first direction, the first lead is located on both sides of the shielding ring structure. The second lead of the first conductive structure is electrically connected to the second shielding structure, and the second lead of the second conductive structure is electrically connected to the first shielding structure. The second direction is perpendicular to the first direction. After forming the shielding ring structure and the conductive structure, the process further includes forming a coil device located above the shielding ring structure and the conductive structure, wherein the coil device is an induction device.

18. The method for forming a semiconductor structure as described in claim 17, characterized in that, The step of forming the conductive structure includes: forming a first lead extending in the second direction on the substrate, wherein the first lead is grounded; A first longitudinal interconnect structure extending longitudinally is formed at the top of the first lead; A second lead electrically connected to the first vertical interconnect structure is formed on top of the first vertical interconnect structure.

19. The method for forming a semiconductor structure as described in claim 18, characterized in that, The step of forming a shielding ring structure on the substrate of the device region includes: performing multiple stacking processes on the substrate to form multiple shielding layers stacked sequentially from bottom to top on the substrate, with adjacent shielding layers electrically connected to each other; During the first stacking process, the first lead is formed; During the remaining stacking processes, the first vertical interconnect structure is formed into a stacked structure; The step of forming a second lead electrically connected to the first longitudinal interconnect structure on top of the first longitudinal interconnect structure includes: forming a second longitudinal interconnect structure on top of the first longitudinal interconnect structure, the second longitudinal interconnect structure being electrically connected to the first longitudinal interconnect structure; forming a third longitudinal interconnect structure on top of the topmost shielding layer of the shielding structure to be electrically connected, the third longitudinal interconnect structure being electrically connected to the corresponding topmost shielding layer; and forming a second lead covering the top of the second longitudinal interconnect structure and the third longitudinal interconnect structure, the second lead being electrically connected to the second longitudinal interconnect structure and the third longitudinal interconnect structure.

20. The method for forming a semiconductor structure as described in claim 19, characterized in that, The first stacking process is referred to as the first stacking process, and the remaining stacking processes are referred to as the second stacking process. The first stacking process includes: forming a first dielectric layer covering the substrate; The first lead and the bottom shielding layer are formed in the first dielectric layer, with the top of the first lead and the shielding layer exposed in the first dielectric layer. The second stacking process includes: forming a second dielectric layer covering the first dielectric layer, the first lead, and the shielding layer; forming a vertical sub-interconnect structure above the top of the first lead and a shielding layer above the bottom layer of the second dielectric layer, wherein the second dielectric layer exposes the top of the vertical sub-interconnect structure and the top of the shielding layer. In the two consecutive stacking processes, the sub-vertical interconnect structure formed by the later stacking process is electrically connected to the first lead or vertical sub-interconnect structure formed by the previous stacking process, and the shielding layer formed by the later stacking process is electrically connected to the shielding layer formed by the previous stacking process. The steps of forming the second longitudinal interconnect structure, the third longitudinal interconnect structure, and the second lead include: after performing the stacking process, forming a third dielectric layer covering the second dielectric layer, forming a second longitudinal interconnect structure electrically connected to the first longitudinal interconnect structure, a third longitudinal interconnect structure electrically connected to the shielding layer, and a second lead covering the top of the second longitudinal interconnect structure and the third longitudinal interconnect structure in the third dielectric layer.

21. The method for forming a semiconductor structure as described in claim 17, characterized in that, The step of forming the conductive structure includes: forming a first longitudinal interconnect structure extending longitudinally on the substrate, wherein the first longitudinal interconnect structure is grounded; A first lead extending along the second direction and a second lead extending along the first direction and connected to the first lead are formed on the top of the first longitudinal interconnect structure, wherein the first lead is electrically connected to the first longitudinal interconnect structure.

22. The method for forming a semiconductor structure as described in claim 21, characterized in that, The step of forming a shielding ring structure on the substrate of the device region includes: performing multiple stacking processes on the substrate to form multiple shielding layers stacked sequentially from bottom to top on the substrate, with adjacent shielding layers electrically connected to each other; During the multiple stacking processes, the first vertical interconnect structure is formed; After performing the stacking process multiple times, the first lead and the second lead are formed on top of the first vertical interconnect structure; The steps of forming the first lead and the second lead on top of the first longitudinal interconnect structure include: forming a second longitudinal interconnect structure on top of the first longitudinal interconnect structure, the second longitudinal interconnect structure being electrically connected to the first longitudinal interconnect structure; forming a third longitudinal interconnect structure on top of the topmost shielding layer of the shielding structure to be electrically connected, the third longitudinal interconnect structure being electrically connected to the corresponding topmost shielding layer; forming a first lead covering the top of the second longitudinal interconnect structure and a second lead covering the top of the third longitudinal interconnect structure, the first lead being electrically connected to the second longitudinal interconnect structure and the second lead being electrically connected to the third longitudinal interconnect structure.

23. The method for forming a semiconductor structure as described in claim 22, characterized in that, The stacking process includes: forming a first dielectric layer covering the substrate; A vertical sub-interconnect structure and a shielding layer are formed in the first dielectric layer, with the top of the vertical sub-interconnect structure and the shielding layer exposed in the first dielectric layer; In the two consecutive stacking processes, the vertical sub-interconnect structure formed by the later stacking process is electrically connected to the vertical sub-interconnect structure formed by the previous stacking process, and the shielding layer formed by the later stacking process is electrically connected to the shielding layer formed by the previous stacking process. After performing the stacking process, the step of forming the first lead and the second lead on the top of the first longitudinal interconnect structure includes: forming a second dielectric layer covering the first dielectric layer, forming a second longitudinal interconnect structure electrically connected to the longitudinal sub-interconnect structure and a third longitudinal interconnect structure electrically connected to the shielding layer in the second dielectric layer, forming a first lead covering the top of the second longitudinal interconnect structure and a second lead covering the top of the third longitudinal interconnect structure.

24. The method for forming a semiconductor structure as described in claim 17, characterized in that, In the step of forming the shielding ring structure, the shielding ring structure is formed with a plurality of concentric conductive rings arranged at intervals, and each conductive ring includes a half ring located in the first shielding structure and the second shielding structure respectively. In the step of forming the conductive structure, the second lead of the first conductive structure extends to be electrically connected to the innermost semi-ring of the second shielding structure, and the second lead of the second conductive structure extends to be electrically connected to the innermost semi-ring of the first shielding structure.

25. The method for forming a semiconductor structure as described in claim 17, characterized in that, In the step of forming the shielding structure, both the first shielding structure and the second shielding structure are formed with a plurality of sub-shielding structures electrically isolated along the first direction; In the step of forming the conductive structure, the first conductive structure includes a plurality of second leads, and the second leads of the first conductive structure correspond one-to-one with the sub-shielding structures in the second shielding structure and are electrically connected. The second conductive structure includes a plurality of second leads, and the second leads of the second conductive structure correspond one-to-one with the sub-shielding structures in the first shielding structure and are electrically connected.

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