A drive motor fault protection system, method, and medium

Abstract

The embodiment of the specification discloses a kind of drive motor fault protection system, method and medium, system includes: overcurrent fault detection module, overcurrent fault detection module includes three-phase current sensor, three-phase current is connected to the first node of logic operation circuit by operational amplifier;Drive fault detection module includes drive chip, and the three-phase output level of drive chip is connected to the first node of logic operation circuit by photoelectric coupler;High-voltage fault detection module includes high-voltage acquisition module, and the output voltage of high-voltage acquisition module is connected to the second node of logic operation circuit by operational amplifier, and is connected micro control unit, and one output interface of micro control unit is connected to third node;Directly shut down module, directly shut down module includes upper three bridge gate control circuit and lower three bridge gate control circuit, lower three bridge gate control circuit is connected after third node, and upper three bridge gate control circuit connects another output interface of micro control unit.

Description

Technical Field

[0001] This specification relates to the technical field of cable defect location, and in particular to a drive motor fault protection system, method and medium. Background Technology

[0002] In recent years, the safety of new energy vehicles, especially the safety of drive motor systems, has attracted much attention. To address safety issues related to various types of malfunctions, a series of targeted protection systems and methods have been proposed.

[0003] Currently, two main methods are commonly used. The first method involves inputting the fault signal into the MCU, which diagnoses the fault type and outputs a logic level to a buffer, which then shuts down the PWM signal. This method has a slow response time and struggles to quickly and directly shut down the PWM signal. The second method involves inputting the fault signal into hardware circuitry for processing, outputting a logic level to a buffer, which then completely shuts down the PWM signal. This method has a fast response time, but even with a buffer, the shutdown is still not direct, and it's difficult to perform logical differentiation and protection based on the fault type.

[0004] For example, such as Figure 1 As shown, this invention discloses a PWM output latch-up protection circuit, a brushless DC motor, and a control method. The signal output by the fault detection unit is input to the microprocessor MCU and the buffer chip U1 via flip-flop U2. When the fault detection unit detects a fault, the output fault signal is input to flip-flop U2. Flip-flop U2 outputs a first latch-up signal to the buffer chip U1 to prematurely shut down the PWM signal output. Simultaneously, flip-flop U2 outputs a second latch-up signal to the microprocessor MCU to stop the PWM signal output. When the fault is cleared, the microprocessor MCU outputs a rising edge signal to flip-flop U2 to control flip-flop U2 to release the latch-up signal output.

[0005] Regarding the safety issues of drive motor fault protection systems, currently used methods suffer from problems such as slow protection speed, indirect protection, and difficulty in logically distinguishing fault types for protection. Summary of the Invention

[0006] This specification provides one or more embodiments of a drive motor fault protection system, method, and medium to solve the following technical problems: existing drive motor fault protection methods suffer from slow protection speed, indirect protection, and difficulty in logically distinguishing fault types for protection.

[0007] One or more embodiments of this specification employ the following technical solutions:

[0008] This specification provides one or more embodiments of a drive motor fault protection system, the system comprising:

[0009] A drive motor fault protection system, characterized in that the system comprises:

[0010] An overcurrent fault detection module, comprising a three-phase current sensor for detecting three-phase current, wherein the three-phase current is connected to the first node of a logic operation circuit via an operational amplifier;

[0011] The drive fault detection module includes a drive chip, the three-phase output level of which is connected to the first node of the logic operation circuit via an optocoupler;

[0012] A high-voltage fault detection module includes a high-voltage acquisition module. The output voltage of the high-voltage acquisition module is connected to the second node of the logic operation circuit via an operational amplifier and is also connected to a microcontroller unit. One output interface of the microcontroller unit is connected to the third node.

[0013] The direct shutdown module includes an upper three-bridge gate control circuit and a lower three-bridge gate control circuit. The lower three-bridge gate control circuit is connected after the third node of the logic operation circuit, and the upper three-bridge gate control circuit is connected to another output interface of the microcontroller unit.

[0014] Furthermore, the upper three-bridge gate control circuit includes a second optocoupler, the output terminal of which is connected to the upper three bridges or the low-voltage connection of the insulated-gate bipolar transistor. The lower three-bridge gate control circuit includes a first optocoupler, the output terminal of which is connected to the lower three bridges or the low-voltage connection of the insulated-gate bipolar transistor.

[0015] Furthermore, the three-phase output levels are respectively connected to the three-phase circuit, and each of the three-phase circuits is equipped with a pull-up resistor, a switching transistor, a driving optocoupler, and a NOT gate chip.

[0016] This specification provides a drive motor fault protection method according to one or more embodiments, employing the aforementioned drive motor fault protection system. The method includes:

[0017] Based on the detection of a current fault in any one phase by the three-phase current sensor, a low level is output at the first node;

[0018] The second node outputs a high level, the third node outputs a low level, and the first optocoupler is turned on;

[0019] Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the lower three bridges.

[0020] Furthermore, it also includes:

[0021] When the drive fault detection module detects a fault in the output voltage of any one phase of the drive chip, the first node outputs a low level.

[0022] The second node outputs a high level, the third node outputs a low level, and the first optocoupler is turned on;

[0023] Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the lower three bridges.

[0024] Furthermore, the drive fault detection module detects a fault in the output voltage of any one phase of the drive chip, including:

[0025] When any phase of the driver chip experiences a driving failure, the three phase output levels of the driver chip will respectively output a low level.

[0026] The switching transistor is in the off state, and the driving optocoupler is on.

[0027] Based on the isolation provided by the optocoupler, the high-level output is converted to a low-level output via a NOT gate chip.

[0028] Furthermore, it also includes:

[0029] The output voltage is obtained based on the high-voltage acquisition module;

[0030] When the output voltage is higher than the preset voltage limit, its output level is amplified by calculation and then becomes low.

[0031] The low level is connected to the second node of the logic operation circuit and the microcontroller unit, respectively.

[0032] When the second node is at a low level, the upper three bridges and the lower three bridges are turned off according to the output level of the microcontroller unit.

[0033] Further, the step of turning off the upper three bridges and the lower three bridges according to the output level of the microcontroller unit includes:

[0034] The microcontroller unit performs a current controller status diagnosis and obtains the diagnosis results;

[0035] When the diagnostic result is normal, the output level of the microcontroller is low.

[0036] When the third node outputs a low level, the first optocoupler is turned on.

[0037] Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage to realize the turn-off of the lower three bridge insulated gate bipolar transistors;

[0038] When the diagnostic result is a fault, the output level of the microcontroller is high.

[0039] When the third node outputs a high level, the second optocoupler is turned on.

[0040] Based on the second optocoupler, the gate drive signal of the upper three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the upper three bridges.

[0041] This specification provides one or more embodiments of a non-volatile computer storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured as follows:

[0042] The microcontroller unit performs a current controller status diagnosis and obtains the diagnosis results;

[0043] When the diagnostic result is normal, the output level of the microcontroller is low.

[0044] When the third node outputs a low level, the first optocoupler is turned on.

[0045] Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage to realize the turn-off of the lower three bridge insulated gate bipolar transistors;

[0046] When the diagnostic result is a fault, the output level of the microcontroller is high.

[0047] When the third node outputs a high level, the second optocoupler is turned on.

[0048] Based on the second optocoupler, the gate drive signal of the upper three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the upper three bridges.

[0049] The above-mentioned technical solutions adopted in the embodiments of this specification can achieve the following beneficial effects: By introducing low-cost and commonly used modules, the present invention cleverly designs a drive motor fault protection system, realizes the direct logic shutdown of the three-bridge IGBT under overcurrent and drive faults, and the MCU-controllable negative voltage shutdown of the upper and lower three-bridge IGBTs under overvoltage faults, thereby improving the safety of the drive motor system. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments or prior art of this specification, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings:

[0051] Figure 1 This is a schematic diagram of a PWM output lockout protection circuit, a brushless DC motor, and a control method based on existing technology.

[0052] Figure 2 This is a schematic diagram of a drive motor fault protection system provided in the embodiments of this specification.

[0053] Figure 3 This is a schematic diagram illustrating a specific implementation scheme of a drive motor fault protection system provided in the embodiments of this specification.

[0054] Figure 4 This is a schematic diagram of a current fault protection logic provided in an embodiment of this specification.

[0055] Figure 5 This is a schematic diagram of a drive fault protection logic according to an embodiment of the present invention.

[0056] Figure 6 This is a schematic diagram of an overvoltage fault protection logic according to an embodiment of the present invention. Detailed Implementation

[0057] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this specification, and not all embodiments. Based on the embodiments of this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this specification.

[0058] This specification provides an embodiment of a drive motor fault protection system. Figure 2 This is a schematic diagram of a drive motor fault protection system provided in the embodiments of this specification, such as... Figure 2 As shown, the system mainly includes an overcurrent fault detection module, a drive fault detection module, a high voltage fault detection module, a direct IGBT turn-off module, and a logic operation circuit. It realizes the direct logic negative voltage turn-off of the three-bridge IGBT under overcurrent and drive faults, and the MCU-controllable negative voltage turn-off of the upper and lower three-bridge IGBTs under overvoltage faults.

[0059] The specific components and their distribution are as follows: Figure 3 As shown, IGBT is an insulated-gate bipolar transistor, and MCU is a microcontroller unit. The specific details of the drive motor fault protection system are as follows:

[0060] 01 is the overcurrent fault detection module, consisting of an MCU (microcontroller unit) IC (driver chip) 1, U-phase current sensors, V-phase current sensors, W-phase current sensors, operational amplifiers U5-U7, pull-up resistors R10, VCC (Volt Current Condenser, circuit power supply voltage) 2, and GND (wire grounding terminal) 2. The MCU outputs Viref as the current limit. If any of the U, V, or W phase current sensors exceeds the limit, the FAULT_OC output will go low after passing through the operational amplifier.

[0061] Module 02 is the drive fault detection module, consisting of drive chip IC2, VCC1, VCC2, GND1, GND2, switching transistors Q1-Q3, capacitors C1-C3, pull-up resistors R1-R9, optocouplers PC1-PC3, and NOT gate chips U1-U3. Under normal conditions, drive chips FAULT_U, FAULT_V, and FAULT_W are in a high-impedance state, MOSFETs Q1-Q3 are in a conducting state, and the primary side of optocouplers PC1-PC3 is at a low level and not conducting. Therefore, the outputs of U1-U3 are high, and the output of U4 is also high.

[0062] When any phase experiences a drive fault, FAULT_U, FAULT_V, and FAULT_W output low levels respectively, MOSQ1-Q3 are off, and the primary side of optocouplers PC1-PC3 is high and conducting. After isolation by the optocouplers, the output is high, U1-U3 outputs are low, and U4 outputs are low. That is, when any phase fails, FAULT_D is low.

[0063] 03 is the high-voltage fault detection module, which consists of MCU IC1, a high-voltage acquisition module, operational amplifier U8, VCC2, GND2, pull-up resistor R11, and capacitor C5. The MCU outputs Vref as the voltage limit. When the output voltage VDC of the high-voltage acquisition module exceeds the limit Vref, the FAULT_OU outputs a low level after passing through the operational amplifier, which then enters the logic circuit and MCU IC1.

[0064] 04 is the direct IGBT turn-off module, consisting of optocouplers PC4-PC5, resistors R12-R15, and GND2. After fault logic operation, a high-level input on the primary side of optocouplers PC4-PC5 achieves a negative-voltage turn-off for the upper three IGBT bridges U_VG_T, V_VG_T, and W_VG_T, and the lower three IGBT bridges U_VG_D, V_VG_D, and W_VG_D.

[0065] The remaining parts are logic operation circuits, consisting of AND gate logic chips and NOT gate logic chips.

[0066] This specification also provides a drive motor fault protection method in its embodiments; for details, please refer to [reference needed]. Figures 4 to 6 .

[0067] like Figure 4 As shown, after a current fault occurs in any of the U, V, or W phases, the overcurrent fault detection module 01 outputs FAULT_OC at a low level. Regardless of whether the drive fault detection module 02 outputs FAULT_D at a high or low level, U8 outputs a low level, U10 outputs a high level, and U12 outputs a low level. The optocoupler PC4 is turned on, and the gate drive signals of the three lower bridges of U, V, and W are pulled down to the negative voltage VEE, realizing the rapid turn-off of the IGBTs of the three lower bridges of U, V, and W.

[0068] like Figure 5 As shown, after a drive fault occurs in any of the U, V, or W phases, the drive fault detection module 02 outputs FAULT_D at a low level. Regardless of whether the overcurrent fault detection module 01 outputs FAULT_OC at a high or low level, U8 outputs a low level, U10 outputs a high level, U12 outputs a low level, the optocoupler PC4 is turned on, and the gate drive signals of the three lower bridges of U, V, and W are pulled down to the negative voltage VEE, realizing the rapid turn-off of the IGBTs of the three lower bridges of U, V, and W.

[0069] like Figure 6 As shown, after an overvoltage fault occurs, the high-voltage fault detection module 03 outputs FAULT_OU at a low level, which is input to U10 and the MCU respectively. At this time, regardless of whether the overcurrent fault detection module 01 and the drive fault detection module 02 are faulty, U10 will output a low level, and both current and drive faults are shielded. The current fault logic circuit depends on the output level of the MCU. The MCU diagnoses the current controller status and selects to shut down the logic of the upper and lower IGBTs of U, V, and W.

[0070] In summary, this invention, by introducing low-cost, commonly used modules, ingeniously designs a drive motor fault protection system, enabling direct logic shutdown of the three-bridge IGBTs under overcurrent and drive faults, and MCU-controllable negative voltage shutdown of the upper and lower three-bridge IGBTs under overvoltage faults, thereby improving the safety of the drive motor system.

[0071] This specification also provides a non-volatile computer storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured as follows:

[0072] The microcontroller unit performs a current controller status diagnosis and obtains the diagnosis results;

[0073] When the diagnostic result is normal, the output level of the microcontroller is low.

[0074] When the third node outputs a low level, the first optocoupler is turned on.

[0075] Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage to realize the turn-off of the lower three bridge insulated gate bipolar transistors;

[0076] When the diagnostic result is a fault, the output level of the microcontroller is high.

[0077] When the third node outputs a high level, the second optocoupler is turned on.

[0078] Based on the second optocoupler, the gate drive signal of the upper three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the upper three bridges.

[0079] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the embodiments of apparatus, devices, and non-volatile computer storage media are basically similar to the method embodiments, so the descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0080] The foregoing has described specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

[0081] The devices, media, and methods provided in the embodiments of this specification are one-to-one correspondences. Therefore, the devices and media also have similar beneficial technical effects as their corresponding methods. Since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the devices and media will not be repeated here.

[0082] Those skilled in the art will understand that embodiments of this specification can be provided as methods, systems, or computer program products. Therefore, this specification may take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this specification may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0083] This specification is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this specification. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0084] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0085] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0086] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0087] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0088] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0089] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0090] The above description is merely one or more embodiments of this specification and is not intended to limit this specification. Various modifications and variations can be made to the one or more embodiments of this specification by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of one or more embodiments of this specification should be included within the scope of the claims of this specification.

Claims

1. A drive motor fault protection system, characterized in that, The system includes: An overcurrent fault detection module, comprising a three-phase current sensor for detecting three-phase current, wherein the three-phase current is connected to the first node of a logic operation circuit via an operational amplifier; The drive fault detection module includes a drive chip, the three-phase output level of which is connected to the first node of the logic operation circuit via an optocoupler; A high-voltage fault detection module includes a high-voltage acquisition module. The output voltage of the high-voltage acquisition module is connected to the second node of the logic operation circuit via an operational amplifier and is also connected to a microcontroller unit. One output interface of the microcontroller unit is connected to a third node. A direct shutdown module, comprising an upper three-bridge gate control circuit and a lower three-bridge gate control circuit, wherein the lower three-bridge gate control circuit is connected after the third node of the logic operation circuit, and the upper three-bridge gate control circuit is connected to another output interface of the microcontroller unit; The output voltage is acquired based on the high voltage acquisition module; when the output voltage is higher than the preset voltage limit, it is amplified to output a low level; the low level is connected to the second node of the logic operation circuit and the microcontroller unit respectively; when the second node is at a low level, the upper three bridges and the lower three bridges are turned off according to the output level of the microcontroller unit.

2. The drive motor fault protection system according to claim 1, characterized in that, The upper three-bridge gate control circuit includes a second optocoupler, the output of which is connected to the upper three bridges or the low-voltage connection of the insulated-gate bipolar transistor. The lower three-bridge gate control circuit includes a first optocoupler, the output of which is connected to the lower three bridges or the low-voltage connection of the insulated-gate bipolar transistor.

3. The drive motor fault protection system according to claim 2, characterized in that, The three-phase output levels are respectively connected to the three-phase circuit, and each of the three-phase circuits is equipped with a pull-up resistor, a switching transistor, a driving optocoupler, and a NOT gate chip.

4. A method for protecting a drive motor from faults, characterized in that, The method of using the drive motor fault protection system as described in any one of claims 2-3 includes: Based on the detection of a current fault in any one phase by a three-phase current sensor, a low level is output at the first node. The second node outputs a high level, the third node outputs a low level, and the first optocoupler is turned on. Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the lower three bridges.

5. A drive motor fault protection method according to claim 4, characterized in that, Also includes: When the drive fault detection module detects a fault in the output voltage of any phase of the drive chip, the first node outputs a low level. The second node outputs a high level, the third node outputs a low level, and the first optocoupler is turned on; Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the lower three bridges.

6. A drive motor fault protection method according to claim 5, characterized in that, The drive fault detection module detects a fault in any one phase output voltage of the drive chip, including: When any phase of the driver chip experiences a driving failure, the three phase output levels of the driver chip will respectively output a low level. The three-phase output levels are respectively connected to the three-phase circuit, the switching transistors in the three-phase output circuit are in the off state, and the driving optocouplers in the three-phase output circuit are turned on. Based on the isolation provided by the optocoupler, the high-level output is converted to a low-level output via a NOT gate chip.

7. A drive motor fault protection method according to claim 6, characterized in that, The upper three bridges and the lower three bridges are turned off according to the output level of the microcontroller, including: The microcontroller unit performs a current controller status diagnosis and obtains the diagnosis results; When the diagnostic result is normal, the output level of the microcontroller is low. When the third node outputs a low level, the first optocoupler is turned on. Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the lower three bridges.

8. A drive motor fault protection method according to claim 7, characterized in that, The system further includes turning off the upper three bridges and the lower three bridges based on the output level of the microcontroller unit, and also includes: When the diagnostic result is a fault, the output level of the microcontroller is high. When the third node outputs a high level, the second optocoupler is turned on. Based on the second optocoupler, the gate drive signal of the upper three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the upper three bridges.

9. A non-volatile computer storage medium storing computer-executable instructions, characterized in that, The computer-executable instructions in the drive motor fault protection system as described in claim 2 are set as follows: The microcontroller unit performs a diagnostic of the current controller status and obtains the diagnostic results; When the diagnostic result is normal, the output level of the microcontroller is low. When the third node outputs a low level, the first optocoupler is turned on. Based on the first optocoupler, the gate drive signal of the lower three bridges is pulled down to a negative voltage to realize the turn-off of the lower three bridge insulated gate bipolar transistors; When the diagnostic result is a fault, the output level of the microcontroller is high. When the third node outputs a high level, the second optocoupler is turned on. Based on the second optocoupler, the gate drive signal of the upper three bridges is pulled down to a negative voltage, thereby turning off the insulated gate bipolar transistors of the upper three bridges.

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