Method for solution-based directional assembly of millimeter-scale nanowires, nanowires and applications
Patent Information
- Application Number
- CN202311093575.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-28
- Publication Date
- 2026-09-18
- Estimated Expiration
- 2043-08-28
AI Technical Summary
而现有技术的方法存在各种缺陷,制作工艺复杂、生产成本高、样品质量受制因素多和产品参数波动大,无法得到高质量的纳米线,也无法同步实现纳米线生长和水平有序排列组装,不利于半导体微纳器件的规模化生产和片上集成,亟需改进纳米线的合成方法,以利于纳米线器件的规模化生产
[0035] This invention uses a rigid substrate with nanochannels as a template for nanowire growth and employs a solution evaporation method based on a sandwich-structure self-assembly system for nanowire growth. Compared to existing vapor deposition methods that require strict control of the deposition zone distance and a high-temperature, low-pressure growth environment, the preparation method of this invention requires simpler equipment and is easier to operate. Furthermore, the growth temperature is low, only around 80°C, requiring only a sufficiently large heating stage to grow any number of samples simultaneously. The method is economical, with low equipment requirements, and is well-suited for the rapid, large-area fabrication of nanowires. Moreover, the method used in this invention yields nanowires with lengths reaching millimeters and widths ranging from 90 to 120 nm, while vapor deposition methods only produce nanowires with lengths of 10 μm and widths of 400 nm. This comparison demonstrates a significant advantage in length and width for the nanowires obtained by this invention. Additionally, the nanowires are oriented and self-assembled, and their excellent orientation provides conditions for the fabrication of semiconductor devices and micro/nano optoelectronic devices.
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Figure CN117082950B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor nanomaterial growth, specifically to a method for the directional assembly of millimeter-scale nanowires based on a solution method, and the nanowires and their applications. Background Technology
[0002] Nanowires, as one-dimensional structures, have become a research hotspot in the past two decades due to their excellent material quality and outstanding electrical, optical, and optoelectronic properties. Parallel, ordered, and guided nanowires are a necessary prerequisite for fabricating semiconductor functional devices (field-effect transistors, photovoltaic cells, photodetectors, pixel sensors, etc.). Photodetectors are semiconductor devices used to detect the presence of photons, converting optical signals into electrical signals. Photoconductive photodetectors are a type of photodetector. When light shines on the semiconductor surface, excess carriers are generated in the semiconductor, increasing the material's conductivity and thus generating a photoelectric signal. Photoconductive detectors have a simple structure and are easy to fabricate, which is beneficial for the large-scale production and integration of guided nanowire photodetectors.
[0003] Perovskites possess excellent optoelectronic properties, such as high absorption coefficient, long carrier lifetime, low defect density, and wide tunable bandgap, thus attracting widespread attention and research. Organic-inorganic halide perovskites are unstable, but cesium-containing halide perovskites offer advantages such as tunable emission and ease of synthesis, while also exhibiting significantly improved stability. Therefore, inorganic semiconductors composed of strong interatomic covalent bonds have gained increasing attention in recent years, with cesium lead-iodine (CsPbI3) being a prime example. Numerous reports have documented the fabrication of solar cells and the construction of lasers using quantum dots through the synthesis of CsPbI3 single-crystal thin films. However, reports on the synthesis of single-crystal CsPbI3 nanowires suitable for device integration are relatively few. The main challenge lies in how to integrate the synthesized nanowires on-chip and arrange them in an ordered manner, while simplifying the equipment and synthesis steps to accommodate large-scale production. Existing technologies primarily employ the following methods for preparing perovskite nanowires:
[0004] Vapor deposition method:
[0005] The literature ACS nano, 2018, 12(6) discloses a method for achieving chemical / physical vapor deposition using instruments such as a low-pressure tube furnace. CsX and PbX2 powders are placed in the high-temperature evaporation zone of the tube furnace, and a substrate with a nanowire growth template is placed in the low-temperature deposition zone. An inert gas such as nitrogen is introduced into the low-pressure tube furnace at a certain flow rate to carry the powder sample from the evaporation zone to the substrate for deposition. Under the effect of pattern epitaxy, nucleation occurs on the substrate and the nanowires are continuously grown under the guidance of the template.
[0006] While vapor deposition (VCD) is advantageous for obtaining high-quality oriented CsPbI3 nanowires, the nanowires are only about 10 μm long and about 400 nm wide. This excessively short length and wide width hinder device fabrication and reduce device integration density. Furthermore, VCD is highly sensitive to the distance between the evaporation zones, allowing only a small number of samples to grow simultaneously at a single site. Additionally, the high-temperature environment (around 500°C) required for growth necessitates more complex equipment. All these factors are unfavorable for large-scale nanowire device fabrication.
[0007] Solution scraping method:
[0008] Chinese patent application CN201510399664.4 discloses a method for preparing a large-area perovskite micro / nanowire array. The method involves dropping a prepared perovskite precursor solution onto a substrate, and then using a doctor blade, glass rod, or threaded rod to select an appropriate coating speed based on the evaporation rate of the solution to coat the solution into a film in a specified direction, thereby obtaining a horizontal nanowire array with a certain degree of guidance.
[0009] Although this method has the advantage of directly coating nanowires from a solution to a length of millimeters, while the growth of the nanowires is somewhat related to the direction of coating, the nanowires themselves cannot be oriented to self-assemble because the flow of the solution throughout the entire process cannot be effectively controlled. As a result, the nanowires exhibit cross-growth, lacking guidance, and the width of the nanowires cannot be effectively controlled. This will negatively impact the performance and integration of the device.
[0010] AAO template-assisted method:
[0011] Chinese patent application CN202210568959.X discloses a method for preparing an all-inorganic perovskite scintillator nanowire array. The method involves uniformly dropping an all-inorganic perovskite precursor solution onto a quartz substrate, and horizontally placing an AAO (anodic alumina) template on the surface of the all-inorganic perovskite precursor solution to form a sandwich structure. The sandwich structure is then transferred to a vacuum drying apparatus for negative pressure treatment, with the quartz substrate at the bottom layer. Under capillary force and gas pressure, the all-inorganic perovskite precursor solution enters the AAO template, resulting in in-situ growth and crystallization to obtain the all-inorganic perovskite nanowire array.
[0012] During the synthesis process, the solution is restricted by the channels in the AAO template to form nanowires. However, the directionally grown nanowires are vertically embedded in the template and cannot be transferred to the substrate for on-chip integration. It is difficult to use this vertical nanowire array to achieve mass production and on-chip integration of micro and nano devices.
[0013] Direct synthesis from solution:
[0014] Chinese patent application CN201811243674.9 discloses a method for directly synthesizing cubic phase CsPbI3 nanowires. Cesium acetate is dissolved in a solvent, and an oleic acid-based co-solvent is added. After complete dissolution, a cesium precursor is obtained. Lead iodide is dissolved in a solvent, and oleic acid and oleylamine surfactants are added. The mixture is kept at temperature T1 to obtain a lead iodide precursor. The cesium precursor is then added to the lead iodide precursor in two stages. Specifically, a portion of the cesium precursor is added first. Finally, the temperature is raised to T2, and the remaining cesium precursor is added to the lead iodide precursor. The mixture is kept at this temperature to obtain cubic phase cesium-lead-iodine nanowires.
[0015] The nanowires synthesized by this method are dispersed in solution and are difficult to separate and transfer. Even if they can be transferred, damage and contamination of the nanowires cannot be avoided, and self-alignment cannot be achieved, which is not conducive to the fabrication of on-chip integrated nanowire semiconductor devices.
[0016] Aligning the growth direction of nanowires can not only significantly improve the performance of nanowire devices compared to randomly distributed nanowires, but also greatly simplify the fabrication process and facilitate large-scale device integration. However, existing methods suffer from various drawbacks: complex fabrication processes, high production costs, numerous factors affecting sample quality, and large fluctuations in product parameters. These methods cannot produce high-quality nanowires, nor can they simultaneously achieve nanowire growth and horizontally ordered assembly, hindering the large-scale production and on-chip integration of semiconductor micro / nano devices. Therefore, there is an urgent need to improve nanowire synthesis methods to facilitate the large-scale production of nanowire devices. Summary of the Invention
[0017] Based on this, in order to solve at least one technical problem existing in the prior art, the present invention proposes a method for directional assembly of millimeter-scale nanowires based on solution method, as well as the nanowires and their applications.
[0018] A method for directional assembly of millimeter-scale nanowires based on solution assemblies includes the following steps:
[0019] Step S1: Provide a rigid substrate with nanochannels;
[0020] Step S2: Perform hydrophilic treatment on the rigid substrate; and prepare a cover plate and perform hydrophobic treatment on it;
[0021] Step S3: Prepare a CsPbI3 solution using a polar solvent;
[0022] Step S4: Preparation of sandwich self-assembly system: Transfer the CsPbI3 solution obtained in step S3 onto the rigid substrate treated in step S2, and then cover the substrate with the cover plate treated in step S2. The rigid substrate, CsPbI3 solution and cover plate form the sandwich self-assembly system.
[0023] Step S5: Place the sandwich self-assembly system under a nitrogen atmosphere, heat and anneal, thoroughly dry the solution, remove the cover, and obtain oriented assembled millimeter-scale CsPbI3 nanowires on a rigid substrate.
[0024] The preparation method of this invention adopts a solution evaporation method based on a sandwich structure self-assembly system. The channels of the rigid substrate provide a template for the nucleation and crystallization growth of nanowires, effectively restricting the growth direction of nanowires. The cover plate can effectively apply pressure to confine the solution within the channels, and at the same time, by forming a tight structure with the substrate, it can squeeze out excess solution, preventing excessive solution from evaporating onto the substrate to form a thin film. Moreover, since the substrate and cover plate are treated with hydrophilic and hydrophobic properties, the substrate generates a strong adsorption force on polar solvent molecules, while the top cover plate repels polar solvent molecules. CsPbI3 molecules preferentially nucleate at the nanochannels on the substrate surface and grow continuously along the channels, easily forming nanowires with lengths in the millimeter range.
[0025] In one embodiment, in step S1, the rigid substrate is an M-facet sapphire substrate after high-temperature annealing. The surface of the M-facet sapphire substrate after high-temperature annealing will spontaneously form horizontally ordered nanochannels with a direction of ±(110), and eliminate possible defects on the substrate surface. This provides high-quality patterned channels for the next step of surface modification and the crystallization and accumulation of solute after solvent evaporation, which is more conducive to the controllable and uniform growth of CsPbI3 nanowires.
[0026] In some embodiments, the high-temperature annealing treatment of the M-side sapphire substrate is at a temperature of 1400-1800℃, and the holding time is 8-12h.
[0027] In some embodiments, the concentration of the CsPbI3 solution in step S3 is 0.05-0.1 mol / L.
[0028] In some embodiments, in step S5, the annealing temperature is 80-100°C and the annealing time is 6 hours.
[0029] In some embodiments, PVP is also added to the CsPbI3 solution.
[0030] In some embodiments, the mass of PVP in the CsPbI3 solution is 5-15% of the mass of CsPbI3, which has a positive effect on the growth of nanowires.
[0031] In another aspect, the present invention also provides CsPbI3 nanowires prepared by the above method.
[0032] In some embodiments, the CsPbI3 nanowires have a length in the millimeter range and a width of 90–120 nm.
[0033] In another aspect, the present invention provides an application of the above-mentioned CsPbI3 nanowires in micro / nano optoelectronic device products.
[0034] Compared with the prior art, the present invention has the following beneficial effects:
[0035] This invention uses a rigid substrate with nanochannels as a template for nanowire growth and employs a solution evaporation method based on a sandwich-structure self-assembly system for nanowire growth. Compared to existing vapor deposition methods that require strict control of the deposition zone distance and a high-temperature, low-pressure growth environment, the preparation method of this invention requires simpler equipment and is easier to operate. Furthermore, the growth temperature is low, only around 80°C, requiring only a sufficiently large heating stage to grow any number of samples simultaneously. The method is economical, with low equipment requirements, and is well-suited for the rapid, large-area fabrication of nanowires. Moreover, the method used in this invention yields nanowires with lengths reaching millimeters and widths ranging from 90 to 120 nm, while vapor deposition methods only produce nanowires with lengths of 10 μm and widths of 400 nm. This comparison demonstrates a significant advantage in length and width for the nanowires obtained by this invention. Additionally, the nanowires are oriented and self-assembled, and their excellent orientation provides conditions for the fabrication of semiconductor devices and micro / nano optoelectronic devices. Attached Figure Description
[0036] Figure 1 This is a schematic diagram of the nanowire preparation method according to an embodiment of the present invention;
[0037] Figure 2 This is a schematic diagram of the experimental apparatus according to an embodiment of the present invention;
[0038] Figure 3 This is a SEM image of the sapphire substrate surface morphology before high-temperature annealing in an embodiment of the present invention.
[0039] Figure 4 This is a SEM image of the surface morphology of a sapphire substrate after high-temperature annealing according to an embodiment of the present invention.
[0040] Figure 5 AFM image of the surface morphology of the sapphire substrate after high-temperature annealing according to an embodiment of the present invention;
[0041] Figure 6 This is a comparison diagram of the contact angle of the sapphire substrate before and after hydrophilic treatment in an embodiment of the present invention;
[0042] Figure 7 This is a comparison diagram of the contact angle of the silicon wafer before and after hydrophobic treatment in an embodiment of the present invention;
[0043] Figure 8 This is an optical image of the nanowire array obtained in Example 2 of the present invention;
[0044] Figure 9 This is an optical image of the nanowire array obtained in Example 1 of the present invention;
[0045] Figure 10 These are SEM images of the nanowire array obtained in Example 2 of the present invention at 2000x (left) and 10000x (right).
[0046] Figure 11 These are SEM images of the nanowire array obtained in Example 1 of this invention at 2000x (left) and 15000x (right).
[0047] Figure 12 This is an optical demonstration diagram of the nanowire with a millimeter-scale length, as shown in Embodiment 1 of the present invention.
[0048] Figure 13 This is a SEM image demonstrating the width of the nanowires in Embodiment 1 of the present invention;
[0049] Figure 14 This is an XRD image of nanowires from Example 1 of the present invention. Detailed Implementation
[0050] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments and accompanying drawings, but this does not constitute a limitation on the scope of protection of the present invention.
[0051] In the description of this invention, unless otherwise explicitly defined, terms such as heating, cleaning, and weighing should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.
[0052] In the description of this invention, references to terms such as "some embodiments" and "examples" indicate that the specific methods or materials described in connection with that embodiment or example are included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the specific methods and materials described may be combined in any suitable manner in one or more embodiments or examples.
[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0054] An embodiment of the present invention provides a method for directional assembly of millimeter-scale nanowires based on solution assemblies, comprising the following steps:
[0055] Step S1: Provide a rigid substrate with nanochannels;
[0056] Step S2: Perform hydrophilic treatment on the rigid substrate; and prepare a cover plate and perform hydrophobic treatment on it;
[0057] Step S3: Prepare a CsPbI3 solution using a polar solvent;
[0058] Step S4: Preparation of sandwich self-assembly system: Transfer the CsPbI3 solution obtained in step S3 onto the rigid substrate treated in step S2, and then cover the substrate with the cover sheet treated in step S2 to form a sandwich self-assembly system.
[0059] Step S5: Place the sandwich self-assembly system under a nitrogen atmosphere, heat and anneal, thoroughly dry the solution, remove the cover, and obtain oriented assembled millimeter-scale CsPbI3 nanowires on a rigid substrate.
[0060] In step S1, the rigid substrate with nanochannels can be a silicon wafer, glass, alumina wafer, etc. The nanochannels can be obtained by conventional methods such as polishing and etching, such as polishing glass with polishing paper to create channels, or performing photolithography on a silicon wafer to obtain channels. The main purpose is to provide a template for nanowire growth and better restrict the growth direction of the nanowires. Preferably, the M-side sapphire substrate is treated with high temperature annealing. The surface of the M-side sapphire substrate treated with high temperature annealing will spontaneously form horizontally ordered nanochannels with a direction of ±(110), and eliminate possible defects on the substrate surface. This provides high-quality patterned channels for the next step of surface modification treatment and the crystallization and accumulation of solute after solvent evaporation, which is more conducive to the controllable and uniform growth of CsPbI3 nanowires. Moreover, using the M-side sapphire substrate treated with high temperature annealing as a rigid substrate eliminates the need for additional growth templates, greatly simplifies the process, and allows for the growth and alignment of nanowires in one step.
[0061] Step S2 involves hydrophilic treatment of the rigid substrate and preparation of a cover plate, followed by hydrophobic treatment.
[0062] By applying hydrophilic and hydrophobic treatment, the solvent can exert a relatively stronger attraction on the molecules on the substrate surface, thereby slowing down the solvent evaporation rate at the substrate-solution interface and greatly increasing the contact opportunities between the solute and the substrate, making the nanowires more likely to grow on the channels of the substrate.
[0063] Hydrophilic treatment primarily involves removing surface impurities and introducing polar groups such as hydroxyl (-OH) groups onto the substrate surface to achieve hydrophilicity. In some embodiments, plasma cleaning of the sapphire substrate is used to enhance surface hydrophilicity. Preferably, the contact angle of the hydrophilically treated substrate is ≤10°, such as 10°, 8°, 7°, 5°, 3°, etc. Considering both efficiency and effectiveness, a substrate contact angle of 8.8° results in a shorter treatment time and better nanowire growth.
[0064] The cover plate material can be a smooth oxide material such as silicon wafer or glass. In some embodiments, the hydrophobicity is enhanced by immersion treatment of the cover plate in OTS (Optical Tolerance System). Preferably, the contact angle of the cover plate after hydrophobic treatment is ≥100°, such as 103°, 105°, 110°, 120°, etc. When the hydrophobic treatment angle of the cover plate is 104.3°, the treatment time is moderate. If the treatment time is extended further, it is easy to introduce impurities generated by the reaction of hexane and air into the cover plate, resulting in an uneven surface.
[0065] In some embodiments, before hydrophilic and hydrophobic treatment, the substrate and cover sheet can be cleaned to remove impurities such as oil stains on their surfaces, so as to achieve better modification effects. Specifically, ultrasonic cleaning can be performed using acetone, ethanol, or deionized water. After ultrasonic cleaning, the surface is purged with nitrogen to remove organic solvents or moisture from its surface.
[0066] Step S3: Prepare a CsPbI3 solution. The solution solvent is a polar solvent to prepare raw materials for the growth of nanowires.
[0067] The concentration of the CsPbI3 solution affects the growth of nanowires. Too high a concentration can prevent solute crystallization and lead to film formation, while too low a concentration results in insufficient material for nanowire growth, causing a decrease in nanowire size and density. Preferably, the solution concentration is 0.05-0.1 mol / L. To better confine the solution within the channels for better adhesion to the substrate and cover plate, a polar solvent is selected, which allows for better adsorption with the hydrophilically treated substrate material. In some embodiments, dimethyl sulfoxide (DMSO) can be used as the solvent to prepare a 0.05 mol / L CsPbI3 solution at a CsI to PbI2 mass ratio of 1:1.
[0068] To better control the crystallization direction and morphology of nanowires, surfactants can be added to the CsPbI3 solution. Preferably, polyvinylpyrrolidone (PVP) can be added. On the one hand, its concentration can be adjusted to control the crystallization direction and morphology of the nanowires. Furthermore, PVP can inhibit the growth rate of nanowires by forming complexes with cesium ions, contributing to more uniform growth and significantly extending the length of nanowires to the millimeter scale. However, excessively high PVP content can also negatively impact nanowire growth, such as reducing nanowire size and increasing defects. Preferably, the mass of PVP in the solution is 5-15% of the mass of CsPbI3 in the solution, which has a positive enhancing effect on nanowire growth; for example, it can be 8%, 10%, or 12%.
[0069] Step S4 involves preparing a sandwich self-assembled system. The CsPbI3 solution obtained in step S3 is transferred onto the rigid substrate treated in step S2. Then, the cover plate treated in step S2 is placed over the substrate, trapping the solution between the substrate and the cover plate, thus forming a sandwich self-assembled system. Typically, the substrate and cover plate are the same size, and the entire assembly process should be rapid.
[0070] Step S5: Place the sandwich self-assembly system under a nitrogen atmosphere, heat and anneal, thoroughly dry the solution, remove the cover, and obtain the directionally assembled millimeter-sized CsPbI3 nanowires on the sapphire substrate. Excessive heating and annealing temperature can easily lead to excessively rapid nucleation, resulting in numerous defects in the nanowires. Preferably, the heating and annealing temperature is 80-100℃, such as 80℃, 85℃, 90℃, 95℃, 100℃, etc. Heating until the solution is thoroughly dried yields a nanowire array in the sandwich layer, which can be 6h, 8h, 10h, etc., preferably 6h.
[0071] The following description, in conjunction with specific embodiments, provides further details.
[0072] Unless otherwise specified, all reagents used in the following examples are commercially available; and all methods used in the following examples are conventional methods.
[0073] The experimental instruments used in the following examples are: a BY-1010 heating stage from Bangyuan Electronics Co., Ltd., with dimensions of 100mm×100mm; a ME103E / 02 electronic balance from Mettler Toledo Instruments (Shanghai) Co., Ltd.; and a BILON6-180 ultrasonic cleaner from Shanghai Bilang Instrument Manufacturing Co., Ltd.
[0074] Performance characterization: SEM images were obtained by ZEISS Ultra 55 field emission scanning electron microscope at an accelerating voltage of 5.00 kV; XRD patterns were obtained by BRPUKER D8 ADVANCE X-ray polycrystalline diffractometer at an accelerating voltage of 40 kV.
[0075] Example 1
[0076] like Figure 1-2 As shown, a method for directional assembly of millimeter-scale nanowires based on solution assemblies includes:
[0077] Step S1: Place a two-inch M-facet sapphire (crystal plane index of (100)) into a box furnace, heat it to 1600℃, keep it at a constant temperature for 10 hours, and take it out when it cools down to room temperature naturally;
[0078] Step S2: Clean the substrate and cover plate; select a silicon wafer (containing a SiO2 layer) as the cover plate; cut both the M-side sapphire substrate processed in step S1 and the silicon wafer used as the cover plate into 1×1cm pieces. 2 The small square pieces were then ultrasonically cleaned sequentially with acetone, 95% ethanol, and deionized water at a power of 135W for 10 minutes each time. After ultrasonic cleaning, the M-side sapphire substrate and silicon wafer surface were purged with nitrogen gas to remove residual moisture and solvent.
[0079] The cleaned substrate is then subjected to hydrophilic treatment; the cleaned M-side sapphire substrate is placed in a plasma cleaner for 600 seconds to achieve hydrophilic treatment.
[0080] The cleaned cover plate was subjected to hydrophobic treatment; 10 ml of hexane and 10 μl of OTS were prepared to form a solution, and the cleaned silicon wafer was placed in the solution and sealed for 2 hours to achieve hydrophobic treatment. After the hydrophobic treatment was completed, the residual solution on the surface of the silicon wafer was quickly removed with acetone and dried with nitrogen gas.
[0081] Step S3: Prepare CsPbI3 solution; Place 0.026g of CsI powder and 0.046g of PbI2 powder (mass ratio 1:1) into a solution bottle, then use a pipette to add 2ml of dimethyl sulfoxide (DMSO) solution to prepare a 0.05mol / L CsPbI3 solution. Weigh out 10% PVP powder according to the mass of CsPbI3 and add it to the solution to mix, thus obtaining the CsPbI3 solution.
[0082] Step S4: Preparation of sandwich self-assembly system: Place the sapphire substrate treated in step S2 on the heating stage, use a pipette to take 15 μl of the supernatant of CsPbI3 solution and drop it onto the sapphire substrate, and then quickly cover the substrate with a silicon wafer of the same area as the substrate after hydrophobic treatment in step S2 to form a sandwich self-assembly system.
[0083] Step S5: Place the sandwich self-assembly system in a nitrogen atmosphere at normal pressure, set the heating stage temperature to 80-100℃, heat and anneal for 6 hours, and after the solution is completely dried, peel off the silicon wafer to obtain the in-situ integrated CsPbI3 nanowire array.
[0084] Example 2
[0085] The only difference between Example 1 and Example 2 is that, in step S3, the CsPbI3 solution does not contain PVP.
[0086] Characterization and Discussion
[0087] In Example 1, the surface morphology of the sapphire substrate before and after high-temperature treatment was characterized using scanning electron microscopy (SEM) and atomic force microscopy (AFM), respectively. The results are as follows: Figure 3-5 As shown, after heat treatment, the M-side sapphire surface of this embodiment will spontaneously form parallel and orderly arranged channels with a "V"-shaped cross-section. This provides high-quality patterned channels for the crystallization and accumulation of solutes after surface modification and solvent evaporation, making the modified channels more conducive to the controllable and uniform growth of CsPbI3 nanowires.
[0088] The contact angles of the M-side sapphire substrate before and after hydrophilic treatment in Example 1 were measured, and the comparison is shown in the figure below. Figure 6 As shown in the figure. The comparison of the contact angle of the silicon wafer surface before and after hydrophobic modification treatment in Example 1 is shown in the figure. Figure 7 As shown, after hydrophilic treatment, the contact angle of the sapphire substrate decreased from 20.9° to 8.8°, while after hydrophobic treatment, the contact angle of the silicon wafer increased from 80.6° to 104.3°. The hydrophilic and hydrophobic treatments greatly increased the contact opportunities between the solute and the substrate, making nanowires more likely to grow on the channels of the sapphire.
[0089] The optical image of the nanowire array obtained in Example 1 is as follows: Figure 9 As shown, the SEM image is as follows Figure 11 As shown. Figure 12 This is an optical demonstration image of the nanowire with a millimeter-scale length in Embodiment 1 of the present invention (the image is obtained by stitching together two optical images from the same nanowire). Figure 13 The image shown is a SEM image of the width of the nanowires in Example 1 of this invention. It can be seen that the nanowires prepared by the method of this invention can reach a length of 704.940 + 690.682 μm, which is at the millimeter level, and a width of 94.74 nm, which is between 90 and 120 nm.
[0090] The optical image of the nanowire array obtained in Example 2 is as follows: Figure 8 As shown, the SEM image is as follows Figure 10 As shown. By comparison Figure 8 and. Figure 9 ,and Figure 10 and Figure 11 It can be seen that adding PVP to the solution significantly improves the morphology of nanowires. The solution with added PVP forms a directed in-plane nanowire array on the sapphire substrate, exhibiting higher uniformity in distribution, orientation, density, and length uniformity. This is mainly because PVP acts as a surfactant, influencing the crystal growth kinetics and anisotropy of CsPbI3 by adsorbing onto its crystal faces. PVP can also effectively suppress the crystal growth rate of CsPbI3, thereby inducing nanowire structures. Simultaneously, the intermolecular hydrogen bonding between PVP molecules promotes the self-assembly of the nanowires.
[0091] The crystal structure of the nanoarray obtained in Example 1 was analyzed using X-ray diffraction (XRD), and the results are as follows: Figure 14 As shown, the CsPbI3 obtained by the "sandwich" structure solution self-assembly system has high crystallinity and good crystal quality.
[0092] Therefore, the preparation method of the present invention can prepare CsPbI3 nanoarrays with a length of up to millimeters and a width of 90-120 nm, which are well-crystallized and uniformly arranged.
[0093] Solution evaporation is a relatively simple and equipment-required method for nanowire growth. By heating the solution to a certain temperature, solvent molecules escape from the liquid phase to the gas phase, increasing the solution concentration until saturation is reached. If the solute molecules in the solution have a tendency to crystallize, crystal nuclei will form on the substrate, and nanowires will grow as the solvent further evaporates.
[0094] The preparation method of this invention improves the solution evaporation method by introducing a sandwich self-assembly system. The channels of the rigid substrate provide a template for the nucleation and crystallization growth of nanowires, effectively restricting the growth direction of the nanowires. The cover plate effectively applies pressure to confine the solution within the channels, and simultaneously squeezes out excess solution by forming a tight structure with the substrate, preventing excessive solution from evaporating onto the substrate and forming a thin film. Moreover, because the substrate and cover plate are treated with hydrophilic and hydrophobic properties, the substrate generates a strong adsorption force for polar solvent molecules, while the top cover plate repels polar solvent molecules. CsPbI3 molecules preferentially nucleate at the nanochannels on the substrate surface and grow continuously along the channels, easily forming nanowires with lengths of millimeters. Furthermore, by optimizing the substrate material, controlling the solution concentration, and optimizing the solution composition, CsPbI3 nanowires with millimeter-long lengths, linewidths of approximately 100 nm, more uniform growth, and good crystallinity can be prepared.
[0095] The preparation method of this invention does not require a high-temperature and low-pressure preparation environment, has low equipment requirements, is simple to operate, and the growth temperature is only about 80°C. It only requires a sufficiently large heating stage, and can grow any number of samples simultaneously. The low equipment requirements, simple operation, and economical method make it highly suitable for the rapid, large-area fabrication of nanowires. The nanochannels of the rigid substrate can more clearly guide the growth of nanowires, exhibiting better directional self-assembly performance. Moreover, because the channel width on its surface is at the nanometer level, characterization revealed that the nanowires obtained by this invention have a width of 90–120 nm, which is much smaller than the average width of 300 nm for solution-coated nanowires. This will facilitate the better application of nanowires in integrated circuits, further improving the integration density of nanodevices. Simultaneously, the morphological characteristics of the nanowires, such as uniformity, length, and crystallinity, are improved compared to nanowires obtained by existing vapor deposition and solution-coating methods.
[0096] In summary, the sandwich-structure solution self-assembly method employed in this invention combines the advantages of vapor deposition and solution coating, resulting in nanowires with millimeter-scale lengths, linewidths of approximately 100 nm, and more uniform growth. Furthermore, the directional self-assembly of the nanowires provides excellent orientation, facilitating the fabrication of semiconductor devices and micro / nano optoelectronic devices such as photodetectors, pixel sensors, and transistors. Finally, because this invention is based on a solution method, it eliminates the need for high-temperature and low-pressure preparation environments, requiring minimal equipment, offering simple operation, and being economical, making it highly suitable for the rapid, large-area fabrication of nanowires.
[0097] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0098] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.
Claims
1. A method for directional assembly of millimeter-scale nanowires based on solution assemblies, characterized in that, Includes the following steps: Step S1: Provide a rigid substrate with nanochannels; the rigid substrate is an M-facet sapphire substrate after high-temperature annealing. Step S2: Perform hydrophilic treatment on the rigid substrate; and prepare a cover plate and perform hydrophobic treatment on it; Step S3: Prepare a CsPbI3 solution using DMSO as the solvent; PVP is also added to the CsPbI3 solution. Step S4: Preparation of sandwich self-assembly system: Transfer the CsPbI3 solution obtained in step S3 onto the rigid substrate treated in step S2, and then cover the substrate with the cover plate treated in step S2. The rigid substrate, CsPbI3 solution and cover plate form the sandwich self-assembly system. Step S5: Place the sandwich self-assembly system under a nitrogen atmosphere, heat and anneal, thoroughly dry the solution, remove the cover, and obtain oriented assembled millimeter-scale CsPbI3 nanowires on a rigid substrate.
2. The method for directional assembly of millimeter-scale nanowires based on solution method according to claim 1, characterized in that, The high-temperature annealing treatment is carried out at a temperature of 1400-1800℃ and a holding time of 8-12 h.
3. The method for directional assembly of millimeter-scale nanowires based on solution method according to claim 2, characterized in that, In step S3, the concentration of the CsPbI3 solution is 0.05-0.1 mol / L.
4. The method for directional assembly of millimeter-scale nanowires based on solution method according to claim 3, characterized in that, In step S5, the annealing temperature is 80-100 ℃ and the annealing time is 6 hours.
5. The method for directional assembly of millimeter-scale nanowires based on solution method according to claim 1, characterized in that, The mass of PVP in the CsPbI3 solution is 5-15% of the mass of CsPbI3.
6. CsPbI3 nanowires prepared by any one of the solution-based directional assembly methods for millimeter-scale nanowires as described in claims 1-5.
7. The CsPbI3 nanowire according to claim 6, characterized in that, The CsPbI3 nanowires are millimeter-long in length and 90-120 nm wide.
8. The application of CsPbI3 nanowires as described in claim 6 or 7 in micro / nano optoelectronic device products.
Citation Information
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