Etching method and plasma processing apparatus

Abstract

An etching method of a substrate using a plasma processing apparatus includes the following steps: a step (A) of supplying a substrate having a silicon-containing film to a substrate support body; a step (B) of periodically supplying a bias RF power of 20 kW or more and 50 kW or less and a duty ratio (W) of 5% or more and 50% or less to the substrate support body; and a step (C) of etching the silicon-containing film by plasma generated from a processing gas containing a fluorocarbon gas and an oxygen-containing gas.

Description

Technical Field

[0001] This disclosure relates to an etching method and a plasma processing apparatus. Background Technology

[0002] Patent Document 1 discloses a method for etching a first region and a second region, wherein the first region has a multilayer film formed by alternately depositing silicon oxide films and silicon nitride films, and the second region has a single layer of silicon oxide film. According to the etching method described in Patent Document 1, a step of generating plasma containing a first process gas containing hydrofluorocarbons and a step of generating plasma containing a second process gas containing fluorocarbons are repeatedly and alternately performed.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2016-51750 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] The technology disclosed herein improves the shape anomalies of etched patterns.

[0008] Solution for solving the problem

[0009] One aspect of this disclosure is an etching method for a substrate using a plasma processing apparatus, the etching method comprising the following steps: step (A), providing a substrate having a silicon-containing film to a substrate support; step (B), periodically supplying the substrate support with bias radio frequency (RF) power of 20 kW or more and 50 kW or less, with a duty cycle of 5% or more and 50% or less; and step (C), etching the silicon-containing film by means of plasma generated from a processing gas containing fluorocarbon gas and oxygen-containing gas.

[0010] The effects of the invention

[0011] According to this disclosure, it is possible to improve the shape abnormalities of etched patterns. Attached Figure Description

[0012] Figure 1 This is a longitudinal cross-sectional view schematically illustrating an example of the structure of a plasma processing system.

[0013] Figure 2 This is an illustrative diagram showing an example of an etched object layer formed on the surface of a substrate.

[0014] Figure 3 This is a flowchart illustrating the main steps of plasma processing according to one embodiment.

[0015] Figure 4 This is an explanatory diagram showing an example of the etching process results involved in the embodiment. Detailed Implementation

[0016] In the manufacturing process of semiconductor devices, an etching process is performed on the etching target layer, which is stacked on the surface of a semiconductor substrate (hereinafter referred to as "substrate"), using a patterned mask layer as a mask. Generally, this etching process is performed using a plasma processing apparatus.

[0017] Patent Document 1 discloses a method in which etching of a target layer (first region and second region) is performed by repeatedly performing a process of generating plasma containing a first process gas of hydrofluorocarbons and a process of generating plasma containing a second process gas of fluorocarbons within a process container of a plasma processing apparatus. Furthermore, in the etching method described in Patent Document 1, a high-frequency bias voltage of 1000W to 7000W is supplied to the lower electrode during etching of the target layer.

[0018] Furthermore, in recent plasma processing devices, as part of the aforementioned etching process, a 3D NAND HARC (High Aspect Ratio Contact) process is sometimes performed to form holes by deeply drilling into a substrate on which the etched target layer is formed in layers. In the 3D NAND HARC process, with the increasing demands for higher capacity and lower cost in recent years, there is a need for further layer stacking and integration of device fabrication. Therefore, there is a need to develop a technique to suppress minute shape anomalies (such as line edge roughness) that are not considered problems in the prior art within the etched patterns (holes, slits) formed by the etching process.

[0019] The technology disclosed herein was developed in view of the above circumstances and is used to improve the shape abnormalities of etched patterns formed on a substrate during etching processes. Hereinafter, a plasma processing system according to one embodiment and an etching method according to this embodiment will be described with reference to the accompanying drawings. Furthermore, in this specification and drawings, repeated descriptions are omitted by labeling elements having substantially the same functional structure with the same reference numerals.

[0020] Plasma Processing System

[0021] First, a plasma processing system according to one embodiment will be described. Figure 1 This is a longitudinal cross-sectional view showing the general structure of the plasma processing system.

[0022] The plasma processing system includes a capacitively coupled plasma processing device 1 and a control unit 2. The plasma processing device 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. Additionally, the plasma processing device 1 includes a substrate support 11 and a gas inlet. The substrate support 11 is disposed within the plasma processing chamber 10. The gas inlet is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet includes a spray head 13. The spray head 13 is disposed above the substrate support 11. In one embodiment, the spray head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. A plasma processing space 10s defined by the spray head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support 11 is formed inside the plasma processing chamber 10. The plasma processing chamber 10 has at least one gas supply port and at least one gas exhaust port. The at least one gas supply port is used to supply at least one processing gas to the plasma processing space 10s, and the at least one gas exhaust port is used to exhaust gas from the plasma processing space 10s. The sidewall 10a is grounded. The spray head 13 and the substrate support 11 are electrically insulated from the plasma processing chamber 10.

[0023] The substrate support 11 includes a main body member 111 and a ring assembly 112. The upper surface of the main body member 111 has a central region 111a (substrate support surface) for supporting the substrate (wafer) W and an annular region 111b (ring support surface) for supporting the ring assembly 112. The annular region 111b surrounds the central region 111a when viewed from above. The ring assembly 112 includes one or more annular members, at least one of which is an edge ring.

[0024] In one embodiment, the main body component 111 includes a base 113 and an electrostatic holding disk (chuck) 114. The base 113 includes a conductive member. The conductive member of the base 113 functions as a lower electrode. The electrostatic holding disk 114 is disposed on the upper surface of the base 113. The upper surface of the electrostatic holding disk 114 has the aforementioned central region 111a and an annular region 111b.

[0025] Additionally, although not shown in the figures, the substrate support 11 may include a temperature control module configured to adjust at least one of the ring assembly 112, the electrostatic holding disk 114, and the substrate W to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path, or a combination thereof. A heat transfer fluid such as brine or gas flows in the flow path. Furthermore, the substrate support 11 may include a heat transfer gas supply unit configured to supply heat transfer gas (back-side gas) between the back surface of the substrate W and the upper surface of the electrostatic holding disk 114.

[0026] The spray head 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The spray head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s through the plurality of gas inlets 13c. Furthermore, the spray head 13 includes a conductive member such as silicon or silicon carbide. The conductive member of the spray head 13 functions as an upper electrode. In addition to the spray head 13, the gas inlet may also include one or more side gas injectors (SGIs) installed at one or more openings formed in the sidewall 10a.

[0027] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one type of process gas from its respective gas source 21 to the spray head 13 via its respective flow controller 22. Each flow controller 22 may, for example, include a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include one or more flow modulation devices for modulating or pulsed flow of the at least one type of process gas.

[0028] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power), such as a source RF signal and a bias RF signal, to the conductive members of the substrate support 11 and / or the conductive members of the spray head 13. As a result, plasma is formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least part of a plasma generation unit configured to generate plasma from one or more processing gases in the plasma processing chamber 10. Furthermore, by supplying a bias RF signal to the lower electrode, a bias potential can be generated on the substrate W to attract the ionic components in the formed plasma to the substrate W.

[0029] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is configured to be coupled to a conductive member of the substrate support 11 and / or a conductive member of the spray head 13 via at least one impedance matching circuit, and to generate a source RF signal (source RF power) for generating plasma. In one embodiment, the source RF signal has a frequency in the range of 13MHz to 150MHz. In one embodiment, the first RF generation unit 31a may be configured to generate multiple source RF signals with different frequencies. The generated one or more source RF signals are supplied to a lower electrode and an upper electrode. The second RF generation unit 31b is configured to be coupled to a lower electrode via at least one impedance matching circuit, and to generate a bias RF signal (bias RF power). In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 400kHz to 13.56MHz. In one embodiment, the second RF generation unit 31b may be configured to generate multiple bias RF signals with different frequencies. One or more bias RF signals generated are supplied to the lower electrode. Additionally, in various embodiments, at least one of the source RF signal and the bias RF signal can be pulsed.

[0030] Furthermore, in one embodiment, the second RF generation unit 31b can supply a bias RF signal (bias RF power) to the lower electrode by periodically repeating an on / off control of a first period (ON period) during which a bias RF signal (bias RF power) is supplied to the lower electrode and a second period (OFF period) during which the supply of the bias RF signal (bias RF power) is stopped. Alternatively, in one embodiment, the second RF generation unit 31b can supply a bias RF signal (bias RF power) to the lower electrode by periodically repeating a high-low control of a first period (High period) during which a high-level bias RF signal (bias RF power) is supplied to the lower electrode and a second period (Low period) during which a low-level bias RF signal (bias RF power) is supplied to the lower electrode.

[0031] Furthermore, in the following explanation, "duty cycle" refers to the proportion of the first period (first period / (first period + second period)) within one supply cycle of the bias RF signal (bias RF power) (the total time of the first period and the second period). More specifically, when the supply of the bias RF signal (bias RF power) is controlled to be switched on or off, the duty cycle is defined as [on period / (on period + off period)], and when high-low control is performed, the duty cycle is defined as [high period / (high period + low period)].

[0032] Additionally, the power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In one embodiment, the first DC generating unit 32a is configured to be connected to a lower electrode and generate a first DC signal. The generated first bias DC signal is applied to the lower electrode. In one embodiment, the first DC signal may be applied to other electrodes, such as electrodes within an electrostatic holding disk. In one embodiment, the second DC generating unit 32b is configured to be connected to an upper electrode and generate a second DC signal. The generated second DC signal is applied to the upper electrode. In various embodiments, at least one of the first DC signal and the second DC signal may be pulsed. Furthermore, in this embodiment, the first generating unit 32a and the second DC generating unit 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b.

[0033] The exhaust system 40 can be connected, for example, to a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is adjusted via the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0034] The control unit 2 processes computer-executable commands for causing the plasma processing apparatus 1 to perform the various processes described herein. The control unit 2 can be configured to control various elements of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may, for example, include a computer 2a. The computer 2a may, for example, include a processing unit (CPU: Central Processing Unit) 2a1, a storage unit 2a2, and a communication interface 2a3. The processing unit 2a1 can be configured to perform various control actions based on programs stored in the storage unit 2a2. The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or combinations thereof. The communication interface 2a3 can communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0035] The above describes various exemplary embodiments, but is not limited to these exemplary embodiments. Various additions, omissions, substitutions, and modifications can be made. Furthermore, elements from different embodiments can be combined to form other embodiments.

[0036] For example, this embodiment describes a plasma processing device 1 with a capacitively coupled plasma (CCP) system, but the structure of the plasma processing system is not limited to this. For instance, a plasma processing system may have a processing device that includes a plasma generation unit such as inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR), helicon wave plasma (HWP), or surface wave plasma (SWP). Furthermore, processing devices with various types of plasma generation units, including AC (alternating current) and DC (direct current) plasma generation units, can be used.

[0037] <Plasma Treatment Methods>

[0038] Next, the etching process of the substrate W according to the present disclosure, performed using the plasma processing apparatus 1 configured as described above, will be explained.

[0039] The etching process of this embodiment is applied to a substrate having a base layer and an etch target layer formed on the base layer. The base layer is, for example, a silicon nitride film. The etch target layer is, for example, a silicon-containing film. The silicon-containing film can be at least one film selected from the group consisting of silicon oxide films, silicon nitride films, and polycrystalline silicon films. Furthermore, a mask layer can be formed on the etch target layer. The mask layer can be composed of at least one film selected from the group consisting of organic films and boron-containing films. As an organic film, photoresist, spin-coated carbon, tungsten carbide, or amorphous carbon can be used, for example. As a boron-containing film, boron nitride or boron carbide can be used, for example.

[0040] Figure 2 Figure (a) is a diagram showing an example of a substrate W to which the etching process of this embodiment is applied. The substrate W includes a base layer G, an etch target layer E disposed on the base layer G, and a mask layer M disposed on the etch target layer. Figure 2In the example shown in (a), the etched target layer E includes a first region R1 and a second region R2. Both the first and second regions are silicon-containing films. The first region R1 is a multilayer film ON in which at least two films selected from the above-described silicon-containing films are alternately stacked, in the illustrated example being a silicon oxide film Ox and a silicon nitride film Nit. The second region R2 is a single layer of silicon oxide film Ox.

[0041] In this embodiment, such as Figure 2 As shown in (b), a high aspect ratio etched pattern, i.e., a slot H, is formed on the etched object layer E through an etching process. The etching process in this embodiment includes steps S1 to S4.

[0042] In step S1, the substrate W is moved into the plasma processing chamber 10 and placed on the substrate support 11. Then, by supplying a DC voltage to the electrostatic holding disk 114, the substrate W is held in place by the electrostatic holding disk 114. While the substrate W is held in the electrostatic holding disk 114, the vacuum level inside the plasma processing chamber 10 is reduced to the desired vacuum level through the exhaust system 40.

[0043] In step S2, firstly, processing gas is supplied from the gas supply unit 20 to the plasma processing space 10s via the spray head 13. Additionally, source RF power is supplied to the lower electrode via the first RF generation unit 31a to excite the processing gas and generate plasma. Furthermore, bias RF power is periodically supplied to the lower electrode via the second RF generation unit 31b. As described above, the supply of bias RF power from the second RF generation unit 31b to the lower electrode can be performed by periodically repeating the on / off control or high-low control of the first and second periods. Moreover, the generated plasma is used to perform etching processing on the etching target layer E formed on the substrate W.

[0044] In this embodiment, the frequency of the cycle of supplying bias RF power in step S2 can be 1kHz to 10kHz.

[0045] The magnitude of the bias RF power is controlled to be 20 kW or more and 50 kW or less, preferably 23 kW or more and 40 kW or less. By setting the magnitude of the bias RF power to 20 kW or more, the vertical composition of ions incident into the hole H during the etching process can be increased, and by setting the magnitude of the bias RF power to 50 kW or less, the decrease in mask selectivity can be suppressed.

[0046] Furthermore, the duty cycle, which is the proportion of the period during which bias RF power is supplied or the period during which high-level bias RF power is supplied (the first period mentioned above) within one cycle (the first period + the second period mentioned above), is controlled to be 5% or more and 50% or less, preferably 10% or more and 40% or less. This increases the amount of negative ions attracted to the substrate W (hole H) during periods when bias RF power is not supplied, thereby reducing charging. Therefore, during periods when bias RF power is supplied, the vertical composition of ions incident into the hole H can be increased. Additionally, by controlling the duty cycle to be 5% or more, the time for supplying bias RF power can be kept extremely short, resulting in suppression of a decrease in etching rate and productivity.

[0047] In this way, by supplying biased RF power of 20kW or more and 50kW or less with a duty cycle of 5% or more and 50% or less, damage at the sidewall of slot H can be suppressed and LER improved.

[0048] In step S2, the processing gas comprises an oxygen-containing gas and at least one carbon-containing gas selected from the group consisting of fluorocarbon gases and hydrofluorocarbon gases. The fluorocarbon gas may be at least one gas selected from the group consisting of C4F6, C4F8, and C3F8. The hydrofluorocarbon gas may be at least one gas selected from the group consisting of CH2F2, CHF3, and CH3F. The oxygen-containing gas may be at least one gas selected from the group consisting of O2, CO, and CO2. Additionally, the processing gas may also contain other gases. For example, it may contain at least one gas selected from the group consisting of COS, NF3, and SF6.

[0049] Furthermore, in relation to such Figure 2 When etching is performed on a substrate W having a first region R1 and a second region R2, as shown in (a), step S2 may also include steps S21 to S22, which will be described later. In this case, the bias RF power in steps S21 and S22 can be set in the same way as the bias RF power in step S2 described above. Furthermore, regarding the first processing gas in step S21 and the second processing gas in step S22, the gas exemplified as the processing gas in step S2 described above can be used.

[0050] In step S21, the etchable layer E is etched using plasma generated from a first processing gas, which includes a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas. In step S21, a condition is selected that prevents the value of the critical dimension (CD), representing the width of the slot H formed in the etchable layer E, from increasing. Specifically, the flow rates of the oxygen-containing gas and the fluorocarbon gas in the first processing gas are selected such that the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is greater than 1.0. Under this condition, a polymer containing fluorocarbons is deposited on the sidewalls of the slot H. Since this polymer functions as a protective film, the increase in the CD value is suppressed.

[0051] Furthermore, the flow rate ratio of the first processing gas used in step S21 to the hydrofluorocarbon gas is set to be higher than that of the second processing gas used in step S22 (described later). The plasma generated from the fluorocarbon gas has a higher etching rate for the silicon oxide film Ox than for the silicon nitride film Nit. Therefore, the etching rate of the plasma generated from the first processing gas for the second region R2 is higher than that for the first region R1. Consequently, in step S21, the second region R2 is etched preferentially than the first region R1.

[0052] The various etching conditions in step S21 (first etching process) are illustrated below. Furthermore, the conditions shown below are all illustrative, and the conditions for the first etching process can be arbitrarily selected.

[0053] • First processing gas

[0054] Flow rate of fluorocarbon gas: 50 sccm~200 sccm

[0055] Flow rate of hydrofluorocarbon gas: 50 sccm~200 sccm

[0056] Flow rate of oxygen-containing gas: 50 sccm~200 sccm

[0057] • Source RF power: 6000W~8000W

[0058] • Bias RF power: 20kW and above but less than 50kW (e.g., 25kW)

[0059] • Duty cycle of bias RF power: 5% or more but less than 50% (e.g., 35%)

[0060] • Pressure in the plasma processing chamber: 20mT~100mT

[0061] Processing time: 20 seconds to 90 seconds

[0062] In step S22, the target layer E is etched using plasma generated from a second processing gas, which includes a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas. In step S22, conditions are selected to increase the CD value of the slots H formed in the target layer E. Specifically, the flow ratio of the oxygen-containing gas to the fluorocarbon gas in the second processing gas is selected such that the flow ratio of the fluorocarbon gas to the oxygen-containing gas is 1.0 or less. Under these conditions, the polymer deposited on the sidewalls of the slots H is removed by the plasma generated from the oxygen-containing gas, resulting in progress not only in etching along the depth direction of the slots H but also in etching along the width direction (the direction perpendicular to the depth direction), thus increasing the CD value.

[0063] Furthermore, in step S22, the flow rate ratio of the fluorocarbon gas to the hydrofluorocarbon gas in the second processing gas is set to be smaller than that in step S21. The plasma generated from the hydrofluorocarbon gas has a higher etching rate for the silicon nitride film Nit than for the silicon oxide film Ox. Therefore, the etching rate of the plasma generated from the second processing gas for the second region R2 is higher than that for the first region R1. Consequently, in step S22, the first region R1 is etched preferentially than the second region R2.

[0064] The various etching conditions in step S22 (second etching process) are illustrated below. Furthermore, the conditions shown below are all illustrative, and the conditions for the second etching process can be arbitrarily selected.

[0065] Second processing gas

[0066] Flow rate of fluorocarbon gas: 40 sccm~100 sccm

[0067] Flow rate of hydrofluorocarbon gas: 40 sccm~100 sccm

[0068] Flow rate of oxygen-containing gas: 40 sccm~100 sccm

[0069] • Source RF power: 6000W~8000W

[0070] • Bias RF power: 20kW and above but less than 50kW (e.g., 25kW)

[0071] • Duty cycle of bias RF power: 5% or more but less than 50% (e.g., 35%)

[0072] • Pressure in the plasma processing chamber: 20mT~100mT

[0073] Processing time: 10-30 seconds

[0074] Furthermore, steps S21 and S22 can be repeatedly and alternately performed. In this case, it is possible to suppress the difference between the etching rate of the first region R1 and the etching rate of the second region R2. That is, it is possible to appropriately suppress the difference between the depth of the slot H formed in the first region R1 and the depth of the slot H formed in the second region R2.

[0075] Furthermore, the processing time of step S21 and the processing time of step S22 are appropriately adjusted according to the type and thickness of the film to be etched. In one example, the ratio of the processing time of step S22 (second etching process) to the processing time of step S21 (first etching process) is adjusted to 2 to 3.

[0076] In step S2 (steps S21 and S22) of this embodiment, a negative DC voltage is periodically applied from the second DC generation unit 32b to the upper electrode facing the substrate support 11. As a result, positive ions present in the plasma processing space 10s bombard the upper electrode, releasing secondary electrons. The emitted secondary electrons are then irradiated onto the substrate W, modifying the mask layer M. Furthermore, if the upper electrode contains silicon, silicon atoms are released along with the secondary electrons through positive ion bombardment. These silicon atoms react with excess fluorine atoms present in the plasma processing space 10s or on the substrate W through the reaction described in (1) below, thereby removing the excess fluorine atoms. As a result, damage to the mask layer M accompanying the etching process is suppressed, thus further improving the LER of the via H.

[0077] Si + 4F → SiF4↑ (1)

[0078] The DC voltage can be controlled to apply a first voltage during a first period within one cycle when bias RF power is supplied to the substrate support 11, or when a high-level bias RF power is supplied; and to apply a second voltage of a different magnitude than the first voltage during a second period within one cycle when no bias RF power is supplied to the substrate support 11, or when a low-level bias RF power is supplied. The absolute value of the second voltage can be greater than the absolute value of the first voltage. In one example, the absolute value of the first voltage can be 250V or more and 500V or less. Alternatively, the absolute value of the second voltage can be 1000V or more.

[0079] Following step S2 (steps S21 and S22), step S3 may include a process of determining whether the etching process in step S2 meets a pre-defined processing termination condition. If the condition is met, the etching process on the substrate W is terminated. Conversely, if the condition is not met, step S2 is repeated on the substrate W. The predetermined condition may be the processing time or the depth of the slot H formed by the etching process. Furthermore, if steps S21 and S22 are repeated as step S2, the predetermined condition may be the number of times steps S21 and S22 are repeated.

[0080] When step S2 or step S3 is completed, the etching process in the plasma processing apparatus 1 is ended. When ending the etching process, firstly, the supply of source RF power and bias RF power from the RF power supply 31, the application of DC voltage from the DC power supply 32, and the supply of processing gas from the gas supply unit 20 are stopped. Next, the supply of heat transfer gas to the back surface of the substrate W is stopped, and the electrostatic holding disk's adsorption and holding of the substrate W is stopped.

[0081] Subsequently, the substrate W, which has undergone etching, is removed from the plasma processing chamber 10 using a substrate transfer mechanism (not shown). Figure 3 Step S4: Remove the substrate W), and the series of plasma treatments for the substrate W are completed.

[0082] (Example)

[0083] Figure 4 This is an illustrative diagram showing an example of the etching process results involved in the embodiment. Figure 4 In (a), as a reference example, the average value of the LER of the slot H and the value of the LER deviation 3σ are shown when a bias RF power of 13kW with a duty cycle of 70% is supplied to the substrate support 11 and a DC voltage of -250V is applied to the upper electrode. Figure 4 In (b), as Example 1, the average value of the LER of the slot H and the value of the LER deviation 3σ are shown when a bias RF power of 25kW with a duty cycle of 35% is supplied to the substrate support 11 and a DC voltage of -250V is applied to the upper electrode. Figure 4 In (c), as Example 2, the average value of LER of slot H and the deviation of LER 3σ are shown when a bias RF power of 25kW with a duty cycle of 35% is supplied to the substrate support 11 and a DC voltage of -500V is applied to the upper electrode.

[0084] In addition, other conditions in the etching process (source RF power supply conditions, number of cycles, etc.) such as Figure 4 As shown.

[0085] like Figure 4 As shown, compared to the reference example, the shape of the slot H is better in Examples 1 and 2. Specifically, it is observed that the average value of LER (Ave.LER) and the deviation of LER 3σ are reduced, and the roughness of the slot H is reduced. This is believed to be due to the following reason: by increasing the bias voltage RF power and decreasing the duty cycle as described above, the vertical composition of ions incident on the slot H is increased, which can suppress damage to the sidewalls of the slot H.

[0086] Furthermore, a comparison between Example 1 and Example 2 shows that the larger the absolute value of the DC voltage applied to the upper electrode, the more the average value of the LER of the slot H and the deviation 3σ of the LER are reduced. This is believed to be due to the following reason: the larger the absolute value of the DC voltage applied to the upper electrode, the more significant the effect of modifying the mask layer M and removing excess fluorine atoms, and the more effectively the damage to the mask layer M caused by the etching process can be suppressed.

[0087] Furthermore, in the above embodiment, in order to attract the ionic components in the plasma to the substrate W, a bias RF power is supplied from the second RF generation unit 31b to the substrate support 11. Alternatively, an electrical bias voltage other than the RF power can be supplied to the substrate support 11 to replace the bias RF power. Here, the electrical bias voltage can be a pulsed voltage supplied from a pulse power source in a manner that periodically repeats the on-time and off-time (the aforementioned on / off control), or it can be a voltage supplied in a manner that periodically repeats the absolute value of the voltage at a high level (high period) and a low level (low period) (the aforementioned high-low control). The pulse power source can be configured to supply pulse waves to the power source itself, or it can have a device for pulsed voltage provided downstream of the pulse power source. In one example, the electrical bias voltage is supplied to the lower electrode to generate a negative potential on the substrate W. More specifically, in the case of the aforementioned high-low control, both the high level and the low level have negative values. The electrical bias voltage can be a pulse of the negative polarity DC voltage supplied from the first DC generation unit 32a. In addition, the bias voltage can be a rectangular wave pulse, a triangular wave pulse, an impulse, or other voltage waveforms.

[0088] The frequency of the electrical bias voltage can be the same as that of the bias RF power, ranging from 1 kHz to 10 kHz.

[0089] Furthermore, the magnitude of the electrical bias voltage is adjusted so that the average energy of the ions incident on the etch target layer E is similar to the bias voltage RF power described above. In one example, the absolute value of the electrical bias voltage is controlled to be above 7 kV and below 20 kV. If the absolute value of the electrical bias voltage exceeds 20 kV, the mask selectivity may decrease.

[0090] Furthermore, the duty cycle, which is the proportion of the period during which the electrical bias voltage is supplied or the period during which the high-level electrical bias voltage is supplied (the first period mentioned above) within one cycle (the first period mentioned above), is controlled to be 5% or more and 50% or less, and preferably 10% or more and 40% or less, in the same way as the bias RF power.

[0091] By supplying an electrical bias voltage under the above conditions, similar to the case of bias RF power, the vertical composition of ions incident into the slot H can be increased, thereby suppressing damage to the sidewalls of the slot H and thus improving LER.

[0092] When a bias voltage is supplied to the substrate support 11, a negative DC voltage can also be periodically applied from the second DC generation unit 32b to the upper electrode facing the substrate support 11. In this case, a first voltage is supplied during a first period when a bias voltage is applied to the substrate support 11 or a high-level bias voltage is applied. Additionally, a second voltage is supplied during a second period when a bias voltage is not supplied to the substrate support 11 or a low-level bias voltage is applied. The magnitudes of the first and second voltages can be the same as in the case of supplying bias RF power described above.

[0093] The above description illustrates the embodiments and their variations; however, these embodiments should be considered illustrative in all respects and not restrictive. The above embodiments may be omitted, substituted, or modified in various ways without departing from the appended claims and their spirit.

[0094] Explanation of reference numerals in the attached figures

[0095] 1: Plasma processing device; 10: Plasma processing chamber; 10s: Plasma processing space; 11: Substrate support; 30: Power supply; LF: High-frequency power; ON: Multilayer film; Ox: Silicon oxide film; R1: First region; R2: Second region; SiN: Silicon nitride film; W: Substrate.

Claims

1. An etching method, comprising the following steps: Process (A): A substrate having a silicon film is provided to a substrate support; In step (B), bias radio frequency power of 20 kW or more and 50 kW or less with a duty cycle of 5% or more and 50% or less is periodically supplied to the substrate support. as well as Step (C) involves etching the silicon-containing film using plasma generated from a process gas containing fluorocarbon gas and oxygen-containing gas. The silicon-containing film includes a first region and a second region. The first region has a multilayer film stacked with at least two films selected from the group consisting of silicon oxide films, silicon nitride films, and polycrystalline silicon films. The second region has a single-layer film consisting of a silicon oxide film. Furthermore, the process (C) mentioned above includes the following steps: Step (C1) involves etching the silicon-containing film using plasma generated from a first processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is greater than 1.0; and Step (C2) involves etching the silicon-containing film using plasma generated from a second processing gas, the second processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is 1.0 or less.

2. The etching method according to claim 1, characterized in that, The bias RF power is above 23kW and below 40kW.

3. The etching method according to claim 1 or 2, characterized in that, The duty cycle of the bias RF power is above 10% and below 40%.

4. The etching method according to claim 1 or 2, characterized in that, The first region has a multilayer film with alternating layers of silicon oxide and silicon nitride films, and the second region has a single layer of silicon oxide film.

5. The etching method according to claim 1 or 2, characterized in that, The flow rate ratio of the fluorocarbon gas to the hydrofluorocarbon gas in the first processing gas is greater than the flow rate ratio of the fluorocarbon gas to the hydrofluorocarbon gas in the second processing gas.

6. The etching method according to claim 1 or 2, characterized in that, The cycle including the process (C1) and the process (C2) is performed more than once.

7. The etching method according to claim 1 or 2, characterized in that, The processing time of the process (C2) is 2 to 3 times the processing time of the process (C1).

8. The etching method according to claim 1 or 2, characterized in that, It also includes a step (D), in which a negative DC voltage is applied to the upper electrode facing the substrate support.

9. The etching method according to claim 8, characterized in that, The process (D) includes the following processes: In process (D1), during the first period of supplying bias radio frequency power or electrical bias to the substrate support, a first voltage is applied; as well as In step (D2), during a second period when the bias RF power or the electrical bias is not supplied to the substrate support, a second voltage with an absolute value different from the absolute value of the first voltage is applied.

10. The etching method according to claim 9, characterized in that, The absolute value of the second voltage is greater than the absolute value of the first voltage.

11. The etching method according to claim 10, characterized in that, The absolute value of the first voltage is above 250V and below 500V, and the absolute value of the second voltage is above 1000V.

12. The etching method according to claim 1 or 2, characterized in that, A patterned mask layer containing carbon or boron is formed on the silicon-containing film.

13. An etching method, comprising the following steps: Process (A): A substrate having a silicon film is provided to a substrate support; Step (B) involves supplying a bias voltage of 7kV or higher and 20kV or lower, with a duty cycle of 5% or higher and 50% or lower, to the substrate support; and Step (C) involves etching the silicon-containing film using plasma generated from a process gas containing fluorocarbon gas and oxygen-containing gas. in, The silicon-containing film includes a first region and a second region. The first region has a multilayer film stacked with at least two films selected from the group consisting of silicon oxide films, silicon nitride films, and polycrystalline silicon films. The second region has a single-layer film consisting of a silicon oxide film. Furthermore, the process (C) mentioned above includes the following steps: Step (C1) involves etching the silicon-containing film using plasma generated from a first processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is greater than 1.0; and Step (C2) involves etching the silicon-containing film using plasma generated from a second processing gas, the second processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is 1.0 or less.

14. The etching method according to claim 13, characterized in that, The duty cycle of the electrical bias voltage is above 10% and below 40%.

15. The etching method according to claim 13 or 14, characterized in that, The first region has a multilayer film with alternating layers of silicon oxide and silicon nitride films, and the second region has a single layer of silicon oxide film.

16. The etching method according to claim 13 or 14, characterized in that, The flow rate ratio of the fluorocarbon gas to the hydrofluorocarbon gas in the first processing gas is greater than the flow rate ratio of the fluorocarbon gas to the hydrofluorocarbon gas in the second processing gas.

17. The etching method according to claim 13 or 14, characterized in that, The cycle including the process (C1) and the process (C2) is performed more than once.

18. The etching method according to claim 13 or 14, characterized in that, The processing time of the process (C2) is 2 to 3 times the processing time of the process (C1).

19. The etching method according to claim 13 or 14, characterized in that, It also includes a step (D), in which a negative DC voltage is applied to the upper electrode facing the substrate support.

20. The etching method according to claim 19, characterized in that, The process (D) includes the following processes: In process (D1), during the first period of supplying bias radio frequency power or electrical bias to the substrate support, a first voltage is applied; as well as In step (D2), during a second period when the bias RF power or the electrical bias is not supplied to the substrate support, a second voltage with an absolute value different from the absolute value of the first voltage is applied.

21. The etching method according to claim 20, characterized in that, The absolute value of the second voltage is greater than the absolute value of the first voltage.

22. The etching method according to claim 21, characterized in that, The absolute value of the first voltage is above 250V and below 500V, and the absolute value of the second voltage is above 1000V.

23. The etching method according to claim 13 or 14, characterized in that, A patterned mask layer containing carbon or boron is formed on the silicon-containing film.

24. A plasma processing apparatus, comprising: The processing chamber has a gas supply port and a gas exhaust port; A substrate support is disposed inside the processing chamber; Plasma generation unit, which is used to generate plasma; A power source that supplies power to the substrate support; and Control Department The control unit performs processing, which includes the following steps: Step (A) involves providing the substrate support with a substrate having a silicon film. Step (B) involves periodically supplying the substrate support with bias radio frequency power of 20 kW or more and 50 kW or less, with a duty cycle of 5% or more and 50% or less; and Step (C) involves etching the silicon-containing film using plasma generated from a process gas containing fluorocarbon gas and oxygen-containing gas. The silicon-containing film includes a first region and a second region. The first region has a multilayer film stacked with at least two films selected from the group consisting of silicon oxide films, silicon nitride films, and polycrystalline silicon films. The second region has a single-layer film consisting of a silicon oxide film. Furthermore, the process (C) mentioned above includes the following steps: Step (C1) involves etching the silicon-containing film using plasma generated from a first processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is greater than 1.0; and Step (C2) involves etching the silicon-containing film using plasma generated from a second processing gas, the second processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is 1.0 or less.

25. The plasma processing apparatus according to claim 24, characterized in that, The bias RF power is above 23kW and below 40kW.

26. The plasma processing apparatus according to claim 24 or 25, characterized in that, The duty cycle is above 10% and below 40%.

27. A plasma processing apparatus, comprising: The processing chamber has a gas supply port and a gas exhaust port; A substrate support is disposed inside the processing chamber; Plasma generation unit, which is used to generate plasma; A power source that supplies power to the substrate support; and Control Department The control unit performs processing, which includes the following steps: Process (A): A substrate having a silicon film is provided to a substrate support; Step (B) involves supplying a bias voltage of 7kV or higher and 20kV or lower, with a duty cycle of 5% or higher and 50% or lower, to the substrate support; and Step (C) involves etching the silicon-containing film using plasma generated from a process gas containing fluorocarbon gas and oxygen-containing gas. The silicon-containing film includes a first region and a second region. The first region has a multilayer film stacked with at least two films selected from the group consisting of silicon oxide films, silicon nitride films, and polycrystalline silicon films. The second region has a single-layer film consisting of a silicon oxide film. Furthermore, the process (C) mentioned above includes the following steps: Step (C1) involves etching the silicon-containing film using plasma generated from a first processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is greater than 1.0; and Step (C2) involves etching the silicon-containing film using plasma generated from a second processing gas, the second processing gas comprising a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygen-containing gas, wherein the flow rate ratio of the fluorocarbon gas to the oxygen-containing gas is 1.0 or less.

28. The plasma processing apparatus according to claim 27, characterized in that, The duty cycle is above 10% and below 40%.

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