An improved image bilateral filtering method suitable for FPGA implementation

CN117115050BActive Publication Date: 2026-10-27STATE GRID INFORMATION & TELECOMM GRP CO LTD +1
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Patent Information

Application Number
CN202310904227.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-07-21
Publication Date
2026-10-27
Estimated Expiration
2043-07-21

AI Technical Summary

Technical Problem

而传统的均值滤波、高斯滤波等只考虑空域,认为临近像素应该拥有相近的特性,这种假设在图像中的Edge处则不满足,如果仍用这种方式滤波则必定会导致边缘被模糊掉

Benefits of technology

[0030]1、本发明基于FPGA实现过程的资源受限、对非线性运算难以实时完成的特点,对双边滤波进行改进,吸取双边滤波同时考虑空间域和值域差别的优势,将非线性高斯运算转化为易于实现的权值因子进行加权处理,在保留了算法性能的同时,大大降低了实现的复杂度;能够在资源受限的FPGA中以较少计算资源实时实现改进双边滤波,满足保留边缘同时滤除高频噪声的要求;对实时性要求较高、同时产品功耗、体积受限的嵌入式产品场景,具有一定的应用价值。

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Abstract

The application relates to an improved image bilateral filtering method suitable for FPGA implementation, which comprises the following steps: determining the convolution kernel size of the bilateral filtering according to the algorithm performance requirement; setting the position weight of each point in the convolution region based on the convolution kernel size, and pre-setting a plurality of pixel weights based on the convolution kernel size; for the bilateral filtering of each convolution region, firstly, calculating the pixel difference between each neighborhood point in the region and the center point of the current region, sorting all neighborhood points according to the pixel difference, and assigning each neighborhood point after sorting according to the pre-set pixel weight; combining the position weight of each neighborhood point in the convolution region with the pixel weight to obtain the overall weight of each neighborhood point, and obtaining the bilateral filtering result of the convolution region through weighted average of the points in the convolution region; finally, performing bilateral filtering processing on the whole image according to the step length to obtain the image after bilateral filtering processing.
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Description

Technical Field

[0001] This invention relates to an improved bilateral image filtering method suitable for FPGA implementation, belonging to the field of computer vision and artificial intelligence application technology. Background Technology

[0002] Bilateral filtering has a wide range of applications in the field of image processing, such as denoising, demosaicing, optical flow estimation, etc. As a basic filtering module in image processing, it is widely used in image segmentation, target detection, target recognition and other fields.

[0003] Bilateral filtering is a nonlinear filtering algorithm that combines the spatial relationship between image pixels and their numerical values ​​to preserve edges without iterative computation. In principle, image filtering aims to remove noise and smooth the image. Traditional methods like mean filtering and Gaussian filtering only consider the spatial domain, assuming neighboring pixels should have similar characteristics. This assumption is not satisfied at the edge of an image, inevitably leading to blurred edges. To achieve edge preservation, bilateral filtering combines spatial and numerical domains, maintaining edge accuracy while ensuring filtering effectiveness. Bilateral filtering is a method that combines spatial proximity and pixel value similarity. During filtering, this method considers both spatial proximity and color similarity information, filtering out noise, smoothing the image, and preserving edges simultaneously.

[0004] Since bilateral filtering requires grayscale information from the neighborhood of each center point to determine its coefficients, and each coefficient is the product of two Gaussian functions, the computational load is large. Therefore, its speed is much slower than that of general filtering, and the computational load increases at a rate equal to the square of the kernel size.

[0005] If bilateral filtering is implemented on FPGA, the Gaussian function calculated for each pixel in the field will become the bottleneck of FPGA computing, requiring a lot of computing resources and time, making it difficult to achieve real-time processing. Therefore, improving bilateral filtering so that it can be implemented quickly in FPGA will have good practical value. Summary of the Invention

[0006] To address the problems existing in the prior art, this invention proposes an improved bilateral image filtering method suitable for FPGA implementation.

[0007] The technical solution of the present invention is as follows:

[0008] On one hand, the present invention provides an improved bilateral image filtering method suitable for FPGA implementation, comprising the following steps:

[0009] Set the kernel size for the bilateral filter;

[0010] The position weights of each neighboring point in the convolution region are set based on the kernel size, and multiple pixel difference weights are pre-set based on the kernel size.

[0011] For bilateral filtering of each convolutional region, first calculate the pixel difference between each neighboring point in the convolutional region and the center point of the current convolutional region. Sort all neighboring points according to the pixel difference. Assign pixel weights to each sorted neighboring point according to the pre-set pixel difference weights and the sorting results.

[0012] The position weight and pixel weight of each point in the convolution region are combined to obtain the overall weight of each point. The overall weight and pixel value of each point are then weighted and summed to obtain the bilateral filtering result of the convolution region.

[0013] Finally, bilateral filtering is performed on the entire image based on the step size to obtain the image after bilateral filtering.

[0014] In a preferred embodiment of the present invention, each neighboring point within the convolution region is assigned a different position weight according to its Euclidean distance from the center point, with the point closer to the center point having a larger weight.

[0015] In a preferred embodiment of the present invention, the preset pixel difference weights are set according to the number of neighboring points in the convolution region, and the size of each pixel difference weight is set according to a preset rule.

[0016] In a preferred embodiment of the present invention, all neighboring points are arranged in ascending order according to the pixel difference, and the neighboring point with the smallest pixel difference is assigned the largest pixel difference weight, and so on, and all neighboring points are assigned values.

[0017] In a preferred embodiment of the present invention, the product of the position weight and the pixel weight of each neighboring point in the convolution region is used as the overall weight of each neighboring point, and the sum of the overall weights of all points in the convolution region is 1.

[0018] On the other hand, the present invention also provides an improved bilateral filtering system suitable for FPGA implementation, including an image bilateral filtering module, which performs bilateral filtering processing on the image through the following steps:

[0019] Set the kernel size for the bilateral filter;

[0020] The position weights of each neighboring point in the convolution region are set based on the kernel size, and multiple pixel difference weights are pre-set based on the kernel size.

[0021] For bilateral filtering of each convolutional region, first calculate the pixel difference between each neighboring point in the convolutional region and the center point of the current convolutional region. Sort all neighboring points according to the pixel difference. Assign pixel weights to each sorted neighboring point according to the pre-set pixel difference weights and the sorting results.

[0022] The position weight and pixel weight of each point in the convolution region are combined to obtain the overall weight of each point. The overall weight and pixel value of each point are then weighted and summed to obtain the bilateral filtering result of the convolution region.

[0023] Finally, bilateral filtering is performed on the entire image based on the step size to obtain the image after bilateral filtering.

[0024] In a preferred embodiment of the present invention, each point in the convolution region is assigned a different position weight according to its Euclidean distance from the center point, and the closer the point is to the center point, the higher the weight.

[0025] The preset pixel weights are set according to the number of neighboring points in the convolution region. Each weight is set according to a specific rule. All neighboring points are arranged from smallest to largest according to the pixel difference. The smallest neighboring point is assigned the largest pixel weight, and so on, assigning values ​​to all neighboring points.

[0026] In a preferred embodiment of the present invention, the product of the position weight and the pixel weight of each point in the convolution region is used as the overall weight of each point, and the sum of the overall weights of all points in the convolution region is 1.

[0027] In another aspect, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement an improved bilateral filtering implementation method suitable for FPGA implementation as described in any embodiment of the present invention.

[0028] In another aspect, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements an improved bilateral filtering implementation method suitable for FPGA implementation as described in any embodiment of the present invention.

[0029] The present invention has the following beneficial effects:

[0030] 1. This invention addresses the resource constraints and real-time limitations of FPGA implementation, particularly in handling nonlinear operations. It improves bilateral filtering by considering both spatial and value domain differences, transforming nonlinear Gaussian operations into easily implemented weighting factors. This significantly reduces implementation complexity while preserving algorithm performance. The improved bilateral filtering can be implemented in real-time on resource-constrained FPGAs with minimal computational resources, meeting the requirements of edge preservation and high-frequency noise removal. It has significant application value for embedded products with high real-time requirements and limited power consumption and size. Attached Figure Description

[0031] Figure 1 This is a flowchart of the present invention;

[0032] Figure 2 This is a diagram showing the position weight distribution when the kernel size is 3 in this invention. Detailed Implementation

[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] It should be understood that the step numbers used in the text are for ease of description only and are not intended to limit the order in which the steps are performed.

[0035] It should be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0036] The terms “comprising” and “including” indicate the presence of the described feature, whole, step, operation, element and / or component, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0037] The term “and / or” refers to any combination of one or more of the associated listed items, as well as all possible combinations, and includes these combinations.

[0038] Example 1:

[0039] See Figure 1 An improved bilateral image filtering method suitable for FPGA implementation includes the following steps:

[0040] Set the kernel size for the bilateral filter;

[0041] The position weights of each neighboring point in the convolution region are set based on the kernel size, and multiple pixel difference weights are pre-set based on the kernel size.

[0042] For bilateral filtering of each convolutional region, first calculate the pixel difference between each neighboring point in the convolutional region and the center point of the current convolutional region. Sort all neighboring points according to the pixel difference. Assign pixel weights to each sorted neighboring point according to the pre-set pixel difference weights and the sorting results.

[0043] The position weight and pixel weight of each point in the convolution region are combined to obtain the overall weight of each point. The overall weight and pixel value of each point are then weighted and summed to obtain the bilateral filtering result of the convolution region.

[0044] Finally, bilateral filtering is performed on the entire image based on the step size to obtain the image after bilateral filtering.

[0045] Specifically, in this embodiment:

[0046] Set the bilateral filter convolution kernel size K=3, and the convolution region size of a single bilateral filter is 3×3;

[0047] In a preferred embodiment of this invention, each neighboring point within the convolution region is assigned a different position weight according to its Euclidean distance from the center point, with the point closer to the center point having a larger weight.

[0048] Specifically, in this embodiment:

[0049] Based on the Euclidean distances between the eight neighboring points in the convolution region and the center point, and since the convolution region size is 3×3, the Euclidean distance between each neighboring point and the center point is the same. The weights of each point are set as follows: Figure 2 As shown.

[0050] In a preferred embodiment of this invention, the preset pixel difference weights are set according to the number of neighboring points in the convolution region, and the size of each pixel difference weight is set according to a preset rule.

[0051] Specifically, in this embodiment:

[0052] The convolution region has 8 neighboring points, so a total of 8 pixel weights need to be set. Since the sum of the weights of all points within the convolution region must be 1, and the positional weights of the 8 neighboring points are all equal... The position weight of the center point is Therefore, the weights for the 8 pixel differences are set as follows: The pixel difference weight at the center point is set to 1.

[0053] In a preferred embodiment of this invention, all neighboring points are arranged in ascending order based on the pixel difference, and the neighboring point with the smallest pixel difference is assigned the largest pixel difference weight, and so on, assigning values ​​to all neighboring points.

[0054] Specifically, in this embodiment:

[0055] First, calculate the pixel difference between each of the eight neighboring points and the center point. Then, sort all the neighboring points in ascending order based on the pixel difference. Assign the largest pixel difference weight to the point with the smallest pixel difference, and so on, to obtain the pixel weight w of the eight neighboring points within the convolution region. r (i,,,).

[0056] In a preferred embodiment of this invention, the product of the position weight and pixel weight of each neighboring point in the convolution region is used as the overall weight of each neighboring point, and the sum of the overall weights of all points in the convolution region is 1.

[0057] Specifically, in this embodiment:

[0058] Multiply the pixel weights and position weights of the eight neighboring points respectively to obtain the overall weight of the eight neighboring points. This requires that the sum of the overall weights of all points within the region is 1, i.e., the overall weight w(i,j,k,l) ​​= w d (i,,,)×w r (i,,,), and ∑ k,l w(i,j,k,l)=1.

[0059] Finally, based on the step size, shift filtering is performed on both rows and columns of the entire image to complete the bilateral filtering process for the entire image.

[0060] Example 2:

[0061] An improved bilateral filtering system suitable for FPGA implementation is characterized by including an image bilateral filtering module, which performs bilateral filtering processing on the image through the following steps:

[0062] Set the kernel size for the bilateral filter;

[0063] The position weights of each neighboring point in the convolution region are set based on the kernel size, and multiple pixel difference weights are pre-set based on the kernel size.

[0064] For bilateral filtering of each convolutional region, first calculate the pixel difference between each neighboring point in the convolutional region and the center point of the current convolutional region. Sort all neighboring points according to the pixel difference. Assign pixel weights to each sorted neighboring point according to the pre-set pixel difference weights and the sorting results.

[0065] The position weight and pixel weight of each point in the convolution region are combined to obtain the overall weight of each point. The overall weight and pixel value of each point are then weighted and summed to obtain the bilateral filtering result of the convolution region.

[0066] Finally, bilateral filtering is performed on the entire image according to the step size to obtain the image after bilateral filtering.

[0067] This module is used to implement the functions in Embodiment 1, and will not be described in detail here.

[0068] Example 3:

[0069] This embodiment proposes an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements the method described in any embodiment of the present invention.

[0070] Example 4:

[0071] This embodiment proposes a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the method described in any embodiment of the present invention.

[0072] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, A and B simultaneously, or B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c can represent: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, and c can be single or multiple.

[0073] Those skilled in the art will recognize that the units and algorithm steps described in the embodiments disclosed herein can be implemented using electronic hardware, computer software, or a combination of electronic hardware and software. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0074] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0075] In the several embodiments provided in this application, any function, if implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0076] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. An improved bilateral image filtering method suitable for FPGA implementation, characterized in that, Includes the following steps: Set the kernel size of the bilateral filter to 3×3; The position weights of each point in the convolution region are set based on the kernel size. These position weights are set according to the Euclidean distance from the center point, with points closer to the center point having larger position weights. The position weight of the center point is 1 / 2, and the position weights of the eight neighboring points are all 1 / 4. Multiple pixel difference weights are pre-set based on the kernel size and the position weights. The number of pixel difference weights is the same as the number of neighboring points, and the pixel difference weight of the center point is 1. For bilateral filtering of each convolutional region, firstly calculate the pixel difference between each neighboring point in the convolutional region and the center point of the current convolutional region. Then, sort all neighboring points from smallest to largest according to the pixel difference. Assign the largest pixel difference weight to the neighboring point with the smallest pixel difference. And so on, assign the pre-set pixel difference weights to each sorted neighboring point in turn as the pixel weight of each neighboring point, and use the pixel difference weight of the center point as the pixel weight of the center point. The product of the position weight and pixel weight of each point in the convolution region is used as the overall weight of that point. The values ​​of the multiple pixel difference weights are chosen such that the sum of the overall weights of all points in the convolution region is 1. The bilateral filtering result of the convolution region is obtained by weighted summation based on the overall weight and pixel value of each point. Finally, bilateral filtering is performed on the entire image based on the step size to obtain the image after bilateral filtering.

2. The improved bilateral image filtering method suitable for FPGA implementation according to claim 1, characterized in that, The pixel difference weights are 1 / 2, 1 / 2, 1 / 4, 1 / 4, 1 / 8, 1 / 8, 1 / 8, and 1 / 8, respectively.

3. An improved bilateral filtering system suitable for FPGA implementation, characterized in that, This includes an image bilateral filtering module, which performs bilateral filtering on the image through the following steps: Set the kernel size of the bilateral filter to 3×3; The position weights of each point in the convolution region are set based on the kernel size. These position weights are set according to the Euclidean distance from the center point, with points closer to the center point having larger position weights. The position weight of the center point is 1 / 2, and the position weights of the eight neighboring points are all 1 / 4. Multiple pixel difference weights are pre-set based on the kernel size and the position weights. The number of pixel difference weights is the same as the number of neighboring points, and the pixel difference weight of the center point is 1. For bilateral filtering of each convolutional region, firstly calculate the pixel difference between each neighboring point in the convolutional region and the center point of the current convolutional region. Then, sort all neighboring points from smallest to largest according to the pixel difference. Assign the largest pixel difference weight to the neighboring point with the smallest pixel difference. And so on, assign the pre-set pixel difference weights to each sorted neighboring point in turn as the pixel weight of each neighboring point, and use the pixel difference weight of the center point as the pixel weight of the center point. The product of the position weight and pixel weight of each point in the convolution region is used as the overall weight of that point. The values ​​of the multiple pixel difference weights are chosen such that the sum of the overall weights of all points in the convolution region is 1. The bilateral filtering result of the convolution region is obtained by weighted summation based on the overall weight and pixel value of each point. Finally, bilateral filtering is performed on the entire image based on the step size to obtain the image after bilateral filtering.

4. An improved bilateral filtering system suitable for FPGA implementation according to claim 3, characterized in that, The pixel difference weights are 1 / 2, 1 / 2, 1 / 4, 1 / 4, 1 / 8, 1 / 8, 1 / 8, and 1 / 8, respectively.

5. An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method as described in claim 1 or 2.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in claim 1 or 2.

Citation Information

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