Control method of flyback power converter and power controller

Abstract

The present invention provides a control method and a power controller for a flyback power converter. The flyback power converter has a primary side and a secondary side. The power controller includes a sampler, a compensation circuit, a pulse width modulator, and a voltage limiter. The sampler samples a feedback voltage of the primary side to generate a sample voltage, which reflects an output voltage of the secondary side. The compensation circuit compares the sample voltage with a target voltage to generate a compensation voltage. The pulse width modulator provides a driving signal according to the compensation voltage to control a main power switch. The voltage limiter limits the feedback voltage to a preset state. The preset state is associated with the sample voltage.

Description

Technical Field

[0001] This invention generally relates to a control method and power controller for a flyback power converter, and more particularly to a control method and power controller that enables a primary-side controlled flyback power converter to more accurately detect the output voltage. Background Technology

[0002] Flyback power converters are widely used in low- to medium-power AC / DC power converters due to their simple architecture and galvanic isolation between the primary and secondary sides. In a flyback power converter, the power controller on the primary side controls the energy stored in a transformer by an input power source on the primary side before releasing the stored energy to the secondary side to establish an output voltage. The amount of stored energy must be regulated to stabilize the output voltage.

[0003] A typical flyback power converter may be operated using two different control methods: primary-side regulation (PSR) and secondary-side regulation (SSR). In PSR, the primary-side power controller detects the reflected voltage on the primary side of the transformer to indirectly detect the output voltage on the secondary side, thus regulating the amount of energy stored in the transformer. In SSR, additional circuitry on the secondary side detects the output voltage, and then transmits the detection result to the primary-side power controller via isolation components such as optocouplers, capacitors, or an additional transformer. The power controller then regulates the amount of energy stored.

[0004] In comparison, a PSR requires fewer circuit components than an SSR. However, in a PSR, the reflected voltage accurately reflects the secondary-side output voltage only under certain appropriate conditions. The ability to accurately detect the secondary-side output voltage on the primary side is a goal pursued by many PSR flyback power converters. Summary of the Invention

[0005] This invention provides a control method applicable to a flyback power converter controlled on the primary side, having a primary side and a secondary side isolated from each other, comprising: receiving a feedback voltage on the primary side; providing a drive signal to turn off a main power switch; limiting the feedback voltage to a preset state after the main power switch is turned off, wherein the preset state is associated with a sampled voltage; sampling the feedback voltage at a sampling time point to update the sampled voltage, the sampled voltage reflecting an output voltage located on the secondary side; and providing the drive signal to control the main power switch based on the sampled voltage.

[0006] This invention provides a power controller suitable for a primary-side controlled flyback power converter. The flyback power converter has a primary side and a secondary side that are isolated from each other. The power controller includes a sampler, a compensation circuit, a pulse width modulator, and a voltage limiter. The sampler samples a feedback voltage on the primary side to generate a sampled voltage that reflects an output voltage on the secondary side. The compensation circuit compares the sampled voltage with a target voltage to generate a compensation voltage. The pulse width modulator provides a drive signal based on the compensation voltage to control a main power switch. The voltage limiter limits the feedback voltage to a preset state. This preset state is associated with the sampled voltage. Attached Figure Description

[0007] Figure 1 This is a flyback power converter using PSR.

[0008] Figure 2 Display a power controller.

[0009] Figure 3 show Figure 1 and 2 Some signal waveforms in the image.

[0010] Figure 4 This invention illustrates a power controller implemented according to the present invention.

[0011] Figure 5 An example is shown: a voltage limiter.

[0012] Figure 6 show Figure 4 and 5 Some possible signal waveforms.

[0013] Figure 7 An example is shown: a voltage limiter.

[0014] [Symbol Explanation]

[0015] 100 flyback power converter

[0016] 102, 102a, 102b Power Controllers

[0017] 162 Samplers

[0018] 164 Compensation Circuit

[0019] 166 Pulse Width Modulator

[0020] 180, 180a, 180b Voltage Limiters

[0021] 182 operational amplifier

[0022] 184 Switch

[0023] 186 and 188 comparators

[0024] Switches 190 and 192

[0025] CCOM compensation capacitor

[0026] COUT Output Capacitor

[0027] CS current sensing terminal

[0028] DO rectifier diode

[0029] DRV driver end

[0030] Facebook Feedback

[0031] ISEC secondary side current

[0032] LA auxiliary winding

[0033] LP primary winding

[0034] LS secondary winding

[0035] GM transconductor

[0036] GNDIN input ground wire

[0037] GNDOUT output ground wire

[0038] PRM Junior Side

[0039] Voltage divider resistors R1 and R2

[0040] RCS current sensing resistor

[0041] SCLP clamping signal

[0042] SDRV drive signal

[0043] SEC secondary side

[0044] SW1 Main Power Switch

[0045] TSAM sampling time point

[0046] TDIS release time

[0047] TF Transformer

[0048] TFRE Free Time

[0049] TOFF closing time

[0050] TON Opening Time

[0051] TSH sampling pulse

[0052] VAUX winding voltage

[0053] VCOM compensation voltage

[0054] VCS current detection signal

[0055] VFB feedback voltage

[0056] VIN Input Voltage

[0057] VOUT output voltage

[0058] VREF target voltage

[0059] VSAM sampling voltage Detailed Implementation

[0060] In this specification, some identical symbols are used to represent elements having the same or similar structure, function, or principle, which can be inferred by those skilled in the art based on the teachings of this specification. For the sake of brevity, elements with the same symbols will not be repeated.

[0061] Figure 1 The flyback power converter 100 employing a PSR has isolated primary-side PRM and secondary-side SEC. On the primary-side PRM, the primary winding LP of the transformer TF, the main power switch SW1, and the current sensing resistor RCS are connected in series between the input voltage VIN and the input ground GNDIN. The power controller 102 provides a drive signal SDRV to switch the main power switch SW1. On the secondary-side SEC, the rectifier diode DO and the secondary winding LS of the transformer TF are connected in series between the output voltage VOUT and the output ground GNDOUT. The transformer TF also has an auxiliary winding LA on the primary-side PRM. One end of the auxiliary winding LA has a winding voltage VAUX. Voltage divider resistors R1 and R2 are connected between the two ends of the auxiliary winding LA, forming a voltage divider circuit to provide the feedback voltage VFB to the feedback terminal FB of the power controller 102.

[0062] When the drive signal SDRV turns on the main power switch SW1, providing a short circuit (on time TON), the input voltage VIN and the input ground wire GNDIN store energy in the primary winding LP, and also in the transformer TF. When the drive signal SDRV turns on and the main power switch SW1 turns off (off time TOFF), the electromagnetic energy stored in the transformer TF can be released and converted into a secondary current ISEC flowing through the secondary winding LS. This current, through the rectifier diode DO, charges the output capacitor COUT to establish the output voltage VOUT, providing power to the load (not shown).

[0063] Figure 2 The power controller 102a can be used as... Figure 1 The power controller 102a includes a sampler 162, a compensation circuit 164, and a pulse width modulator 166. The sampler 162 samples the feedback voltage VFB to generate a sampled voltage VSAM. The compensation circuit 164 includes a transconductance transformer GM and a compensation capacitor CCOM. The transconductance transformer GM compares the sampled voltage VSAM with the target voltage VREF to charge or discharge the compensation capacitor CCOM, thereby generating a compensation voltage VCOM. The pulse width modulator 166 provides a drive signal SDRV based on the compensation voltage VCOM and the current detection signal VCS at the current detection terminal CS. SDRV, through the drive terminal DRV, controls the on-time TON or switching frequency of the main power switch SW1. For example, if the sampled voltage VSAM is higher than the target voltage VREF, it means the current output voltage VOUT is too high. Therefore, the compensation voltage VCOM decreases, and the pulse width modulator 166 shortens the on-time TON, reducing the electromagnetic energy stored in the transformer TF and also reducing the energy supplied to the capacitor COUT, thus lowering the output voltage VOUT.

[0064] Figure 3 The displayed signal waveforms, from top to bottom, represent: Figure 2 Drive signal SDRV, Figure 1 Secondary side current ISEC, Figure 2 The ideal feedback voltage VFB in Figure 2 The sampling pulse TSH generated by the sampler 162, and Figure 2 Three possible feedback voltages VFB in reality.

[0065] When the drive signal SDRV turns on the main power switch SW1, the on-time is TON; when the drive signal SDRV turns off the main power switch SW1, the off-time is TOFF, as shown below. Figure 3 As shown. At the start of the off-time TOFF, the transformer TF begins to release its stored electromagnetic energy, and the secondary-side current ISEC charges the output capacitor COUT. The period during which the secondary-side current ISEC is greater than 0A can be considered the energy release time TDIS of the transformer TF, as shown... Figure 3 As shown. In some embodiments, the energy release time TDIS can also be the time from the start of the off-time TOFF to before the feedback voltage VFB drops rapidly. Within the energy release time TDIS, the ideal feedback voltage VFB is approximately a constant value, reflecting the output voltage VOUT. Therefore, the sampler 162 samples the feedback voltage VFB at approximately the sampling time tsam when the sampling pulse TSH occurs, to update or generate... Figure 2The sampling voltage VSAM in the sample is equivalent to the voltage VOUT used to detect the output voltage.

[0066] However, as Figure 3 As shown, the actual feedback voltage VFB that may occur in reality does not remain stable at a constant value during the energy release time TDIS, unlike the ideal feedback voltage VFB. At the beginning of the actual energy release time TDIS, the feedback voltage VFB may exhibit slow rises, oscillations, and sudden spikes due to parasitic resistance, inductance, and capacitance. It will take a considerable amount of time before it stabilizes at the theoretically constant value, as... Figure 3 The three possible feedback voltages VFB are shown in the image. Therefore, the sampling time point tsam defined by the sampling pulse TSH is very important. If the sampling time point tsam occurs before the feedback voltage VFB has stabilized, the resulting sampled voltage VSAM will not accurately reflect the output voltage VOUT, and thus will not be able to stabilize the output voltage VOUT correctly. Moreover, in some cases, the release time TDIS is not long enough for the feedback voltage VFB to stabilize. In such cases, regardless of when the sampling time point tsam is defined within the release time TDIS, the sampled voltage VSAM will not reflect the output voltage VOUT at all.

[0067] Figure 4 The power controller 102b implemented according to the present invention can be used as... Figure 1 The power controller 102 in the middle. Figure 4 and Figure 2 For identical or similar parts, please refer to the previous ones. Figure 2 I learned this from his teachings, so I won't repeat it further. Compared to Figure 2 The power controller 102a, Figure 4 The power controller 102b additionally has a voltage limiter 180 connected to the feedback terminal FB, which controls the feedback voltage VFB based on the sampled voltage VSAM. The voltage limiter 180 limits the feedback voltage VFB to a preset state, which is related to the sampled voltage VSAM.

[0068] Figure 5Example shows voltage limiter 180a. Voltage limiter 180a has operational amplifier 182 and switch 184. Operational amplifier 182 acts as a voltage follower, serving as a buffer for the sampled voltage VSAM. Switch 184 is connected to an output of operational amplifier 182. Simply put, voltage limiter 180a limits the feedback voltage VFB to a preset state such that the feedback voltage VFB is approximately equal to the sampled voltage VSAM. During the clamping time TCLP, the clamping signal SCLP opens switch 184, causing operational amplifier 182 to pull the feedback voltage VFB to the sampled voltage VSAM.

[0069] Figure 6 show Figure 4 and 5 Some possible signal waveforms are shown. From top to bottom, they represent... Figure 4 Drive signal SDRV, Figure 1 Secondary side current ISEC, Figure 4 The ideal feedback voltage VFB in Figure 4 The sampling pulse TSH generated by sampler 162 Figure 4 The three possible feedback voltages VFB and the clamping signal SCLP are included. Figure 6 and Figure 3 For identical or similar parts, please refer to the previous ones. Figure 3 I learned this from his teachings, so I won't repeat it further. Compared to Figure 3 , Figure 6 The three actual possible feedback voltages VFB can reach a steady state relatively quickly, and the resulting sampled voltage VSAM can faithfully reflect the output voltage VOUT. From... Figure 6 From the waveform of the clamping signal SCLP, it can be seen that the clamping time TCLP begins approximately shortly after the off time TOFF. The free time TFRE exists between the clamping time TCLP and the sampling time tsam. (Similar to...) Figure 6 As shown in the diagram, there are three possible feedback voltages VFB. During the clamping time TCLP, voltage limiter 180a limits the feedback voltage VFB to approximately equal to the sampling voltage VSAM. Afterwards, during the free time TFRE, the feedback voltage VFB is no longer controlled by voltage limiter 180a, and it can freely and faithfully reflect the current output voltage VOUT. Therefore, the sampling voltage VSAM updated by sampler 162 at sampling time point tsam can accurately detect the output voltage VOUT.

[0070] In one embodiment, the lengths of both the clamping time TCLP and the free time TFRE are approximately one-third of the release time TDIS. In one embodiment, the power controller 102b detects the release time TDIS of the transformer TF during a shutdown period and records its length LEN. In the next switching cycle, the first 1 / 3*LEN of the shutdown time TOFF is used as the clamping time TCLP, and the feedback voltage VFB is limited by the voltage limiter 180a.

[0071] although Figure 5 The voltage limiter 180a in the invention limits the feedback voltage VFB only during the clamping time TCLP, but the invention is not limited thereto. Figure 7 Example: Voltage limiter 180b includes comparators 186 and 188 and switches 190 and 192. Simply put, voltage limiter 180b approximately limits the feedback voltage VFB within a preset range, which includes the sampled voltage VSAM. For example, this preset range is within ±0.5V of the sampled voltage VSAM. When the feedback voltage VFB is 0.5V higher than the sampled voltage VSAM, comparator 186 opens switch 190, pulling down the feedback voltage VFB; when the feedback voltage VFB is 0.5V lower than the sampled voltage VSAM, comparator 188 opens switch 192, pulling up the feedback voltage VFB. Therefore, when voltage limiter 180b is applied, the feedback voltage VFB will be limited to within ±0.5V of the sampled voltage VSAM. For example, voltage limiter 180b only regulates the feedback voltage VFB during the off-time TOFF before the sampling time tsam; at other times, voltage limiter 180b does not regulate the feedback voltage VFB. The voltage limiter 180b can also pre-pull the feedback voltage VFB to near the sampling voltage VSAM, enabling the feedback voltage VFB to quickly reflect the output voltage VOUT.

[0072] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention shall be within the scope of the present invention.

Claims

1. A control method applicable to a flyback power converter with primary-side control, having mutually isolated primary and secondary sides, comprising: The primary side receives the feedback voltage. Provide a drive signal to turn off the main power switch; During the clamping period after the main power switch is turned off, the feedback voltage is limited to a preset state, wherein, This preset state is associated with the sampled voltage; At a sampling time point after the clamping time, the feedback voltage is sampled to update the sampled voltage, which reflects the output voltage located on the secondary side; and Based on the sampled voltage, the drive signal is provided to control the main power switch.

2. The control method as described in claim 1, comprising: After the main power switch is turned off, the feedback voltage is limited to a preset range including the sampled voltage.

3. The control method as described in claim 1, wherein, The clamping time is proportional to the closing time of the previous switching cycle.

4. The control method as described in claim 1, wherein, The flyback power converter includes a transformer with a primary winding, a secondary winding, and an auxiliary winding, and the feedback voltage is provided by the auxiliary winding through a voltage divider circuit.

5. A power controller suitable for primary-side control of a flyback power converter, the flyback power converter having mutually isolated primary and secondary sides, the power controller comprising: The sampler samples the feedback voltage on the primary side and generates a sampled voltage that reflects the output voltage on the secondary side. The compensation circuit compares the sampled voltage with the target voltage to generate a compensation voltage. A pulse width modulator provides a drive signal based on the compensation voltage to control the main power switch; as well as A voltage limiter is used to limit the feedback voltage to a preset state; The voltage limiter includes: An operational amplifier and a switch connected to the output of the operational amplifier; The switch is turned on during the clamping time to limit the feedback voltage to a preset state, which is associated with the sampling voltage, and the clamping time is earlier than the sampling time.

6. The power controller as described in claim 5, wherein, The voltage limiter is used to pull the feedback voltage down to the sampling voltage.

7. The power controller as described in claim 5, wherein, When the switch is turned on during the clamping time, the feedback voltage is limited to a preset range including the sampled voltage.

8. The power controller as claimed in claim 7, wherein, The clamping time is proportional to the closing time of the previous switching cycle.

9. The power controller as described in claim 5, wherein, The voltage limiter is used to limit the feedback voltage within a preset range, and the preset range includes the sampled voltage.

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