Multi-mode phased array element

Abstract

A phased array element includes: a transmitting section having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier; a first transformer and a second transformer, the first transformer being coupled to a power amplifier in one of the plurality of amplifier paths, the second transformer being coupled to a power amplifier in one of the plurality of amplifier paths, the secondary windings of each of the first transformer and the second transformer being coupled together through a common transformer segment; a transmitting phase shifter switchably coupled to the plurality of amplifier paths; a receiving section coupled to the second transformer, the receiving section having a receiving path having a low-noise amplifier (LNA); and a receiving phase shifter coupled to the LNA.

Description

Technical Field

[0001] This disclosure relates generally to electronic devices, and more specifically to radio frequency (RF) transmitters and receivers. Background Technology

[0002] Wireless communication devices and technologies are becoming increasingly prevalent. Wireless communication devices generally transmit and receive communication signals. These signals are typically processed by a variety of different components and circuits. In some modern communication systems, communication beams can be formed and manipulated in one or more directions. One type of beam control system uses what is known as a phased array or phased array antenna system. A phased array can use multiple different elements and antennas, each of which can handle the transmitted and / or received signals with a phase shift, resulting in the different elements of the phased array system handling slightly phase-shifted versions of the transmitted and / or received signals. Phased array systems can produce narrow, steerable, high-power communication beams. Phased array antenna systems can also form part of massively multi-input multiple-output (MIMO) systems. Summary of the Invention

[0003] Various embodiments of the systems, methods, and apparatuses within the scope of the appended claims each have several aspects, none of which individually governs the desired properties described herein. Without limiting the scope of the appended claims, some prominent features are described herein.

[0004] Details of one or more embodiments of the subject matter described in this specification are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages will become apparent from the description, drawings, and claims. Note that the relative dimensions in the following figures may not be drawn to scale.

[0005] One aspect of this disclosure provides a phased array element comprising a transmitting section having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier; a first transformer and a second transformer, the first transformer being coupled to a power amplifier in one of the plurality of amplifier paths, the second transformer being coupled to a power amplifier in one of the plurality of amplifier paths, the secondary windings of each of the first transformer and the second transformer being coupled together via a common transformer segment; a transmitting phase shifter switchably coupled to the plurality of amplifier paths; a receiving section coupled to the second transformer, the receiving section having a receiving path having a low-noise amplifier (LNA); and a receiving phase shifter coupled to the LNA.

[0006] Another aspect of this disclosure provides a method for processing millimeter-wave communication signals, including selectively amplifying the communication signal to one of a plurality of power levels for transmission, and controlling a variable capacitor to maintain frequency response when amplified to a power level.

[0007] Another aspect of this disclosure provides an apparatus including means for selectively amplifying a millimeter-wave communication signal to one of a plurality of power levels for transmission; means for selectively combining the amplified communication signal for transmission; and means for selectively maintaining a frequency response while selectively amplifying for each of the plurality of power levels.

[0008] Another aspect of this disclosure provides a phased array element, including: a transmit phase shifter; a plurality of transmit paths; a plurality of switches configured to selectively couple the transmit phase shifter to inputs of the plurality of transmit paths; a variable capacitor including a first terminal and a second terminal, the first terminal being coupled to a node between the plurality of switches and the transmit phase shifter, the second terminal being coupled to ground; a receive portion coupled to the output of one or more of the transmit paths, the receive portion including at least a first receive path including a low-noise amplifier (LNA); and a receive phase shifter coupled to the LNA. Attached Figure Description

[0009] In the accompanying drawings, unless otherwise indicated, the same reference numerals refer to the same parts in the various views. For reference numerals with letter character names (such as "102a" or "102b"), the letter character names can distinguish two similar parts or elements appearing in the same drawing. When it is intended that the reference numerals cover all parts with the same reference numerals in all drawings, the letter character names of the reference numerals may be omitted.

[0010] Figure 1 This is a schematic diagram showing a wireless device communicating with a wireless communication system.

[0011] Figure 2A This is a block diagram of a wireless device in which exemplary technologies of this disclosure may be implemented.

[0012] Figure 2B This is a block diagram of a wireless device in which exemplary technologies of this disclosure may be implemented.

[0013] Figure 2C To show in more detail Figure 2B A block diagram of some of the components in the component.

[0014] Figure 3 This is a block diagram of a phased array element according to an exemplary embodiment of the present disclosure.

[0015] Figure 4A This is a block diagram of a millimeter-wave (mmW) module with a 1x8 phased array according to an exemplary embodiment of the present disclosure.

[0016] Figure 4B This is a block diagram of a millimeter-wave (mmW) module with a 1x4 phased array according to an exemplary embodiment of the present disclosure.

[0017] Figure 5 This is a block diagram of a phased array element configured in HP TX mode according to an exemplary embodiment of the present disclosure.

[0018] Figure 6 This is a block diagram of a phased array element configured in LP TX mode according to an exemplary embodiment of the present disclosure.

[0019] Figure 7 This is a block diagram of a phased array element configured in RX mode according to an exemplary embodiment of the present disclosure.

[0020] Figure 8 This is a block diagram of a phased array element according to an exemplary embodiment of the present disclosure.

[0021] Figure 9 This is a block diagram of a phased array element according to an exemplary embodiment of the present disclosure.

[0022] Figure 10A , Figure 10B , Figure 10C and Figure 10D This is a block diagram illustrating a millimeter-wave RF module according to an exemplary embodiment of the present disclosure.

[0023] Figure 11 This is a flowchart illustrating an operational example of a signal amplification method.

[0024] Figure 12 This is a functional block diagram of a signal amplification device. Detailed Implementation

[0025] As used herein, the term “exemplary” means “serving as an example, instance or illustration”. Any aspect described herein as “exemplary” is not necessarily to be construed as being more preferred or advantageous than other aspects.

[0026] In communication systems using phased array antenna systems, it may be desirable to standardize the number of phased array elements that can be coupled to the phased array antenna, support multiple power output configurations using a single radio frequency integrated circuit (RFIC), and / or support multiple device types, such as user equipment (UE) and customer premises equipment (CPE), using a single RFIC module. It may also be desirable to eliminate the power combiner between the RFIC and the antenna or antenna array.

[0027] The goal is to reduce the cost of communication equipment without compromising key performance indicators (KPIs). Furthermore, it is desirable to use a single chip or design across multiple devices and / or device tiers. However, designs for different devices or tiers may not always provide consistent advantages or benefits. For example, premium-tier communication devices may use antennas to perform power combining, while mid-tier communication devices may use conducted power combining, which, for example, requires fewer antennas to reduce the overall size of the device. However, in some designs, conducted power combining can reduce the transmit efficiency and receive performance of phased array elements (such as the receiver noise figure (NF)).

[0028] Therefore, it is desirable to have a phased array element that can provide multiple power levels and can be incorporated into millimeter-wave integrated circuits (mmWICs), for example, enabling the implementation of a consistent phased array element and / or the use of antennas of different module sizes or numbers on different communication devices. For instance, the phased array element and the antenna module incorporated therein can be configured to support a high-power (HP) mode for intermediate-layer communication devices and a low-power (LP) mode for advanced-layer communication devices.

[0029] Figure 1 This illustrates a wireless device 110 communicating with a wireless communication system 120. The wireless communication system 120 can be a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a Wireless Local Area Network (WLAN) system, a 5G NR (New Radio) system, or some other wireless system. The CDMA system can implement Wideband CDMA (WCDMA), CDMA1X, Evolved Data Optimized (EVDO), Time Division Synchronous CDMA (TD-SCDMA), or some other version of CDMA. For simplicity, Figure 1 A wireless communication system 120 is shown, comprising two base stations 130 and 132 and a system controller 140. Generally, a wireless communication system may include any number of base stations and any set of network entities.

[0030] Wireless device 110 may also be referred to as user equipment (UE), mobile station, terminal, access terminal, subscriber unit, station, etc. Wireless device 110 may be a cellular phone, smartphone, tablet computer, wireless modem, personal digital assistant (PDA), handheld device, laptop computer, smartbook, netbook, tablet computer, cordless phone, medical device, device configured to connect to one or more other devices (e.g., via the Internet of Things), wireless local loop (WLL) station, Bluetooth device, etc. Wireless device 110 can communicate with wireless communication system 120. Wireless device 110 can also receive signals from broadcast stations (e.g., broadcast station 134) and / or from satellites (e.g., satellites 150, etc., in one or more Global Navigation Satellite Systems (GNSS)). Wireless device 110 may support one or more radio technologies for wireless communication (such as LTE, WCDMA, CDMA 1X, EVDO, TD-SCDMA, GSM, 802.11, 5G, etc.).

[0031] The wireless communication system 120 may also include a wireless device 160. In an exemplary embodiment, the wireless device 160 may be a wireless access point, or another wireless communication device that includes a wireless local area network (WLAN) or a portion thereof. In an exemplary embodiment, the wireless device 110 may be referred to as a customer premises equipment (CPE), which can communicate with the base station 130 and the wireless device 110 or other devices in the wireless communication system 120. In some embodiments, the CPE may be configured to communicate with the wireless device 160 using WAN signaling and to interface with the base station 130 based on such communication, rather than the wireless device 160 communicating directly with the base station 130. In an exemplary embodiment where the wireless device 160 is configured to communicate using WLAN signaling, the WLAN signal may include WiFi or other communication signals.

[0032] Wireless device 110 may support carrier aggregation, for example, as described in one or more LTE or 5G standards. In some embodiments, carrier aggregation is used to transmit a single data stream over multiple carriers, as opposed to separate carriers used for each data stream. Wireless device 110 is capable of operating in a wide range of communication bands, including those used by, for example, LTE, WiFi, 5G, or other communication bands. Wireless device 110 is also capable of communicating directly with other wireless devices without communicating over a network.

[0033] Generally, carrier aggregation (CA) can be classified into two types—intra-band CA and inter-band CA. Intra-band CA refers to operation on multiple carriers within the same frequency band. Inter-band CA refers to operation on multiple carriers in different frequency bands.

[0034] Figure 2AThis is a block diagram of a wireless device 200 in which exemplary technologies of this disclosure may be implemented. The wireless device 200 may, for example, be... Figure 1 An embodiment of the wireless device 110 illustrated.

[0035] Figure 2A An example of a transceiver 220 with a transmitter 230 and a receiver 250 is shown. Generally, signal conditioning in the transmitter 230 and receiver 250 can be performed by one or more stages such as amplifiers, filters, up-converters, down-converters, etc. These circuit blocks can be connected to… Figure 2A The configurations shown are arranged differently. Furthermore, Figure 2A Other circuit blocks, not shown, may also be used to regulate signals in transmitter 230 and receiver 250. Unless otherwise stated, Figure 2A Any signal or any other diagram in the accompanying figure may be single-ended or differential. Figure 2A Some circuit blocks can also be omitted.

[0036] exist Figure 2A In the example shown, wireless device 200 generally includes a transceiver 220 and a data processor 210. Data processor 210 may include a processor 296 operatively coupled to memory 298. Memory 298 may be configured to store data and program code, generally indicated by reference numeral 299, and may generally include analog and / or digital processing components. Transceiver 220 includes a transmitter 230 and a receiver 250 supporting bidirectional communication. Generally, wireless device 200 may include any number of transmitters and / or receivers for any number of communication systems and frequency bands. All or part of transceiver 220 may be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixer signal ICs, etc.

[0037] Transmitters or receivers can be implemented using either a superheterodyne architecture or a direct conversion architecture. In a superheterodyne architecture, the signal undergoes frequency conversion between radio frequency (RF) and baseband in multiple stages; for example, for a receiver, it might be converted from RF to intermediate frequency (IF) in one stage and then from IF to baseband in another. In a direct conversion architecture, the signal undergoes frequency conversion between RF and baseband within a single stage. Superheterodyne and direct conversion architectures can use different circuit blocks and / or have different requirements. Figure 2A In the example shown, transmitter 230 and receiver 250 are implemented using a direct conversion architecture.

[0038] In the transmission path, data processor 210 processes the data to be transmitted and provides in-phase (I) and quadrature (Q) analog output signals to transmitter 230. In an exemplary embodiment, data processor 210 includes digital-to-analog converters (DACs) 214a and 214b for converting digital signals generated by data processor 210 into I and Q analog output signals (e.g., I and Q output currents) for further processing. In other embodiments, DACs 214a and 214b are included in transceiver 220, and data processor 210 provides data (e.g., I and Q data) digitally to transceiver 220.

[0039] Within transmitter 230, low-pass filters 232a and 232b filter the I and Q analog transmit signals, respectively, to remove unwanted images caused by the previous digital-to-analog conversion. Amplifiers (Amps) 234a and 234b amplify the signals from low-pass filters 232a and 232b, respectively, and provide the I and Q baseband signals. Upconverter 240, with upconverters 241a and 241b, upconverts the I and Q baseband signals using the I and Q transmit (TX) local oscillator (LO) signals from TX LO signal generator 290, and provides the upconverted signal. Filter 242 filters the upconverted signal to remove unwanted images caused by upconversion and noise in the receive band. Power amplifier (PA) 244 amplifies the signal from filter 242 to obtain the desired output power level and provides the transmit RF signal. The transmit RF signal is routed through duplexer or switch 246 and transmitted via antenna 248. Although the examples discussed herein utilize I and Q signals, those skilled in the art will understand that transceiver components can be configured to utilize polarization modulation.

[0040] In the receiving path, antenna 248 receives the communication signal and provides the received RF signal, which is routed through duplexer or switch 246 and provided to low-noise amplifier (LNA) 252. Duplexer 246 is designed to operate at a specific RX to TX duplexer frequency interval, such that the RX signal is isolated from the TX signal. The received RF signal is amplified by LNA 252 and filtered by filter 254 to obtain the desired RF input signal. Downconverters 261a and 261b in downconverter 260 mix the output of filter 254 with the I and Q received (RX) LO signals (i.e., LO_I and LO_Q) from RX LO signal generator 280 to generate I and Q baseband signals. The I and Q baseband signals are amplified by amplifiers 262a and 262b and further filtered by low-pass filters 264a and 264b to obtain I and Q analog input signals, which are provided to data processor 210. In the illustrated exemplary embodiment, the data processor 210 includes analog-to-digital converters (ADCs) 216a and 216b for converting analog input signals into digital signals that will be further processed by the data processor 210. In some embodiments, ADCs 216a and 216b are included in a transceiver 220 and provide data to the data processor 210 digitally.

[0041] exist Figure 2A In this configuration, TX LO signal generator 290 generates I and Q TX LO signals for up-conversion, while RX LO signal generator 280 generates I and Q RX LO signals for down-conversion. Each LO signal is a periodic signal with a specific base frequency. Phase-locked loop (PLL) 292 receives timing information from data processor 210 and generates control signals for adjusting the frequency and / or phase of the TX LO signals from LO signal generator 290. Similarly, PLL 282 receives timing information from data processor 210 and generates control signals for adjusting the frequency and / or phase of the RX LO signals from LO signal generator 280.

[0042] In an exemplary embodiment, RX PLL 282, TX PLL 292, RX LO signal generator 280, and TX LO signal generator 290 may alternatively be combined into a single LO generator circuit 295, which may include a common or shared LO signal generator circuit system to provide TX LO and RX LO signals. Alternatively, separate LO generator circuits may be used to generate TX LO and RX LO signals.

[0043] Wireless device 200 may support carrier aggregation (CA) and may (i) receive multiple downlink signals transmitted by one or more cells on multiple downlink carriers at different frequencies, and / or (ii) transmit multiple uplink signals to one or more cells on multiple uplink carriers. However, those skilled in the art will understand that the aspects described herein can be implemented in systems, devices, and / or architectures that do not support carrier aggregation.

[0044] Some components of transceiver 220 Figure 2A The diagrams are functionally illustrated, and the illustrated configurations may or may not represent the physical device configurations in some embodiments. For example, as described above, transceiver 220 may be implemented in various integrated circuits (ICs), RF ICs (RFICs), mixer signal ICs, etc. In some embodiments, transceiver 220 is implemented on a substrate or board (such as a printed circuit board (PCB)) having various modules, chips, and / or components. For example, power amplifier 244, filter 242, and duplexer 246 may be implemented in separate modules or as discrete components, while the remaining components shown in transceiver 220 may be implemented in a single transceiver chip.

[0045] Power amplifier 244 may include one or more stages, such as driver stages, power amplifier stages, or other components, which may be configured to amplify communication signals at one or more frequencies, one or more frequency bands, and at one or more power stages. Depending on various factors, power amplifier 244 may be configured to operate using one or more driver stages, one or more power amplifier stages, one or more impedance matching networks, and may be configured to provide good linearity, efficiency, or a combination of good linearity and efficiency.

[0046] In an exemplary embodiment of the superheterodyne architecture, filter 242, PA 244, LNA 252, and filter 254 may be implemented separately from other components in transmitter 230 and receiver 250, and may be implemented on a millimeter-wave integrated circuit. Figure 2B The diagram illustrates an example superheterodyne architecture.

[0047] Figure 2B This is a block diagram of a wireless device in which exemplary technologies of this disclosure may be implemented. Figure 2B Certain components of the wireless device 200a (e.g., those indicated by the same reference numerals) can be configured similarly to Figure 2A The components in the wireless device 200 shown, and will not be repeated. Figure 2B Descriptions of items with the same number.

[0048] Wireless device 200a is an example of a heterodyne (or superheterodyne) architecture, where upconverter 240 and downconverter 260 are configured to process communication signals between baseband and intermediate frequency (IF). For example, upconverter 240 may be configured to provide an IF signal to upconverter 275. In an exemplary embodiment, upconverter 275 may include a summation function 278 and an upconverter mixer 276. Summation function 278 combines the I and Q outputs of upconverter 240 and provides a non-quadrature signal to mixer 276. The non-quadrature signal may be single-ended or differential. Mixer 276 is configured to receive the IF signal from upconverter 240 and the TX RF LO signal from TX RF LO signal generator 277, and provide the upconverted RF signal to phase shift circuitry system 281. Although PLL 292 is in Figure 2B The diagram is shown as being shared by signal generators 290 and 277, but a separate PLL can be implemented for each signal generator.

[0049] In an exemplary embodiment, the components in the phase-shift circuit system 281 may include one or more adjustable or variable phased array elements, and may receive one or more control signals from the data processor 210 via the connector 294, and operate the adjustable or variable phased array elements based on the received control signals.

[0050] In an exemplary embodiment, the phase shift circuit system 281 includes phase shifters 283 and phased array elements 287. Although three phase shifters 283 and three phased array elements 287 are shown for illustration purposes, the phase shift circuit system 281 may include more or fewer phase shifters 283 and phased array elements 287.

[0051] Each phase shifter 283 can be configured to receive an RF transmit signal from the up-converter 275, change its phase by a certain amount, and provide an RF signal to a corresponding phased array element 287. Each phased array element 287 may include a transmit and receive circuitry system comprising one or more filters, amplifiers, driver amplifiers, and power amplifiers. In some embodiments, the phase shifter 283 may be incorporated within the corresponding phased array element 287.

[0052] The output of the phase-shifting circuit system 281 is provided to the antenna array 248. In an exemplary embodiment, the antenna array 248 includes a plurality of antennas typically corresponding to the number of phase shifters 283 and phased array elements 287, such that each antenna element is coupled to a corresponding phased array element 287. In an exemplary embodiment, the phase-shifting circuit system 281 and the antenna array 248 may be referred to as a phased array.

[0053] In the receiving direction, the output of the phase-shift circuit system 281 is provided to the downconverter 285. In an exemplary embodiment, the downconverter 285 may include an I / Q generation function 291 and a downconverter mixer 286. In an exemplary embodiment, the mixer 286 downconverts the received RF signal provided by the phase-shift circuit system 281 to an IF signal based on the RX RF LO signal provided by the RX RF LO signal generator 279. The I / Q generation function 291 receives the IF signal from the mixer 286 and generates I and Q signals for the downconverter 260, which, as described above, downconverts the IF signal to baseband. Although PLL 282 is in Figure 2B The diagram is shown as being shared by signal generators 280 and 279, but a separate PLL can be implemented for each signal generator.

[0054] In some embodiments, upconverter 275, downconverter 285, and phase-shift circuitry 281 are implemented on a common integrated circuit. In some embodiments, summation function 278 and I / Q generation function 291 are implemented separately from mixers 276 and 286, such that mixers 276, 286, and phase-shift circuitry 281 are implemented on a common IC, but summation function 278 and I / Q generation function 291 are not implemented (e.g., summation function 278 and I / Q generation function 291 are implemented in another IC coupled to the IC having mixers 276, 286). In some embodiments, LO signal generators 277, 279 are included in a common IC. In some embodiments where the phase-shift circuitry is implemented on a common IC having 276, 286, 277, 278, 279, and / or 291, the common IC and antenna array 248 are included in a module that can be coupled to other components of transceiver 220 via connectors. In some embodiments, the phase-shifting circuit system 281, such as a chip on which the phase-shifting circuit system 281 is implemented, is coupled to the antenna array 248 via interconnects. For example, components of the antenna array 248 may be implemented on a substrate and coupled to the integrated circuit on which the phase-shifting circuit system 281 is implemented via flexible printed circuitry.

[0055] In some embodiments, Figure 2A The architecture shown and Figure 2B The architectures shown are all implemented within the same device. For example, wireless devices 110 or 200 can be configured to use... Figure 2A The architecture shown communicates with signals at frequencies below approximately 10 GHz and uses... Figure 2B The architecture shown communicates with signals at frequencies higher than approximately 10 GHz. In devices implementing both architectures, Figure 2A and Figure 2BOne or more components with the same reference numeral can be shared between the two architectures. For example, a signal that has been directly down-converted from RF to baseband and a signal that has been down-converted from RF to baseband via an IF stage can both be filtered by the same baseband filter 264. In other embodiments, a first version of filter 264 is included in the implementation. Figure 2A The second version of the filter 264 is included in the device architecture. Figure 2B In the device part of the architecture.

[0056] Figure 2C To show in more detail Figure 2B Block diagram 297 illustrates embodiments of some components. In an exemplary embodiment, upconverter 275 provides an RF transmit signal to phase-shift circuitry system 281, and downconverter 285 receives an RF receive signal from phase-shift circuitry system 281. In an exemplary embodiment, phase-shift circuitry system 281 includes an RF variable gain amplifier 284, a splitter / combiner 288, a phase shifter 283, and a phased array element 287. In an exemplary embodiment, phase-shift circuitry system 281 may be implemented on a millimeter-wave integrated circuit (mmWIC). In some such embodiments, upconverter 275 and / or downconverter 285 (or only mixers 276, 286) are also implemented on the mmWIC. In an exemplary embodiment, RF VGA 284 may include TX VGA 293 and RX VGA 289. In some embodiments, TX VGA 293 and RX VGA 289 may be implemented independently. In other embodiments, VGA 284 is bidirectional. In an exemplary embodiment, the splitter / combiner 288 may be an example of a power distribution network and a power combining network. In some embodiments, the splitter / combiner 288 may be implemented as a single component or as separate signal splitters and signal combiners. A phase shifter 283 is coupled to a corresponding phased array element 287. Each corresponding phased array element 287 is coupled to a corresponding antenna element in the antenna array 248. In an exemplary embodiment, the phase shifter 283 and the phased array element 287 receive control signals from the data processor 210 via a connector 294. Figure 2C The exemplary embodiment shown includes a 1x4 array having four phase shifters 283-1, 283-2, 283-3, and 283-n, four phased array elements 287-1, 287-2, 287-3, and 287-n, and four antennas 248-1, 248-2, 248-3, and 248-n. However, the 1x4 phased array is shown as an example only, and other configurations (such as 1x2, 1x6, 1x8, 2x3, and 2x4) are also possible.

[0057] Figure 3This is a block diagram of a phased array element 300 according to an exemplary embodiment of the present disclosure. In the exemplary embodiment, the phased array element 300 is an example of a single element that can be implemented in a phased array on a millimeter-wave integrated circuit (mmWIC). The phased array element 300 may be from... Figure 2B , Figure 2C Examples of any phased array element 287.

[0058] In an exemplary embodiment, the phased array element 300 may include a transmitting section 310 and a receiving section 360. In an exemplary embodiment, the transmitting section 310 may include a phase shifter 314, a variable gain amplifier 316, a variable capacitor 317, one or more amplifier paths (e.g., exemplary amplifier paths 320 and 324 are shown), and a magnetic circuit 330.

[0059] Phase shifter 314 can receive signals from signal splitter (such as...) via connector 312. Figure 2C The signal transmitted by the splitter / combiner 288. In an exemplary embodiment, the signal on connector 312 may be a radio frequency (RF) signal provided by a mixer circuit. In an exemplary embodiment, phase shifter 314 may receive a control signal via connector 294, which controls the phase of the transmit signal provided to VGA 316 via connector 315. In an exemplary embodiment, phase shifter 314 changes the phase of the signal on connector 312 by a certain amount based on the control signal provided via connector 294, which may be between 0 degrees and 360 degrees.

[0060] Figure 3 The exemplary embodiment shown includes a phased array element 287 ( Figure 2C An example of a phase shifter in ), and phase shifter 314 is a phase shifter 283 ( Figure 2C An exemplary embodiment of ).

[0061] The variable gain amplifier 316 may include one or more stages, with additional stages shown as dotted lines. For example, at millimeter-wave frequencies, multiple stages of the VGA can be used to generate desired gain and power control. In an exemplary embodiment, the VGA 316 may receive a control signal via connector 294 that controls the gain and power of the transmit signals supplied to amplifier paths 320 and 324 via connector 318.

[0062] In an exemplary embodiment, amplifier path 320 may include switch 321, driver amplifier 322, and power amplifier 323. In an exemplary embodiment, amplifier path 324 may include switch 325, driver amplifier 326, and power amplifier 327. In an exemplary embodiment, switches 321 and 325 may receive a control signal via connector 294, which controls whether one or both of amplifier paths 320 and 324 are connected to the transmit signal on connector 318.

[0063] In an exemplary embodiment, the magnetic circuit 330 includes transformers 331 and 335. In an exemplary embodiment, transformer 331 includes a primary winding 332, a secondary winding 333, and a tertiary winding 334. In an exemplary embodiment, transformer 335 includes a primary winding 336, a secondary winding 337, and a tertiary winding 338.

[0064] In an exemplary embodiment, the secondary winding 333 of transformer 331 and the secondary winding 337 of transformer 335 are coupled together via transformer segment 339. In an exemplary embodiment, transformer segment 339 can be selectively coupled to system ground via switch 302. In an exemplary embodiment, transformer segment 339 can be referred to as a common transformer segment because it forms part of the secondary windings 333 and 337. In an exemplary embodiment, switch 302 can receive control signals via connector 294. The secondary winding 333 of transformer 331 can also be coupled to system ground via connector 306. The secondary winding 337 of transformer 335 can provide an output to an antenna element via connector 304.

[0065] In an exemplary embodiment, power amplifier 323 is coupled to primary winding 332, and power amplifier 327 is coupled to primary winding 336.

[0066] In an exemplary embodiment, the three-stage winding 334 of the first transformer 331 can be coupled to AC ground via connector 341, and can be coupled to impedance 344 via connector 342.

[0067] In an exemplary embodiment, the receiving section 360 may include a low-noise amplifier (LNA) 365, which may be a two-stage LNA including LNA stage 366 and LNA stage 367.

[0068] The output of LNA 365 can be provided to phase shifter 363 via connector 362. Phase shifter 363 can then provide the received signal to signal combiner, such as..., via connector 362. Figure 2CThe splitter / combiner 288. In an exemplary embodiment, the signal on connector 362 may be an RF signal provided to the mixer circuit. In an exemplary embodiment, phase shifter 363 may receive a control signal via connector 294, which controls the phase of the received signal provided via connector 362.

[0069] In an exemplary embodiment, the three-stage winding 338 of the second transformer 335 can be coupled to AC ground via connector 369, and can also be coupled to LNA 365 via connector 369. In an exemplary embodiment, connector 369 can also provide a DC bias signal to bias LNA stage 366 and LNA stage 367.

[0070] In an exemplary embodiment, in high-power (HP) transmit (TX) mode, also referred to herein as power combination mode, switch 321 (S1) is turned on (i.e., ON), switch 325 (S2) is turned on (ON), and switch 302 (S3) is turned off (i.e., OFF). This configuration allows the power outputs of power amplifiers 323 and 327 to be combined at secondary windings 333 and 337, and the combined power is delivered to connector 304 for transmission to antenna elements (not shown).

[0071] In an exemplary embodiment, power amplifiers 323 and 327 may have the same or different sizes and may have the same or different bias configurations to produce the same or different power levels. In an exemplary embodiment, the biases and sizes of power amplifiers 323 and 327 may also be arranged to create a main amplifier structure and an auxiliary amplifier structure or a peaking amplifier structure, respectively, for example to increase efficiency during power back-off. Similarly, driver amplifiers 322 and 326 may be the same size or may be different sizes and may have the same or different bias configurations to produce the same or different power levels.

[0072] In an exemplary embodiment, in low-power (LP) transmit (TX) mode, switch 321 (S1) is off (i.e., OFF), switch 325 (S2) is on (ON), and switch 302 (S3) is on (i.e., ON). This configuration allows only a single amplifier path (amplifier path 324 in this example) to provide output to connector 304 for transmission to the antenna element (not shown). Figure 3 In the exemplary embodiment shown, amplifier path 324 is enabled in TX LP mode because both amplifier path 324 and LNA 365 are coupled to the third winding 338 of the second transformer 335.

[0073] In an exemplary embodiment, switchable control of amplifier paths 320 and 324 allows the phased array element 300 to provide power output that can be increased by approximately 3 dB compared to a phased array element with only a single amplifier path, without compromising power efficiency at backoff power levels. Using one of power amplifiers 323 and 327 to generate the desired power in LP mode, and using both power amplifiers 323 and 327 to generate the desired power in HP mode (e.g., approximately 3 dB higher than in LP mode), instead of a single larger power amplifier, allows for efficient low-power mode operation. For example, a larger power amplifier operating in LP mode (e.g., a single high-power amplifier) ​​can experience inefficiency during power backoff in LP mode because a single high-power amplifier can operate at backoff power levels 3 dB above its peak efficiency point. Furthermore, compared to a phased array element with a single amplifier path, the dual amplifier path architecture of phased array element 300 incrementally increases the circuit area (e.g., by only about ~8% in some embodiments) because some other signal path components (e.g., phase shifters, splitters / combiners, mixers, LO and IF circuitry) are shared. In an exemplary embodiment, when both power amplifiers 323 and 327 are active, the higher power of approximately 3 dB may be slightly less than 3 dB due to losses from power combination. For example, when both power amplifiers 323 and 327 are active, the combined power output may be, for example, from approximately 2.5 dB to approximately 3 dB.

[0074] In an exemplary embodiment, in receive (RX) mode, regardless of whether the transmitter is in HP or LP mode, switch 302 (S3) is turned on, thus allowing only a single power amplifier (PA 327) to affect the impedance at the input of LNA 365 on connector 368. When switch 302 is turned on, the secondary winding 333 of transformer 331 is grounded to system ground, so that the influence of any component in amplifier path 320 does not appear on connector 368. In this way, even with an arrangement that allows for high power outputs of approximately 2.5 dB to approximately 3 dB from dual amplifier paths 320 and 324, the receiver 360 maintains its noise figure (NF) performance because switch 302 (S3) can be off when both amplifier paths 320 and 324 are providing power; and because switch 302 (S3) can be on when one amplifier path (e.g., amplifier path 324) is providing power, and can be on when the receiver 360 is enabled, the load on the power amplifier 323 is removed from the input to the LNA 366 in RX mode. For example, because the transmitter 310 and receiver 360 share the antenna connector 304, they are naturally loaded onto each other, and if higher power is desired from the transmitter 310, it may be necessary to increase the size of the power amplifier coupled to the antenna, which could increase the load presented to the LNA 365 and reduce the noise figure (NF). By implementing power amplifiers 323 and 327 and turning on switch 302 (S3) in RX mode, LNA 365 will be exposed only to the load from power amplifier 327, thereby allowing LNA 365 to maintain a higher NF than when exposed to the loads of power amplifiers 323 and 327 or a single, larger power amplifier.

[0075] In an exemplary embodiment, impedance 344 serves as the terminating impedance in TX HP mode, for example making it possible to use the same circuit architecture for transformers 331 and 335 for design reuse purposes and / or for balancing. Alternatively, terminating impedance 344 can be omitted, leaving connector 342 as an open / floating winding, such that connector 342 maintains high impedance in TX HP mode and does not degrade the quality factor (Q) of transformer 331 due to eddy currents generated in the three-stage winding 334. Alternatively, transformer 331 can be implemented without the three-stage winding 334.

[0076] In an exemplary embodiment, the phased array element 300 is described as performing voltage combination operation; however, the phased array element 300 may also be configured for current combination, as described below.

[0077] In an exemplary embodiment, the variable capacitor 317 (C_match) maintains the frequency response at node 318 for two or more different transmit operation modes (i.e., HP mode where both switches 321 and 325 are ON, and LP mode where switch 321 is OFF and switch 325 is ON). In an exemplary embodiment, the variable capacitor 317 can be coupled to a control signal via connector 294 and can be adjusted to different values ​​depending on whether one amplifier path (320 or 324) is enabled or both amplifier paths 320 and 324 are enabled and provide signal amplification.

[0078] In an exemplary embodiment, a single phase shifter 314 is used to drive amplifier paths 320 and 324. Therefore, both power combination (HP) mode and LP mode can use a single transmit phase shifter for each phase array element. In an exemplary embodiment, a single output is provided to the antenna via connector 304.

[0079] Figure 4A This is a block diagram of a millimeter-wave (mmW) RF module 400 having a 1x8 phased array according to an exemplary embodiment of the present disclosure. Although the RF module 400 is illustrated and described as including a 1x8 phased array, other array configurations of the RF module 400 are also possible. As used herein, the terms "module" and "RF module" refer to some or all of the hardware configurations incorporated into an RF component on a single substrate or structure, such that all components are included in a common package.

[0080] In an exemplary embodiment, the RF module 400 may include a millimeter-wave integrated circuit (mmWIC) 410 (also known as a radio frequency integrated circuit (RFIC)), an antenna array 420, a power management integrated circuit (PMIC) 415, and a connector 417.

[0081] In an exemplary embodiment, the mmWIC 410 may include a plurality of phased array elements, such as Figure 3 The phased array element 300 is shown. In... Figure 4A In the 1x8 phased array example shown, there are eight (8) phased array elements 300a, 300b, 300c, 300d, 300e, 300f, 300g, and 300h. In some embodiments, the mmWIC 410 is coupled to a substrate, and one or more of the phased array elements 300a-300h are implemented on the surface of the substrate and / or one or more inner layers in module 400.

[0082] In an exemplary embodiment, mmWIC 410 may include local oscillator generator circuits 277 and 279 ( Figure 2BThe inverter 275 and the downconverter 285 are connected. The upconverter 275 can be coupled to signal connector 312, and signal connector 312 can be coupled to splitter / combiner 288. Figure 2C ), and the downconverter 285 can be coupled to signal connector 362, which can also be coupled to splitter / combiner 288 ( Figure 2C ( ) or another combiner. For clarity, signal connector 312 is shown in thick lines, and signal connector 362 is shown in non-thick lines. In an exemplary embodiment of the superheterodyne architecture, upconverter 275 can be configured to receive the output of upconverter 240 ( Figure 2B ), and downconverter 285 can be configured to provide output to downconverter 260 ( Figure 2B In a direct conversion architecture, the LO generator circuits 277 / 279 can use the LO generator circuit 295, such as... Figure 2A As described in the implementation, the up-converter 275 can use the up-converter 240 as... Figure 2A As described, the downconverter 285 can be used with the downconverter 260 as... Figure 2A The implementation described.

[0083] In an exemplary embodiment, the phased array elements 300a to 300h are similar to Figure 3 The phased array element 300. Furthermore, phased array element 300b is similar to phased array element 300a, except that phased array element 300b is a "mirror image" of phased array element 300a. Phased array elements 300c, 300e, and 300g may be similar to phased array element 300a; and phased array elements 300d, 300f, and 300h may be similar to phased array element 300b. For clarity, details of phased array elements 300c, 300d, 300e, 300f, 300g, and 300h are omitted.

[0084] In an exemplary embodiment, phased array element 300a provides an output to antenna 421, and phased array element 300b provides an output to antenna 422. Similarly, phased array element 300c provides an output to antenna 423, and phased array element 300d provides an output to antenna 424; phased array element 300e provides an output to antenna 425, and phased array element 300f provides an output to antenna 426; phased array element 300g provides an output to antenna 427, and phased array element 300h provides an output to antenna 428.

[0085] In an exemplary embodiment, the PMIC module 415 provides and controls the power used by the components on the RF module 400, and the connector 417 couples the RF module 400 to other components in the communication device.

[0086] In an exemplary embodiment, fewer than all phased array elements within the mmWIC 410 can be coupled to the antenna element. For example, where the TX HP mode can be used for a smaller module (e.g., a 1x4 phased array), one or more phased array elements of the total number of phased array elements on the mmWIC 410 can remain unconnected to the antenna element because fewer than all phased array elements on the mmWIC 410 can provide sufficient output power levels for a particular application. For example, although Figure 4A The mmWIC 410 shown includes eight phased array elements 300a to 300h, but in applications where a 1x4 phased array can be implemented, only phased array elements 300a, 300b, 300c, and 300d can be coupled to the corresponding antennas 421, 422, 423, and 424. In such embodiments, as Figure 4A As shown, phased array elements 300e, 300f, 300g and 300h are shown with dotted line connections to the corresponding antennas 425, 426, 427 and 428 to indicate that phased array elements 300e, 300f, 300g and 300h are not connected to the corresponding antennas.

[0087] In an exemplary embodiment, a 1x4 phased array can be used for a UE, and a 1x8 phased array can be used for a customer premises equipment (CPE). In this way, the RF module 400 can be implemented in a variety of applications, such as in a UE and a CPE. Furthermore, the same mmWIC 410 can be used in these different applications (e.g., in applications where different numbers of antennas are coupled to the mmWIC 410). Alternatively, all phased array elements can be coupled to their respective antennas. In some embodiments where fewer than all phased array elements 300 are coupled to antenna elements, at least one phased array element coupled to an antenna operates in HP mode. In some embodiments where all phased array elements 300 are coupled to their respective antennas, in certain situations, such as at least when transmitting from all antennas, all phased array elements operate in LP mode. For example, phased array element 300a is shown with switch 302a turned on, and phased array element 300b is shown with switch 302b turned on, indicating that phased array elements 300a and 300b are in LP TX mode.

[0088] Figure 4B This is a block diagram of a millimeter-wave (mmW) RF module 450 with a 1x4 phased array according to an exemplary embodiment of this disclosure. Although the RF module 450 is illustrated and described as having a 1x4 phased array, other configurations of the RF module 450 are possible. The references to numbering and... Figure 4BThe component description is the same as the component in the text.

[0089] In an exemplary embodiment, the mmWIC 460 may include a plurality of phased array elements, such as Figure 3 The phased array element 300 is shown. In... Figure 4B In the 1x4 phased array example shown, there are four (4) phased array elements 300a, 300b, 300c and 300d.

[0090] In an exemplary embodiment, phased array element 300a provides an output to antenna element 421, and phased array element 300b provides an output to antenna element 422. Similarly, phased array element 300c provides an output to antenna element 423, and phased array element 300d provides an output to antenna element 424.

[0091] In an exemplary embodiment where the TX HP mode can be used in a smaller module, it can be implemented Figure 4B The 1x4 phased array shown is illustrated. In an exemplary embodiment, Figure 4B The 1x4 phased array shown can be used for a UE, while the 1x8 phased array can be used for a customer premises equipment (CPE). For example, phased array element 300a is shown with switch 302a off, and phased array element 300b is shown with switch 302b off, indicating that in Figure 4B In the illustrated embodiment, phased array elements 300a and 300b are in HP TX mode. In some such embodiments, phased array elements 300d-300h ( Figure 4A The 460 is included in mmWIC 410 but is not connected to an antenna. In some of these embodiments, mmWIC 460 may include all the components included in mmWIC 410, but the two mmWICs may be configured differently (e.g., certain connectors such as switches 302, 321 and / or 325 may be set differently) and coupled to different numbers of antennas.

[0092] Figure 4A and Figure 4B The configuration shown is merely an example. Each phased array element in the phased array can operate in any of the HPTX, LPTX, and RX modes. Furthermore, all components in these modules can be included within the device, rather than being packaged in a module. For example, a phased array element can be coupled to a separate substrate on which an antenna is implemented, rather than being coupled to an antenna within a module.

[0093] Figure 5This is a block diagram of a phased array element 500 configured in HP TX mode according to an exemplary embodiment of the present disclosure. Phased array element 500 may be an example configuration of phased array element 300. Phased array element 500 is illustrated in high-power (HP) transmit (TX) mode, also referred to herein as power combining mode, with switch 321 (S1) on (i.e., ON), switch 325 (S2) on (ON), and switch 302 (S3) off (i.e., OFF). This configuration allows the power outputs of power amplifiers 323 and 327 to be combined and delivered to connector 304 for transmission to antenna elements (not shown). LNA stages 366, 367, and phase shifter 363 are shown in dashed lines to indicate that they are inactive in this mode.

[0094] Figure 6 This is a block diagram of a phased array element 600 configured in LP TX mode according to an exemplary embodiment of the present disclosure. The phased array element 600 is illustrated in low power (LP) transmit (TX) mode with switch 321 (S1) off (i.e., OFF), switch 325 (S2) on (ON), and switch 302 (S3) on (i.e., ON). Driver amplifier 322, power amplifier 323, transformer 331, LNA stage 366, LNA stage 367, and phase shifter 363 are shown in dashed lines to indicate that they are inactive in this mode. This configuration allows only a single power amplifier (327 in this example) to provide output to connector 304 for transmission to an antenna element (not shown).

[0095] Figure 7This is a block diagram of a phased array element 700 configured in RX mode according to an exemplary embodiment of the present disclosure. The phased array element 700 is illustrated in receive (RX) mode, where switches 321 and 325 are off, and switch 302 (S3) is on, regardless of whether the transmit section is operating in HP or LP mode. This allows only a single power amplifier (PA 327) to affect the impedance at the input of the LNA 365 on connector 368. When switch 302 is on, the secondary winding 333 of transformer 331 is grounded to system ground, ensuring that the influence of any component in the amplifier path 320 does not affect connector 368. In this RX mode, portions of driver amplifier 322, power amplifier 323, transformer 331, driver amplifier 326, power amplifier 327, and transformer 335 are shown in dashed lines to indicate that they are inactive in this mode. Transformer 335 is partially inactive because it can be implemented as a three-coil system that couples the antenna on connector 304 to LNA 365 in receive (RX) mode via secondary winding 337 and tertiary winding 338, which act as the transformer in receive (RX) mode. In some embodiments, components described as inactive (e.g., LNA 365, amplifiers in amplifier paths 320, 324, phase shifter 363, etc.) can be disabled by coupling the components to a specific voltage (e.g., a bias or ground).

[0096] Figure 8 This is a block diagram of a phased array element 800 according to an exemplary embodiment of the present disclosure. The phased array element 800 and... Figure 3 The difference in the phase-controlled array element 300 shown is that the secondary windings 333 and 337 of transformers 331 and 335 are coupled in parallel. A switch 802 is located between the secondary windings 333 and 337, for example, between corresponding connectors 839 and 803. In an exemplary embodiment, when switch 802 is turned on, the secondary windings 333 and 337 can form a common transformer section. Output connector 804 is also coupled to connector 803. Figure 8 The exemplary embodiment of the phased array element 800 shown performs similar functionality, but uses a current combination opposite to the voltage combination to combine the outputs of amplifier path 320 and amplifier path 324. In the phased array element 800, power amplifiers 323 and 327 may be the same size or different sizes, and may also have the same or different biases. Transformers 331 and 335 may also be similarly manufactured or optimized for different values. As mentioned above... Figure 3The embodiment of the phased array element 800 can also be configured such that power amplifier 327 acts as the main amplifier (e.g., Class AB biased) and power amplifier 323 acts as the spike / auxiliary amplifier (e.g., Class C biased), or vice versa. Furthermore, the optional inductor 815, shown by the dotted line, can be located across switch 802 to improve the turn-off isolation of switch 802, thereby reducing the load presented to power amplifier 323 in LP TX mode and reducing the load presented to LNA 365 in RX mode.

[0097] In some embodiments, the phased array element 900 includes more than two amplifier paths. For example, a third amplifier path may be selectively coupled in parallel with paths 320 and 324 to the VGA 316. The output of the third amplifier path may be coupled to a third transformer, which may be switchably coupled to connector 803, for example, to selectively enable the third amplifier path to contribute to the signal output of the antenna on output connector 804.

[0098] Figure 9 This is a block diagram of a phased array element 900 according to an exemplary embodiment of the present disclosure. The phased array element 900 and... Figure 3 The difference in the phased array element 300 shown is that the outputs of power amplifiers 323 and 327 in the phased array element 900 are provided to corresponding bump transitions 905 and 915. A bump transition is a connector that connects an integrated circuit (IC) package to a die, connecting the die-side bumps (i.e., PA output pins) to the package balls in a ball grid array (BGA) IC package. This bump transition connector from the bump to the BGA ball can be customized in terms of inductance (L) and capacitance (C) to provide certain desired impedances at millimeter-wave frequencies, thereby optimizing PA / LNA performance.

[0099] Although bump transitions are not illustrated in the preceding figures, they can include bump transitions (e.g., in...). Figure 4A and Figure 4B Between the phased array elements and the antenna, or in Figure 3 , Figure 5 , Figure 6 , Figure 7 and Figure 8 The arrow pointing to "Go to ANT" appears in the text. Figure 3 , Figure 5 , Figure 6 , Figure 7 and Figure 8 In some of the embodiments shown, with Figure 9 The element shown has two bump transitions, in contrast to the element that can have only one bump transition.

[0100] In this exemplary embodiment, LNA 965 includes an LNA stage 966 coupled to connector 917 via connector 969, and an LNA stage 366 coupled to connector 907 via connector 968. LNA stage 966 and LNA stage 366 provide output to another LNA stage 367.

[0101] exist Figure 9 In the exemplary embodiment shown, each amplifier path 320 and 324 has a separate output to separate bump transitions 905 and 915, respectively. In this exemplary embodiment, each amplifier path can be individually enabled via switches 321 and 325 and can also be configured to provide different power output levels, such as a low-power (LP) output via bump transition 915 and a high-power (HP) output via bump transition 905. Figure 9 In the exemplary embodiments shown, power amplifier 323 can be implemented using a device larger than power amplifier 327. For example, in an exemplary embodiment, the phased array element can be configured such that power amplifier 323 can be designed to have approximately 3 dB more power than power amplifier 327. However, due to operating losses, power amplifier 323 may have approximately 2.5 dB to approximately 3 dB more power than power amplifier 327. Such phased arrays can be optimized to deliver higher power, such that fewer phased array elements 900 with a larger power amplifier than power amplifier 327 can be used to deliver equivalent effective isotropic radiated power (EIRP) compared to a phased array with power amplifier 323 having a similar configuration to power amplifier 327. For example, if power amplifier 323 is designed to have approximately 3 dB more power than power amplifier 327, the phased array size of phased array element 900 with a power amplifier 323 having a higher power than power amplifier 327 can be 1x6 instead of 1x8 where power amplifier 327 and power amplifier 323 are the same. This arrangement may sacrifice some efficiency because larger phased arrays are generally more current-efficient than smaller ones, since gain is achieved through space power combination. However, in some applications, the size of the phased array may be more important than current efficiency for cost reasons. In an exemplary embodiment, the LNA 965 can be individually optimized for optimal noise figure in HP and LP TX modes. Because switch 302 is omitted ( Figure 3 ) or switch 802 ( Figure 8 ),so Figure 9 The architecture shown does not have any additional load or loss.

[0102] In an exemplary embodiment, Figure 9Two transmit paths are shown for each phased array element; however, three (3) or more transmit paths (each coupled to a corresponding bump transition) may exist to provide different power levels and / or accommodate different numbers of antennas. Similarly, receive paths may be coupled to each transmit path / bump transition, enabling the implementation of three or more receive paths (e.g., including corresponding amplifiers that output to amplifier 367 or phase shifter 363).

[0103] In this article about Figure 3 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Figure 9 In the exemplary embodiments described, all phased array elements in the non-integrated circuit (IC) require the same configuration. For example, it may be desirable to have a low-power (LP) path in each cell, but if a high-power (HP) path is typically used when there are fewer antennas, the HP path may be omitted in some phased array cells.

[0104] In an exemplary embodiment where the phased array element 900 is connected to the antenna, the multiple bump transitions may remain disconnected. For example, the manufacturer may choose which type of device to use depending on the type of device being implemented.

[0105] In some embodiments, regardless of how many paths are implemented in each phased array element, only a single TX phase shifter can be used, and all RX paths can be converged to a single RX phase shifter.

[0106] Figure 10A , Figure 10B and Figure 10C This is a block diagram illustrating an exemplary embodiment of a millimeter-wave (mmW) RF module according to an exemplary embodiment of the present disclosure.

[0107] Figure 10A A side view of a millimeter-wave (mmW) RF module 1000 is shown. The RF module 1000 can be... Figure 4A An example of an RF module 400 is shown. In an exemplary embodiment, the RF module 1000 may include a 1x8 phased array fabricated on a substrate 1003.

[0108] In an exemplary embodiment, the RF module 1000 may include an mmWIC 1010, a PMIC 1015, a connector 1017, and a plurality of antennas 1021, 1022, 1023, 1024, 1025, 1026, 1027, and 1028 fabricated on a substrate 1003.

[0109] Figure 10BThis is a top perspective view of the RF module 1000, showing the mmWIC 1010, PMIC 1015, connector 1017, and multiple antennas 1021, 1022, 1023, 1024, 1025, 1026, 1027, and 1028 on the substrate 1003.

[0110] Figure 10C This is a bottom perspective view of the RF module 1000, showing antennas 1021, 1022, 1023, 1024, 1025, 1026, 1027 and 1028 on the substrate 1003.

[0111] Figure 10D An alternative embodiment of a millimeter-wave (mmW) RF module 1050 is shown. The RF module 1050 can be similar to... Figure 10A The RF module 1000 shown is arranged as a 1x6 array. In an exemplary embodiment, the RF module 1050 may include a 1x6 phased array fabricated on a substrate 1053.

[0112] In an exemplary embodiment, the RF module 1050 may include a plurality of antennas 1071, 1072, 1073, 1074, 1075 and 1076 fabricated on a substrate 1053.

[0113] In one exemplary embodiment, each phased array element associated with each of the antennas 1071, 1072, 1073, 1074, 1075, and 1076 on the RF module 1050 can be configured in HP mode, which delivers approximately 2.5 dB to 3 dB more power than in LP mode. In an exemplary embodiment, the mmWIC 1010 can be used with a 1x6 array in module 1050 and is configured to operate in HP mode as described. Conversely, when the mmWIC 1010 is used with... Figure 10C When used together in the 1x8 configuration shown, the mmWIC 1010 can be configured to operate in LP mode.

[0114] For example, advanced communication devices can offer the highest key performance indicators (KPIs) with the lowest possible current consumption, but the consumed circuit area and cost may be relatively less important. In intermediate-tier communication devices, a trade-off between current efficiency and low cost may be necessary to achieve low circuit area and low cost. In terms of circuit area, this refers to the area of ​​the mmWIC and the area it consumes on the printed circuit board within the communication device. To reduce module size in intermediate-tier communication devices, fewer phased array elements and antennas are desirable. However, reducing the number of phased array elements and antennas without changing (increasing) the power of each element may come at the cost of EIRP, which may be unacceptable in some cases / devices because a lower EIRP reduces cell coverage. Therefore, in intermediate-tier communication devices, the power of each phased array element can be increased, allowing the use of fewer antennas (corresponding to a smaller RF module) while maintaining the same EIRP provided by a larger number of phased array elements without increasing the power of each element. In some such embodiments, the same mmWIC can be used in both advanced-tier and intermediate-tier devices because the required area can be determined by the number of antennas. Figure 10B As can be seen, the area consumed by the mmWIC 1010 is less than that required for 6 or 8 antennas; therefore, using an mmWIC may be sufficient for modules including 6 or 8 (or other numbers, such as 4) antennas. In other embodiments, different mmWICs (e.g., including fewer phased array elements) can be used for different module configurations. In terms of efficiency, building a larger phased array for the same EIRP can achieve higher current efficiency (making largely equivalent EIRPs possible) compared to a smaller phased array with higher power per element. This is because in an MxN phased array, the TX mode power EIRP increases with the square of the number of elements (MxN). 2 The efficiency (EIRP) increases with the square of the number of elements, and provides optimal efficiency in larger phased arrays. For example, the MxN DC / battery current consumed by each element contributes to (MxN) times the efficiency of the phased array. 2 Increased Radiated Power Retention (EIRP). The ability to increase the power per element in an RF module without substantially compromising efficiency in low-power modes allows for the construction of RF modules of varying sizes while providing substantially similar EIRP. For example, if the power per element can be increased by, say, approximately 2.5 dB (i.e., 1.78 times), the size of the phased array can be reduced from 1x8 to 1x6 (i.e., 8x8 = 6x6 * 1.78) to achieve substantially equal EIRP. Although such a 1x6 phased array may have a lower receiver sensitivity (RX EIS (Effective Isotropic Sensitivity)) than a 1x8 phased array, in almost all practical networks, coverage / cell size is limited by EIRP rather than EIS.

[0115] Figure 11 This is a flowchart 1100 illustrating an operational example of a method for signal amplification. The blocks in method 1100 may be executed in the order shown or not, and in some embodiments, they may be executed at least partially in parallel.

[0116] In box 1102, the communication signal can be selectively amplified. For example, Figure 3 The phased array element 300 can amplify the communication signal using one or both of the first amplifier path 320 and the second amplifier path 324, or Figure 9 The phased array element 900 can amplify communication signals using either the first amplifier path 320 or the second amplifier path 324.

[0117] In block 1104, in some embodiments, the amplified communication signals can be selectively combined for transmission. For example, in HP TX mode, when switch 302 is off, Figure 3 The outputs of the first amplifier path 320 and the second amplifier path 324 can be combined by the transformer segment 339, such that the outputs of both the first amplifier path 320 and the second amplifier path 324 are provided to the antenna element via the connector 304. In other embodiments, such as in LP mode or when using Figure 9 When configuring, the combination of amplified signals is omitted.

[0118] In block 1106, the frequency response of one of a plurality of power levels is selectively maintained. For example, a variable capacitor 317 may be set or adjusted such that the frequency response of the phased array element 300 or 900 is maintained in LP TX mode or HP TX mode.

[0119] Figure 12 This is a functional block diagram of a device for signal amplification. Device 1200 includes a component 1202 for selectively amplifying communication signals. In some embodiments, the component 1202 for selectively amplifying communication signals may be configured to perform method 1100. Figure 11 The function described in operation block 1102 is one or more of the functions described in the instructions. In an exemplary embodiment, component 1202 for selectively amplifying communication signals may include a first amplifier path 320 and a second amplifier path 324, and in some embodiments includes switches 321, 325.

[0120] The apparatus 1200 may further include a component 1204 for selectively combining the amplified communication signals for transmission. In some embodiments, the component 1204 for selectively combining the amplified communication signals for transmission may be configured to perform method 1100. Figure 11 One or more of the functions described in operation block 1104. In an exemplary embodiment, component 1204 for selectively combining amplified communication signals for transmission may include magnetic circuit 330.

[0121] The apparatus 1200 also includes a component 1206 for selectively maintaining the frequency response of each of a plurality of power levels. In some embodiments, the component 1206 for selectively maintaining the frequency response of each of a plurality of power levels may be configured to perform method 1100. Figure 11 One or more of the functions described in operation block 1106. In an exemplary embodiment, component 1206 for selectively maintaining the frequency response of each of a plurality of power levels may include a variable capacitor 317. For example, the variable capacitor 317 may be set or selectively adjusted such that the frequency response of the phased array element 300 is maintained in LP TX mode or HP TX mode.

[0122] The circuit architecture described in this article can be implemented on one or more ICs, analog ICs, RFICs, mixer signal ICs, ASICs, printed circuit boards (PCBs), electronic devices, etc. The circuit structure described in this article can also be manufactured using various IC process technologies, such as complementary metal-oxide-semiconductor (CMOS), N-channel MOS (NMOS), P-channel MOS (PMOS), bipolar junction transistors (BJTs), bipolar CMOS (BiCMOS), silicon-germanium (SiGe), gallium arsenide (GaAs), heterojunction bipolar transistors (HBTs), high electron mobility transistors (HEMTs), silicon-on-insulator (SOI), etc.

[0123] The apparatus for implementing the circuits described herein may be a standalone device or part of a larger device. The device may be (i) a standalone IC, (ii) a collection of one or more ICs, which may include a memory IC for storing data and / or instructions, (iii) an RFIC such as an RF receiver (RFR) or an RF transmitter / receiver (RTR), (iv) an ASIC such as a mobile station modem (MSM), (v) a module that may be embedded in other devices, (vi) a receiver, a cellular phone, a wireless device, a mobile phone or mobile unit, (vii) and so on.

[0124] Although selected aspects have been described in detail, it should be understood that various substitutions and modifications can be made therein without departing from the spirit and scope of the invention, as defined in the following claims.

Claims

1. A phased array element, comprising: The transmitting section has multiple amplifier paths, each with a driver amplifier and a power amplifier; A first transformer and a second transformer, the first transformer being coupled to the power amplifier in the first amplifier path of the plurality of amplifier paths, and the second transformer being coupled to the power amplifier in the second amplifier path of the plurality of amplifier paths, the secondary windings of each of the first transformer and the second transformer being coupled together through a common transformer segment; A transmit phase shifter, switchably coupled to the plurality of amplifier paths; The receiving section is coupled to the second transformer, and the receiving section has a receiving path, the receiving path having a low-noise amplifier (LNA). as well as A phase shifter is received and coupled to the LNA.

2. The phased array element according to claim 1, wherein the secondary winding of the second transformer is coupled to the antenna element via a bump transition.

3. The phased array element of claim 1, wherein the phased array element is located on a millimeter-wave integrated circuit (mmWIC).

4. The phased array element of claim 1, wherein the plurality of phased array elements are located on a millimeter-wave integrated circuit (mmWIC), and the number of phased array elements coupled to the respective antenna is less than the total number of the plurality of phased array elements.

5. The phased array element of claim 1, wherein the phased array element is configured to combine the output of the power amplifier in the first amplifier path with the output of the power amplifier in the second amplifier path, and to provide the combined output to the antenna element.

6. The phased array element according to claim 1, wherein the first transformer further comprises a three-stage winding, and the second transformer comprises a three-stage winding, wherein the three-stage winding of the first transformer is coupled to a terminating impedance, and the three-stage winding of the second transformer is coupled to the LNA.

7. The phased array element of claim 1, wherein the first amplifier path is disabled, the second amplifier path is enabled and coupled to the antenna element, and the common transformer segment is coupled to system ground.

8. The phased array element of claim 1, wherein both the first amplifier path and the second amplifier path are enabled, and the common transformer section is configured to combine the power of the first amplifier path and the second amplifier path.

9. The phased array element of claim 1, wherein the transmitting section further comprises a variable capacitor configured to maintain the frequency response of the first transmitting mode and the second transmitting mode.

10. The phased array element of claim 1, wherein the first amplifier path and the second amplifier path are configured to provide equal power levels.

11. The phased array element of claim 1, wherein the first amplifier path and the second amplifier path are configured to provide different power levels.

12. The phased array element of claim 10, wherein the first amplifier path and the second amplifier path together are configured to provide a power level 3 dB higher than either the first amplifier path or the second amplifier path alone.

13. The phased array element of claim 1, wherein the first amplifier path is configured to provide an output with a power level 3 dB higher than that provided by the second amplifier path.

14. The phased array element of claim 1, further comprising a switch configured to switchably couple the common transformer segment to system ground, wherein the first transformer, the second transformer, and the common transformer segment are configured to combine the power of the first amplifier path and the second amplifier path by voltage combination when the first amplifier path and the second amplifier path are enabled and the switch is not turned on.

15. The phased array element of claim 1, further comprising a switch configured to switchably couple a first portion of the common transformer segment to a second portion of the common transformer segment, the first portion of the common transformer segment being coupled to a first transformer, and the second portion of the common transformer segment being coupled to a second transformer, wherein the first transformer, the second transformer, and the common transformer segment are configured to combine the power of the first amplifier path and the second amplifier path by current combination when the first amplifier path and the second amplifier path are enabled and the switch is turned on.

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