A reconfigurable system for improving single photon avalanche diode imaging resolution

CN117130011BActive Publication Date: 2026-10-30SUN YAT SEN UNIV
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Patent Information

Application Number
CN202311076437.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-24
Publication Date
2026-10-30
Estimated Expiration
2043-08-24

AI Technical Summary

Technical Problem

面对大阵列高分辨率的深度感知成像需求,如果按比例直接增加像素数量的方法不仅造价高昂,而且面临着SPAD大面积分布导致的像素一致性差等问题

Benefits of technology

[0022]本发明提供了一种用于提高单光子雪崩二极管成像分辨率的技术及系统,可用于各种基于SPAD的成像系统中。受非理想效应如暗激发,后脉冲效应等影响,基于SPAD激光雷达深度感知成像系统通常由多个SPAD及其相应的前端电路组合作为像素单元,以降低死区时间和提高运作速度。像素单元内部固定的多个SPAD及其相应的前端电路组合限制了分辨率的提高,本发明公开的提高单光子雪崩二极管成像分辨率的技术及系统,通过对组成像素单元的SPAD及相应的前端电路进行重构,以分时复用的方式在原像素点间插入了重构的新像素,从而有效地提高了SPAD成像系统的分辨率,并且不需要按比例增加芯片面积。因此,本发明适用于在各种含多SPAD组成的像素单元的成像系统中,SPAD利用效率提高,提高SPAD成像分辨率。例如,在基于SPAD的激光雷达系统中,采用本发明可以在共用同一套后续信号处理电路的情况下,通过对可重构块中选取SPAD及其相应的前端电路的合并组合与切换,以分时复用的方式,在原像素点间插入了重构的新像素,提高了成像系统分辨率。与本发明不同,现有的基于SPAD的成像系统中每个像素单元分配固定的多个SPAD及其相应的前端电路,因此像素对SPAD的信号利用率低,相同分辨率下消耗的硬件资源大。

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Abstract

The application discloses a reconfigurable system for improving imaging resolution of a single photon avalanche diode, comprising: K reconfigurable pixel modules composed of m1*m2 SPADs and corresponding front-end circuits; a multiplexer for selecting n1*n2 SPADs and corresponding front-end circuits to combine or switch, wherein the n1*n2 SPADs and corresponding front-end circuits constitute a pixel unit; a signal processing circuit for processing and quantizing the output of the pixel unit to obtain distance information quantization results; a reconfiguration mode control circuit, an input end of which is connected with an output end of the signal processing circuit, for receiving a distance information conversion completion signal sent by the signal processing circuit in a pixel reconfiguration mode; and an output end of the reconfiguration mode control circuit being connected with a gating control end of the multiplexer, for generating a short pulse signal for switching the pixel reconfiguration mode, so as to control the multiplexer to reselect the pixel unit in the reconfigurable pixel module. The application can effectively improve the resolution of the SPAD imaging system, and does not need to proportionally increase the chip area.
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Description

Technical Field

[0001] This invention relates to the field of sensing imaging technology using single-photon avalanche diodes, and more specifically, to a reconfigurable system for improving the imaging resolution of single-photon avalanche diodes, applicable to fields including but not limited to three-dimensional depth imaging lidar, medical imaging, etc. Background Technology

[0002] LiDAR depth sensing imaging technology plays a crucial role in applications such as autonomous vehicles, industrial robots, and medical devices. A LiDAR depth sensing system uses the time-of-flight of laser pulses to achieve ranging and imaging. It detects the distance between objects by actively emitting a laser beam towards a target object and detecting changes in the time-of-flight or phase of the reflected beam. Single-photon avalanche diodes (SPADs), operating in Geiger mode with a reverse bias voltage higher than the avalanche breakdown voltage, theoretically require only a small number of incident photons to induce an avalanche effect under a strong electric field, exhibiting very high photoelectric conversion gain. For example... Figure 1 As shown, the SPAD-based lidar depth sensing imaging system detects the arrival time of photons using a high-sensitivity detector and measures the photon flight time using a precise digital processing circuit (such as a time-to-digital converter). Its detection range can reach the hundreds of meters level.

[0003] like Figure 2 As shown, in a traditional large-array SPAD imaging receiver system, each pixel comprises a pixel unit consisting of multiple SPADs and their corresponding front-end circuits, along with subsequent signal processing circuitry. The avalanche current generated by the SPAD upon photoexcitation is converted into digital pulses within the front-end circuitry. Simultaneously, quenching and reset circuits restore the SPAD to a photosensitive state ready for reoperation. However, due to non-ideal effects such as dark excitation and afterpulse effects, multiple SPADs and their corresponding front-end circuits are typically combined as a pixel unit to reduce dead time and improve operating speed. The output of the front-end circuitry is then delivered to the subsequent signal processing circuitry to ultimately obtain the target output.

[0004] In existing SPAD-based lidar depth sensing imaging systems, the way SPADs and their corresponding front-end circuits form pixel units is fixed; that is, each pixel consists of several fixed SPADs and their corresponding front-end circuits. Faced with the demand for large-array, high-resolution depth sensing imaging, directly increasing the number of pixels proportionally is not only costly but also suffers from poor pixel consistency due to the large-area distribution of SPADs. Summary of the Invention

[0005] In order to address the shortcomings and defects of the prior art, this invention provides a reconfigurable system for improving the imaging resolution of single-photon avalanche diodes (SPADs), which effectively improves the resolution of the SPAD imaging system without requiring a proportional increase in chip area.

[0006] To achieve the above-mentioned objectives of this invention, the technical solution adopted is as follows:

[0007] A reconfigurable system for improving the imaging resolution of a single-photon avalanche diode, the reconfigurable system comprising:

[0008] K reconfigurable pixel modules consisting of m1×m2 SPADs and corresponding front-end circuits;

[0009] A multiplexer is used to select n1×n2 SPADs and their corresponding front-end circuits in the reconfigurable pixel module for combination or switching. The n1×n2 SPADs and their corresponding front-end circuits constitute a pixel unit. K, m1, m2, n1, and n2 are all positive integers greater than 0, and m1 is greater than or equal to n1, and m2 is greater than or equal to n2.

[0010] The signal processing circuit is used to process and quantize the output of the pixel units in the reconfigurable pixel module to obtain the final distance information quantization result.

[0011] The reconstruction mode control circuit has its input terminal electrically connected to the output terminal of the signal processing circuit. It is used to receive the distance information conversion completion signal sent by the signal processing circuit in pixel reconstruction mode. Its output terminal is electrically connected to the selection control terminal of the multiplexer. It is used to generate a short pulse signal for switching the pixel reconstruction mode based on the distance information conversion completion signal, thereby controlling the multiplexer to reselect the pixel unit in the reconstructable pixel module, that is, to switch to the next pixel reconstruction mode.

[0012] Preferably, each reconfigurable pixel module is connected to a corresponding signal processing circuit; and within the same reconfigurable pixel module, all reconstructed pixel units share a single signal processing circuit.

[0013] Furthermore, if there is a shared SPAD and its corresponding front-end circuit among the multiple reconfigurable pixel modules, the shared SPAD and its corresponding front-end circuit are connected to the corresponding signal processing circuits of the multiple reconfigurable pixel modules.

[0014] Furthermore, the SPADs and their corresponding front-end circuits that are not shared in the reconfigurable pixel module are only connected to the signal processing circuits corresponding to the reconfigurable pixel module.

[0015] Preferably, the number of input ports of the multiplexer is m1×m2, which is the same as the number of SPADs and their corresponding front-end circuits in the reconfigurable pixel module; the number of output ports of the multiplexer is n1×n2, which is the same as the number of SPADs and their corresponding front-end circuits in the pixel unit.

[0016] Preferably, the reconstruction mode control circuit is equipped with a counter for counting the number of short pulse signals that switch pixel reconstruction modes, and the maximum count value of the counter is set to the total number of pixel reconstruction modes.

[0017] Furthermore, the total number of pixel reconstruction modes is the number of pixel units composed of n1×n2 SPADs and their corresponding front-end circuits that can be selected from the reconstructable pixel modules composed of m1×m2 SPADs and their corresponding front-end circuits.

[0018] Preferably, when reconstructing the SPAD that makes up the pixel unit and the corresponding front-end circuit, new pixels are inserted between the original pixels in a time-division multiplexing manner.

[0019] Preferably, the signal processing circuit includes, but is not limited to, a time-to-digital converter circuit.

[0020] Preferably, the SPAD and its corresponding front-end circuit are used to receive photon signals, convert them into digital pulse signals, and quench and reset the SPAD.

[0021] The beneficial effects of this invention are as follows:

[0022] This invention provides a technique and system for improving the imaging resolution of single-photon avalanche diodes (SPADs), applicable to various SPAD-based imaging systems. Due to non-ideal effects such as dark excitation and afterpulse effects, SPAD-based lidar depth sensing imaging systems typically use multiple SPADs and their corresponding front-end circuits as pixel units to reduce dead time and increase operating speed. The fixed combination of multiple SPADs and their corresponding front-end circuits within a pixel unit limits resolution improvement. The technique and system disclosed in this invention, by reconstructing the SPADs and their corresponding front-end circuits that make up the pixel unit, inserts reconstructed new pixels between the original pixels using a time-division multiplexing method, thereby effectively improving the resolution of the SPAD imaging system without proportionally increasing the chip area. Therefore, this invention is applicable to various imaging systems containing pixel units composed of multiple SPADs, improving SPAD utilization efficiency and SPAD imaging resolution. For example, in a SPAD-based lidar system, this invention can improve the imaging system resolution by merging and switching selected SPADs and their corresponding front-end circuits within a reconfigurable block, using a time-division multiplexing approach, while sharing the same set of subsequent signal processing circuits. This is achieved by inserting reconstructed new pixels between original pixels. In contrast, existing SPAD-based imaging systems allocate a fixed number of SPADs and their corresponding front-end circuits to each pixel unit, resulting in low signal utilization of the SPADs and high hardware resource consumption for the same resolution. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of an existing SPAD-based lidar depth sensing imaging system.

[0024] Figure 2 This is a block diagram of the receiver system of an existing SPAD-based lidar depth sensing imaging system.

[0025] Figure 3 This is a block diagram of a reconfigurable system for improving the imaging resolution of a single-photon avalanche diode according to the present invention.

[0026] Figure 4 This is a schematic diagram illustrating the principle of a pixel reconstruction mode for improving the imaging resolution of single-photon avalanche diodes proposed in this invention.

[0027] Figure 5 This is a schematic diagram illustrating the principle of another pixel reconstruction mode for improving the imaging resolution of single-photon avalanche diodes proposed in this invention.

[0028] In the figure, 1-SPAD and its corresponding front-end circuit, 2-reconfigurable pixel module, 3-pixel unit, 4-multiplexer, 5-signal processing circuit, and 6-reconfiguration mode control circuit. Detailed Implementation

[0029] The embodiments of the present invention will be described below with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention and not for limiting the scope of protection of the present invention.

[0030] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0031] Example 1

[0032] Due to non-ideal effects such as dark excitation and afterpulse effect, SPAD-based lidar depth sensing imaging systems typically use multiple SPADs and their corresponding front-end circuits 1 as pixel units 3 to reduce dead time and improve operating speed. The fixed combination of multiple SPADs and their corresponding front-end circuits 1 within a pixel unit 3 limits resolution improvement. Because existing SPAD-based imaging systems allocate a fixed number of SPADs and their corresponding front-end circuits 1 to each pixel unit 3, the pixel's signal utilization of the SPADs is low, resulting in high hardware resource consumption for the same resolution.

[0033] Therefore, the reconfigurable system for improving the imaging resolution of single-photon avalanche diodes provided by the present invention reconfigures the SPADs that make up the pixel unit 3 and the corresponding front-end circuits, inserts reconfigured new pixels between the original pixels in a time-division multiplexing manner, thereby effectively improving the resolution of the SPAD imaging system without increasing the chip area proportionally.

[0034] like Figure 3 As shown, the present invention provides a reconfigurable system for improving the imaging resolution of a single-photon avalanche diode, the reconfigurable system comprising:

[0035] K reconfigurable pixel modules 2, each consisting of m1×m2 SPADs and corresponding front-end circuits;

[0036] Multiplexer 4 is used to select n1×n2 SPADs and their corresponding front-end circuits 1 in the reconfigurable pixel module 2 for combination or switching. The n1×n2 SPADs and their corresponding front-end circuits 1 constitute a pixel unit 3. K, m1, m2, n1, and n2 are all positive integers greater than 0, and m1 is greater than or equal to n1, and m2 is greater than or equal to n2.

[0037] The signal processing circuit 5 is used to process and quantize the output of the pixel unit 3 in the reconfigurable pixel module 2 to obtain the final distance information quantization result.

[0038] The reconstruction mode control circuit 6 has its input terminal electrically connected to the output terminal of the signal processing circuit 5. It is used to receive the distance information conversion completion signal sent by the signal processing circuit 5 in the pixel reconstruction mode. Its output terminal is electrically connected to the selection control terminal of the multiplexer 4. It is used to generate a short pulse signal for switching the pixel reconstruction mode according to the distance information conversion completion signal, thereby controlling the multiplexer 4 to reselect the pixel unit 3 in the reconstructable pixel module 2, that is, to switch to the next pixel reconstruction mode.

[0039] In the reconfigurable system, n1 x n2 SPADs and their corresponding front-end circuits 1 constitute a reconfigurable pixel unit 3, and m1 x m2 SPADs and their corresponding front-end circuits form a reconfigurable pixel module 2. In pixel reconstruction mode, the control signal output by the reconstruction mode control circuit 6 controls the multiplexer 4 to select n1 x n2 SPADs and their corresponding front-end circuits 1 to form a pixel unit 3, and sends the output of the pixel unit 3 to the signal processing circuit 5 for processing.

[0040] In this embodiment, when a short pulse signal is generated to switch the pixel reconstruction mode, it indicates that the imaging function of the previous pixel reconstruction mode is completed and the next pixel reconstruction mode is about to be switched.

[0041] In this embodiment, when reconstructing the SPAD that makes up pixel unit 3 and the corresponding front-end circuit, new pixels are inserted between the original pixels in a time-division multiplexing manner.

[0042] This invention is applicable to various imaging systems containing pixel units 3 composed of multiple SPADs, improving SPAD utilization efficiency and SPAD imaging resolution. For example, in a SPAD-based LiDAR system, this invention allows for the selection and switching of SPADs and their corresponding front-end circuits 1 within the reconfigurable pixel module 2 using a time-division multiplexing method. This effectively improves the resolution of the SPAD imaging system without requiring a proportional increase in chip area. In contrast, existing SPAD-based imaging systems allocate a fixed number of SPADs and their corresponding front-end circuits 1 to each pixel unit 3, resulting in low signal utilization of the SPADs and high hardware resource consumption for the same resolution.

[0043] In one specific embodiment, the SPAD and its corresponding front-end circuit 1 are used to receive photon signals, convert them into digital pulse signals, and quench and reset the SPAD to ensure its stable operation. Due to non-ideal effects such as dark excitation and afterpulse effects, multiple SPADs and their corresponding front-end circuits 1 are combined to form pixel units 3 to reduce dead time and improve operating speed.

[0044] In one specific embodiment, each reconfigurable pixel module 2 is connected to a signal processing circuit 5; and in the same reconfigurable pixel module 2, all reconstructed pixel units 3 share a signal processing circuit 5.

[0045] If there is a shared SPAD and its corresponding front-end circuit 1 among the multiple reconfigurable pixel modules 2, since the shared SPAD and its corresponding front-end circuit 1 participate in the composition of multiple reconfigurable blocks, the shared SPAD and its corresponding front-end circuit 1 are connected to the corresponding signal processing circuit 5 of the multiple reconfigurable pixel modules 2.

[0046] The SPADs and their corresponding front-end circuits 1 that are not shared in the reconfigurable pixel module 2 are only connected to the signal processing circuit 5 corresponding to the reconfigurable pixel module 2, since the SPADs and their corresponding front-end circuits 1 only participate in the composition of one reconfigurable block.

[0047] In one specific embodiment, the number of input ports of the multiplexer 4 is m1×m2, which is the same as the number of SPADs and their corresponding front-end circuits 1 in the reconfigurable pixel module 2; the number of output ports of the multiplexer 4 is n1×n2, which is the same as the number of SPADs and their corresponding front-end circuits 1 in the pixel unit 3.

[0048] In one specific embodiment, the reconstruction mode control circuit 6 is equipped with a counter for counting the number of short pulse signals that switch pixel reconstruction modes, and the maximum count value of the counter is set to the total number of pixel reconstruction modes.

[0049] In one specific embodiment, the total number of pixel reconstruction modes is the number of pixel units 3 composed of n1×n2 SPADs and their corresponding front-end circuits that can be selected from the reconfigurable pixel module 2 composed of m1×m2 SPADs and their corresponding front-end circuits 1. The total number of pixel reconstruction modes is based on the set values ​​of m1, m2 and n1, n2, and also represents the maximum number of pixel reconstruction modes allowed by the reconfigurable system of the present invention.

[0050] In one specific embodiment, the signal processing circuit 5 includes, but is not limited to, a time-to-digital converter circuit.

[0051] In a specific embodiment, such as Figure 4 As shown, in this embodiment, 3x3 = 9 SPADs and their corresponding front-end circuits 1 are used as a reconfigurable pixel unit 3, and 4x4 = 16 SPADs and their corresponding front-end circuits are used to form a reconfigurable pixel module 2. In pixel reconstruction mode, the multiplexer 4 can be controlled by the control signal to select 3x3 = 9 SPADs and their corresponding front-end circuits 1 to form a pixel unit 3. In a reconfigurable pixel module 2, all of them can reconstruct 4 pixel units 3, that is, there are 4 pixel reconstruction modes (e.g., ...). Figure 4 In this circuit, the reconstructable pixel units 3 in the four modes share a single signal processing circuit 5, and one reconstructable pixel module 2 corresponds to one signal processing circuit 5. The reconstructing mode control circuit 6, if the imaging function of the current pixel reconstructing mode is realized, generates a short pulse signal based on the distance information conversion completion signal to switch the pixel reconstructing mode, controlling the multiplexer 4 to reselect the pixel unit 3 in the reconstructable pixel module 2, i.e., switching to the next pixel reconstructing mode.

[0052] In a specific embodiment, such as Figure 5 As shown, in this embodiment, 2x2=4 SPADs and their corresponding front-end circuits 1 are used as a certain reconfigurable pixel unit 3, and 3x3=9 SPADs and their corresponding front-end circuits are used to form a reconfigurable pixel module 2.

[0053] In this embodiment, the multiplexer 4 has 3 x 3 = 9 input ports, which represents the number of SPADs and their corresponding front-end circuits 1 in the reconfigurable pixel module 2; the multiplexer 4 has 2 x 2 = 4 output ports, which represents the number of SPADs and their corresponding front-end circuits in the pixel unit 3. The number of SPADs and their corresponding front-end circuits 1 in the reconfigurable pixel module 2 is set to 3 x 3 = 9, which forms four pixel units 3 that are sequentially accessed from the upper left, upper right, lower left, and lower right within a 3 x 3 area, with a ratio of 2 x 2.

[0054] Then, in this embodiment, a counter is used to count the number of short pulse signals that switch the pixel reconstruction mode, and its maximum count value is the number of pixel units 3 composed of 2 x 2 SPADs and their corresponding front-end circuits 1 that can be selected within the reconfigurable block composed of 3 x 3 SPADs and their corresponding front-end circuits 1, that is, 4.

[0055] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the claims of the present invention.

Claims

1. A reconfigurable system for improving the imaging resolution of a single-photon avalanche diode, characterized in that: The reconfigurable system includes: K items are composed of m1 (2) A reconfigurable pixel module consisting of m2 SPADs and corresponding front-end circuits. Multiplexer (4) is used to select n1 in reconfigurable pixel module (2). n2 SPADs and their corresponding front-end circuits (1) are combined or switched, wherein n1 n2 SPADs and their corresponding front-end circuits (1) constitute a pixel unit (3); where K, m1, m2, n1, and n2 are all positive integers greater than 0, and m1 is greater than or equal to n1, and m2 is greater than or equal to n2; The signal processing circuit (5) is used to process and quantize the output of the pixel unit (3) in the reconfigurable pixel module (2) to obtain the final distance information quantization result; The reconstruction mode control circuit (6) has its input terminal electrically connected to the output terminal of the signal processing circuit (5) and is used to receive the distance information conversion completion signal sent by the signal processing circuit (5) in the pixel reconstruction mode; its output terminal is electrically connected to the selection control terminal of the multiplexer (4) and is used to generate a short pulse signal for switching the pixel reconstruction mode according to the distance information conversion completion signal, thereby controlling the multiplexer (4) to reselect the pixel unit (3) in the reconstructable pixel module (2), that is, to switch to the next pixel reconstruction mode; Each reconfigurable pixel module (2) is connected to a signal processing circuit (5); and in the same reconfigurable pixel module (2), all reconstructed pixel units (3) share a signal processing circuit (5). If there is a shared SPAD and its corresponding front-end circuit (1) among the multiple reconfigurable pixel modules (2), the shared SPAD and its corresponding front-end circuit (1) are connected to the corresponding signal processing circuit (5) of the multiple reconfigurable pixel modules (2). The SPAD and its corresponding front-end circuit (1) that are not shared in the reconfigurable pixel module (2) are only connected to the corresponding signal processing circuit (5) of the reconfigurable pixel module (2).

2. The reconfigurable system for improving the imaging resolution of a single-photon avalanche diode according to claim 1, characterized in that: The number of input ports of the multiplexer (4) is m1 m2 is the same as the number of SPADs and their corresponding front-end circuits (1) in the reconfigurable pixel module (2); the number of output ports of the multiplexer (4) is n1. n2 is the same as the number of SPADs and their corresponding front-end circuits (1) in the pixel unit (3).

3. The reconfigurable system for improving the imaging resolution of a single-photon avalanche diode according to claim 1, characterized in that: The reconstruction mode control circuit (6) is equipped with a counter to count the number of short pulse signals that switch pixel reconstruction modes. The maximum count value of the counter is set to the total number of pixel reconstruction modes.

4. The reconfigurable system for improving the imaging resolution of a single-photon avalanche diode according to claim 3, characterized in that: The total number of pixel reconstruction modes is n1 The pixel unit (3) consists of n2 SPADs and their corresponding front-end circuits in m1 The number of selectable pixels in a reconfigurable pixel module (2) consisting of m2 SPADs and their corresponding front-end circuits (1).

5. The reconfigurable system for improving the imaging resolution of a single-photon avalanche diode according to claim 1, characterized in that: When reconstructing the SPAD and corresponding front-end circuit that make up the pixel unit (3), new pixels are inserted between the original pixels in a time-division multiplexing manner.

6. The reconfigurable system for improving the imaging resolution of a single-photon avalanche diode according to claim 1, characterized in that: The signal processing circuit (5) includes, but is not limited to, a time-to-digital converter circuit.

7. The reconfigurable system for improving the imaging resolution of a single-photon avalanche diode according to claim 1, characterized in that: The SPAD and its corresponding front-end circuit (1) are used to receive photon signals, convert them into digital pulse signals, and quench and reset the SPAD.

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