Semiconductor device and method of manufacturing the same

Abstract

To suppress the increase in manufacturing costs and improve the reliability of semiconductor devices. The semiconductor device (1) includes a light-emitting element (2), a light-receiving element (3), and a chip pad (20) made of a conductive material. The chip pad (20) includes a first region (20A) and a second region (20B) having a thickness greater than that of the first region (20A). The light-receiving element (3) is disposed on the upper surface of the first region (20A) in a manner electrically insulated relative to the chip pad (20). The light-emitting element (2) is disposed on the upper surface of the second region (20B) via a conductive adhesive layer (5) inside a through-hole (4) of the light-receiving element (3). The positions of the upper surfaces of the light-emitting element (2) and the light-receiving element (3) are consistent within a range of less than 5 μm.

Description

Technical Field

[0001] This invention relates to a semiconductor device and a method for manufacturing the same, and in particular, to a semiconductor device having a light-emitting element and a light-receiving element and a method for manufacturing the same. Background Technology

[0002] In recent years, semiconductor devices such as optical couplers have been developed, which combine light-emitting elements that convert electrical signals into light and emit light, and light-receiving elements that convert received light into electrical signals. The light emitted from the light-emitting element is reflected by the object being measured and received by the light-receiving element.

[0003] For example, Patent Document 1 discloses an optical coupler in order to improve the light detection sensitivity, such that the height of the light-emitting surface of the light-emitting element and the height of the light-receiving surface of the light-receiving element are substantially on the same plane, so that the distance from the light-emitting surface to the measured object is substantially equal to the distance from the measured object to the light-receiving surface.

[0004] Furthermore, in order to form such a structure, in Patent Document 1 Figure 1 In this method, a light-emitting element is housed inside a hole in a lead frame, and a lead frame is inserted into a recess in a light-receiving element, thereby fixing both the light-emitting element and the light-receiving element to the lead frame. Additionally, in Patent Document 1... Figure 6 In this embodiment, the light-emitting element and the light-receiving element are not disposed on the lead frame, but are insulated from each other by being covered by resin. Furthermore, in Patent Document 1... Figure 9 In this process, the light-emitting element and the light-receiving element are mounted on a lead frame of a certain thickness via an adhesive.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent No. 6620176 Summary of the Invention

[0008] The technical problem that the invention aims to solve

[0009] In patent document 1 Figure 1 In this method, a recess is provided on the light-receiving element; however, the processing technology required to realize this structure is difficult, and the manufacturing process is increased, thus increasing manufacturing costs. Furthermore, in Patent Document 1... Figure 6 In this method, light-emitting and light-receiving elements are mounted without using chip pads. However, in particular, with the increasing size of the package, there are issues with ensuring reliable mounting. Furthermore, as in Patent Document 1... Figure 9As shown, if the light-emitting element and the light-receiving element are simply arranged on a lead frame with a certain thickness, the conductive adhesive will come into contact with the side or lower surface of the light-receiving element, posing a risk of short circuit between the light-emitting element and the lead frame. That is, there is a risk of reducing the functionality and reliability of the semiconductor device.

[0010] The primary objective of this application is to mitigate the increase in manufacturing costs and improve the reliability of semiconductor devices. Other technical issues and new features are clarified through the description and accompanying drawings.

[0011] Technical solutions for solving technical problems

[0012] One embodiment of the semiconductor device includes: a light-emitting element having a light-emitting region; a light-receiving element having a light-receiving region; and a chip pad made of a conductive material. The chip pad includes a first region and a second region, the second region having a thickness greater than the first region and being surrounded by the first region when viewed from above. A through-hole is provided on the light-receiving element, the light-receiving element being disposed on the upper surface of the first region in an electrically insulating manner relative to the chip pad. The light-emitting element is disposed on the upper surface of the second region via a conductive first adhesive layer inside the through-hole. The position of the upper surface of the light-emitting element and the position of the upper surface of the light-receiving element are consistent within a range of 5 μm or less.

[0013] A method for manufacturing a semiconductor device in one embodiment includes the following steps: (a) preparing a metal plate made of a conductive material, a light-emitting element having a light-emitting region, and a light-receiving element having a light-receiving region and having a through-hole; (b) after step (a), selectively etching the metal plate to form a chip pad including a first region and a second region having a thickness greater than the first region and being surrounded by the first region in a top view; (c) after step (b), selectively etching the metal plate to physically separate it from the chip pad in a top view. The process involves: (d) forming a plurality of lead terminals on the outer periphery of the chip pads; (e) after step (c), depositing the light-receiving element on the upper surface of the first region in a manner electrically insulated from the chip pads; (f) after step (c), depositing the light-emitting element on the upper surface of the second region via a first adhesive layer, located inside the through-hole; and (g) after steps (d) and (e), electrically connecting the light-receiving element and the plurality of lead terminals with a first bonding wire, and electrically connecting the light-emitting element and the light-receiving element with a second bonding wire. The positions of the upper surfaces of the light-emitting element and the light-receiving element are consistent within a range of less than 5 μm.

[0014] A method for manufacturing a semiconductor device in one embodiment includes the following steps: (a) preparing a first metal plate made of a conductive material, a second metal plate made of a conductive material, a light-emitting element having a light-emitting region, and a light-receiving element having a light-receiving region and a through-hole; (b) after step (a), selectively etching the first metal plate to form a chip pad and a plurality of first lead terminal components, the chip pad including a first region and a second region having a thickness greater than the first region and being surrounded by the first region in plan view, the plurality of first lead terminal components being formed on the periphery of the chip pad in plan view in a manner physically separated from the chip pad; (c) after step (a), selectively etching the second metal plate to form a plurality of second lead terminal components; (d) after steps (b) and (c), mounting the light-emitting element on a substrate such that the light-emitting element is located inside the through-hole. The process includes: (e) a step where, after step (d), the upper surface of the light-emitting element, the upper surface of the second region is bonded to the lower surface of the light-emitting element via a conductive first adhesive layer, and the upper surfaces of the plurality of first lead terminal components are bonded to the lower surfaces of the plurality of second lead terminal components via conductive third adhesive layers; (f) a step where, after step (e), a resin layer is disposed between the light-emitting element and the chip pad, the light-emitting element, the first adhesive layer, the plurality of first lead terminal components, and the plurality of second lead terminal components, by embedding the through-hole; (g) a step where, after step (f), the substrate is removed; and (h) a step where, after step (g), the light-emitting element and the plurality of second lead terminal components are electrically connected by a first bonding wire, and the light-emitting element and the light-emitting element are electrically connected by a second bonding wire. The positions of the upper surface of the light-emitting element and the upper surface of the light-receiving element are consistent within a range of less than 5 μm.

[0015] The effects of the invention

[0016] According to one implementation, the increase in manufacturing costs can be suppressed and the reliability of semiconductor devices can be improved. Attached Figure Description

[0017] Figure 1 This is a top view showing the semiconductor device in Embodiment 1.

[0018] Figure 2 This is a bottom view showing the semiconductor device in Embodiment 1.

[0019] Figure 3 This is a top view showing the chip pads and multiple lead terminals of Embodiment 1.

[0020] Figure 4 This is a cross-sectional view showing the semiconductor device in Embodiment 1.

[0021] Figure 5 This is a cross-sectional view showing the manufacturing method of the semiconductor device in Embodiment 1.

[0022] Figure 6 It means to continue Figure 5 A cross-sectional view of a method for manufacturing a semiconductor device.

[0023] Figure 7 It means to continue Figure 6 A cross-sectional view of a method for manufacturing a semiconductor device.

[0024] Figure 8 It means to continue Figure 7 A cross-sectional view of a method for manufacturing a semiconductor device.

[0025] Figure 9 It means to continue Figure 8 A cross-sectional view of a method for manufacturing a semiconductor device.

[0026] Figure 10 It means to continue Figure 9 A cross-sectional view of a method for manufacturing a semiconductor device.

[0027] Figure 11 This is a top view showing the semiconductor device in Embodiment 2.

[0028] Figure 12 This is a cross-sectional view showing the semiconductor device in Embodiment 2.

[0029] Figure 13 This is a cross-sectional view showing the manufacturing method of the semiconductor device in Embodiment 2.

[0030] Figure 14 It means to continue Figure 13 A cross-sectional view of a method for manufacturing a semiconductor device.

[0031] Figure 15 It means to continue Figure 14 A cross-sectional view of a method for manufacturing a semiconductor device.

[0032] Figure 16 It means to continue Figure 15 A cross-sectional view of a method for manufacturing a semiconductor device.

[0033] Figure 17 It means to continue Figure 16A cross-sectional view of a method for manufacturing a semiconductor device.

[0034] Figure 18 It means to continue Figure 17 A cross-sectional view of a method for manufacturing a semiconductor device.

[0035] Figure 19 This is a top view showing the semiconductor device in the modified example.

[0036] Figure 20 This is a cross-sectional view showing a semiconductor device in a modified example.

[0037] Figure 21 This is a top view showing the semiconductor device in Embodiment 3.

[0038] Figure 22 This is a cross-sectional view showing the semiconductor device in Embodiment 3.

[0039] Figure 23 This is a cross-sectional view showing the manufacturing method of the semiconductor device in Embodiment 3.

[0040] Figure 24 It means to continue Figure 23 A cross-sectional view of a method for manufacturing a semiconductor device.

[0041] Figure 25 It means to continue Figure 24 A cross-sectional view of a method for manufacturing a semiconductor device.

[0042] Figure 26 It means to continue Figure 25 A cross-sectional view of a method for manufacturing a semiconductor device.

[0043] Figure 27 It means to continue Figure 26 A cross-sectional view of a method for manufacturing a semiconductor device. Detailed Implementation

[0044] Hereinafter, embodiments will be described in detail based on the accompanying drawings. It should be noted that throughout all the drawings used to describe the embodiments, components with the same function are labeled with the same reference numerals, and repeated descriptions are omitted. Furthermore, in the following embodiments, descriptions of the same or identical parts will generally not be repeated unless specifically required.

[0045] Furthermore, the X, Y, and Z directions described in this application intersect and are orthogonal to each other. In this application, the Z direction is described as the longitudinal, vertical, height, or thickness direction of a structure. Additionally, the term "top view" used in this application refers to a surface formed by the X and Y directions as viewed from the Z direction.

[0046] (Implementation Method 1)

[0047] <Structure of Semiconductor Devices>

[0048] The following uses Figures 1-4 The semiconductor device 1 in Embodiment 1 will be described. Figure 1 This is a top view showing semiconductor device 1. Figure 2 This is a bottom view showing semiconductor device 1. Figure 3 This is a top view showing only the chip pads 20 and multiple lead terminals 30 in the semiconductor device 1. Figure 4 It is along Figures 1-3 The cross-sectional view shown along line AA.

[0049] In embodiment 1, the semiconductor device 1 is, for example, an optical coupler suitable for use with an optical encoder. Figures 1-3 As shown, the semiconductor device 1 includes a light-emitting element 2, a light-receiving element 3, a chip pad 20, and multiple lead terminals 30.

[0050] The light-emitting element 2 has a light-emitting area, such as that of a light-emitting diode. The light-receiving element 3 has a light-receiving area, such as that of a photodiode, and multiple transistors for driving the photodiode. Light emitted from the light-emitting element 2 is reflected by the object being measured (not shown), and the reflected light is received by the light-receiving element 3. Here, the upper surface of the light-emitting element 2 is called the light-emitting surface, and the upper surface of the light-receiving element 3 is called the light-receiving surface.

[0051] The chip pad 20 and multiple lead terminals 30 are made of a conductive material and can be formed by etching a metal plate 50. The multiple lead terminals 30 are disposed on the outer periphery of the chip pad 20 when viewed from above, in a manner that is physically separate from the chip pad 20.

[0052] like Figure 4 As shown, the chip pad 20 includes a first region 20A and a second region 20B, the second region 20B having a thickness greater than the first region 20A and being surrounded by the first region 20A when viewed from above.

[0053] A through hole 4 is provided on the light-receiving element 3, and the light-receiving element 3 is disposed on the upper surface of the first region 20A in a manner that is electrically insulated from the chip pad 20. In Embodiment 1, a resin layer 10 is provided on the upper surface of the first region 20A, and the light-receiving element 3 is disposed on the upper surface of the first region 20A via the resin layer 10 and the insulating adhesive layer 6.

[0054] The upper surface of the resin layer 10 is positioned approximately at the same level as the upper surface of the second region 20B. That is, the upper surface of the resin layer 10 is flush with the upper surface of the second region 20B.

[0055] The light-emitting element 2 is disposed on the upper surface of the second region 20B inside the through-hole 4 via a conductive adhesive layer 5. That is, the light-emitting element 2 is surrounded by the light-receiving element 3 when viewed from above. In addition, the cathode side of the light-emitting region of the light-emitting element 2 is electrically connected to the chip pad 20 via the conductive adhesive layer 5.

[0056] Furthermore, the light-emitting element 2 and the light-receiving element 3 are electrically connected via the bonding wire 7. That is, the anode side of the light-emitting region of the light-emitting element 2 is electrically connected to the light-receiving element 3 via the bonding wire 7. In addition, the light-receiving element 3 and a plurality of lead terminals 30 are electrically connected via the bonding wire 7.

[0057] <Methods for Manufacturing Semiconductor Devices>

[0058] The following uses Figures 5-10 The manufacturing method of the semiconductor device 1 in Embodiment 1 will be described. It should be noted that... Figures 5-10 and Figure 4 Similarly, this is a sectional view along line AA.

[0059] First, prepare a metal plate 50, a light-emitting element 2, and a light-receiving element 3, all made of conductive materials. The metal plate 50 is, for example, copper, or a copper alloy in which tin, zirconium, or iron are added.

[0060] Next, as Figure 5 As shown, a resist pattern RP1 is formed on the upper surface of the metal plate 50. Then, as... Figure 6 As shown, the metal plate 50 is selectively etched using a resist pattern RP1 as a mask, and the metal plate 50 is processed to thin a portion of the metal plate 50. Thus, a chip pad 20 is formed, comprising a relatively thin first region 20A and a relatively thick second region 20B. The resist pattern RP1 is then removed. Furthermore, the height from the upper surface of the first region 20A to the upper surface of the second region 20B is, for example, in the range of 60% to 80% of the thickness of the metal plate 50 (the thickness of the second region 20B).

[0061] Next, as Figure 7 As shown, a resin layer 10 is formed on the upper surface of the first region 20A. The resin layer 10 is configured to be embedded in the step between the first region 20A and the second region 20B, and the upper surface of the resin layer 10 is flush with the upper surface of the second region 20B. Alternatively, after forming the resin layer across the step between the first region 20A and the second region 20B, the upper surface of the metal plate 50 can be ground to remove unwanted resin, thereby forming the resin layer 10 that fills the step between the first region 20A and the second region 20B. It should be noted that the resin layer 10 is made of an insulating resin, such as epoxy resin.

[0062] Next, as Figure 8 As shown, a resist pattern RP2 is formed on the lower surface of the metal plate 50. Next, the metal plate 50 is selectively etched using the resist pattern RP2 as a mask, and the metal plate 50 is processed such that a portion of the metal plate 50 is cut off. As a result, a lead frame LF1, which is configured with a plurality of lead terminals 30, is formed on the outer periphery of the chip pad 20 in a manner physically separated from the chip pad 20 when viewed from above. Then, the resist pattern RP2 is removed.

[0063] Next, as Figure 9 As shown, a light-receiving element 3 is disposed on the upper surface of the first region 20A via a resin layer 10 and an insulating adhesive layer 6 in a manner electrically insulated relative to the chip pad 20. Then, a light-emitting element 2 is disposed on the upper surface of the second region 20B via a conductive adhesive layer 5, located inside the through-hole 4 of the light-receiving element 3. The adhesive layer 5 is, for example, made of silver paste, and the adhesive layer 6 is, for example, made of a thermosetting resin. The thickness of each of the adhesive layers 5 and 6 is, for example, 10 μm or more and 20 μm or less.

[0064] It should be noted that the steps of setting the light-receiving element 3 and setting the light-emitting element 2 can be performed either first. Furthermore, the upper surface of the light-emitting element 2 and the upper surface of the light-receiving element 3 are essentially located on the same plane.

[0065] Next, as Figure 10 As shown, the light-receiving element 3 and a plurality of lead terminals 30 are electrically connected by bonding wire 7, and the light-emitting element 2 and the light-receiving element 3 are electrically connected by bonding wire 7. Then, a resin layer 11 is used to seal the light-receiving element 3, covering the upper surface of each of the plurality of lead terminals 30, a portion of the upper surface of the light-receiving element 3, and the bonding wire 7, thereby manufacturing a light-receiving element 3. Figure 4 Semiconductor device 1 is shown.

[0066] <Main Effects of Implementation Method 1>

[0067] In the semiconductor device 1 of Embodiment 1, as in Patent Document 1 Figure 1 As shown, since it does not require complex processing techniques to form recesses on the light-receiving element 3, the semiconductor device 1 can be manufactured using relatively easy manufacturing techniques, thus suppressing the increase in manufacturing costs.

[0068] Furthermore, since the light-emitting element 2 and the light-receiving element 3 are mounted on the upper surface of the chip pad 20, they are compatible with those in Patent Document 1. Figure 6 Compared to the mounting method without lead frames shown, it is easier to ensure the reliability of the installation and can improve the reliability of the semiconductor device 1.

[0069] Furthermore, the upper surface of the light-emitting element 2 and the upper surface of the light-receiving element 3 are essentially located on the same plane. More specifically, the positions of the upper surfaces of the light-emitting element 2 and the upper surfaces of the light-receiving element 3 are consistent within a range of less than 5 μm.

[0070] As described above, the light emitted from the light-emitting element 2 is reflected by the object being measured, and the reflected light is received by the light-receiving element 3. Therefore, it is possible to make the distance from the upper surface (light-emitting area) of the light-emitting element 2 to the object being measured substantially equal to the distance from the object being measured to the upper surface (light-receiving area) of the light-receiving element 3. Therefore, the detection accuracy of the semiconductor device 1 can be improved.

[0071] It should be noted that the positions of the upper surfaces of the light-emitting element 2 and the light-receiving element 3 may not be completely identical, depending on the formation conditions of the adhesive layers 5 and 6 disposed below them. However, if the positions of the upper surfaces of both are identical within a range of less than 5 μm, the detection accuracy of the semiconductor device 1 can be significantly improved.

[0072] Furthermore, depending on the formation conditions of the insulating adhesive layer 6, voids may occur within the adhesive layer 6, making it impossible to adequately ensure insulation between the light-receiving element 3 and the chip pad 20. In contrast, in Embodiment 1, not only the adhesive layer 6 but also the resin layer 10 is provided below the light-receiving element 3. Therefore, even assuming the aforementioned voids exist, adequate insulation between the light-receiving element 3 and the chip pad 20 can be ensured, thus improving the reliability of the semiconductor device 1.

[0073] Furthermore, depending on the formation conditions of the conductive adhesive layer 5, there is a possibility that the adhesive layer 5 extends excessively from the light-emitting element 2 and approaches the light-receiving element 3. For example, as in Patent Document 1... Figure 9 As shown, if the light-emitting element 2 and the light-receiving element 3 are simply disposed on the chip pad 20 with a certain thickness, the conductive adhesive layer 5 will contact the side or lower surface of the light-receiving element 3, resulting in a short circuit between the light-receiving element 3, the light-emitting element 2, and the chip pad 20. To prevent such a short circuit, it is considered to extend the distance between the light-emitting element 2 and the light-receiving element 3 (the distance between the adhesive layer 5 and the adhesive layer 6). However, this would increase the size of the semiconductor device 1, making it impossible to promote the miniaturization of the semiconductor device 1.

[0074] On the other hand, in Embodiment 1, the upper surface of the resin layer 10 is flush with the upper surface of the second region 20B, and there is a boundary between the second region 20B and the resin layer 10. Since the second region 20B and the resin layer 10 are made of different materials, the extension mode of the adhesive layer 5 is different on the upper surface of the second region 20B and on the upper surface of the resin layer 10. That is, even assuming that the adhesive layer 5 extends on the upper surface of the second region 20B, it is difficult for the adhesive layer 5 to extend across the aforementioned boundary onto the upper surface of the resin layer 10. Therefore, the possibility of short circuits between the light-receiving element 3 and the light-emitting element 2 and the chip pad 20 can be suppressed without changing the size of the semiconductor device 1. That is, the reliability of the semiconductor device 1 can be improved while addressing the miniaturization of the semiconductor device 1.

[0075] It should be noted that, as Figure 4 As shown, ideally, the end of the adhesive layer 5 is located on the upper surface of the second region 20B in a manner that does not cross the boundary between the second region 20B and the resin layer 10.

[0076] (Implementation Method 2)

[0077] The following uses Figure 11 as well as Figure 12 The semiconductor device 1 in Embodiment 2 will be described. It should be noted that in the following description, the differences from Embodiment 1 will be mainly described, and the points that are repeated in Embodiment 1 will be omitted. Figure 11 This is a top view showing semiconductor device 1. Figure 12 It is along Figure 11 The cross-sectional view shown along line AA.

[0078] like Figure 11 as well as Figure 12 As shown, in embodiment 2, the chip pad 20 includes a relatively thin first region 20A and a relatively thick second region 20B, which is the same as in embodiment 1. However, in embodiment 2, the resin layer 10 is not provided on the upper surface of the first region 20A; instead, the adhesive layer 6 is directly provided on the upper surface of the first region 20A, and the light-receiving element 3 is provided on the upper surface of the adhesive layer 6.

[0079] Therefore, Embodiment 1 is superior to Embodiment 2 in ensuring sufficient insulation between the light-receiving element 3 and the chip pad 20. However, in Embodiment 2, since the manufacturing process for setting the resin layer 10 can be omitted, the increase in manufacturing cost can be further suppressed compared to Embodiment 1.

[0080] Furthermore, due to the step between the first region 20A and the second region 20B, the distance (surface distance) from the light-emitting element 2 to the light-receiving element 3 increases. Additionally, surface tension is generated on the step, making it difficult for the adhesive layer 5 to contact the side or lower surface of the light-receiving element 3 even if the adhesive layer 5 extends excessively from the light-emitting element 2. Therefore, since it is difficult for the light-receiving element 3 to short-circuit with the light-emitting element 2 and the chip pad 20, the reliability of the semiconductor device 1 can be ensured. It should be noted that the height from the upper surface of the first region 20A to the upper surface of the second region 20B is, for example, in the range of 50% to 70% of the thickness of the metal plate 50 (the thickness of the second region 20B).

[0081] <Method for Manufacturing a Semiconductor Device according to Embodiment 2>

[0082] The following uses Figures 13-18 The manufacturing method of the semiconductor device 1 in Embodiment 2 will be described. It should be noted that... Figures 13-18 and Figure 12 Similarly, this is a sectional view along line AA.

[0083] First, similar to Embodiment 1, a metal plate 50 made of conductive material, a light-emitting element 2, and a light-receiving element 3 are prepared.

[0084] Next, as Figure 13 As shown, a resist pattern RP3 is formed on the upper surface of the metal plate 50. Next, the metal plate 50 is selectively etched using the resist pattern RP3 as a mask to form chip pads 20 comprising a relatively thin first region 20A and a relatively thick second region 20B. Then, the resist pattern RP3 is removed.

[0085] Next, as Figure 14 As shown, a resist pattern RP4 is formed on the lower surface of the metal plate 50. Next, the metal plate 50 is selectively etched using the resist pattern RP4 as a mask, and a lead frame LF1 with multiple lead terminals 30 is formed on the outer periphery of the chip pad 20 in a manner physically separated from the chip pad 20 when viewed from above. Then, the resist pattern RP4 is removed.

[0086] Next, as Figure 15 As shown, the lower surfaces of the chip pads 20 (the lower surfaces of the first region 20A and the second region 20B) and the lower surfaces of multiple lead terminals 30 are mounted on the substrate 8. The substrate 8 only needs to be able to support the mounting, such as adhesive tape such as polyimide tape.

[0087] Next, as Figure 16As shown, a light-receiving element 3 is disposed on the upper surface of the first region 20A via an insulating adhesive layer 6 in a manner that is electrically insulated relative to the chip pad 20. Then, a light-emitting element 2 is disposed on the upper surface of the second region 20B via a conductive adhesive layer 5, such that it is located inside the through hole 4 of the light-receiving element 3.

[0088] It should be noted that the steps of setting the light-receiving element 3 and setting the light-emitting element 2 can be performed either first. Furthermore, the upper surface of the light-emitting element 2 and the upper surface of the light-receiving element 3 are essentially located on the same plane.

[0089] Next, as Figure 17 As shown, the light-receiving element 3 and a plurality of lead terminals 30 are electrically connected by bonding wire 7, and the light-emitting element 2 and the light-receiving element 3 are electrically connected by bonding wire 7.

[0090] Next, as Figure 18 As shown, a resin layer 11 is used to seal the surface of each of the multiple lead terminals 30, a portion of the upper surface of the light-receiving element 3, and the bonding wire 7. Here, the resin layer 11 is also provided between the light-receiving element 3 and the multiple lead terminals 30, and between the chip pad 20 and the multiple lead terminals 30. Next, the substrate 8 is removed. That is, if the substrate 8 is adhesive tape, the substrate 8 is peeled off. The above completes the manufacturing process. Figure 12 Semiconductor device 1 is shown.

[0091] (A variation of Implementation Method 2)

[0092] The following uses Figure 19 as well as Figure 20 The semiconductor device 1 in the modified example of Embodiment 2 will be described. Figure 19 This is a top view showing semiconductor device 1. Figure 20 It is along Figure 19 The cross-sectional view shown along line AA.

[0093] In the variant example, such as Figure 19 as well as Figure 20 As shown, the second region 20B includes: a mounting portion 21 on which a light-emitting element 2 is disposed; a peripheral portion 22 surrounding the mounting portion 21 when viewed from above; and a groove portion 23 disposed between the mounting portion 21 and the peripheral portion 22. The depth of the groove portion 23 from the upper surface of the mounting portion 21 or the upper surface of the peripheral portion 22 is, for example, in the range of 50% to 70% of the thickness of the metal plate 50 (the thickness of the mounting portion 21 or the thickness of the peripheral portion 22).

[0094] In a modified example, compared to embodiment 2, by providing a groove 23 in the second region 20B, the distance (distance along the surface) from the light-emitting element 2 to the light-receiving element 3 is further increased. Furthermore, even if the adhesive layer 5 expands, since the peripheral portion 22 becomes a wall, it is difficult for the adhesive layer 5 to cross the peripheral portion 22 and reach the light-receiving element 3. Therefore, it is even more difficult for the adhesive layer 5 to contact the side or lower surface of the light-receiving element 3, and it is even more difficult for the light-receiving element 3 to short-circuit with the light-emitting element 2 and the chip pad 20, thus further improving the reliability of the semiconductor device 1.

[0095] It should be noted that, here, the planar area of ​​the mounting portion 21 is larger than the planar area of ​​the light-emitting element 2, but the mounting portion 21 only needs to be large enough to stably mount the light-emitting element 2. That is, the planar area of ​​the mounting portion 21 can also be smaller than the planar area of ​​the light-emitting element 2.

[0096] In addition, in order to install the mounting part 21, the peripheral part 22, and the slot part 23, it is only necessary to... Figure 13 The resist pattern RP3 is changed to a pattern that exposes the area of ​​the groove 23 from the resist pattern RP3. Then, the resist pattern RP3 is used as a mask to etch the metal plate 50, thereby forming the groove 23 between the mounting portion 21 and the peripheral portion 22. Thus, in this modified example, since only the mask pattern needs to be changed, no additional manufacturing steps are added compared to embodiment 2.

[0097] (Implementation Method 3)

[0098] The following uses Figure 21 as well as Figure 22 The semiconductor device 1 in Embodiment 3 will now be described. It should be noted that in the following description, the differences from Embodiment 1 and Embodiment 2 will be mainly explained, and the points that are repeated in Embodiment 1 and Embodiment 2 will be omitted. Figure 21 This is a top view showing semiconductor device 1. Figure 22 It is along Figure 21 The cross-sectional view shown along line AA.

[0099] like Figure 21 as well as Figure 22 As shown, regarding the chip pad 20 including a relatively thin first region 20A and a relatively thick second region 20B, Embodiment 3 is the same as Embodiment 1 and Embodiment 2.

[0100] However, in embodiment 3, no adhesive layer 6 is provided between the light-receiving element 3 and the first region 20A. The light-receiving element 3 is insulated from the chip pad 20, the light-emitting element 2, the adhesive layer 5, and the plurality of lead terminals 30 by the resin layer 12. In other words, a resin layer 12 is provided between the light-receiving element 3 and the chip pad 20, the light-emitting element 2, the adhesive layer 5, and the plurality of lead terminals 30 by embedding a through hole 4.

[0101] When adhesive layer 6 is used, there are defects such as voids inside adhesive layer 6, which prevent sufficient insulation from being ensured. Therefore, by using a resin layer 12 of sufficient thickness, sufficient insulation can be ensured between the light-receiving element 3 and other structures such as chip pads 20.

[0102] To achieve this structure, in Embodiment 3, the thickness of each of the plurality of lead terminals 30 is greater than that in Embodiments 1 and 2, and the position of the upper surface of each of the plurality of lead terminals 30 is higher than the position of the upper surface of the second region 20B. Additionally, as... Figure 22 As shown, the upper surfaces of the plurality of lead terminals 30, the upper surface of the resin layer 12, the upper surface of the light-receiving element 3, and the upper surface of the light-emitting element 2 are at substantially the same height, becoming flush. Therefore, in Embodiment 3, the positions of the upper surfaces of the light-emitting element 2 and the upper surfaces of the light-receiving element 3 are consistent within a range of 5 μm or less.

[0103] By increasing the thickness of each of the multiple lead terminals 30, the thickness of the resin layer 12 can be adjusted during the manufacturing process, thereby increasing the distance between the light-receiving element 3 and the chip pad 20. In embodiment 3, a lead terminal 30 is formed by stacking multiple lead terminal components, thereby increasing the thickness of the lead terminal 30.

[0104] Here, the plurality of lead terminals 30 each include a first lead terminal component 30A and a second lead terminal component 30B disposed on the upper surface of the first lead terminal component 30A via a conductive adhesive layer 9.

[0105] Furthermore, since the first lead terminal component 30A and the chip pad 20 are formed by processing the same metal plate 50, the thickness of the first lead terminal component 30A is the same as the thickness of the second region 20B. Therefore, the thickness of the lead terminal 30, including the first lead terminal component 30A and the second lead terminal component 30B, is significantly thicker than the thickness of the second region 20B.

[0106] <Method for manufacturing a semiconductor device in Embodiment 3>

[0107] The following uses Figures 23-27 The manufacturing method of the semiconductor device 1 in Embodiment 3 will be described. It should be noted that... Figures 23-27 and Figure 22 This is also a sectional view along line AA.

[0108] First, prepare a lead frame LF1 made of conductive material, a lead frame LF2 made of conductive material, a light-emitting element 2, and a light-receiving element 3.

[0109] Figure 23 The lead frame LF1 shown is formed as follows. (The text abruptly ends here, likely due to an incomplete sentence or Figure 13 as well as Figure 14 Using the same etching process, the metal plate 50 is selectively etched to form a chip pad 20 including a relatively thin first region 20A and a relatively thick second region 20B. In a manner that is physically separated from the chip pad 20, a plurality of first lead terminal components 30A are formed on the outer periphery of the chip pad 20 when viewed from above.

[0110] On the other hand, the metal plate 60, prepared separately from the metal plate 50, is selectively etched using the same method to form a lead frame LF2 composed of multiple second lead terminal components 30B. The conductive metal used for the metal plate 60 can be the same material as the metal plate 50, or a different material can be used.

[0111] Next, as Figure 24 As shown, the upper surface of the light-emitting element 2, the upper surface of the light-receiving element 3, and the upper surface of the second lead terminal component 30B are mounted on the substrate 8 in such a way that the light-emitting element 2 is located inside the through hole 4.

[0112] Next, as Figure 25 As shown, the upper surface of the second region 20B is bonded to the lower surface of the light-emitting element 2 via an adhesive layer 5 in a manner that physically separates the light-receiving element 3 from the first region 20A. The upper surfaces of the multiple first lead terminal components 30A are bonded to the lower surfaces of the multiple second lead terminal components 30B via adhesive layers 9. The adhesive layer 9 is, for example, made of silver paste.

[0113] Next, as Figure 26 As shown, the light-receiving element 3, chip pad 20, light-emitting element 2, adhesive layer 5, multiple first lead terminal components 30A, and multiple second lead terminal components 30B are sealed with resin layer 12 by embedding through-hole 4. It should be noted that resin layer 12 is an insulating resin, such as epoxy resin. Next, the substrate 8 is removed. That is, if the substrate 8 is adhesive tape, the substrate 8 is peeled off.

[0114] Next, as Figure 27 As shown, the light-receiving element 3 and a plurality of lead terminals 30 are electrically connected by bonding wire 7, and the light-emitting element 2 and the light-receiving element 3 are electrically connected by bonding wire 7.

[0115] Then, a resin layer 11 is formed to cover the upper surfaces of each of the plurality of lead terminals 30, a portion of the upper surface of the light-receiving element 3, and the bonding wire 7, thereby manufacturing... Figure 22 Semiconductor device 1 is shown.

[0116] It should be noted that in embodiment 3, in order to increase the thickness of the lead terminal 30, the first lead terminal component 30A and the second lead terminal component 30B are stacked. However, the number of stacked lead terminal components is not limited to two, and can also be three or more. In this case, by etching the same metal plate, a lead frame (chip pad) equivalent to the thickness of one lead terminal component is also left between the second region 20B and the light-emitting element 2. By adjusting the number of stacked lead terminal components, the distance between the light-receiving element 3 and the chip pad 20 can be adjusted.

[0117] Alternatively, a metal plate thicker than the metal plate 50 can be prepared. By applying multiple resist patterns and multiple etching processes to a metal plate, a chip pad 20 including a first region 20A and a second region 20B, and a lead terminal 30 thicker than the second region 20B can be formed from the metal plate.

[0118] The present invention has been specifically described above based on the above embodiments, but the present invention is not limited to the above embodiments, and various modifications can be made without departing from its spirit.

[0119] Explanation of reference numerals in the attached figures

[0120] 1: Semiconductor device; 2: Light-emitting element; 3: Light-receiving element; 4: Through-hole; 5: Conductive adhesive layer; 6: Insulating adhesive layer; 7: Bonding wire; 8: Substrate; 9: Conductive adhesive layer; 10, 11, 12: Resin layer; 20: Chip pad; 20A: First region; 20B: Second region; 21: Mounting part; 22: Peripheral part; 23: Groove part; 30: Lead terminal; 30A: First lead terminal component; 30B: Second lead terminal component; 50, 60: Metal plate; LF1, LF2: Lead frame; RP1~RP4: Resist pattern.

Claims

1. A semiconductor device comprising: A light-emitting element having a light-emitting area; A light-receiving element having a light-receiving area; and Chip pads are made of conductive material. The chip pad includes a first region and a second region, the second region being thicker than the first region and surrounded by the first region when viewed from above. A through hole is provided on the light-receiving element, which penetrates the light-receiving element. The light-receiving element is disposed on the upper surface of the first region in a manner that is electrically insulated relative to the chip pads. The light-emitting element is disposed on the upper surface of the second region via a conductive first adhesive layer inside the through hole. The positions of the upper surface of the light-emitting element and the upper surface of the light-receiving element are consistent within a range of less than 5 μm.

2. The semiconductor device according to claim 1, The semiconductor device further includes a first resin layer, wherein the first resin layer is disposed on the upper surface of the first region such that its upper surface is flush with the upper surface of the second region. The light-receiving element is disposed on the upper surface of the first region via the first resin layer.

3. The semiconductor device according to claim 2, When viewed from above, the end of the first adhesive layer is located on the upper surface of the second region in a manner that does not cross the boundary between the second region and the first resin layer.

4. The semiconductor device according to claim 1, The semiconductor device further includes an insulating second adhesive layer disposed on the upper surface of the first region. The light-receiving element is disposed on the upper surface of the first region via the second adhesive layer. The height from the position of the upper surface of the first region to the position of the upper surface of the second region is in the range of more than 50% and less than 70% of the thickness of the second region.

5. The semiconductor device according to claim 4, The second region has a mounting portion on which the light-emitting element is disposed, a peripheral portion surrounding the mounting portion when viewed from above, and a groove portion disposed between the mounting portion and the peripheral portion. The depth of the groove from the upper surface of the mounting part or the upper surface of the peripheral part is within the range of 50% to 70% of the thickness of the mounting part or the thickness of the peripheral part.

6. The semiconductor device according to claim 1, further comprising: Multiple lead terminals, physically separated from the chip pads, are disposed on the outer periphery of the chip pads when viewed from above, and are made of a conductive material; and A bonding wire electrically connects the light-receiving element to the plurality of lead terminals. The upper surface of each of the plurality of lead terminals is positioned higher than the upper surface of the second region. A second resin layer is provided between the light-receiving element and the chip pad, the light-emitting element, the first adhesive layer, and the plurality of lead terminals, in such a way as to embed the through hole.

7. The semiconductor device according to claim 6, The plurality of lead terminals each include a first lead terminal component and a second lead terminal component, wherein the second lead terminal component is disposed on the upper surface of the first lead terminal component via a conductive third adhesive layer. The bonding wire electrically connects the light-receiving element and a plurality of the second lead terminal components.

8. The semiconductor device according to claim 7, The thickness of the first lead terminal component is the same as the thickness of the second region.

9. A method for manufacturing a semiconductor device, comprising the following steps: (a) Process: Prepare a metal plate made of conductive material, a light-emitting element having a light-emitting area, and a light-receiving element having a light-receiving area and a through hole. (b) Step, after step (a), selectively etching the metal plate to form a chip pad including a first region and a second region having a thickness greater than the first region and being surrounded by the first region when viewed from above; (c) Step after step (b) involves selectively etching the metal plate to form multiple lead terminals on the outer periphery of the chip pads in a top view, in a manner that physically separates the metal plate from the chip pads. (d) Step, after step (c), the light-receiving element is disposed on the upper surface of the first region in a manner electrically insulated from the chip pads; (e) Step (c) After step (c), the light-emitting element is disposed on the upper surface of the second region via a first adhesive layer in such a manner that it is located inside the through hole; as well as (f) Step (d) involves electrically connecting the light-receiving element and the plurality of lead terminals using a first bonding wire, and electrically connecting the light-emitting element and the light-receiving element using a second bonding wire. The positions of the upper surface of the light-emitting element and the upper surface of the light-receiving element are consistent within a range of less than 5 μm.

10. The method for manufacturing a semiconductor device according to claim 9, The manufacturing method further includes step (g), which is performed between steps (b) and (c), wherein the first resin layer is deposited on the upper surface of the first region in such a manner that the upper surface of the first resin layer is flush with the upper surface of the second region. In step (d), the light-receiving element is disposed on the upper surface of the first region via the first resin layer.

11. The method for manufacturing a semiconductor device according to claim 10, When viewed from above, the end of the first adhesive layer is located on the upper surface of the second region in a manner that does not cross the boundary between the second region and the first resin layer.

12. The method for manufacturing a semiconductor device according to claim 9, In step (d), the light-receiving element is disposed on the upper surface of the first region via an insulating second adhesive layer. The height from the position of the upper surface of the first region to the position of the upper surface of the second region is more than 50% and less than 70% of the thickness of the second region.

13. The method for manufacturing a semiconductor device according to claim 12, In step (b), the metal plate is etched such that the second region has a mounting portion, a peripheral portion surrounding the mounting portion in a top view, and a groove provided between the mounting portion and the peripheral portion. The depth of the groove from the upper surface of the mounting portion or the upper surface of the peripheral portion is in the range of 50% to 70% of the thickness of the mounting portion or the thickness of the peripheral portion. In step (e), the light-emitting element is disposed on the upper surface of the mounting portion via the first adhesive layer.

14. A method for manufacturing a semiconductor device, comprising the following steps: (a) A process of preparing a first metal plate made of a conductive material, a second metal plate made of a conductive material, a light-emitting element having a light-emitting area, and a light-receiving element having a light-receiving area and having a through hole. (b) Step, after step (a), selectively etching the first metal plate to form a chip pad and a plurality of first lead terminal components, the chip pad including a first region and a second region having a thickness greater than the first region and being surrounded by the first region in top view, the plurality of first lead terminal components being formed on the periphery of the chip pad in a manner physically separate from the chip pad in top view; (c) Step, after step (a), involves selectively etching the second metal plate to form a plurality of second lead terminal components; (d) Step, after steps (b) and (c), the upper surface of the light-emitting element, the upper surface of the light-receiving element, and the upper surface of the plurality of second lead terminal components are mounted on the substrate in such a way that the light-emitting element is located inside the through hole; (e) After step (d), the upper surface of the second region is bonded to the lower surface of the light-emitting element via a conductive first adhesive layer in such a way that the light-receiving element is physically separated from the first region, and the upper surfaces of the plurality of first lead terminal components are bonded to the lower surfaces of the plurality of second lead terminal components via conductive third adhesive layers. (f) Step after step (e) involves depositing a resin layer between the light-receiving element and the chip pad, the light-emitting element, the first adhesive layer, the plurality of first lead terminal components, and the plurality of second lead terminal components by embedding the through-hole. (g) Step, after step (f), remove the substrate; as well as In step (h), after step (g), the light-receiving element and the plurality of second lead terminal components are electrically connected using a first bonding wire, and the light-emitting element and the light-receiving element are electrically connected using a second bonding wire. The positions of the upper surface of the light-emitting element and the upper surface of the light-receiving element are consistent within a range of less than 5 μm.

15. The method for manufacturing a semiconductor device according to claim 14, The thickness of the first lead terminal component is the same as the thickness of the second region.

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