An inspection tool and method

Abstract

A detection tool and a detection method, the detection tool comprising: a control circuit, a voltage switching circuit, a channel switching circuit; the control circuit is further configured to select a to-be-tested channel from the N digital input acquisition channels in sequence, and for the selected to-be-tested channel, the following operations are performed until the detection of all to-be-tested channels is completed: a first switching signal is sent to the channel switching circuit according to the selected to-be-tested channel; for the selected to-be-tested channel, the following operations are performed until all test voltages in a preset test voltage set are tested: a test voltage is selected from the test voltage set in sequence, and a second switching signal is sent to the voltage switching circuit according to the selected test voltage; and the selected to-be-tested channel is detected according to first data at an output end of the voltage switching circuit and second data acquired by the digital input acquisition channel.

Description

Technical Field

[0001] This article relates to testing technology, and in particular to a testing tooling and testing method. Background Technology

[0002] Digital input acquisition modules are widely used in rail transit ground products such as train control centers and interlocking systems. These modules are used to acquire the status of external relays, and determine the status of the relays by whether or not an external voltage is acquired.

[0003] The rated input voltage of the digital input module's input acquisition port is 24V DC. The digital input module has 32 DI acquisition channels, supports dual-contact acquisition, and can be configured for both dual-front-contact and front-and-back-contact modes. Each channel internally consists of current-limiting resistors, threshold resistors, optocoupler isolators, etc. The channel status detection voltage of the digital input module is designed to be approximately 14.5V. That is, if the voltage of each digital input channel is greater than 14.5V, the CPU of the digital input module considers the external channel to be in state 1, and the determined acquisition value is 1. When the voltage of the input channel is less than 14.5V, the CPU of the digital input module considers the external channel to be in state 2, and the determined acquisition value is 0. See [link to DI acquisition circuit details] for more information on the digital input module. Figure 1 .

[0004] In existing digital input module testing equipment, when the testing equipment tests the digital input module under test, if the acquisition voltage connected to the acquisition channel of the digital input module under test exceeds 20V, the digital input module under test considers the external channel state to be 1 and determines the acquisition value to be 1. If the acquisition voltage connected to the acquisition channel of the digital input module under test is lower than 9V, the digital input module under test considers the external channel state to be 2 and determines the acquisition value to be 0.

[0005] Problems with existing digital input module testing equipment: When testing the digital input acquisition status, the parameters of the internal components and the board may shift due to factors such as aging of internal components and environmental changes, causing the board to operate in an unstable state. The designed channel status detection voltage may shift upward or downward. When the detection voltage shifts upward by more than 20V or downward by less than 9V, the acquisition status is incorrect. There are also cases where the component parameters are unstable. Changes in the external environment can cause the input acquisition voltage to drift and become unstable, resulting in momentary acquisition status detection errors on the board under test. Summary of the Invention

[0006] This application provides a testing fixture and testing method, which improves the accuracy of judging the status of circuit boards.

[0007] This application provides a testing fixture for use on a board containing a digital input module, wherein the digital input module includes N digital input acquisition channels, where N is an integer greater than 0, characterized in that it includes: a control circuit, a voltage switching circuit, and a channel switching circuit;

[0008] The control circuit is further configured to sequentially select the channel to be tested from the N digital input acquisition channels, and for each selected channel to be tested, perform the following operations until the testing of all channels to be tested is completed:

[0009] A first switching signal is sent to the channel switching circuit according to the selected channel under test; for the selected channel under test, the following operations are performed until all test voltages in the preset test voltage set are tested: test voltages are selected sequentially from the test voltage set, and a second switching signal is sent to the voltage switching circuit according to the selected test voltage; the selected channel under test is tested according to the first data at the output of the voltage switching circuit and the second data acquired by the digital input acquisition channel;

[0010] The voltage switching circuit is configured to output the actual test voltage based on the second switching signal and the preset DC voltage.

[0011] The channel switching circuit is configured to switch channels according to the first switching signal, so as to connect the digital input acquisition channel to be measured to the voltage switching circuit.

[0012] In one exemplary embodiment, the testing fixture further includes an analog signal acquisition and conversion circuit and a communication circuit;

[0013] The analog signal acquisition and conversion circuit is configured to acquire the first data and feed it back to the control circuit.

[0014] The communication circuit is configured to transmit the second data.

[0015] In one exemplary embodiment, the testing fixture further includes a power management circuit;

[0016] The power management circuit is configured to provide power to the voltage switching circuit, analog signal acquisition and conversion circuit, channel switching circuit, control circuit, and communication circuit.

[0017] In one exemplary embodiment, the voltage switching circuit includes a power acquisition sub-circuit, an output feedback sub-circuit, and an output switching control sub-circuit.

[0018] The output switching control subcircuit includes M switches, which are configured to close one of the switches corresponding to the first switching signal, thereby connecting the output feedback subcircuit and the power acquisition subcircuit.

[0019] The power acquisition sub-circuit is configured to output the actual test voltage based on the preset DC voltage.

[0020] The output feedback sub-circuit is configured to stabilize the actual test voltage within a preset range of the test voltage.

[0021] In one exemplary embodiment, the power acquisition sub-circuit includes a transistor, an inductor, and a first capacitor;

[0022] The first terminal of the transistor is configured to be connected to the preset DC voltage, the second terminal of the transistor is connected to the first terminal of the inductor, and the gate of the transistor is connected to the output terminal of the output feedback sub-circuit.

[0023] The second end of the inductor is connected to the first plate of the first capacitor; the second plate of the first capacitor is grounded.

[0024] In one exemplary embodiment, the output feedback sub-circuit includes voltage divider resistors, M feedback resistors, an operational amplifier, a comparator, an oscillator, and a first capacitor;

[0025] One end of each of the M feedback resistors is connected to one end of each of the M switches; the other ends of the M feedback resistors are connected together and then connected to the first end of the voltage divider resistor; the second end of the voltage divider resistor is grounded; the first end of the voltage divider resistor is connected to the inverting input of the operational amplifier; the non-inverting input of the operational amplifier is connected to the reference power supply; the output of the operational amplifier is connected to the inverting input of the comparator; the non-inverting input of the comparator is connected to the output of the oscillator; the output of the comparator serves as the output of the output feedback sub-circuit.

[0026] The first plate of the first capacitor is connected to the output terminal of the comparator, and the second plate of the first capacitor is connected to the second terminal of the transistor.

[0027] In one exemplary embodiment, the other end of the M switches is connected to the first plate of the first capacitor.

[0028] This application also provides a detection method, including:

[0029] A health assessment is performed on the selected test channel based on the test results obtained from the testing equipment.

[0030] The testing fixture is the testing fixture described in claims 1 to 7.

[0031] In one exemplary embodiment, the board is subjected to a health assessment based on the detection results of all channels of the board.

[0032] In one exemplary embodiment, a health assessment of the selected channel under test is performed based on the test results obtained by the testing equipment, including:

[0033] When the number of normal channels in the detection results corresponding to all test voltages of the channel under test is greater than or equal to the first preset number, the channel under test is determined to be in a healthy state.

[0034] When the number of normal channels in the test results corresponding to all test voltages is greater than or equal to the second preset number and less than the first preset number, it is determined that the test channel is in a sub-healthy state.

[0035] When the number of normal channels in the test results corresponding to all test voltages of the channel under test is less than the second preset number, it is determined that the channel under test is in a fault state.

[0036] The first preset quantity is greater than the second preset quantity.

[0037] In one exemplary embodiment, a health assessment of the board is performed based on the detection results of all channels of the board, including:

[0038] The board is deemed faulty when any channel of the board is in a faulty state.

[0039] When the number of channels in a sub-healthy state in all channels of the board exceeds a third preset number, the board is determined to be a sub-healthy board.

[0040] When the number of channels in a sub-healthy state among all channels of the board is less than a third preset number, the board is determined to be a healthy board.

[0041] In one exemplary embodiment, the first data includes voltage and current values;

[0042] The normal channel is determined as follows:

[0043] For any channel under test, if for any test voltage, the current value in the first data is within a preset range and the second data corresponds to the test voltage, then the test channel is determined to be a normal channel.

[0044] Other features and advantages of this application will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the application. Other advantages of this application can be realized and obtained by means of the solutions described in the description and the accompanying drawings. Attached Figure Description

[0045] The accompanying drawings are used to provide an understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.

[0046] Figure 1 For the DI acquisition channel logic of the digital input module in related technologies;

[0047] Figure 2 This is a schematic diagram of at least one testing tooling device according to an embodiment of this application;

[0048] Figure 3 This is a schematic diagram of at least one testing tooling device according to an embodiment of this application;

[0049] Figure 4 for Figure 3 The diagram shows the DI acquisition power switching circuit of the detection tooling equipment.

[0050] Figure 5 for Figure 3 The diagram shows the DI acquisition module of the testing fixture. Detailed Implementation

[0051] Figure 2 This is a schematic diagram of at least one testing fixture according to an embodiment of this application. The testing fixture is applied to a board containing a digital input module, wherein the digital input module includes N digital input acquisition channels, where N is an integer greater than 0. For example... Figure 2 As shown, the testing fixture in this embodiment includes: a control circuit, a voltage switching circuit, and a channel switching circuit;

[0052] The control circuit is further configured to sequentially select the channel to be tested from the N digital input acquisition channels, and for each selected channel to be tested, perform the following operations until the testing of all channels to be tested is completed:

[0053] A first switching signal is sent to the channel switching circuit according to the selected channel under test; for the selected channel under test, the following operations are performed until all test voltages in the preset test voltage set are tested: test voltages are selected sequentially from the test voltage set, and a second switching signal is sent to the voltage switching circuit according to the selected test voltage; the selected channel under test is tested according to the first data at the output of the voltage switching circuit and the second data acquired by the digital input acquisition channel;

[0054] The voltage switching circuit is configured to output the actual test voltage based on the second switching signal and the preset DC voltage.

[0055] The channel switching circuit is configured to switch channels according to the first switching signal, so as to connect the digital input acquisition channel to be measured to the voltage switching circuit.

[0056] In one exemplary embodiment, the preset DC voltage can be a 24V DC voltage.

[0057] In one exemplary embodiment, the N digital input acquisition channels can be arranged in ascending order.

[0058] In one exemplary embodiment, the test voltages in the preset test voltage set can be arranged in an increasing order, in a decreasing order, or not according to a certain pattern.

[0059] In one exemplary embodiment, the range of test voltages in the preset test voltage set can be from 9V to 20V.

[0060] In one exemplary embodiment, the test voltages in the preset test voltage set may include 9V, 11V, 13V, 14.5V, 16V, 18V, and 20V.

[0061] In one exemplary embodiment, each digital input acquisition channel may correspond to a first switching signal. That is, there is a one-to-one correspondence between digital input acquisition channels and first switching signals.

[0062] In one exemplary embodiment, the channel switching circuit may include optocouplers. Each digital input acquisition channel corresponds one-to-one with an optocoupler.

[0063] In one exemplary embodiment, the testing fixture further includes an analog signal acquisition and conversion circuit and a communication circuit;

[0064] The analog signal acquisition and conversion circuit is configured to acquire the first data and feed it back to the control circuit.

[0065] The communication circuit is configured to transmit the second data.

[0066] In one exemplary embodiment, the testing fixture further includes a power management circuit;

[0067] The power management circuit is configured to provide power to the voltage switching circuit, analog signal acquisition and conversion circuit, channel switching circuit, control circuit, and communication circuit.

[0068] In one exemplary embodiment, the voltage switching circuit includes a power acquisition sub-circuit, an output feedback sub-circuit, and an output switching control sub-circuit.

[0069] The output switching control subcircuit includes M switches, which are configured to close one of the switches corresponding to the first switching signal, thereby connecting the output feedback subcircuit and the power acquisition subcircuit.

[0070] The power acquisition sub-circuit is configured to output the actual test voltage based on the preset DC voltage.

[0071] The output feedback sub-circuit is configured to stabilize the actual test voltage within a preset range of the test voltage.

[0072] In one exemplary embodiment, the power acquisition sub-circuit includes a transistor, an inductor, and a first capacitor;

[0073] The first terminal of the transistor is configured to be connected to the preset DC voltage, the second terminal of the transistor is connected to the first terminal of the inductor, and the gate of the transistor is connected to the output terminal of the output feedback sub-circuit.

[0074] The second end of the inductor is connected to the first plate of the first capacitor; the second plate of the first capacitor is grounded.

[0075] In one exemplary embodiment, the output feedback sub-circuit includes voltage divider resistors, M feedback resistors, an operational amplifier, a comparator, an oscillator, and a first capacitor;

[0076] One end of each of the M feedback resistors is connected to one end of each of the M switches; the other ends of the M feedback resistors are connected together and then connected to the first end of the voltage divider resistor; the second end of the voltage divider resistor is grounded; the first end of the voltage divider resistor is connected to the inverting input of the operational amplifier; the non-inverting input of the operational amplifier is connected to the reference power supply; the output of the operational amplifier is connected to the inverting input of the comparator; the non-inverting input of the comparator is connected to the output of the oscillator; the output of the comparator serves as the output of the output feedback sub-circuit.

[0077] The first plate of the first capacitor is connected to the output terminal of the comparator, and the second plate of the first capacitor is connected to the second terminal of the transistor.

[0078] In one exemplary embodiment, the first electrode of the transistor can be the source, the second electrode can be the drain, and the third electrode can be the gate.

[0079] In one exemplary embodiment, the first electrode of the transistor can be the drain, the second electrode can be the source, and the third electrode can be the gate.

[0080] In one exemplary embodiment, the reference power supply may be 1.25V.

[0081] In one exemplary embodiment, the resistance values ​​of the M feedback resistors and the voltage divider resistors are directly related to the desired output voltage. Figure 4 For example, in Figure 4 One end of the feedback resistor (R1…R7) is connected to the output voltage V0. The other end of the feedback resistor (R1…R7) is connected in series with the voltage divider resistor R8, and the two resistors generate a voltage divider. The other end of the feedback resistor (R1…R7) is connected to a comparator and compared with a reference voltage source Vref (typically a 1.25V reference). This forms a closed-loop negative feedback, achieving a stable output voltage. Figure 4 The voltage divider resistor is R8, and R1 to R7 are the feedback resistors. Therefore, V0 = Vref × R8 / Rf. When switch K1 is closed, R... f R1 equals R1 when switch K2 is closed. f This is equal to R2, and so on. In one exemplary embodiment, the other end of the M switches is connected to the first plate of the first capacitor.

[0082] This application provides a detection method, including:

[0083] A health assessment is performed on the selected test channel based on the test results obtained from the testing equipment.

[0084] The testing fixtures are those described above.

[0085] In one exemplary embodiment, the board is subjected to a health assessment based on the detection results of all channels of the board.

[0086] In one exemplary embodiment, a health assessment of the selected channel under test is performed based on the test results obtained by the testing equipment, including:

[0087] When the number of normal channels in the detection results corresponding to all test voltages of the channel under test is greater than or equal to the first preset number, the channel under test is determined to be in a healthy state.

[0088] When the number of normal channels in the test results corresponding to all test voltages is greater than or equal to the second preset number and less than the first preset number, it is determined that the test channel is in a sub-healthy state.

[0089] When the number of normal channels in the test results corresponding to all test voltages of the channel under test is less than the second preset number, it is determined that the channel under test is in a fault state.

[0090] The first preset quantity is greater than the second preset quantity.

[0091] In one exemplary embodiment, a health assessment of the board is performed based on the detection results of all channels of the board, including:

[0092] The board is deemed faulty when any channel of the board is in a faulty state.

[0093] When the number of channels in a sub-healthy state in all channels of the board exceeds a third preset number, the board is determined to be a sub-healthy board.

[0094] When the number of channels in a sub-healthy state among all channels of the board is less than a third preset number, the board is determined to be a healthy board.

[0095] In one exemplary embodiment, the first data includes voltage and current values;

[0096] The normal channel is determined as follows:

[0097] For any channel under test, if for any test voltage, the current value in the first data is within a preset range and the second data corresponds to the test voltage, then the test channel is determined to be a normal channel.

[0098] The detection method used in this application evaluates the functional and performance status of the digital input board under test in a graded and phased manner, providing three evaluation states: healthy, sub-healthy, and faulty. The sub-healthy state of the board can be detected early to identify any performance issues.

[0099] Figure 3 This is a schematic diagram of at least one testing fixture device according to an embodiment of this application, such as... Figure 3 As shown, the testing fixture consists of a control circuit (including a CPU (i.e., arithmetic processor), an FPGA (i.e., a programmable logic array)), a power management circuit, a communication circuit, a voltage switching circuit, a channel switching circuit, and an analog signal acquisition and conversion circuit.

[0100] Among them, the CPU, as the core control unit of the testing tooling equipment, completes the communication control with the digital input module under test, completes the communication control with the PFPGA programmable logic array, completes the voltage switching logic, completes the access logic of the adjustable DI power channel of the input interface, and completes the acquisition of voltage and current analog quantities of the DI acquisition channel.

[0101] The CPU performs only logical operations to determine the functional items and channels to be detected, and records the data parameters for each channel.

[0102] The FPGA receives control commands from the CPU; it then implements the following through these commands:

[0103] 1) FPGA implementation of channel switching for the channel under test;

[0104] 2) The FPGA implements the adjustable DI voltage switching function of the channel under test, providing multiple test voltages;

[0105] 3) The FPGA implements the adjustable DI power supply input function for the channel under test;

[0106] 4) The FPGA is used to implement the voltage and current acquisition functions of the channel under test;

[0107] Therefore, FPGA provides a bridge for external interfaces for CPU.

[0108] The power management circuit provides power to the system and DI input power to the board under test and the channel under test.

[0109] The communication circuit provides a communication channel for the testing tooling equipment and the board under test, and obtains the status of the board under test through the communication channel.

[0110] The voltage switching circuit provides different voltage levels of DI input power to the test channel of the board under test. The DI input power supply has 7 voltage level channels, selectable as 9V, 11V, 13V, 14.5V, 16V, 18V, and 20V; alternatively, it can offer 7 other voltage levels between 9V and 20V. The specific voltage levels and the number of voltage levels can be adjusted.

[0111] Voltage switching circuit (e.g.) Figure 4 (As shown) It includes a power acquisition sub-circuit, an output feedback sub-circuit, and an output switching control sub-circuit.

[0112] The main power supply unit uses a DC-DC BUCK circuit, including a MOS switch U5, a freewheeling diode D1, an energy storage inductor L1, and an energy storage capacitor C2. The first terminal of the MOS switch U5 is connected to a 24V power supply, and the first plate of the energy storage capacitor C2 serves as the output terminal of the voltage switching circuit. The second terminal of the MOS switch U5 is connected to the first terminal of the energy storage inductor L1, and the second terminal of the energy storage inductor L1 is connected to the first plate of the energy storage capacitor C2, which is grounded. The cathode of the freewheeling diode D1 is connected to the first terminal of the energy storage inductor L1, and the anode of the freewheeling diode D1 is grounded.

[0113] The output feedback sub-circuit includes voltage divider resistor R8 and feedback resistor Rf. Figure 4Each of resistors R1 to R7 can potentially serve as a feedback resistor (Rf), operational amplifier U3, comparator U4, voltage reference source REF, multivibrator OSC, and bootstrap capacitor C1. The voltage divider resistor R8 and the feedback resistor Rf feed the actual output voltage back to the non-inverting input of operational amplifier U3, which is connected to the REF reference source. Operational amplifier U3 performs a proportional calculation and signal conditioning on the voltage values ​​at its non-inverting and inverting inputs before outputting the signal to comparator U4. Comparator U4 compares the conditioned signal with the multivibrator OSC at its other input, generating a square wave signal to charge and discharge the bootstrap capacitor C1, which acts as the driving source for the MOSFET switch. When the actual output voltage is lower than the expected output voltage, the feedback output voltage signal causes operational amplifier U3 to output a larger analog signal to comparator U4. This analog signal is compared with the triangular wave generated by the multivibrator OSC, resulting in a larger duty cycle and thus increasing the output voltage. When the output voltage increases, due to the negative feedback principle, the output analog signal of operational amplifier U3 becomes lower. After the signal passes through comparator U4, the duty cycle also decreases synchronously, thereby stabilizing the signal to the expected output voltage.

[0114] The output switching control sub-circuit includes switches K1, K2, K3, K4, K5, K6, and K7. The switching states of switches K1, K2, K3, K4, K5, K6, and K7 are controlled by the FPGA. These switches are connected in series within the power acquisition system to control the magnitude of the feedback signal from the output power supply. This enables the output of 9V, 11V, 13V, 14.5V, 16V, 18V, and 20V power signals.

[0115] For example, some functions of the power acquisition and output feedback sub-circuit can also be implemented by the integrated DC-DC power control chip U1. The switching can be implemented by the switching switch group U2.

[0116] The board under test has 32 channels, each with two acquisition circuits, which together determine the external state. The testing equipment uses a channel switching circuit to poll and acquire data from all 32 channels and 64 acquisition circuits.

[0117] The switching switch of the channel switching circuit can be an integrated switching open-loop group, or a common relay or photoelectric relay switch, or it can be directly controlled by the controller, or it can be controlled by a combination of logic switches.

[0118] The analog signal acquisition and conversion circuit is set to acquire the voltage and current values ​​at the input terminals of the acquisition channels of the board under test.

[0119] The testing equipment also includes a display screen. This screen can display basic information about the circuit board, such as the board barcode, board model, module CPU version, and the tester's information. The screen can also display testing process information, such as the test items (e.g., channel interface testing, hardware interface testing, module function testing) and the test results for each item. The screen can also display the status of each channel, either as indicator lights or in other formats. For example, a green indicator light indicates that the corresponding channel is normal, a red indicator light indicates that the corresponding channel is abnormal, and a gray indicator light indicates that the corresponding channel has not been tested. The screen can also display test progress, DI acquisition mode, test time, and current threshold voltage value.

[0120] The testing fixture may also include a housing to accommodate the aforementioned circuits and display screen, etc.

[0121] Compared with traditional digital acquisition module testing fixtures, the embodiments of this application have the following advantages:

[0122] This application embodiment employs a method of injecting input acquisition voltages of different power levels into the input terminal of the digital input acquisition module (DI) under test, so that the board under test can be evaluated and tested within the full input voltage range.

[0123] This application embodiment comprehensively evaluates the detection channel status of the board under test by collecting voltage and current data from the detection channels of the board under test, as well as the channel status reported by the board under test itself.

[0124] This application employs a health assessment and testing method to evaluate the functional and performance status of the digital input board under test in stages and at different levels, providing three assessment states: healthy, sub-healthy, and faulty. The sub-healthy state of the board can be detected early to identify any performance issues.

[0125] The testing fixture used in this embodiment is small and portable.

[0126] The following describes the process of testing circuit boards using testing equipment.

[0127] Connect the testing fixture to the circuit board via a slot on the fixture's base plate. The slot and circuit board are compatible; inserting the circuit board into the fixture's base plate connects its DI acquisition channel to the fixture. With the DI acquisition mode set to dual front contact mode, the testing process for the circuit board is as follows:

[0128] S11. Perform testing on each channel;

[0129] The detection of each channel includes the following sub-steps S111-S117:

[0130] S111. When the DI input voltage is 9V, determine whether the channel status of the board under test is 0, and whether the current of the two acquisition circuits in a single channel is greater than 2mA and less than 4.5mA. If the channel status of the board under test is 0 and the channel current is greater than 2mA and less than 4.5mA, then the channel is considered normal; if the channel status of the board under test is not 0, or the channel current is less than 2mA, or the channel current is greater than 4.5mA, then the channel is considered abnormal. Proceed to step S112.

[0131] S112. When the DI input voltage is 11V, determine whether the channel status of the board under test is 0, and whether the current of the two acquisition circuits in a single channel is greater than 2.5mA and less than 5.7mA. If the channel status of the board under test is 0 and the channel current is greater than 2.5mA and less than 5.7mA, then the channel is considered normal. If the channel status of the board under test is not 0, or the channel current is less than 2.5mA, or the channel current is greater than 5.7mA, then the channel is considered abnormal. Proceed to step S113.

[0132] S113. When the DI input voltage is 13V, determine whether the channel status of the board under test is 0, and whether the current of the two acquisition circuits in a single channel is greater than 3.1mA and less than 7.0mA. If the channel status of the board under test is 0 and the channel current is greater than 3.1mA and less than 7.0mA, then the channel is considered normal. If the channel status of the board under test is not 0, or the channel current is less than 3.1mA, or the channel current is greater than 7.0mA, then the channel is considered abnormal. Proceed to step S114.

[0133] S114. When the DI input voltage is 14.5V, determine whether the current of the two acquisition circuits in a single channel is greater than 3.5mA and less than 8.0mA. If the channel current is greater than 3.5mA and less than 8.0mA, the channel is considered normal; if the channel current is less than 3.5mA or greater than 8.0mA, the channel is considered abnormal. Proceed to step S115.

[0134] S115. When the DI input voltage is 16V, determine whether the channel status of the board under test is 1, and whether the current of the two acquisition circuits in a single channel is greater than 4.0mA and less than 9.0mA. If the channel status of the board under test is 1 and the channel current is greater than 4.0mA and less than 9.0mA, then the channel is considered normal. If the channel status of the board under test is not 1, or the channel current is less than 4.0mA, or the channel current is greater than 9.0mA, then the channel is considered abnormal. Proceed to step S116.

[0135] S116. When the DI input voltage is 18V, determine whether the channel status of the board under test is 1, and whether the current of the two acquisition circuits in a single channel is greater than 4.5mA and less than 10.2mA. If the channel status of the board under test is 1 and the channel current is greater than 4.5mA and less than 10.2mA, then the channel is considered normal. If the channel status of the board under test is not 1, or the channel current is less than 4.5mA, or the channel current is greater than 10.2mA, then the channel is considered abnormal. Proceed to step S117.

[0136] S117. When the DI input voltage is 20V, determine whether the channel status of the board under test is 1, and whether the current of the two acquisition circuits in a single channel is greater than 5.1mA and less than 11.5mA. If the channel status of the board under test is 1 and the channel current is greater than 5.1mA and less than 11.5mA, then the channel is considered normal. If the channel status of the board under test is not 1, or the channel current is less than 5.1mA, or the channel current is greater than 11.5mA, then the channel is considered abnormal. Proceed to step S118.

[0137] S12. Determine whether the channel is normal based on the test results of each channel;

[0138] When the number of normal channels in all 7 test results for each channel is greater than or equal to a first preset number, the channel is considered to be in good health and ready for shipment. The first preset number can be 4.

[0139] When the number of normal channels in all 7 test results for each channel is greater than or equal to the second preset number but less than the first preset number, the channel is considered to be in a sub-healthy state and can be used. The second preset number can be 2.

[0140] If the number of normal channels in all 7 detection results of each channel is less than the second preset number, the channel is considered to be in a faulty state and unusable.

[0141] S13. Determine the health status of the board based on the normal or abnormal status of all channels.

[0142] If any channel of the board is in a faulty state, the board is considered faulty and unusable.

[0143] When the number of channels in a sub-healthy state among all channels of the board exceeds the third preset number, the board is considered a sub-healthy board and can be used.

[0144] When the number of channels in a sub-healthy state among all channels of the board is less than the third preset number, the board is considered a healthy board and can be shipped and used.

[0145] The third preset quantity can be 10.

[0146] The first, second, and third preset quantities can be set according to actual needs.

[0147] In a single channel, the current of the two acquisition circuits is related to the input voltage of the DI channel. The parameters of the inductor, capacitor, diode, voltage divider resistor, and feedback resistor are only used to determine the input voltage of the DI channel. Figure 4 In the circuit, the inductance value of L1 can be 10 microhenries, capacitor C1 can be 10 nanofarads, capacitor C2 can be 110 microfarads, the diode is a Schottky diode, the feedback resistor can be determined according to the above formula V0 = Vref × R8 / Rf, and the voltage divider resistor R8 can be 1.2K. The detection process can also be referenced. Figure 5 Perform as shown.

[0148] This application also provides a detection method, including:

[0149] A health assessment is performed on the selected test channel based on the test results obtained from the testing equipment.

[0150] The testing fixture is the testing fixture described in claims 1 to 7.

[0151] In one exemplary embodiment, the board is subjected to a health assessment based on the detection results of all channels of the board.

[0152] In one exemplary embodiment, a health assessment of the selected channel under test is performed based on the test results obtained by the testing equipment, including:

[0153] When the number of normal channels in the detection results corresponding to all test voltages of the channel under test is greater than or equal to the first preset number, the channel under test is determined to be in a healthy state.

[0154] When the number of normal channels in the test results corresponding to all test voltages is greater than or equal to the second preset number and less than the first preset number, it is determined that the test channel is in a sub-healthy state.

[0155] When the number of normal channels in the test results corresponding to all test voltages of the channel under test is less than the second preset number, it is determined that the channel under test is in a fault state.

[0156] The first preset quantity is greater than the second preset quantity.

[0157] In one exemplary embodiment, a health assessment of the board is performed based on the detection results of all channels of the board, including:

[0158] The board is deemed faulty when any channel of the board is in a faulty state.

[0159] When the number of channels in a sub-healthy state in all channels of the board exceeds a third preset number, the board is determined to be a sub-healthy board.

[0160] When the number of channels in a sub-healthy state among all channels of the board is less than a third preset number, the board is determined to be a healthy board.

[0161] In one exemplary embodiment, the first data includes voltage and current values;

[0162] The normal channel is determined as follows:

[0163] For any channel under test, if for any test voltage, the current value in the first data is within a preset range and the second data corresponds to the test voltage, then the test channel is determined to be a normal channel.

[0164] This application describes several embodiments, but these descriptions are exemplary and not restrictive, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.

[0165] This application includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive scheme as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive schemes to form another unique inventive scheme as defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this application may be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.

[0166] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that it does not depend on such a specific order. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims concerning the method and / or process should not be limited to the steps performed in the written order, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments of this application.

[0167] It will be understood by those skilled in the art that all or some of the steps, systems, or apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

Claims

1. A testing fixture, applied to a circuit board containing a digital input module, wherein the digital input module includes N digital input acquisition channels, where N is an integer greater than 0, characterized in that, include: Control circuit, voltage switching circuit, channel switching circuit; The control circuit is further configured to sequentially select a channel to be tested from the N digital input acquisition channels. For each selected channel to be tested, the following operation is performed until the testing of all channels to be tested is completed, so as to perform a health assessment on the selected channel to be tested based on the test results: A first switching signal is sent to the channel switching circuit according to the selected channel to be tested; for the selected channel to be tested, the following operations are performed until all test voltages in the preset test voltage set are tested: test voltages are selected sequentially from the test voltage set, and a second switching signal is sent to the voltage switching circuit according to the selected test voltage; The selected test channel is tested based on the first data output from the voltage switching circuit and the second data acquired by the digital input acquisition channel. The voltage switching circuit is configured to output the actual test voltage based on the second switching signal and the preset DC voltage. The channel switching circuit is configured to switch channels according to the first switching signal, so as to connect the digital input acquisition channel to be measured to the voltage switching circuit. The detection results of the selected test channel are used to perform a health assessment on the selected test channel, including: When the number of normal channels in the detection results corresponding to all test voltages of the channel under test is greater than or equal to the first preset number, the channel under test is determined to be in a healthy state. When the number of normal channels in the test results corresponding to all test voltages is greater than or equal to the second preset number and less than the first preset number, it is determined that the test channel is in a sub-healthy state. When the number of normal channels in the test results corresponding to all test voltages of the channel under test is less than the second preset number, it is determined that the channel under test is in a fault state. The first preset quantity is greater than the second preset quantity.

2. The testing fixture equipment according to claim 1 further includes an analog signal acquisition and conversion circuit and a communication circuit; The analog signal acquisition and conversion circuit is configured to acquire the first data and feed it back to the control circuit. The communication circuit is configured to transmit the second data.

3. The testing fixture equipment according to claim 1, characterized in that, It also includes power management circuitry; The power management circuit is configured to provide power to the voltage switching circuit, analog signal acquisition and conversion circuit, channel switching circuit, control circuit, and communication circuit.

4. The testing fixture equipment according to claim 1, characterized in that, The voltage switching circuit includes a power acquisition sub-circuit, an output feedback sub-circuit, and an output switching control sub-circuit. The output switching control subcircuit includes M switches, which are configured to close one of the switches corresponding to the first switching signal, thereby connecting the output feedback subcircuit and the power acquisition subcircuit. The power acquisition sub-circuit is configured to output the actual test voltage based on the preset DC voltage. The output feedback sub-circuit is configured to stabilize the actual test voltage within a preset range of the test voltage.

5. The testing fixture equipment according to claim 4, characterized in that, The power acquisition sub-circuit includes a transistor, an inductor, and a first capacitor; The first terminal of the transistor is configured to be connected to the preset DC voltage, the second terminal of the transistor is connected to the first terminal of the inductor, and the gate of the transistor is connected to the output terminal of the output feedback sub-circuit. The second end of the inductor is connected to the first plate of the first capacitor; the second plate of the first capacitor is grounded.

6. The testing fixture equipment according to claim 5, characterized in that, The output feedback sub-circuit includes voltage divider resistors, M feedback resistors, an operational amplifier, a comparator, an oscillator, and a first capacitor; One end of each of the M feedback resistors is connected to one end of each of the M switches; the other ends of the M feedback resistors are connected together and then connected to the first end of the voltage divider resistor; the second end of the voltage divider resistor is grounded; the first end of the voltage divider resistor is connected to the inverting input of the operational amplifier; the non-inverting input of the operational amplifier is connected to the reference power supply; the output of the operational amplifier is connected to the inverting input of the comparator; the non-inverting input of the comparator is connected to the output of the oscillator; the output of the comparator serves as the output of the output feedback sub-circuit. The first plate of the first capacitor is connected to the output terminal of the comparator, and the second plate of the first capacitor is connected to the second terminal of the transistor.

7. The testing fixture equipment according to claim 6, characterized in that, The other end of each of the M switches is connected to the first plate of the first capacitor.

8. A detection method, characterized in that, A health assessment is performed on the selected test channel based on the test results obtained from the testing equipment. The testing fixture is the testing fixture described in claims 1 to 7.

9. The detection method according to claim 8, characterized in that, A health assessment of the board is performed based on the test results of all channels on the board.

10. The detection method according to claim 9, characterized in that, A health assessment of the board is performed based on the test results of all channels of the board, including: The board is deemed faulty when any channel of the board is in a faulty state. When the number of channels in a sub-healthy state in all channels of the board exceeds a third preset number, the board is determined to be a sub-healthy board. When the number of channels in a sub-healthy state among all channels of the board is less than a third preset number, the board is determined to be a healthy board.

11. The detection method according to claim 8, characterized in that, The first data includes voltage and current values; The normal channel is determined as follows: For any channel under test, if for any test voltage, the current value in the first data is within a preset range and the second data corresponds to the test voltage, then the test channel is determined to be a normal channel.

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