RAID Implementation Method and Apparatus Based on DRAM-less Solid State Drives

Abstract

This application relates to a method, apparatus, computer device, and storage medium for implementing RAID based on a DRAM-less solid-state drive (SSD). The method includes: obtaining a write request from a host; determining whether the data in the write request needs to be written to an SLC cache or to a regular block; protecting the data when it is written to the SLC cache using Block RAID by allocating one or more SLC superblocks according to a set stripe size and keeping only one open stripe during the data writing process; and protecting the data when it is written to a regular block using Word Line RAID by temporarily storing the RAID parity in the HMB or reconstructing the RAID parity using NAND data to reduce the SSD RAM requirement. This invention reduces the need for reserved blocks, meeting product yield requirements.

Description

Technical Field

[0001] This invention relates to the field of solid-state drive technology, and in particular to a RAID implementation method, apparatus, computer device, and storage medium based on a DRAM-less solid-state drive. Background Technology

[0002] SSDs (Solid State Drives) are widely used in various applications and have gradually replaced traditional HDDs (Hard Disk Drives) in the PC market, providing users with a better experience in terms of reliability and performance.

[0003] Currently, SSDs typically employ internal RAID to enhance user data protection. Two common RAID configurations are Block RAID and Word Line RAID. Block RAID usually requires allocating multiple blocks simultaneously when writing data, thus necessitating a larger reserve of blocks for the SSD to function correctly. Word Line RAID, on the other hand, involves multiple stripes in an open state. DRAM-less SSDs often lack sufficient RAM to cache all RAID parity data, requiring temporary storage of the RAID parity in HMB or NAND, which impacts performance. Summary of the Invention

[0004] Therefore, it is necessary to provide a RAID implementation method, apparatus, computer equipment, and storage medium based on DRAM-less solid-state drives to address the aforementioned technical problems.

[0005] A RAID implementation method based on DRAM-less solid-state drives, the method comprising:

[0006] Get the write request sent by the host;

[0007] Determine whether the data in the write request needs to be written to the SLC cache or to a regular block;

[0008] When data is written to the SLC cache, it is protected using Block RAID mode, which allocates one or more SLC superblocks according to the set stripe size and keeps only one open stripe during the data writing process;

[0009] When data is written to a regular block, Word Line RAID is used for protection. This reduces the demand on SSD RAM by temporarily storing the RAID parity in the HMB or rebuilding the RAID parity using NAND data.

[0010] In one embodiment, the step of protecting data using Block RAID when it is written to the SLC cache further includes:

[0011] When data is written to the SLC cache, it is determined whether the SLC block has been allocated. If not, one or more superblocks are allocated according to the stripe size.

[0012] If an SLC block has already been allocated, determine whether the current stripe is turned off; if it is turned off, allocate a new stripe.

[0013] If the current stripe is not closed, allocate an address and write it to the corresponding stripe;

[0014] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0015] In one embodiment, the step of protecting data using Word Line RAID when it is written to a normal block includes:

[0016] When HMB is enabled, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0017] If it has already been allocated, determine whether it is the first page in the superpage. If so, obtain the next stripe to be written and swap the stripe from HMB to SSD.

[0018] If it is not the first page in the superpage, then obtain the stripe in which the page is located, allocate an address and write it to the corresponding stripe;

[0019] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0020] In one embodiment, the step of protecting data using Word Line RAID when it is written to a normal block further includes:

[0021] When HMB is off, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0022] If it has already been allocated, determine whether it is the first page in the superpage. If it is, continue to determine whether the next superpage is the last superpage of the strip. If it is, reconstruct the parity of the strip where the next superpage is located from the NAND.

[0023] If it is not the first page in the superpage, then determine whether the current superpage is the last superpage of the strip. If it is, then get the strip where the page is located and allocate an address to write data. Otherwise, directly allocate an address and write data.

[0024] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0025] A RAID implementation device based on a DRAM-less solid-state drive, the device comprising:

[0026] The request acquisition module is used to acquire write requests issued by the host.

[0027] The judgment module is used to determine whether the data in the write request needs to be written to the SLC cache or to a regular block;

[0028] The first execution module is used to protect the data written to the SLC cache using Block RAID, allocating one or more SLC superblocks according to the set stripe size and keeping only one open stripe during the data writing process;

[0029] The second execution module is used to protect data when it is written to a normal block using Word Line RAID. This is achieved by temporarily storing the RAID parity in the HMB or rebuilding the RAID parity using NAND data, thereby reducing the demand on SSD RAM.

[0030] In one embodiment, the first execution module is further configured to:

[0031] When data is written to the SLC cache, it is determined whether the SLC block has been allocated. If not, one or more superblocks are allocated according to the stripe size.

[0032] If an SLC block has already been allocated, determine whether the current stripe is turned off; if it is turned off, allocate a new stripe.

[0033] If the current stripe is not closed, allocate an address and write it to the corresponding stripe;

[0034] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0035] In one embodiment, the second execution module is further configured to:

[0036] When HMB is enabled, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0037] If it has already been allocated, determine whether it is the first page in the superpage. If so, obtain the next stripe to be written and swap the stripe from HMB to SSD.

[0038] If it is not the first page in the superpage, then obtain the stripe in which the page is located, allocate an address and write it to the corresponding stripe;

[0039] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0040] In one embodiment, the second execution module is further configured to:

[0041] When HMB is off, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0042] If it has already been allocated, determine whether it is the first page in the superpage. If it is, continue to determine whether the next superpage is the last superpage of the strip. If it is, reconstruct the parity of the strip where the next superpage is located from the NAND.

[0043] If it is not the first page in the superpage, then determine whether the current superpage is the last superpage of the strip. If it is, then get the strip where the page is located and allocate an address to write data. Otherwise, directly allocate an address and write data.

[0044] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0045] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of any of the methods described above.

[0046] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above methods.

[0047] The aforementioned RAID implementation method, apparatus, computer equipment, and storage medium based on DRAM-less solid-state drives use Block RAID for protection when data is written to the SLC cache, requiring less SSD RAM to avoid the impact of RAID parity swapping on write performance. When data is written to ordinary NAND blocks, Word Line RAID is used for protection, reducing the number of reserved blocks and increasing tolerance for bad blocks, thereby ensuring yield requirements; at the same time, by temporarily storing RAID parity in HMB or reconstructing RAID parity from NAND data, the demand for SSD RAM is reduced. Attached Figure Description

[0048] Figure 1 This is a schematic diagram illustrating the implementation process of Block RAID in traditional technology.

[0049] Figure 2 This is a schematic diagram illustrating the implementation process of Word Line RAID in traditional technology.

[0050] Figure 3 This is a flowchart illustrating a RAID implementation method based on a DRAM-less solid-state drive in one embodiment;

[0051] Figure 4 This is a schematic diagram of the write request Block RAID processing flow in one embodiment;

[0052] Figure 5 This is a schematic diagram of the HMB enable write request Word Line RAID processing flow in one embodiment;

[0053] Figure 6 This is a schematic diagram of the HMB write request Word Line RAID processing flow in one embodiment;

[0054] Figure 7 This is a structural block diagram of a RAID implementation device based on a DRAM-less solid-state drive in one embodiment;

[0055] Figure 8 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0057] Currently, the two most common ways to organize SSDs using RAID are Block RAID and Word Line RAID, each with its own drawbacks.

[0058] like Figure 1 The diagram illustrates the Block RAID implementation process. For an SSD with 8 planes and a RAID configuration of 15+1, when writing data, two superblocks need to be allocated at a time. Pages with the same number in the two superblocks form a RAID stripe. Parity (RAID-generated parity data used for recovering corrupted data) is located on the last plane of the last superblock. The writing process, as shown in the diagram, sequentially completes the writing of stripes 0, 1, ... of the two superblocks. This method of generating parity requires that the current stripe be written before the next stripe can be written. This results in multiple groups of blocks needing to be allocated at once when allocating blocks, thus requiring more blocks to be reserved for the SSD. This reduces the allowable number of bad blocks at the factory, which is detrimental to mass production yield.

[0059] like Figure 2The diagram illustrates the Word Line RAID implementation process. For an SSD with 8 planes, a RAID configuration of 15+1, and an 8-space interval, there are a maximum of 8 open stripes. When larger intervals are needed to cope with NAND failure modes, more open stripes are required, and the SSD RAM space needed to cache all these parities becomes larger.

[0060] Based on this, the present invention proposes a RAID implementation method based on DRAM-less solid-state drives, which aims to reduce SSD RAM requirements while ensuring that write bandwidth is not affected, and at the same time reduce the need for reserved blocks, thereby meeting product yield requirements.

[0061] In one embodiment, such as Figure 3 As shown, a RAID implementation method based on a DRAM-less solid-state drive is provided, the method including:

[0062] Step 302: Obtain the write request issued by the host;

[0063] Step 304: Determine whether the data in the write request needs to be written to the SLC cache or to a regular block;

[0064] Step 306: When data is written to the SLC cache, it is protected using Block RAID mode. One or more SLC superblocks are allocated according to the set stripe size, and only one open stripe is kept during the data writing process.

[0065] Step 308: When data is written to a normal block, Word Line RAID is used for protection. This is achieved by temporarily storing the RAID parity in the HMB or rebuilding the RAID parity using NAND data, thereby reducing the demand on SSD RAM.

[0066] In this embodiment, a RAID implementation method based on DRAM-less solid-state drives is proposed. The solution adopts a hybrid RAID scheme: when data is written to the SLC cache, Block RAID is used for protection to avoid the impact of RAID parity swapping on write performance; when data is written to ordinary NAND blocks (MLC / TLC / QLC), Word Line RAID is used for protection to reduce the number of reserved blocks, improve the tolerance for bad blocks, and thus ensure yield requirements.

[0067] Specifically, the write request is first obtained from the host, and then different RAID processing is performed on the write request according to the Block type of the data being written and the HMB enable status.

[0068] When writing to the SLC cache using Block RAID for protection, less RAID parity is required, and the data resides in the SSD RAM.

[0069] When writing to a regular NAND block using Word Line RAID for protection, the SSD only needs to provide two RAID stripe parity spaces. If HMB is enabled, during the current stripe write, the additional RAID parity is temporarily stored in the HMB space, and the RAID parity of the next stripe to be written is swapped in from the HMB. If HMB is disabled, before writing the last set of pages of the stripe, the stripe's parity is reconstructed based on the data previously written to the NAND in that stripe. During the last set of pages write, the parity is recalculated based on the recovered parity, and the parity is written to the NAND at the end of the stripe.

[0070] In this embodiment, Block RAID is used for protection when data is written to the SLC cache, requiring less SSD RAM to avoid the impact of RAID parity swapping on write performance. When data is written to ordinary NAND blocks, Word Line RAID is used for protection, reducing the number of reserved blocks and increasing tolerance for bad blocks, thereby ensuring yield requirements; at the same time, by temporarily storing RAID parity in HMB or rebuilding RAID parity from NAND data, the demand for SSD RAM is reduced.

[0071] In one embodiment, a RAID implementation method based on a DRAM-less solid-state drive is provided, wherein the step of protecting data using Block RAID when writing data to the SLC cache further includes:

[0072] When data is written to the SLC cache, it is determined whether the SLC block has been allocated. If not, one or more superblocks are allocated according to the stripe size.

[0073] If an SLC block has already been allocated, determine whether the current stripe is turned off; if it is turned off, allocate a new stripe.

[0074] If the current stripe is not closed, allocate an address and write it to the corresponding stripe;

[0075] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0076] Specifically, refer to Figure 4The diagram illustrates the write request Block RAID processing flow. When data is written to the SLC cache, firstly, it checks if an SLC block has been allocated. If not, one or more superblocks are allocated according to the stripe size. If an SLC block has been allocated, it checks if the current stripe is closed. If closed, a new stripe is allocated; otherwise, an address is allocated and the data is written to the corresponding stripe. Finally, it checks if this is the last data in the stripe. If so, the stripe parity is written, and the stripe is released.

[0077] In this embodiment, one or more SLC superblocks are first allocated according to the set stripe size, and only one open stripe is maintained during the data writing process.

[0078] In one embodiment, a RAID implementation method based on a DRAM-less solid-state drive is provided, wherein the step of protecting data using Word Line RAID when writing data to ordinary blocks includes:

[0079] When HMB is enabled, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0080] If it has already been allocated, determine whether it is the first page in the superpage. If so, obtain the next stripe to be written and swap the stripe from HMB to SSD.

[0081] If it is not the first page in the superpage, then obtain the stripe in which the page is located, allocate an address and write it to the corresponding stripe;

[0082] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0083] Specifically, refer to Figure 5 The diagram illustrates the HMB-enabled write request Word Line RAID processing flow. In this process, only two stripe parity spaces are needed to ensure optimal NAND write bandwidth utilization: while writing to one stripe, the parity required for the next stripe is swapped from the HMB to the SSD's RAM. Figure 2 While writing to stripe 0 where page 8 is located, the parity of stripe 1 where superpage 9 is located will be swapped from HMB to SSD.

[0084] In one embodiment, a RAID implementation method based on a DRAM-less solid-state drive is provided, wherein the step of protecting data using Word Line RAID when writing data to ordinary blocks further includes:

[0085] When HMB is off, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0086] If it has already been allocated, determine whether it is the first page in the superpage. If it is, continue to determine whether the next superpage is the last superpage of the strip. If it is, reconstruct the parity of the strip where the next superpage is located from the NAND.

[0087] If it is not the first page in the superpage, then determine whether the current superpage is the last superpage of the strip. If it is, then get the strip where the page is located and allocate an address to write data. Otherwise, directly allocate an address and write data.

[0088] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0089] Specifically, refer to Figure 6 The diagram illustrates the HMB write request Word Line RAID processing flow. In this process, before the last superpage of the stripe begins to be written, parity is reconstructed from the data previously written to the NAND flash memory. This parity is then calculated during the write process of the last superpage and finally written to the NAND flash memory at the end of the stripe. Figure 2 While writing page 7, the parity of stripe 0 is recovered by reading data from 8 pages of superpage 0. When writing superpage 8, the parity is calculated based on the recovered parity and finally written to the last page of superpage 8.

[0090] It should be understood that, although Figures 1-6 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figures 1-6 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0091] In one embodiment, such as Figure 7 As shown, a RAID implementation device 700 based on a DRAM-less solid-state drive is provided, the device comprising:

[0092] Request acquisition module 701, the request acquisition module is used to acquire write requests issued by the host;

[0093] The judgment module 702 is used to determine whether the data in the write request needs to be written to the SLC cache or to a normal block;

[0094] The first execution module 703 is used to protect the SLC cache by using Block RAID mode when data is written to it, allocating one or more SLC superblocks according to the set stripe size and keeping only one open stripe during the data writing process;

[0095] The second execution module 704 is used to protect data when it is written to a normal block using Word Line RAID, by temporarily storing the RAID parity to HMB or rebuilding the RAID parity through NAND data to reduce the demand on SSD RAM.

[0096] In one embodiment, the first execution module 703 is further configured to:

[0097] When data is written to the SLC cache, it is determined whether the SLC block has been allocated. If not, one or more superblocks are allocated according to the stripe size.

[0098] If an SLC block has already been allocated, determine whether the current stripe is turned off; if it is turned off, allocate a new stripe.

[0099] If the current stripe is not closed, allocate an address and write it to the corresponding stripe;

[0100] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0101] In one embodiment, the second execution module 704 is further configured to:

[0102] When HMB is enabled, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0103] If it has already been allocated, determine whether it is the first page in the superpage. If so, obtain the next stripe to be written and swap the stripe from HMB to SSD.

[0104] If it is not the first page in the superpage, then obtain the stripe in which the page is located, allocate an address and write it to the corresponding stripe;

[0105] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0106] In one embodiment, the second execution module 704 is further configured to:

[0107] When HMB is off, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated.

[0108] If it has already been allocated, determine whether it is the first page in the superpage. If it is, continue to determine whether the next superpage is the last superpage of the strip. If it is, reconstruct the parity of the strip where the next superpage is located from the NAND.

[0109] If it is not the first page in the superpage, then determine whether the current superpage is the last superpage of the strip. If it is, then get the strip where the page is located and allocate an address to write data. Otherwise, directly allocate an address and write data.

[0110] Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

[0111] For specific limitations on RAID implementation devices based on DRAM-less solid-state drives, please refer to the limitations on RAID implementation methods based on DRAM-less solid-state drives mentioned above, which will not be repeated here.

[0112] In one embodiment, a computer device is provided, the internal structure of which can be shown as follows: Figure 8 As shown, the computer device includes a processor, memory, and a network interface connected via a device bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores operating devices, computer programs, and a database. The internal memory provides an environment for the operation of the operating devices and computer programs stored in the non-volatile storage media. The network interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements a RAID implementation method based on a DRAM-less solid-state drive.

[0113] Those skilled in the art will understand that Figure 8 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0114] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps in the various method embodiments described above.

[0115] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps in the various method embodiments described above.

[0116] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0117] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0118] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A RAID implementation method based on a DRAM-less solid-state drive, the method comprising: Get the write request sent by the host; Determine whether the data in the write request needs to be written to the SLC cache or to a regular block; When data is written to the SLC cache, it is protected using Block RAID mode, which allocates one or more SLC superblocks according to the set stripe size and keeps only one stripe open during the data writing process; When data is written to a regular block, Word Line RAID is used for protection. This reduces the demand on SSD RAM by temporarily storing the RAID parity in HMB or rebuilding the RAID parity using NAND data. The steps for protecting data using Word Line RAID when it is written to a regular block include: When HMB is enabled, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated. If it has already been allocated, determine whether it is the first page in the superpage. If so, obtain the next stripe to be written and swap the parity of that stripe from HMB to SSD. If it is not the first page in the superpage, then obtain the stripe in which the page is located, allocate an address and write it to the corresponding stripe; Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

2. The method of claim 1, wherein the DRAM-less solid state drive based RAID implementation method is characterized by, The step of protecting data using Block RAID when it is written to the SLC cache also includes: When data is written to the SLC cache, it is determined whether the SLC block has been allocated. If not, one or more superblocks are allocated according to the stripe size. If an SLC block has already been allocated, determine whether the current stripe is turned off; if it is turned off, allocate a new stripe. If the current stripe is not closed, allocate an address and write it to the corresponding stripe; Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

3. The method of claim 1, wherein the DRAM-less solid state drive based RAID implementation method is characterized by, The step of using Word Line RAID to protect data when it is written to a normal block also includes: When HMB is off, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated. If it has already been allocated, determine whether it is the first page in the superpage. If it is, continue to determine whether the next superpage is the last superpage of the strip. If it is, reconstruct the parity of the strip where the next superpage is located from the NAND. If it is not the first page in the superpage, then determine whether the current superpage is the last superpage of the strip. If it is, then get the strip where the page is located and allocate an address to write data. Otherwise, directly allocate an address and write data. Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

4. A RAID implementation device based on DRAM-less solid state drive, characterized in that, The device includes: The request acquisition module is used to acquire write requests issued by the host. The judgment module is used to determine whether the data in the write request needs to be written to the SLC cache or to a regular block; The first execution module is used to protect the data written to the SLC cache using Block RAID, allocating one or more SLC superblocks according to the set stripe size and keeping only one open stripe during the data writing process; The second execution module is used to protect data when it is written to a normal block using Word Line RAID. This is achieved by temporarily storing the RAID parity in HMB or rebuilding the RAID parity using NAND data to reduce the demand on SSD RAM. The second execution module is also used for: When HMB is enabled, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated. If it has already been allocated, determine whether it is the first page in the superpage. If so, obtain the next stripe to be written and swap the parity of that stripe from HMB to SSD. If it is not the first page in the superpage, then obtain the stripe in which the page is located, allocate an address and write it to the corresponding stripe; Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

5. The DRAM-less solid state drive based RAID implementation apparatus of claim 4, wherein, The first execution module is also used for: When data is written to the SLC cache, it is determined whether the SLC block has been allocated. If not, one or more superblocks are allocated according to the stripe size. If an SLC block has already been allocated, determine whether the current stripe is turned off; if it is turned off, allocate a new stripe. If the current stripe is not closed, allocate an address and write it to the corresponding stripe; Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

6. The DRAM-less solid state drive based RAID implementation apparatus of claim 4, wherein, The second execution module is also used for: When HMB is off, when data is written to a regular block, it is determined whether the regular block has been allocated. If not, a superblock is allocated. If it has already been allocated, determine whether it is the first page in the superpage. If it is, continue to determine whether the next superpage is the last superpage of the strip. If it is, reconstruct the parity of the strip where the next superpage is located from the NAND. If it is not the first page in the superpage, then determine whether the current superpage is the last superpage of the strip. If it is, then get the strip where the page is located and allocate an address to write data. Otherwise, directly allocate an address and write data. Determine if this is the last data in the stripe; if so, write the stripe parity and release the stripe.

7. A computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 3.

8. A computer-readable storage medium having stored thereon a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 3.

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