Method for repairing establishment time sequence violation, computer device and storage medium

Abstract

The application provides a method for repairing establishment time timing violation, a computer device and a storage medium, and the method comprises the following steps: establishing a power consumption unit library and limiting the total power consumption of the driving unit in the power consumption unit library, so that when the layout and wiring of the chip is designed based on the power consumption unit library, the total power consumption of the inserted driving unit can be controlled, and when the establishment time violation is optimized, the congestion problem is effectively avoided by first increasing the driving of the existing driving unit in the layout and wiring, and then increasing the number of driving units.

Description

Technical Field

[0001] This invention relates to the field of chip design, and particularly to a method, computer device, and storage medium for repairing setup timing violations. Background Technology

[0002] In integrated circuit design, with advancements in process technology, process nodes are continuously shrinking, transistors are proportionally decreasing in size, and the width and spacing of metal lines are also decreasing. Furthermore, with changing demands, chip designs are becoming increasingly larger and higher in frequency. All these factors make timing convergence difficult. Timing convergence refers to the actual delay of a timing path meeting the designer's requirements for that path. The delay of the entire path includes both device delays and interconnect delays. Therefore, timing optimization focuses on optimizing device and interconnect delays. At deep submicron process nodes, interconnect delays far exceed device delays and become the primary factor contributing to delay. Therefore, to achieve high performance and reliability in chips, addressing interconnect delays has become paramount in timing analysis.

[0003] Currently, existing EDA tools insert a large number of buffers when optimizing long interconnects. On the one hand, this leads to excessively high cell density and congestion; on the other hand, it makes it difficult to effectively control the total power consumption of the chip. Summary of the Invention

[0004] To avoid the problem of excessively high cell density leading to congestion and difficulty in effectively controlling the total power consumption of the chip due to inserting a large number of buffers during the optimization of setup time violations, a method for repairing setup time timing violations is proposed in a first aspect of the present invention. The method includes: establishing a power consumption cell library, which is used to dynamically generate driver cells according to a pre-configured maximum drive and maximum power consumption, wherein the maximum drive is the maximum drive of each driver cell, and the maximum power consumption is the total power consumption of all driver cells in the power consumption cell library; designing placement and routing based on the driver cells generated by the power consumption cell library, and performing timing tests on the placement and routing; capturing violation timing paths based on the timing test results, and determining whether a setup time violation exists; in response to the existence of a setup time violation, increasing the drive of existing driver cells on the violation timing path to re-perform timing tests and determining whether the maximum drive or the maximum power consumption has been reached; in response to reaching the maximum drive but not the maximum power consumption and the setup time violation still existing, inserting a new driver cell into the violation timing path to re-perform timing tests.

[0005] In one or more embodiments, the step of generating a driver unit based on the power consumption unit library and designing a placement and routing includes: obtaining a driver unit from the power consumption unit library and inserting it into a target placement and routing; in response to the insertion of the driver unit, calculating the power consumption of the driver unit and updating the remaining power consumption of the power consumption unit library; wherein the remaining power consumption is equal to the difference between the maximum power consumption and the power consumption of the inserted driver unit.

[0006] In one or more embodiments, the step of capturing the violation timing path based on the result of the timing test and determining whether there is a setup time violation includes: obtaining the line delay and corresponding line jump of the violation timing path; and taking the violation timing path with line delay greater than a first preset threshold and line jump greater than a second preset threshold as the target line to be optimized.

[0007] In one or more embodiments, the step of increasing the drive of existing drive units on the violation timing path to re-perform timing tests and determine whether the maximum drive or maximum power consumption has been reached in response to a setup time violation includes: in response to the existence of multiple drive units on the target line, sequentially increasing the drive of the drive units to re-perform timing tests; determining whether the maximum drive has been reached before each increase in the drive of the drive unit; in response to the fact that the drive of the corresponding drive unit has reached the maximum drive and the remaining power consumption of the power consumption unit library is not zero, continuing to increase the drive of the next drive unit; re-testing the target line after each increase in the drive of the drive unit to determine whether the setup time violation has been resolved; repeating the above steps in response to the fact that the setup time violation has not been resolved.

[0008] In one or more embodiments, the method of the present invention further includes: dynamically adjusting the maximum drive of the remaining drive units in the power consumption unit library based on the maximum power consumption in response to each increase in the drive of the inserted drive unit.

[0009] In one or more embodiments, the step of dynamically adjusting the maximum drive of the remaining drive units in the power unit library based on the maximum power consumption in response to each increase in the drive of the inserted drive unit includes: reducing the maximum drive of some of the remaining drive units in the power unit library; or reducing the maximum drive of all the remaining drive units in the power unit library.

[0010] In one or more embodiments, the step of inserting a new driver unit into the timing path to re-perform timing tests in response to reaching the maximum drive but not the maximum power consumption and the setup time violation still existing includes: selecting a suitable driver unit from the remaining driver units in the power consumption unit library and inserting it into the middle position of the timing path to re-perform timing tests in response to reaching the maximum drive but not the maximum power consumption and the setup time violation still existing.

[0011] In one or more embodiments, the method further includes prompting for adjustment of the layout routing in response to inserting all drive units of the power unit library into the layout routing and the setup time default still existing.

[0012] In a second aspect of the invention, a computer device is provided, comprising: at least one processor; and a memory storing an executable computer program, which, when executed by the at least one processor, is used to implement the steps of a method for repairing setup timing violations as described in any of the above method embodiments.

[0013] In a third aspect of the invention, a readable storage medium is provided, comprising: an executable computer program, which, when executed by an executor, is used to implement the steps of a method for repairing setup timing violations as described in any of the above method embodiments.

[0014] The beneficial effects of the present invention include: The present invention proposes a method for repairing setup time timing violations, which establishes a power consumption cell library and limits the total power consumption of the driving cells within it, thereby enabling the control of the total power consumption of the inserted driving cells when designing the chip layout and routing based on the power consumption cell library. Furthermore, when optimizing setup time violations, the method first increases the driving of existing driving cells in the layout and routing, and then increases the number of driving cells, thereby effectively avoiding congestion problems. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a flowchart illustrating a method for repairing timing violations during setup, according to an embodiment of the present invention.

[0017] Figure 2This is a flowchart illustrating a complete embodiment of a method for repairing timing violations during setup according to the present invention.

[0018] Figure 3 This is a schematic diagram of the structure of a violation timing path according to an embodiment of the present invention;

[0019] Figure 4 This is a schematic diagram of the optimized structure of a violation timing path according to an embodiment of the present invention using an increased driving method;

[0020] Figure 5 This is a schematic diagram of the optimized structure of a violation timing path according to an embodiment of the present invention, achieved by inserting a new driver unit.

[0021] Figure 6 This is a schematic diagram of the structure of a computer device according to an embodiment of the present invention;

[0022] Figure 7 This is a schematic diagram of the structure of a readable storage medium according to an embodiment of the present invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0024] It should be noted that all uses of "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two entities or parameters with the same name but different names. It is clear that "first" and "second" are only for the convenience of expression and should not be construed as limiting the embodiments of the present invention. Subsequent embodiments will not explain this in detail.

[0025] To avoid congestion and uncontrollable chip power consumption caused by inserting too many buffers during setup timing optimization, this invention proposes a method for repairing setup timing violations. This method establishes a power consumption cell library and limits the total power consumption of its driver cells. This allows for control over the total power consumption of inserted driver cells during chip placement and routing based on this library. Furthermore, when optimizing setup timing violations, the method first increases the drive capacity of existing driver cells in the placement and routing process, and then increases the number of driver cells, effectively avoiding congestion. The driver cells in this invention include, but are not limited to, buffers, and their driving capability is reflected in their drive length. The following will describe the invention in more detail with reference to the accompanying drawings:

[0026] Please see Figure 1This document illustrates the workflow of a method for repairing setup time timing violations according to an embodiment of the present invention, including: Step S1, establishing a power consumption unit library, which is used to dynamically generate drive units based on a pre-configured maximum drive and maximum power consumption, wherein the maximum drive is the maximum drive of each drive unit, and the maximum power consumption is the total power consumption of all drive units in the power consumption unit library; Step S2, designing placement and routing based on the drive units generated by the power consumption unit library, and performing timing tests on the placement and routing; Step S3, capturing violation timing paths based on the timing test results, and determining whether a setup time violation exists; Step S4, in response to the existence of a setup time violation, increasing the drive of existing drive units on the violation timing path to re-perform timing tests and determining whether the maximum drive or maximum power consumption has been reached; Step S5, in response to reaching the maximum drive but not the maximum power consumption and the setup time violation still existing, inserting a new drive unit into the violation timing path to re-perform timing tests.

[0027] Specifically, the power consumption unit library constructed in this embodiment is used to limit the total power consumption of all driver units contained therein. During the chip placement and routing process, buffers are only allowed to be obtained from this power consumption unit library by the user, effectively controlling the total power consumption of buffers inserted in the placement and routing. Furthermore, the power consumption unit library can dynamically adjust the drive of the remaining driver units in the library based on subsequent adjustments to the drive of the inserted buffers to maintain a constant total power consumption for both inserted and uninserted driver units. The power consumption unit library can also pre-configure a maximum drive to control the maximum drive of a single driver unit within the library.

[0028] In a further embodiment, step S2, generating driver units based on the power consumption cell library and designing placement and routing, includes: step S2.1 obtaining driver units from the power consumption cell library and inserting them into the target placement and routing; step S2.2 responding to the insertion of a driver unit, calculating the power consumption of the driver unit and updating the remaining power consumption in the power consumption cell library; wherein, the remaining power consumption is equal to the difference between the maximum power consumption and the power consumption of the inserted driver unit. In subsequent adjustments to the drive of the inserted driver units, the remaining power consumption will be changed accordingly to maintain the total power consumption unchanged.

[0029] Specifically, regarding the method of generating driver units from the power consumption unit library, in one optional embodiment, multiple driver units with different driving capabilities can be pre-configured in the power consumption unit library. For example, multiple buffers with different driving lengths can be pre-configured for user selection. In another optional embodiment, the user can input corresponding parameters in the driver unit generation configuration window pre-configured in the power consumption unit library to dynamically generate driver units. For example, the buffer can be dynamically generated by inputting the driving length. The power consumption unit library uses a pre-configured algorithm to convert driving parameters into power consumption, thereby implementing statistical analysis of the remaining power consumption of the power consumption unit library to control and adjust the driving of the remaining driver units or control the generation of subsequent driver units. For the latter, for example, if the power consumption converted from the driving parameters input by the user exceeds the remaining power consumption of the power consumption unit library, a message will be displayed indicating that the corresponding driver unit cannot be generated.

[0030] In a further embodiment, step S3, capturing the violation timing path based on the timing test results and determining whether there is a setup timing violation, includes: obtaining the line delay and corresponding line jump of the violation timing path; and taking the violation timing path with a line delay greater than a first preset threshold and a line jump greater than a second preset threshold as the target line to be optimized.

[0031] Specifically, in an optional embodiment, the first preset threshold can be set to 100ps and the second preset threshold can be set to 0.5.

[0032] In a further embodiment, step S4, in response to a setup time violation, increases the drive of existing drive units on the violation timing path to re-perform timing tests and determine whether the maximum drive or maximum power consumption has been reached, includes: step S4.1, in response to the existence of multiple drive units on the target line, sequentially increases the drive of the drive units to re-perform timing tests; step S4.2, before each increase in the drive of a drive unit, determines whether the maximum drive has been reached; step S4.3, in response to the corresponding drive unit having reached the maximum drive and the remaining power consumption of the unused power consumption unit library not being 0, then continues to increase the drive of the next drive unit; step S4.4, after each increase in the drive of a drive unit, re-tests the target line to determine whether the setup time violation has been resolved; and step S4.5, in response to the setup time violation not being resolved, repeats the above steps.

[0033] Specifically, to avoid congestion caused by inserting too many driver units during the optimization of setup time violations, this embodiment proposes prioritizing increasing the drive capability of existing driver units to attempt to reduce line delay and increase transition amplitude, thereby resolving the setup time violation problem. If increasing the drive capability of the driver unit to the maximum still cannot resolve the setup time violation problem, then attempting to insert new driver units to solve the problem. This method can significantly reduce the number of driver units that need to be inserted, and the total power consumption of the inserted driver units can be effectively controlled through dynamic adjustment of the power consumption unit library. In another optional implementation, the user can also reduce the drive capability of the inserted driver units, thereby...

[0034] In a further embodiment, the method of the present invention further includes: in response to each increase in the drive of the inserted drive unit, dynamically adjusting the maximum drive of the remaining drive units in the power unit library based on the maximum power consumption.

[0035] Specifically, in this embodiment, the method of dynamically adjusting the maximum drive of the remaining drive units in the power consumption unit library based on the maximum power consumption includes: reducing the maximum drive of some of the remaining drive units in the power consumption unit library; or reducing the maximum drive of all the remaining drive units in the power consumption unit library.

[0036] In one optional embodiment, when the drive of a drive unit is reduced to 0, the drive unit is removed from the power consumption unit library. In another optional embodiment, the user can also reduce the drive of an inserted drive unit, thereby increasing the remaining power consumption of the power consumption unit library and making corresponding adjustments.

[0037] In a further embodiment, step S5, responding to the condition that maximum drive is reached but maximum power consumption is not reached and setup time violation still exists, inserting a new drive unit into the violation timing path to re-perform timing tests, includes: responding to the condition that maximum drive is reached but maximum power consumption is not reached and setup time violation still exists, selecting a suitable drive unit from the remaining drive units in the power unit library and inserting it into the middle position of the timing path to re-perform timing tests. Specifically, in this embodiment, when a new drive unit needs to be inserted into the placement and routing, it is inserted into the middle position of the timing path to ensure a uniform distribution of drive units.

[0038] In a further embodiment, the method of the present invention further includes prompting for placement and routing adjustments in response to the fact that all driver units of the power cell library have been inserted into the placement and routing and the setup time default still exists. Specifically, when all driver units of the power cell library have been inserted into the corresponding placement and routing, but the setup time default still exists, it means that the placement and routing design cannot be implemented within the maximum power consumption range, thus requiring the user to be reminded to change the placement and routing, such as shortening the timing path between nodes.

[0039] Complete Implementation

[0040] Please see Figure 2 It illustrates the workflow of a complete embodiment of a method for repairing setup time timing violations according to the present invention, including:

[0041] (1) First, identify all paths with setup time violations after placement and routing. Obtain all lines on the violation paths, their corresponding delays, and their corresponding jumps. Lines with delays greater than a given threshold of 100 ps and jumps greater than a given threshold of 0.5 ps are designated as target lines to be optimized. Assume two paths with setup time violations are identified, and the cell distribution along these paths is as follows: Figure 3 As shown, the target line is as follows: Figure 3 The part circled in the middle is shown.

[0042] (2) Obtain the driving unit of the target line and determine whether the driving capability of the driving unit is the maximum driving capability of the unit in the library.

[0043] (3) If the driving capability of the driving unit is not the maximum driving capability of the units in the library, the driving capability of the driving unit can be appropriately increased. Based on the commands that the placement and routing tool can recognize, this operation can be completed, and the timing can be verified to meet the setup time requirements. For example Figure 4 The diagram shows the target line, its driving unit, and its load unit after increasing the driving capability of the driving unit.

[0044] (4) When the driving capability of the drive unit on the target line has increased to the maximum, there are still setup time violations along the entire path, and the delay and jumps on the line are still greater than the given threshold, insert a buffer in the middle of the target line, disconnect the previous line, reroute the line, complete the operation based on the commands that the placement and routing tool can recognize, and verify whether the timing meets the setup time requirements. Figure 5 The diagram shows the insertion of a buffer and rewinding when the driving unit has the maximum driving capability.

[0045] (5) If not, repeat the above operation until the timing on the path meets the establishment time requirement.

[0046] In a second aspect of the invention, a computer device is provided, see [link to relevant documentation]. Figure 6 The method includes: at least one processor 31; and a memory 30 storing an executable computer program that, when executed by at least one processor 31, is used to implement the steps of a method for fixing setup timing violations as described in any of the above method embodiments.

[0047] Specifically, the memory 30 may include one or more computer-readable storage media, which may be non-transitory. The memory 30 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 30 is used to store at least the following computer program 301, which, after being loaded and executed by the processor 31, is capable of implementing the relevant steps of the method for repairing setup timing violations proposed in the foregoing embodiments. In addition, the resources stored in the memory 30 may also include an operating system 302 and data 303, and the storage method may be temporary or permanent storage. The operating system 302 may include Windows, Unix, Linux, etc. The data 303 may include, but is not limited to, data corresponding to the execution result.

[0048] Processor 31 may include one or more processing cores, such as a quad-core processor, an octa-core processor, etc. Processor 31 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). Processor 31 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 31 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 31 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0049] In some embodiments, the computer device of the present invention may further include a display screen 32, an input / output interface 33, a communication interface 34, a power supply 35, and a communication bus 36. Those skilled in the art will understand that... Figure 6 The structures shown do not constitute a limitation on the computer device of the present invention, which may include more or fewer components than those shown.

[0050] In a third aspect of the invention, a readable storage medium is provided, see [link to relevant documentation]. Figure 7The readable storage medium 40 includes: an executable computer program, which, when executed by an executor, is used to implement the steps of a method for fixing setup timing violations as described in any of the above method embodiments.

[0051] Specifically, if a method for repairing setup timing violations in the above embodiments is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of the present invention. The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, magnetic disks, or optical disks, and various other media capable of storing program code.

[0052] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0053] It should be understood that, as used herein, the singular form “a” is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, “and / or” refers to any and all possible combinations of one or more of the associated listed items.

[0054] The embodiment numbers disclosed in the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0055] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. A method for repairing setup time timing violations, characterized in that, The method includes: A power consumption unit library is established, which is used to dynamically generate drive units based on a pre-configured maximum drive and maximum power consumption. The maximum drive is the maximum drive of each drive unit, and the maximum power consumption is the total power consumption of all drive units in the power consumption unit library. The layout and routing of the driver unit generated based on the power consumption unit library are designed, and timing tests are performed on the layout and routing. Based on the results of the timing test, capture the violation timing path and determine whether there is a setup time violation, including obtaining the line delay and corresponding line jump of the violation timing path; take the violation timing path with line delay greater than a first preset threshold and line jump greater than a second preset threshold as the target line to be optimized. In response to a setup time violation, the driving force of existing driving units on the violation timing path is increased to re-perform timing tests and determine whether the maximum driving force or the maximum power consumption has been reached. This includes, in response to the existence of multiple driving units on the target line, sequentially increasing the driving force of the driving units to re-perform timing tests; before each increase in the driving force of a driving unit, determining whether the maximum driving force has been reached; in response to the corresponding driving unit's driving force having reached the maximum driving force and the remaining power consumption of the power consumption unit library not being zero, continuing to increase the driving force of the next driving unit; after each increase in the driving force of a driving unit, the target line is re-tested to determine whether the setup time violation has been resolved; in response to the setup time violation not being resolved, the above steps are repeated. In response to reaching the maximum drive but not the maximum power consumption and the setup time violation still existing, a new drive unit is inserted into the violation timing path to re-perform timing tests.

2. The method for repairing setup time timing violations according to claim 1, characterized in that, The driver unit design layout and routing based on the power consumption unit library includes: Obtain the driving unit from the power consumption unit library and insert it into the target layout routing; In response to the insertion of the driving unit, the power consumption of the driving unit is calculated and the remaining power consumption of the power consumption unit library is updated; The remaining power consumption is equal to the difference between the maximum power consumption and the power consumption of the inserted driving unit.

3. The method for repairing setup time timing violations according to claim 1, characterized in that, The method further includes: In response to each increase in the drive of the inserted drive unit, the maximum drive of the remaining drive units in the power unit library is dynamically adjusted based on the maximum power consumption.

4. The method for repairing setup time timing violations according to claim 3, characterized in that, The method of dynamically adjusting the maximum drive of the remaining drive units in the power unit library based on the maximum power consumption in response to each increase in the drive of the inserted drive unit includes: Reduce the maximum drive of some remaining drive units in the power consumption unit library; or Reduce the maximum drive of all remaining drive units in the power consumption unit library.

5. The method for repairing setup time timing violations according to claim 4, characterized in that, The step of inserting a new drive unit into the timing violation path to re-perform timing tests in response to reaching the maximum drive but not the maximum power consumption and the setup time violation still existing includes: In response to reaching the maximum drive but not the maximum power consumption and the setup time violation still existing, a suitable drive unit is selected from the remaining drive unit units in the power consumption unit library and inserted into the middle position of the timing path to re-perform timing tests.

6. The method for repairing setup time timing violations according to claim 1, characterized in that, The method further includes prompting for adjustment of the layout routing in response to the fact that all drive units of the power unit library have been inserted into the layout routing and the setup time default still exists.

7. A computer device, characterized in that, include: At least one processor; as well as A memory storing an executable computer program, which, when executed by the at least one processor, is used to implement the steps of a method for repairing setup timing violations as described in any one of claims 1-6.

8. A readable storage medium, characterized in that, include: An executable computer program, when executed by an executor, for implementing the steps of a method for repairing setup timing violations as described in any one of claims 1-6.

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