Display device and display driving method

Abstract

Disclosed herein is a display apparatus and a display driving method. The display apparatus includes a display panel in which a plurality of sub-pixels are disposed, the plurality of sub-pixels including a plurality of gate lines, a plurality of data lines, and a driving transistor; a data driving circuit configured to convert image data into a data voltage and apply the data voltage to the plurality of data lines; and a timing controller configured to control the data driving circuit and switch a first compensation mode for a characteristic value of the driving transistor to a second compensation mode when a driving frequency variation exceeds a reference value, wherein, in the first compensation mode, the characteristic value of the driving transistor can be compensated for an entire area of the display panel through a real-time sensing process during a blanking period, and in the second compensation mode, the characteristic value of the driving transistor can be compensated for at least a partial area of the display panel according to a temperature value.

Description

Technical Field

[0001] Embodiments of this disclosure relate to display devices and display driving methods, and more specifically to display devices and display driving methods capable of reducing characteristic value compensation errors that occur when the driving frequency changes and improving image quality. Background Technology

[0002] With the development of the information society, the demand for display devices for displaying images is increasing, and various types of display devices such as liquid crystal displays and organic light-emitting diode (OLED) displays are being used.

[0003] Among these display devices, OLED displays use self-emissive organic light-emitting diodes, and therefore have advantages in terms of fast response speed, contrast ratio, luminous efficiency, brightness and viewing angle.

[0004] The display device may include a light-emitting element disposed in each of a plurality of sub-pixels located in a display panel, and the light-emitting element is controlled to emit light by controlling the voltage applied to the light-emitting element, thereby controlling the brightness represented by each sub-pixel and displaying an image.

[0005] In this configuration, light-emitting elements and driving transistors for controlling their emission are located in each sub-pixel defined within the display panel. Depending on the driving environment of the display panel, deviations may occur in characteristic values ​​such as threshold voltage or mobility of the driving transistors in each sub-pixel. Consequently, brightness variations (brightness non-uniformity) may occur between sub-pixels, potentially degrading image quality.

[0006] For example, the image data provided to the display device can be a still image or a moving image that changes at a predetermined speed, and the moving image can also correspond to various types of images such as motion pictures, movie and game images. Summary of the Invention

[0007] Since the format of image data may change depending on the type of image data, a variable refresh rate (VRR) mode in which the driving frequency changes according to the type of image data can be used.

[0008] However, when subpixels are driven at various refresh rates by applying VRR mode, compensation errors occur for the characteristic values ​​of the driving transistors when the driving frequency changes, resulting in a deterioration in image quality.

[0009] Therefore, the inventors of this specification have invented a display device and a display driving method that can reduce characteristic value compensation errors that occur when the driving frequency changes and improve image quality.

[0010] One aspect of this disclosure is to provide a display device and a display driving method that can reduce characteristic value compensation errors and improve image quality by distinguishing compensation modes for characteristic values ​​of driving transistors based on changes in driving frequency.

[0011] Another aspect of this disclosure is to provide a display device and a display driving method that can reduce characteristic value compensation errors and improve image quality by: operating in a first compensation mode when the driving frequency changes to be less than or equal to a reference value, to compensate for characteristic values ​​for the entire display panel through a real-time sensing process; and operating in a second compensation mode when the driving frequency changes to be greater than the reference value, to compensate for characteristic values ​​in some areas based on temperature values.

[0012] Another aspect of this disclosure is to provide a display device and a display driving method, which can reduce characteristic value compensation error and improve image quality by: performing characteristic value compensation on areas with brightness deviation less than a predetermined value through a real-time sensing process when the driving frequency changes to a value greater than a reference value, and performing characteristic value compensation on areas with brightness deviation greater than a predetermined value through a temperature detection process.

[0013] Another aspect of this disclosure is to provide a display device and a display driving method that can effectively reduce characteristic value compensation errors and improve image quality by: maintaining a second compensation mode when the driving frequency changes to a value greater than a reference value; in the second compensation mode, compensating characteristic values ​​for at least a portion of a region according to a temperature value for a reference time; and when the reference time has elapsed, switching to a first compensation mode; in the first compensation mode, compensating characteristic values ​​for the entire display panel through a real-time sensing process.

[0014] On one hand, embodiments of this disclosure can provide a display device comprising: a display panel having a plurality of sub-pixels, the plurality of sub-pixels including a plurality of gate lines, a plurality of data lines, and a driving transistor; a data driving circuit configured to convert image data into data voltage and apply the data voltage to the plurality of data lines; and a timing controller configured to control the data driving circuit and, when the driving frequency changes beyond a reference value, switch from a first compensation mode to a second compensation mode for the characteristic values ​​of the driving transistor, wherein, in the first compensation mode, the characteristic values ​​of the driving transistor are compensated for the entire area of ​​the display panel through a real-time sensing process during a blanking period, and in the second compensation mode, the characteristic values ​​of the driving transistor are compensated for at least a portion of the display panel based on a temperature value.

[0015] On the other hand, embodiments of this disclosure can provide a display driving method for a display device, the display device including a display panel and a data driving circuit, wherein a plurality of sub-pixels are disposed in the display panel, the plurality of sub-pixels including a plurality of gate lines, a plurality of data lines and driving transistors, the data driving circuit being configured to convert image data into data voltages and apply the data voltages to the plurality of data lines, the method comprising: operating in a first compensation mode, wherein in the first compensation mode, characteristic values ​​of driving transistors are compensated for the entire area of ​​the display panel by a real-time (RT) sensing process during a blanking period; calculating a driving frequency change between the driving frequency of the current frame and the driving frequency of the previous frame; comparing the driving frequency change with a reference value; and operating in a second compensation mode when the driving frequency change is greater than the reference value, wherein in the second compensation mode, characteristic values ​​of driving transistors are compensated for at least a portion of the display panel according to a temperature value.

[0016] According to embodiments of this disclosure, characteristic value compensation errors that occur when the driving frequency changes can be reduced and image quality can be improved.

[0017] Furthermore, according to embodiments of this disclosure, characteristic value compensation errors can be reduced and image quality improved by distinguishing the compensation modes for characteristic values ​​of the driving transistor based on changes in the driving frequency.

[0018] Furthermore, according to embodiments of this disclosure, characteristic value compensation errors and image quality can be reduced and improved by the following operations: when the driving frequency changes to be less than or equal to a reference value, the operation is performed in a first compensation mode to compensate for characteristic values ​​for the entire display panel through a real-time sensing process; and when the driving frequency changes to be greater than a reference value, the operation is performed in a second compensation mode to compensate for characteristic values ​​in some areas based on temperature values.

[0019] Furthermore, according to embodiments of this disclosure, characteristic value compensation errors can be reduced and image quality improved through the following operations: when the driving frequency changes to a value greater than a reference value, characteristic value compensation is performed on areas with brightness deviations less than a predetermined value through a real-time sensing process, and characteristic value compensation is performed on areas with brightness deviations greater than a predetermined value through a temperature detection process.

[0020] Furthermore, according to embodiments of this disclosure, characteristic value compensation errors and image quality can be effectively reduced by the following operations: when the driving frequency changes to a value greater than a reference value, a second compensation mode is maintained; in the second compensation mode, characteristic values ​​of at least a portion of the area are compensated for based on the temperature value for a reference time; and when the reference time has elapsed, a first compensation mode is switched to; in the first compensation mode, characteristic values ​​of the entire display panel are compensated through a real-time sensing process.

[0021] It should be understood that, in addition to the effects of this disclosure mentioned above, those skilled in the art will clearly understand additional advantages and features of this disclosure based on the above description. Attached Figure Description

[0022] The above and other aspects, features, and advantages of this disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, wherein,

[0023] Figure 1 This is a schematic diagram illustrating the configuration of a display device according to an embodiment of the present disclosure;

[0024] Figure 2 This is an exemplary system diagram illustrating a display device according to an embodiment of the present disclosure;

[0025] Figure 3 This is an example diagram illustrating the circuitry of a sub-pixel in a display device according to an embodiment of the present disclosure;

[0026] Figure 4 This is a diagram illustrating an exemplary circuit structure for sensing characteristic values ​​of a driving transistor in a display device according to an embodiment of the present disclosure;

[0027] Figure 5 This is a diagram illustrating a drive timing diagram for sensing a threshold voltage among the characteristic values ​​of a drive transistor in a display device according to an embodiment of the present disclosure.

[0028] Figure 6 This is a diagram illustrating a drive timing diagram of mobility sensing among characteristic values ​​of a drive transistor in a display device according to an embodiment of the present disclosure.

[0029] Figure 7 This is an example of a signal timing diagram illustrating a case in which a recovery period is included after the mobility sensing period of the driving transistor in the display device, according to an embodiment of the present disclosure.

[0030] Figure 8 This is a diagram illustrating an example of the concept of switching between a default mode and a variable refresh rate mode in a display device according to the type of image data, according to an embodiment of the present disclosure;

[0031] Figure 9 This is a diagram illustrating an example of a signal waveform in a variable refresh rate mode where the vertical blanking period varies according to the driving frequency in a display device according to an embodiment of the present disclosure.

[0032] Figure 10 This is a diagram illustrating an example of a recovery voltage applied to the display panel according to a change in driving frequency in a display device according to an embodiment of the present disclosure;

[0033] Figure 11 This is a flowchart illustrating a display driving method according to an embodiment of the present disclosure;

[0034] Figure 12 This is a conceptual diagram illustrating the operation state of a display device in a first compensation mode according to an embodiment of the present disclosure;

[0035] Figure 13 This is a conceptual diagram illustrating the operation state of a display device in a second compensation mode according to an embodiment of the present disclosure; and

[0036] Figure 14 This is a diagram illustrating an example of a display device according to an embodiment of the present disclosure operating in a first compensation mode and a second compensation mode according to a change in the driving frequency. Detailed Implementation

[0037] In the following description, some embodiments of this disclosure will be described in detail with reference to exemplary accompanying drawings. In the following description of examples or embodiments of this disclosure, reference will be made to the accompanying drawings, in which specific examples or embodiments that may be implemented are illustrated by way of example, and wherein the same or similar reference numerals and symbols may be used to refer to the same or similar components, even if they are shown in different drawings. Furthermore, in the following description of examples or embodiments of this disclosure, a detailed description of well-known functions and components incorporated herein will be omitted where it is determined that such detailed description would make the subject matter of some embodiments of this disclosure considerably unclear. Terms such as “comprising,” “having,” “containing,” “constituting,” “forming,” and “form” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” As used herein, the singular form is intended to include the plural form unless the context clearly indicates otherwise.

[0038] The shapes, dimensions, areas, ratios, angles, quantities, etc. illustrated in the accompanying drawings for describing various embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto.

[0039] Terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” may be used herein to describe elements of this disclosure. Each of these terms is not used to define the nature, order, sequence, or number of elements, but merely to distinguish the corresponding element from other elements.

[0040] When referring to a first element being "connected or linked to" a second element, or "in contact or overlapping" with a second element, it should be understood that the first element can not only be "directly connected or linked to" the second element or "directly in contact or overlapping" with the second element, but a third element can also be "inserted" between the first and second elements, or the first and second elements can be "connected or linked," "in contact or overlapping," etc., with each other via a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or linked," "in contact or overlapping," etc.

[0041] When using terms such as “above,” “on top,” “above,” “below,” “beside,” “near,” “near,” “close to,” “adjacent,” “on one side,” and “next to” to describe the positional relationship between two parts, one or more parts may be positioned between the two parts unless the terms are used with terms such as “immediately next” or “directly.”

[0042] When time-relative terms such as “after,” “following,” “next,” or “before” are used to describe the process or operation of an element or configuration, or the flow or steps in an operation, processing, or manufacturing method, these terms may be used to describe discontinuous or non-sequential processes or operations unless used together with “directly” or “immediately.”

[0043] Furthermore, when referring to any size, relative dimensions, etc., even without a specific description, the numerical values ​​of the component or feature or corresponding information (e.g., level, range, etc.) should be considered, including tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.). In addition, the term "can" fully encompasses all the meanings of the term "able to".

[0044] In the following, various embodiments of this disclosure will be described in detail with reference to the accompanying drawings.

[0045] Figure 1 This is a schematic diagram illustrating the configuration of a display device according to an embodiment of the present disclosure.

[0046] Reference Figure 1According to embodiments of the present disclosure, the display device 100 may include a display panel 110, a gating drive circuit 120, a data drive circuit 130, a timing controller 140, and a temperature sensor 150. The display panel 110 is connected to multiple gating lines GL and multiple data lines DL, and multiple sub-pixels SP are arranged therein in a matrix. The gating drive circuit 120 provides signals to the multiple gating lines GL, the data drive circuit 130 provides data voltage through the multiple data lines DL, the timing controller 140 controls the gating drive circuit 120 and the data drive circuit 130, and the temperature sensor 150 detects the temperature of the display panel 110.

[0047] The display panel 110 displays images based on scan signals transmitted from the gating drive circuit 120 through multiple gating lines GL and data voltages transmitted from the data drive circuit 130 through multiple data lines DL.

[0048] In the case of a liquid crystal display device, the display panel 110 includes a liquid crystal layer formed between two substrates and can operate in any known mode, such as twisted nematic (TN) mode, vertical alignment (VA) mode, planar switching (IPS) mode, or edge field switching (FFS) mode. Furthermore, in the case of an organic light-emitting display device, the display panel 110 can be implemented using a top-emitting method, a bottom-emitting method, or a dual-emitting method.

[0049] In the display panel 110, multiple pixels can be set in the form of a matrix. Each pixel can be formed by sub-pixels SP with different colors, such as white sub-pixels, red sub-pixels, green sub-pixels and blue sub-pixels. Each sub-pixel SP can be defined by multiple data lines DL and multiple gate lines GL.

[0050] A sub-pixel SP may include a thin-film transistor (TFT), a light-emitting element that emits light according to a data voltage, and a storage capacitor electrically connected to the light-emitting element to maintain the voltage, disposed in an area formed by a data line DL and a gate line GL.

[0051] For example, when a display device 100 with a resolution of 2,160 × 3,840 is formed by four sub-pixels SP (including white (W) sub-pixels, red (R) sub-pixels, green (G) sub-pixels and blue (B) sub-pixels), since there are 2,160 gating lines GL and 3,840 data lines DL connected to the four sub-pixels (WRGB), a total of 3,840 × 4 = 15,360 data lines DL can be set, and the sub-pixels SP can be set in the area formed by the gating lines GL and the data lines DL.

[0052] The gating drive circuit 120 is controlled by the timing controller 140 and sequentially outputs scan signals to multiple gating lines GL arranged in the display panel 110 to control the driving timing of multiple sub-pixels SP.

[0053] In a display device 100 with a resolution of 2,160 × 3,840, the case where scan signals are sequentially output from the first gate line to the second,160th gate line relative to the 2,160 gate lines GL can be referred to as 2,160-phase driving. Alternatively, the case where scan signals are sequentially output from the first gate line to the fourth gate line and then sequentially output from the fifth gate line to the eighth gate line, the case where scan signals are sequentially output based on four gate lines GL can be referred to as four-phase driving. That is, the case where scan signals are sequentially output for every N gate lines GL can be referred to as N-phase driving.

[0054] In this configuration, the gate drive circuit 120 may include one or more gate drive integrated circuits (GDICs), and depending on the driving method, the gate drive circuit 120 may be located only on one or both sides of the display panel 110. Alternatively, the gate drive circuit 120 may be directly formed in the bezel area of ​​the display panel 110, implemented as a gate in-panel (GIP).

[0055] The data driving circuit 130 receives digital image data DATA from the timing controller 140 and converts the received digital image data DATA into analog data voltage. Then, when a scan signal is applied through the gate line GL, the data voltage is output to each data line DL according to the timing, and thus each sub-pixel SP connected to the data line DL displays a light emission signal using a brightness corresponding to the data voltage.

[0056] Similarly, the data driving circuit 130 may include one or more source driver integrated circuits (SDICs), and the source driver integrated circuits (SDICs) may be connected to the bonding pads of the display panel 110, or may be directly disposed on the display panel 110 using the tape auto-bonding (TAB) method or the chip-on-glass (COG) method.

[0057] In some cases, each source driver integrated circuit (SDIC) can be integrated and disposed within the display panel 110. Alternatively, each source driver integrated circuit (SDIC) can be implemented using a chip-on-film (COF) method. In this case, each source driver integrated circuit (SDIC) can be mounted on a circuit film and electrically connected to the data line DL of the display panel 110 via the circuit film.

[0058] The timing controller 140 provides various control signals to the gating drive circuit 120 and the data drive circuit 130 to control their operation. Specifically, the timing controller 140 controls the gating drive circuit 120 to output a scan signal according to the timing implemented in each frame, and on the other hand, the timing controller 140 transmits digital image data (DATA) received from external components to the data drive circuit 130.

[0059] In this configuration, in addition to digital image data DATA, timing controller 140 receives various timing signals from external components (e.g., a host system), including a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a master clock MCLK. Therefore, timing controller 140 uses these various timing signals received from external components to generate control signals and transmits them to gating drive circuit 120 and data drive circuit 130.

[0060] For example, to control the gating drive circuit 120, the timing controller 140 outputs various gating control signals, including a gating start pulse GSP, a gating clock GCLK, and a gating output enable signal GOE. Here, the gating start pulse GSP controls the timing of the start of operation of one or more GDICs constituting the gating drive circuit 120. Additionally, the gating clock GCLK is a clock signal commonly input to one or more gating drive integrated circuits GDICs and controls the shift timing of the scan signal. Furthermore, the gating output enable signal GOE specifies the timing information for one or more gating drive integrated circuits GDICs.

[0061] In addition, to control the data drive circuit 130, the timing controller 140 outputs various data control signals, including a source start pulse SSP, a source sampling clock SCLK, and a source output enable signal SOE. Here, the source start pulse SSP controls the timing at which one or more SDICs constituting the data drive circuit 130 begin sampling data. The source sampling clock SCLK is a clock signal used to control the timing of data sampling by the SDICs. The source output enable signal SOE controls the output timing of the data drive circuit 130.

[0062] To measure the temperature of a portion or the entire area of ​​the display panel 110, one or more temperature sensors 150 can be positioned at any location within the border area of ​​the display panel 110 where no image is displayed. The temperature value detected by the temperature sensor 150 can be transmitted to a timing controller 140, which can compensate for the digital image data DATA based on the detected temperature value and provide the compensated digital image data to the display panel 110 via a data drive circuit 130.

[0063] The display device 100 may also include a power management circuit for providing various voltages or currents to the display panel 110, the gating drive circuit 120, or the data drive circuit 130, or for controlling the various voltages or currents to be provided.

[0064] Furthermore, light-emitting elements can be disposed in each sub-pixel SP. For example, an organic light-emitting display device can include a light-emitting element such as a light-emitting diode (LED) at each sub-pixel SP, and display an image by controlling the current flowing in the light-emitting element according to the data voltage. Various types of devices, such as liquid crystal display (LCD) devices, organic light-emitting display devices, and plasma display panels, can be used as display devices.

[0065] Figure 2 This is an exemplary system diagram illustrating a display device according to an embodiment of the present disclosure.

[0066] Figure 2 A display device 100 according to an embodiment of the present disclosure is shown, wherein the SDIC included in the data driving circuit 130 is implemented using the COF method among various methods (TAB, COG, and COF), and the gate driving circuit 120 is implemented in the GIP form among various methods (TAB, COG, COF, and GIP).

[0067] When the gate drive circuit 120 is implemented in GIP form, the multiple gate drive integrated circuits (GDICs) included in the gate drive circuit 120 can be directly formed in the non-display area of ​​the display panel 110. In this case, the gate drive integrated circuits (GDICs) can receive various signals (clock signal, gate high signal, and gate low signal) required to generate the scan signal through the gate drive related signal lines provided in the non-display area.

[0068] Similarly, one or more source driver integrated circuits (SDICs) included in the data driver circuit 130 can each be mounted on the source film SF, and one side of the source film SF can be electrically connected to the display panel 110. Additionally, lines for electrically connecting the source driver integrated circuits (SDICs) to the display panel 110 can be provided on the source film SF.

[0069] The display device 100 may include at least one source printed circuit board (SPCB) for connecting multiple source driver integrated circuits (SDIC) to other devices, and a control printed circuit board (CPCB) for mounting control components and various electrical devices.

[0070] In this configuration, one side of the source film SF on which the source driver integrated circuit (SDIC) is mounted can be connected to at least one source printed circuit board (SPCB). That is, one side of the source film SF on which the source driver integrated circuit (SDIC) is mounted can be electrically connected to the display panel 110, and the other side can be electrically connected to the source printed circuit board (SPCB).

[0071] The timing controller 140 and the power management circuit 180 can be mounted on a control printed circuit board (CPCB). The timing controller 140 can control the operation of the data drive circuit 130 and the gating drive circuit 120. The power management circuit 180 can provide drive voltage or current to the display panel 110, the data drive circuit 130, and the gating drive circuit 120, and control the voltage or current to be provided.

[0072] At least one source printed circuit board (SPCB) and at least one control printed circuit board (CPCB) can be electrically connected via at least one connecting member, and the connecting member can be formed, for example, a flexible printed circuit board (FPC), a flexible flat cable (FFC), etc. Alternatively, at least one source printed circuit board (SPCB) and at least one control printed circuit board (CPCB) can be integrated into a single printed circuit board.

[0073] The display device 100 may also include a setup board 170 electrically connected to a control printed circuit board (CPCB). In this case, the setup board 170 may be referred to as a power board. A main power management circuit 160 for managing the total power of the display device 100 may be present in the setup board 170. The main power management circuit 160 may be interconnected with a power management circuit 180.

[0074] In the case of the display device 100 with the above configuration, a driving voltage is generated from the setting board 170 and transmitted to the power management circuit 180 on the control printed circuit board CPCB. The power management circuit 180 transmits the driving voltage required to drive the display or detect characteristic values ​​to the source printed circuit board SPCB via a flexible printed circuit FPC or a flexible flat cable FFC. The driving voltage transmitted to the source printed circuit board SPCB is provided by the source driver integrated circuit SDIC to drive specific sub-pixels SP in the display panel 110 to emit light or sense specific sub-pixels SP.

[0075] In this case, each sub-pixel SP disposed in the display panel 110 of the display device 100 may include a light-emitting element and, for example, a circuit element for driving a driving transistor for driving the light-emitting element.

[0076] The type and number of circuit elements constituting each sub-pixel SP can be determined differently depending on the provided functions and design methods.

[0077] Figure 3 This is an example diagram illustrating the circuitry of a sub-pixel in a display device according to an embodiment of the present disclosure.

[0078] Reference Figure 3 In the display device 100 according to an embodiment of the present disclosure, the sub-pixel SP may include one or more transistors and capacitors, and the organic light-emitting diode (OLED) may be configured as a light-emitting element ED.

[0079] For example, a subpixel SP may include a driving transistor DRT, a switching transistor SWT, a sensing transistor SENT, a storage capacitor Cst, and a light-emitting element ED.

[0080] The driving transistor DRT has a first node N1, a second node N2, and a third node N3. The first node N1 of the driving transistor DRT can be the gate node to which the data voltage Vdata is applied from the data driving circuit 130 via the data line DL when the switching transistor SWT is turned on. The second node N2 of the driving transistor DRT can be electrically connected to the anode of the light-emitting element ED, and can be either a source node or a drain node. The third node N3 of the driving transistor DRT is electrically connected to the driving voltage line DVL to which the driving voltage EVDD is applied, and can be either a drain node or a source node.

[0081] In this case, the drive voltage EVDD required to display the image can be supplied to the drive voltage line DVL during the display drive period. For example, the drive voltage EVDD required to display the image can be 27V.

[0082] The switching transistor SWT is electrically connected between the first node N1 of the driving transistor DRT and the data line DL, and operates according to the scan signal SCAN provided by the gating line GL connected to the gate node. Additionally, when turned on, the switching transistor SWT transmits the data voltage Vdata provided by the data line DL to the gate node of the driving transistor DRT to control the operation of the driving transistor DRT.

[0083] The sensing transistor SENT is electrically connected between the second node N2 of the driving transistor DRT and the reference voltage line RVL. The gate line GL is connected to the gate node, and therefore the sensing transistor SENT operates according to the sensing signal SENSE provided through the gate line GL. When turned on, the sensing transistor SENT transmits the sensing reference voltage Vref provided through the reference voltage line RVL to the second node N2 of the driving transistor DRT.

[0084] In other words, by controlling the switching transistor SWT and the sensing transistor SENT, the voltage of the first node N1 and the second node N2 of the driving transistor DRT are controlled to provide current for driving the light-emitting element ED.

[0085] The gate nodes of the switching transistor SWT and the sensing transistor SENT can be connected to a single gate line GL or to different gate lines GL. Here, an example of a structure is shown where the switching transistor SWT and the sensing transistor SENT are connected to different gate lines GL. In this case, the switching transistor SWT and the sensing transistor SENT can be independently controlled by a scan signal SCAN and a sensing signal SENSE transmitted through different gate lines GL.

[0086] On the other hand, when the switching transistor SWT and the sensing transistor SENT are connected to a gate line GL, the switching transistor SWT and the sensing transistor SENT can be simultaneously controlled by the scan signal SCAN or the sensing signal SENSE transmitted through a gate line GL, and the aperture ratio of the sub-pixel SP can be increased.

[0087] Furthermore, the transistors disposed in the sub-pixel SP can be formed from both p-type and n-type transistors. Here, an example is shown in which the transistors are formed from n-type transistors.

[0088] The storage capacitor Cst is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT, and holds the data voltage Vdata within one frame.

[0089] Depending on the type of driving transistor DRT, the storage capacitor Cst can be connected between the first node N1 and the third node N3 of the driving transistor DRT. The anode of the light-emitting element ED can be electrically connected to the second node N2 of the driving transistor DRT, and the base voltage EVSS can be applied to the cathode of the light-emitting element ED.

[0090] Here, the base voltage EVSS can be ground voltage or a voltage higher or lower than ground voltage. Furthermore, the base voltage EVSS can change depending on the driving state. For example, the base voltage EVSS can be set differently during display driving and during sensing driving.

[0091] The example above of the structure of a subpixel SP is a three-transistor (3T) - one-capacitor (1C) structure. This is merely an example for description, and the structure may additionally include one or more transistors, or in some cases, one or more capacitors. Alternatively, multiple subpixels SP may each have the same structure, or some subpixels in multiple subpixels SP may have different structures.

[0092] In order to effectively detect characteristic values ​​of the driving transistor DRT, such as threshold voltage or mobility, the display device 100 according to embodiments of the present disclosure may use a method of measuring the current flowing due to the voltage charged in the storage capacitor Cst during the characteristic value sensing period of the driving transistor DRT, and this is referred to as current sensing.

[0093] In other words, by measuring the current flowing due to the voltage charging in the storage capacitor Cst during the characteristic value sensing period of the driving transistor DRT, the characteristic value or change of the characteristic value of the driving transistor DRT in the sub-pixel SP can be detected.

[0094] In this case, since the reference voltage line RVL is used not only to transmit the reference voltage Vref, but also as a sensing line for sensing the characteristic value of the driving transistor DRT in the sub-pixel SP, the reference voltage line RVL can be called a sensing line.

[0095] Figure 4 This is a diagram illustrating an exemplary circuit structure for sensing characteristic values ​​of a driving transistor in a display device according to an embodiment of the present disclosure.

[0096] Reference Figure 4 The display device 100 according to embodiments of the present disclosure may include components for compensating for deviations in the characteristic values ​​of the driving transistor DRT.

[0097] For example, the characteristic value or change in characteristic value of the driving transistor DRT can be reflected as the voltage (e.g., Vdata - Vth) of the second node N2 of the driving transistor DRT. When the sensing transistor SENT is turned on, the voltage of the second node N2 of the driving transistor DRT can correspond to the voltage of the reference voltage line RVL. Furthermore, the line capacitor Cline of the reference voltage line RVL can be charged using the voltage of the second node N2 of the driving transistor DRT, and the reference voltage line RVL can have a voltage corresponding to the voltage of the second node N2 of the driving transistor DRT through the sensed voltage Vsen charged in the line capacitor Cline.

[0098] The display device 100 may include: an analog-to-digital converter (ADC) for measuring the voltage of a reference voltage line RVL corresponding to the voltage of the second node N2 of the driving transistor DRT, so as to convert the measured voltage into a digital value; and switches SAM and SPRE for sensing characteristic values.

[0099] The switches SAM and SPRE used to control the characteristic value sensing drive may include: a sensing reference switch SPRE, which controls the connection between the reference voltage line RVL and the sensing reference voltage providing node Npres, where the sensing reference voltage providing node Npres is supplied with a reference voltage Vref; and a sampling switch SAM, which controls the connection between the reference voltage line RVL and the analog-to-digital converter ADC. Here, the sensing reference switch SPRE is the switch used to control the characteristic value sensing drive, and the reference voltage Vref supplied to the reference voltage line RVL through the sensing reference switch SPRE becomes the sensing reference voltage VpreS.

[0100] Additionally, the switch used to sense the characteristic value of the driving transistor DRT may include a display reference switch RPRE for controlling the display drive. The display reference switch RPRE controls the connection between the reference voltage line RVL and the display reference voltage supply node Nprer, which is supplied with a reference voltage Vref. The display reference switch RPRE is a switch used for display driving, and the reference voltage Vref supplied to the reference voltage line RVL via the display reference switch RPRE corresponds to the display reference voltage VpreR.

[0101] In this configuration, the sensing reference switch SPRE and the display reference switch RPRE can be set separately or integrated into a single component. The sensing reference voltage VpreS and the display reference voltage VpreR can have the same voltage value or different voltage values.

[0102] The timing controller 140 of the display device 100 may include a memory MEM and a compensation circuit COMP. The memory MEM stores data transmitted from the analog-to-digital converter (ADC) or pre-stores reference values. The compensation circuit COMP compensates for deviations in characteristic values ​​by comparing the received data with the reference values ​​stored in the memory MEM. In this case, the compensation value calculated by the compensation circuit COMP can be stored in the memory MEM.

[0103] Therefore, the timing controller 140 can use the compensation value calculated by the compensation circuit COMP to compensate the image data DATA to be provided to the data driving circuit 130, and output the compensated image data Data_comp to the data driving circuit 130. Thus, the data driving circuit 130 can convert the compensated image data Data_comp into an analog form compensated data voltage Vdata_comp via a digital-to-analog converter DAC, and output the compensated data voltage Vdata_comp to the corresponding data line DL via an output buffer BUF. Therefore, the characteristic value deviation (threshold voltage deviation or mobility deviation) of the driving transistor DRT in the corresponding sub-pixel SP can be compensated.

[0104] As described above, the period during which the characteristic values ​​(threshold voltage and mobility) of the driving transistor DRT are sensed can occur after the power-on signal is generated and before the display driving begins. For example, when the power-on signal is applied to the display device 100, the timing controller 140 loads the parameters required to drive the display panel 110 and then executes the display driving. In this case, the parameters required to drive the display panel 110 may include information about the characteristic value sensing and compensation previously performed in the display panel 110, and the characteristic values ​​(threshold voltage and mobility) of the driving transistor DRT can be sensed during the parameter loading process. In this way, the process of sensing characteristic values ​​after the power-on signal is generated and before the sub-pixel emits light is called the power-on sensing process.

[0105] Alternatively, the period during which the characteristic value of the driving transistor DRT is sensed can occur after a power-off signal is generated in the display device 100. For example, when a power-off signal is generated in the display device 100, the timing controller 140 can cut off the data voltage supplied to the display panel 110 and perform sensing of the characteristic value of the driving transistor DRT for a certain period of time. In this way, the process of performing characteristic value sensing in a state where a power-off signal is generated, the data voltage is cut off, and therefore the emission of light from the sub-pixels is terminated, is called a power-off sensing process.

[0106] Furthermore, the characteristic value sensing period of the driving transistor DRT can be performed in real time during display driving. This sensing process is called real-time (RT) sensing. During RT sensing, sensing can be performed for one or more sub-pixel SPs within each blanking of one or more sub-pixel SP lines during each display driving period.

[0107] In other words, during the display driving period when an image is displayed on the display panel 110, the blanking period during which the data voltage is not supplied to the sub-pixel SP can exist within the first frame or between the nth frame and the n+1th frame, and mobility sensing of one or more sub-pixels SP can be performed during the blanking period.

[0108] In this way, when the sensing process is performed during the blanking period, the sub-pixel SP line that performs the sensing process can be randomly selected. Furthermore, after the sensing process is performed during the blanking period, the compensated data voltage Vdata_comp can be provided to the sub-pixel SP line that performed the sensing process during the display driving period. Therefore, after the sensing process during the blanking period, anomalies in the sub-pixel SP line that completed the sensing process during the display driving period can be reduced.

[0109] Furthermore, the data drive circuit 130 may include a data voltage output circuit 136, which includes a latch circuit, a digital-to-analog converter (DAC), and an output buffer (BUF). In some cases, the data drive circuit 130 may also include an analog-to-digital converter (ADC) and various switches SAM, SPRE, and RPRE. Alternatively, the ADC and various switches SAM, SPRE, and RPRE may be located external to the data drive circuit 130.

[0110] Additionally, the compensation circuit COMP can exist outside the timing controller 140 or can be included inside the timing controller 140, and the memory MEM can be located outside the timing controller 140 or can be implemented as a register inside the timing controller 140.

[0111] Figure 5 This is a diagram illustrating a drive timing diagram for sensing a threshold voltage among the characteristic values ​​of a drive transistor in a display device according to an embodiment of the present disclosure.

[0112] Reference Figure 5 In the display device 100 according to an embodiment of the present disclosure, the threshold voltage sensing period VthSENSING may include an initialization period INITIAL, a tracking period TRACKING, and a sampling period SAMPLING.

[0113] During the initialization period (INITIAL), the switching transistor SWT is turned on by the on-level scan signal SCAN. Therefore, the first node N1 of the driving transistor DRT is initialized to the sense data voltage Vdata_sen for threshold voltage sensing.

[0114] Additionally, during the initialization period (INITIAL), the sensing transistor SENT is turned on, and the sensing reference switch SPRE is turned on by the sensing signal SENSE, which has an on-state voltage. Therefore, the second node N2 of the driving transistor DRT is initialized to the sensing reference voltage VpreS.

[0115] The tracking period is the time period during which the operation of tracking the threshold voltage Vth of the driving transistor DRT is performed. That is, during the tracking period, the voltage of the second node N2 of the driving transistor DRT is tracked, which reflects the threshold voltage Vth of the driving transistor DRT.

[0116] During the tracking period, the switching transistor SWT and the sensing transistor SENT remain on, while the sensing reference switch SPRE is off. Therefore, the state of the second node N2 of the driving transistor DRT becomes floating, and the voltage at the second node N2 of the driving transistor DRT begins to rise from the sensing reference voltage VpreS.

[0117] In this situation, since the sensing transistor SENT is in the on state, the rise in voltage at the second node N2 of the driving transistor DRT causes a rise in voltage at the reference voltage line RVL.

[0118] The voltage at the second node N2 of the driving transistor DRT rises and then saturates. The saturation voltage at the second node N2 of the driving transistor DRT corresponds to the difference (Vdata_sen-Vth) between the sensed data voltage Vdata_sen used for the threshold voltage and the threshold voltage Vth of the driving transistor DRT.

[0119] Therefore, when the voltage of the second node N2 of the driving transistor DRT is saturated, the voltage of the reference voltage line RVL corresponds to the difference (Vdata_sen-Vth) between the sensing data voltage Vdata_sen used for the threshold voltage and the threshold voltage Vth of the driving transistor DRT.

[0120] When the voltage of the second node N2 of the driving transistor DRT is saturated, the sampling switch SAM is turned on, and the sampling period SAMPLING is performed.

[0121] During the sampling period, the analog-to-digital converter (ADC) can detect the sensed voltage Vsen of the reference voltage line RVL connected by the sampling switch SAM, and convert the sensed voltage Vsen into sensed data corresponding to a digital value. Here, the sensed voltage Vsen transmitted by the ADC corresponds to "Vdata_sen-Vth".

[0122] The compensation circuit COMP can determine the threshold voltage of the driving transistor DRT located in the corresponding sub-pixel SP based on the sensing data output from the analog-to-digital converter ADC, and can compensate the threshold voltage of the driving transistor DRT accordingly.

[0123] In other words, the compensation circuit COMP can determine the threshold voltage Vth of the driving transistor DRT based on the sensing data (digital data corresponding to Vdata_sen-Vth) measured through the threshold voltage sensing operation and the sensing data for the threshold voltage (digital data corresponding to Vdata_sen).

[0124] The compensation circuit COMP compensates for the threshold voltage deviation between driving transistors DRT by comparing the threshold voltage Vth determined for the corresponding driving transistor DRT with a reference threshold voltage or the threshold voltage of another driving transistor DRT. Here, threshold voltage deviation compensation can be a process of transforming the data voltage Vdata into a compensated data voltage Vdata_comp, that is, multiplying the data voltage Vdata by the compensation gain G (e.g., Vdata_comp = G * Vdata).

[0125] Therefore, when the deviation of the threshold voltage increases, the compensation gain G multiplied by the data voltage Vdata can increase.

[0126] Figure 6 This is a diagram illustrating a drive timing diagram for sensing mobility among characteristic values ​​of a drive transistor in a display device according to an embodiment of the present disclosure.

[0127] Reference Figure 6 In the display device 100 according to an embodiment of the present disclosure, similar to threshold voltage sensing operation, the mobility sensing period u SENSING of the driving transistor DRT may include an initialization period INITIAL, a tracking period TRACKING, and a sampling period SAMPLING.

[0128] Since the mobility of the driving transistor DRT is typically sensed by individually turning on or off the switching transistor SWT and the sensing transistor SENT, a sensing operation can be performed by applying the scan signal SCAN and the sensing signal SENSE separately to the switching transistor SWT and the sensing transistor SENT through two gating lines GL.

[0129] During the initialization period (INITIAL), the switching transistor SWT is turned on by the on-level scan signal SCAN, and the first node N1 of the driving transistor DRT is initialized to the sensing data voltage Vdata_sen for mobility sensing.

[0130] Additionally, the sensing transistor SENT is turned on, and the sensing reference switch SPRE is turned on by the sensing signal SENSE at the on-level. In this state, the second node N2 of the driving transistor DRT is initialized to the sensing reference voltage VpreS.

[0131] The tracking period is the time during which the mobility of the driving transistor DRT is tracked. The mobility of the driving transistor DRT represents its current driving capability. During the tracking period, the voltage of the second node N2 of the driving transistor DRT is tracked, and the mobility of the driving transistor DRT can be calculated based on the voltage of the second node N2.

[0132] During the tracking period, the switching transistor SWT is turned off by the off-level scan signal SCAN, and the sensing reference switch SPRE transitions to the off level. Therefore, both the first node N1 and the second node N2 of the driving transistor DRT are floating, and consequently, the voltages of both nodes N1 and N2 of the driving transistor DRT rise. Specifically, since the voltage of the second node N2 of the driving transistor DRT is initialized to the sensing reference voltage VpreS, the voltage of the second node N2 begins to rise from the sensing reference voltage VpreS. In this case, since the sensing transistor SENT is in the on state, the rise in the voltage of the second node N2 of the driving transistor DRT causes a rise in the voltage of the reference voltage line RVL.

[0133] During the sampling period, the sampling switch SAM is turned on when a predetermined time Δt has elapsed since the voltage at the second node N2 of the driving transistor DRT began to rise. In this case, the analog-to-digital converter (ADC) can detect the sensed voltage Vsen of the reference voltage line RVL connected by the sampling switch SAM and convert the sensed voltage Vsen into sensed data in the form of a digital signal. Here, the sensed voltage Vsen applied to the ADC corresponds to the voltage level VpreS+ΔV, which is the level at which the sensed reference voltage VpreS rises by a predetermined voltage ΔV.

[0134] The compensation circuit COMP can determine the mobility of the driving transistor DRT in the corresponding sub-pixel SP based on the sensing data output from the analog-to-digital converter (ADC), and use the determined mobility to compensate for the deviation of the driving transistor DRT. The compensation circuit COMP can determine the mobility of the driving transistor DRT based on the sensing data VpreS+ΔV measured by the mobility sensing operation, the known sensing reference voltage VpreS, and the elapsed time Δt.

[0135] In other words, the mobility of the driving transistor DRT is proportional to the voltage change ΔV / Δt per unit time of the reference voltage line RVL during the tracking period (i.e., the slope of the voltage waveform of the reference voltage line RVL). In this case, compensation for the mobility deviation of the driving transistor DRT can be a process of changing the data voltage Vdata, that is, multiplying the data voltage Vdata by the compensation gain G using arithmetic. For example, the compensated data voltage Vdata_comp can be determined as the value obtained by multiplying the data voltage Vdata by the compensation gain G (Vdata_comp = G * Vdata).

[0136] Furthermore, since the threshold voltage sensing operation of the driving transistor DRT may take a long time to saturate the voltage of the second node N2 of the driving transistor DRT, the threshold voltage sensing operation can be performed as a power-off sensing process that can be carried out over a longer period of time. On the other hand, since the mobility sensing operation of the driving transistor DRT may require a relatively short time compared to the threshold voltage sensing operation, the mobility sensing operation can be performed as a power-on sensing process or a RT sensing process that is carried out over a short period of time.

[0137] Furthermore, in order to reset the driving transistor DRT after performing a characteristic value sensing operation for the driving transistor DRT, the display device 100 of this disclosure can apply a recovery voltage during the blanking period.

[0138] Figure 7 This is an example of a signal timing diagram illustrating a case where a recovery period is included after the mobility sensing period of the driving transistor in the display device, according to an embodiment of the present disclosure.

[0139] Reference Figure 7 The display device 100 according to embodiments of the present disclosure may further include a recovery period after the characteristic value sensing operation of the driving transistor DRT (especially the mobility sensing period u SENSING).

[0140] Since the mobility of the driving transistor DRT is typically sensed by individually turning on or off the switching transistor SWT and the sensing transistor SENT, a sensing operation can be performed using a structure in which a scan signal SCAN and a sensing signal SENSE are applied to the switching transistor SWT and the sensing transistor SENT via two gating lines GL.

[0141] The initialization period (INITIAL), tracking period (TRACKING), and sampling period (SAMPLING) have already been described above, and therefore their descriptions will be omitted.

[0142] When the voltage at the second node N2 of the driving transistor DRT is sensed during the sampling period, the recovery period can continue. The recovery period can be performed after the mobility sensing period u for the characteristic value of the driving transistor DRT is completed and during a predetermined period before the start of display driving. In other words, the recovery period can be considered as the period after the characteristic value sensing operation of the driving transistor DRT, during which a recovery voltage REC is applied to reset the voltage applied for display driving. With the display reference switch RPRE turned on, the recovery voltage REC can be applied through the reference voltage line RVL.

[0143] Furthermore, the display device 100 of this disclosure can operate in a default mode where the display device 100 operates at a fixed frequency, and in a variable refresh rate (VRR) mode where the display device 100 operates at multiple variable frequencies depending on the type of image data DATA input from an external host system.

[0144] Figure 8 This is an example diagram illustrating the concept of switching between a default mode and a VRR mode in a display device according to the type of image data, according to an embodiment of the present disclosure.

[0145] Reference Figure 8 The display device 100 according to an embodiment of the present disclosure has a default mode and a VRR mode. In the default mode, general image data such as television (TV) images are displayed at a fixed frequency. In the VRR mode, special image data such as game images or movies can be displayed at multiple variable frequencies depending on the selected function.

[0146] However, image data displayed in default mode and image data displayed in VRR mode can be changed in various ways, and the image data described in this article corresponds to some examples. Furthermore, operating modes categorized according to whether the frequency of displaying image data changes can be expressed using various terms other than default mode and VRR mode.

[0147] For example, a TV image can be displayed in a default mode driven by a fixed drive frequency of 120Hz, and special images such as game images or movies can be displayed at a first frequency (e.g., frequency A), and depending on the manipulation, they can be displayed at a variable frequency such as a second frequency (e.g., frequency B) or a third frequency (e.g., frequency C).

[0148] In summary, depending on whether the driving frequency used to display image data DATA on the display panel 110 is fixed or variable, the default mode and the variable refresh rate mode can be regarded as the first operating mode and the second operating mode, respectively.

[0149] When the external host system transmits a TV image to the display device 100, the display device 100 can operate in default mode, in which image data DATA is provided at a fixed default frequency. When providing special images such as game images or movies while providing image data DATA at a fixed default frequency in default mode, the host system can enter VRR mode and provide image data DATA while changing the drive frequency between a first frequency (frequency A), a second frequency (frequency B), and a third frequency (frequency C) according to the selected function.

[0150] Conversely, when a TV image is provided again while operating in VRR mode, the display device 100 can switch to the default mode and provide image data DATA at a fixed default frequency.

[0151] As described above, the operation modes of the display device 100 of this disclosure can be divided into a default mode and a VRR mode. In the default mode, the display device 100 operates at a fixed default frequency. In the VRR mode, the display device 100 operates at multiple variable frequencies depending on the type of image data DATA provided from the host system.

[0152] Furthermore, during the process of changing the default mode to VRR mode or changing VRR mode back to the default mode, the display device 100 of this disclosure can provide image data of a specific brightness to the display panel 110 for a certain period of time to distinguish the mode before the change from the mode after the change.

[0153] For example, when the default mode is changed to VRR mode, image data of brightness A can be applied to display panel 110 for a certain period of time. Alternatively, when VRR mode is changed to the default mode, image data of brightness B can be applied to display panel 110 for a certain period of time.

[0154] Therefore, it can be determined whether to switch between the default mode and the VRR mode by detecting the brightness of the data voltage Vdata supplied to the display panel 110 from the data drive circuit 130 or by detecting the brightness via a brightness detection camera.

[0155] Additionally, when the drive frequency changes from the first frequency to the second frequency in VRR mode, the range of the changed frequency can be determined by counting the number of horizontal synchronization signals during a frame period.

[0156] Figure 9 This is a diagram illustrating an example of a signal waveform in a VRR mode where the vertical blanking period changes according to the driving frequency in a display device according to an embodiment of the present disclosure.

[0157] Here, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the data enable signal DE provided from the host system to the display device 100 are shown.

[0158] Here, a frame can represent the time interval for outputting an image once for the entire portion of the display panel 110, and specifically, a frame includes a display driving period DP for outputting the image and a vertical blanking period Vblank for not outputting the image. Additionally, a horizontal blanking period can be included in the display driving period DP, and the horizontal blanking period can be determined by the horizontal synchronization signal Hsync.

[0159] No image output during the vertical blanking period Vblank can mean that the data enable signal DE remains low, preventing the data voltage Vdata used to implement the image during the vertical blanking period Vblank from being sent to the data line DL. In other words, a frame can be a time concept.

[0160] The first frame, the second frame, and the third frame indicate the order of a frame period. That is, the second frame begins after the first frame, and the third frame begins after the second frame. Each frame from the first frame to the third frame lasts for one frame period.

[0161] Here, the time periods from the first frame to the third frame can be different from each other. Specifically, within the first frame to the third frame, the display drive time periods DP1, DP2, and DP3 can be the same, while the vertical blanking time periods Vblank1, Vblank2, and Vblank3 can be set differently.

[0162] Reference Figure 9 In the display device 100 according to an embodiment of the present disclosure, the first display driving period DP1 of the first frame, the second display driving period DP2 of the second frame, and the third display driving period DP3 of the third frame are the same.

[0163] On the other hand, the first vertical blanking period Vblank1 of the first frame, the second vertical blanking period Vblank2 of the second frame, and the third vertical blanking period Vblank3 of the third frame can be set differently.

[0164] A frame time period can be defined as the time between the fall time of the vertical synchronization signal Vsync and the fall time of the next vertical synchronization signal Vsync, and a frame time period can be set differently for each frame.

[0165] The display driving period DP can include multiple horizontal periods, and a horizontal period can include a high-level portion of the data enable signal DE for applying image data DATA and a horizontal blanking period (a low-level portion of the data enable signal DE) for not applying image data DATA. In addition, the display driving period DP can include multiple horizontal periods corresponding to the number of gating lines GL constituting the display panel 110, and a frame is composed of the display driving period DP and the vertical blanking period Vblank.

[0166] For example, when the default frequency is set to 120Hz in the default mode, the image data DATA of one frame can be provided 120 times in one second, and one frame can have a time interval of 8.3ms.

[0167] In this case, when the display panel 110 has a resolution of 2,160×3,840, 2,160 gate lines GL can be set in the vertical direction, so that a data enable signal DE including 2,160 pulses can be applied during the display driving period DP, corresponding to the time during which the 2,160 gate lines GL are turned on in a frame.

[0168] Furthermore, although the data enable signal DE is applied in pulse form during the display drive period DP, the data enable signal DE remains low during the vertical blanking period Vblank.

[0169] On the other hand, the horizontal sync signal Hsync can be applied in pulse form not only during the display drive period (DP) but also during the vertical blanking period (Vblank). When the time interval of the vertical blanking period (Vblank) changes according to the drive frequency in VRR mode, the number of pulses of the horizontal sync signal Hsync included in a frame also changes. Therefore, the drive frequency can be determined by detecting the number of pulses of the horizontal sync signal Hsync included in a frame. For example, the drive frequency can be determined by detecting the number of pulses of the horizontal sync signal Hsync included between the fall time of the vertical sync signal Vsync and the next fall time.

[0170] In this way, because the length of the vertical blanking period Vblank varies with changes in operating mode or drive frequency, the charging time caused by the recovery voltage REC applied after the characteristic value sensing period is different for each drive frequency. Therefore, image errors due to brightness deviations occur when the operating mode or drive frequency changes.

[0171] Figure 10 This is a diagram illustrating an example of a recovery voltage applied to the display panel according to a change in driving frequency in a display device according to an embodiment of the present disclosure.

[0172] Reference Figure 10 According to an embodiment of the present disclosure, the display device 100 can select a sub-pixel SP during the vertical blanking period Vblank, sense and compensate for the mobility in the characteristic value of the driving transistor DRT, and apply a recovery voltage REC.

[0173] Here, the recovery period RECOVERY during which the recovery voltage REC is applied can occur after the mobility sensing period u SENSING of the driving transistor DRT is completed and before the start of display driving. That is, after the mobility sensing and compensation operation of the driving transistor DRT, the recovery voltage REC can be applied to reset the voltage applied for display driving.

[0174] In this case, when the driving frequency of the display device 100 changes, the charging time caused by the recovery voltage REC applied after the mobility sensing period u SENSING also changes due to the change in the vertical blanking period Vblank.

[0175] For example, when the display device 100 operates at a drive frequency of 120Hz in the Nth frame and at a drive frequency of 40Hz in the (N+1)th frame, the changed 40Hz drive frequency can be confirmed by counting the number of pulses of the horizontal synchronization signal Hsync applied between the vertical blanking periods Vblank.

[0176] In this case, when the driving frequency changes to 40Hz, the level of the recovery voltage REC applied to the display panel 110 has a value determined based on the previous driving frequency of 120Hz. Therefore, the recovery voltage REC1 corresponding to the previous driving frequency of 120Hz is applied to the (N+1)th frame when the driving frequency changes to 40Hz, and thus the charging time changes and image errors may occur due to brightness deviation.

[0177] Similarly, when the display device 100 operates at a drive frequency of 40 Hz in the (N+1)th frame and then at a drive frequency of 120 Hz in the (N+2)th frame, the level of the recovery voltage REC2 applied to the display panel 110 in the (N+2)th frame has a value determined based on the previous drive frequency of 40 Hz, and image errors due to brightness deviations may occur in the (N+2)th frame.

[0178] The display device 100 disclosed herein can reduce characteristic value compensation error and improve image quality by changing the compensation mode for the characteristic value of the driving transistor DRT according to the change of driving frequency.

[0179] Figure 11 This is a flowchart illustrating a display driving method according to an embodiment of the present disclosure.

[0180] Reference Figure 11 The display driving method according to embodiments of the present disclosure may include: operating in a first compensation mode (S100); calculating the driving frequency change Dfreq between the current frame driving frequency Freq(N) and the previous frame driving frequency Freq(N-1) (S200); comparing the driving frequency change Dfreq with a reference value TH1 (S300); when the driving frequency change Dfreq is greater than the reference value TH1, operating in a second compensation mode (S400); counting the number of frames Count according to the frame change (S500); calculating the driving frequency change between the current frame driving frequency Freq(N) and the previous frame driving frequency Freq(N-1) in the changed frame. The driving frequency change Dfreq is calculated (S600); the driving frequency change Dfreq is compared with the reference value TH1 (S700); when the comparison shows that the driving frequency change Dfreq is greater than the reference value TH1, the frame count is initialized (S800); when the driving frequency change Dfreq is less than or equal to the reference value TH1, the counted frame count is compared with the reference frame TH2 (S900); and when the comparison shows that the counted frame count is greater than the reference frame TH2, the operation is performed in the first compensation mode, and when the counted frame count is less than the reference frame TH2, the operation is performed in the second compensation mode.

[0181] Here, the first compensation mode is an operating mode in which the characteristic value (threshold voltage or mobility) of the driving transistor DRT is sensed by an RT sensing process over the entire area of ​​the display panel 110, and a compensated data voltage Vdata_comp is applied based on the sensed voltage Vsen.

[0182] On the other hand, the second compensation mode is an operation mode that is executed when the driving frequency changes, and wherein a compensated data voltage Vdata_comp is applied based on the temperature value detected for at least a portion of the display panel 110.

[0183] In the second compensation mode, the temperature value can be detected for the entire area of ​​the display panel 110, and a compensated data voltage Vdata_comp can be applied based on the detected temperature value.

[0184] Alternatively, in the second compensation mode, the compensated data voltage Vdata_comp can be applied to the first area of ​​the display panel 110 based on the sensing voltage Vsen measured by the RT sensing process, and the compensated data voltage Vdata_comp can be applied to a second area other than the first area based on the temperature value.

[0185] In this case, the temperature value of the display panel 110 can be measured by the temperature sensor 150 provided on the display panel 110, or the temperature value of the display panel 110 can be predicted by analyzing the type of image data DATA applied from the host system.

[0186] Figure 12 This is a conceptual diagram illustrating the operation state of a display device in a first compensation mode according to an embodiment of the present disclosure, and Figure 13 This is a conceptual diagram illustrating the operation state of a display device in a second compensation mode according to an embodiment of the present disclosure.

[0187] First refer to Figure 12 According to embodiments of the present disclosure, the display device 100 can sequentially sense the characteristic values ​​(threshold voltage or mobility) of the driving transistor DRT over the entire area of ​​the display panel 110 during the blanking period between frames, and compensate the data voltage Vdata applied to the corresponding sub-pixel SP based on the sensed voltage Vsen. In this case, the entire area of ​​the display panel 110 can become the RT compensation region 112 for performing the RT sensing process.

[0188] The first compensation mode can correspond to the RT sensing process of sensing and compensating the characteristic values ​​of the driving transistor DRT.

[0189] In this scenario, under the first compensation mode, the gate line GL can be driven sequentially, and the characteristic value (threshold voltage or mobility) of the driving transistor DRT set in a specific sub-pixel SP can be sensed, with the sensed voltage Vsen stored in the memory MEM. In this case, the sub-pixel SP whose characteristic value of the driving transistor DRT is sensed can be selected according to the color order. For example, the gate line GL can be driven sequentially within a frame, and the characteristic value of the driving transistor DRT can be sensed in the order of white sub-pixel W, red sub-pixel R, green sub-pixel G, and blue sub-pixel B.

[0190] The timing controller 140 can generate compensated image data Data_comp by reflecting the compensation gain in the sensed voltage Vsen stored in the memory MEM based on the gate line GL, and store the compensated image data Data_comp in the memory MEM.

[0191] Therefore, the sensed voltage Vsen detected over the entire area of ​​the display panel 110 during a frame period and the compensated image data Data_comp generated by the timing controller 140 for the entire area can be stored in the memory MEM.

[0192] When the compensated image data Data_comp for one frame is stored in the memory MEM, the timing controller 140 transmits the compensated image data Data_comp to the data driving circuit 130. The data driving circuit 130 converts the compensated image data Data_comp for one frame into a compensated data voltage Vdata_comp and applies the compensated data voltage Vdata_comp to the display panel 110.

[0193] In this case, the compensated data voltage Vdata_comp applied from the data driving circuit 130 to the display panel 110 can be provided based on sub-pixels SP with the same color. For example, the compensated data voltage Vdata_comp can be provided based on white sub-pixels W, red sub-pixels R, green sub-pixels G, and blue sub-pixels B.

[0194] The display device 100 of this disclosure can reduce image errors that occur during the change of driving frequency through a second compensation mode. In the second compensation mode, when the change of driving frequency Dfreq is greater than the reference value TH1, the compensated data voltage Vdata_comp is applied to at least a portion of the display panel 110 according to the temperature value.

[0195] The reference value TH1 can be set within a predetermined ratio range based on the entire variable drive frequency in the display device 100.

[0196] For example, when the driving frequency of the display device 100 can be changed between a frequency of 1 Hz and a frequency of 120 Hz, the reference value TH1 of the driving frequency change Dfreq can be set to a value of 20% of the entire frequency range (120 Hz) (120 Hz * 0.2 = 24 Hz) or greater than 20% of the entire frequency range (120 Hz).

[0197] In this case, when the drive frequency change Dfreq exceeds the reference value TH1 of 24Hz, a sudden change in the drive frequency is determined to have occurred, thereby allowing the first compensation mode to be changed to the second compensation mode.

[0198] Reference Figure 13 According to an embodiment of the present disclosure, the display device 100 in a second compensation mode can apply a compensated data voltage Vdata_comp to at least a portion of the display panel 110 based on a temperature value.

[0199] In this case, under the second compensation mode, the compensated data voltage Vdata_comp can be applied to the entire area of ​​the display panel 110 according to the temperature value, or the compensated data voltage Vdata_comp can be applied to a portion of the display panel 110 according to the temperature value.

[0200] When the compensated data voltage Vdata_comp is applied to a portion of the display panel 110 based on the temperature value, the compensated data voltage Vdata_comp can be applied to the first region of the display panel 110 based on the sensing voltage Vsen measured by the RT sensing process, and the compensated data voltage Vdata_comp can be applied to a second region other than the first region based on the temperature value.

[0201] In this configuration, the first region can be configured to exhibit low brightness deviation even when the drive frequency changes in the second compensation mode. Therefore, when the drive frequency change Dfreq exceeds the reference value TH1, compensation can be performed only on the first region based on the characteristic values ​​(threshold voltage or mobility) of the drive transistor DRT via an RT sensing process, and compensation can be performed on the second region based on the temperature value.

[0202] Therefore, in the second compensation mode, the first region can become the RT compensation region 112, and the second region other than the first region can become the temperature compensation region 114.

[0203] In the first region where the RT sensing process is performed in the second compensation mode, the gate line GL can be driven sequentially, and the characteristic value of the driving transistor DRT can be sensed in the order of white sub-pixel W, red sub-pixel R, green sub-pixel G, and blue sub-pixel B. When a frame of compensated image data Data_comp is generated, the compensated image data Data_comp can be provided based on sub-pixels SP with the same color.

[0204] On the other hand, without performing the RT sensing process, the compensation gain can be applied to a second region other than the first region based on the temperature value determined based on the temperature sensor 150 or the image data DATA.

[0205] Therefore, the selected compensation gain can be applied to the second region in addition to the first region, and the compensated data voltage Vdata_comp generated by the compensation gain can be provided to the second region.

[0206] In this configuration, even when the driving frequency changes, the first region with low brightness deviation can serve as both the upper and lower regions of the display panel 110. For example, when the display panel 110 has a resolution of 2,160 × 3,840, 2,160 gate lines GL can be arranged vertically, and compensation can therefore be performed for the first region via an RT sensing process. In the first region, 100 gate lines GL are arranged in the upper region and 100 gate lines GL are arranged in the lower region, and compensation can be performed for the second region via temperature values.

[0207] Specifically, according to the display device 100 of this disclosure, in the second compensation mode, a first region including an upper region and a lower region can become an RT compensation region 112 for performing the RT sensing process, and a second region can become a temperature compensation region 114. In the upper region, less than 5% of all gate lines GL are included, and in the lower region, less than 5% of all gate lines GL are included.

[0208] In this case, the first area can be changed according to the range of the driving frequency, and when the range of the driving frequency is large, the entire area of ​​the display panel 110 can become the temperature compensation area 114 in the second compensation mode.

[0209] In this case, the temperature of the display panel 110 can be measured by the temperature sensor 150 set on the display panel 110, or the heating temperature of the display panel 110 can be predicted based on the type of image data DATA applied from the host system.

[0210] For example, as the grayscale level displayed by the sub-pixels SP of the display panel 110 increases, the heat generation temperature may increase. Therefore, the heat generation temperature of the display panel 110 can be predicted by generating a histogram of each grayscale level from the image data DATA of each frame displayed via the display panel 110 and analyzing the frequency of the image data DATA for each grayscale level.

[0211] Alternatively, the heat-generating temperature of the display panel 110 can be determined based on the on-off ratio of the sub-pixels SP. Therefore, the heat-generating temperature of the display panel 110 can be predicted by calculating the on-pixel ratio of the display panel 110 based on the image data DATA transmitted from the host system.

[0212] The display driver method disclosed herein will now be described in detail.

[0213] Operating in the first compensation mode (S100) is a process of sequentially sensing and compensating the characteristic values ​​(threshold voltage or mobility) of the driving transistor DRT of the entire area of ​​the display panel 110 during the blanking period after power is applied to the display device 100.

[0214] The calculation of the driving frequency change Dfreq (S200) between the current frame driving frequency Freq(N) and the previous frame driving frequency Freq(N-1) is a process of comparing the driving frequency of the display device 100 and detecting the driving frequency change Dfreq based on each frame.

[0215] For example, the drive frequency of a previous frame can be detected by counting the number of pulses of the horizontal synchronization signal Hsync applied to the display panel 110 in the previous frame, and the drive frequency of the current frame can be detected by counting the number of pulses of the horizontal synchronization signal Hsync applied to the display panel 110 in the current frame. Therefore, the drive frequency change Dfreq can be detected by the difference between the number of pulses of the horizontal synchronization signal Hsync applied during the current frame and the number of pulses of the horizontal synchronization signal Hsync applied during the previous frame.

[0216] Comparing the drive frequency change Dfreq with the reference value TH1 (S300) is the process of determining whether the drive frequency change Dfreq between the previous frame and the current frame exceeds the reference value TH1.

[0217] When the drive frequency change Dfreq is greater than the reference value TH1, the operation in the second compensation mode (S400) is as follows: when the drive frequency change Dfreq between the previous frame and the current frame changes to a level exceeding the reference value TH1, the compensated data voltage Vdata_comp is applied to at least a portion of the display panel 110 according to the temperature value.

[0218] In the second compensation mode, the compensated data voltage Vdata_comp can be applied to the entire area of ​​the display panel 110 according to the temperature value, or the compensated data voltage Vdata_comp can be applied to a portion of the display panel 110 according to the temperature value.

[0219] In this case, when the compensated data voltage Vdata_comp is applied to a portion of the display panel 110 based on the temperature value, the compensated data voltage Vdata_comp can be applied to the first region of the display panel 110 based on the sensing voltage Vsen measured by the RT sensing process, and the compensated data voltage Vdata_comp can be applied to a second region other than the first region based on the temperature value.

[0220] In the second compensation mode, the first area for which compensation is performed through the RT sensing process is an area where the brightness deviation caused by the change in driving frequency can be relatively low and can correspond to some areas in the upper and lower areas of the display panel 110.

[0221] The first compensation mode can be maintained when the drive frequency change Dfreq between the previous frame and the current frame changes to a level of reference value TH1 or smaller.

[0222] The process of counting the number of frames based on frame changes (S500) is a process of counting frame changes after entering the second compensation mode in order to determine the time to maintain the second compensation mode.

[0223] In other words, since the image error that occurs when the drive frequency change Dfreq between the previous frame and the current frame exceeds the reference value TH1 only occurs for a certain period of time from the time of the frequency change, the display panel 110 can operate in the second compensation mode for a predetermined reference time and then return to the first compensation mode after the predetermined reference time has elapsed.

[0224] However, when the drive frequency change Dfreq again exhibits a reference value TH1 or greater during a period of time within the reference time, the drive frequency change Dfreq needs to be checked even while counting frame changes because the second compensation mode needs to be maintained continuously.

[0225] The calculation of the drive frequency change Dfreq (S600) between the current frame drive frequency Freq(N) and the previous frame drive frequency Freq(N-1) in the changed frame is the process of calculating the drive frequency change Dfreq based on the frame in the second compensation mode.

[0226] Comparing the drive frequency change Dfreq with the reference value TH1 (S700) is the process of determining whether the drive frequency change Dfreq exceeds the reference value TH1 based on the frame in the second compensation mode.

[0227] When the comparison reveals that the change in drive frequency Dfreq is greater than the reference value TH1, the frame count is initialized (S800). This is the process of initializing the frame count to zero and setting the state to the state of the second compensation mode when the change in drive frequency Dfreq exceeds the reference value TH1 again in the second compensation mode.

[0228] When the comparison shows that the drive frequency change Dfreq is less than or equal to the reference value TH1, the frame count can be left uninitialized, and the frame count can be continuously counted after entering the second compensation mode.

[0229] When the drive frequency change Dfreq is less than or equal to the reference value TH1, comparing the counted number of frames Count with the reference frame TH2 (S900) is a process of determining the reference time for maintaining the second compensation mode based on the number of frames since entering the second compensation mode. Here, a predetermined reference frame TH2 is used so that the reference time for maintaining the second compensation mode is determined based on the frames.

[0230] In this case, the reference time for maintaining the second compensation mode can be set differently depending on the driving frequency or the type of image data DATA input to the display device 100.

[0231] For example, when the driving frequency of the display device 100 is high or when the image data DATA changes at a high speed (e.g., when the input image data DATA is a moving image), the brightness deviation may increase depending on the driving frequency, and therefore the reference time used to maintain the second compensation mode can be set higher.

[0232] When the reference frame TH2 for maintaining the second compensation mode is set to 7 frames (TH2=7) at a driving frequency of 60Hz, when the driving frequency is 120Hz, the reference frame TH2 for maintaining the second compensation mode can be set to 10 frames (TH2=10).

[0233] When the count of the number of frames Count is found to be greater than the reference frame TH2 by comparison, the operation is carried out in the first compensation mode. When the count of the number of frames Count is less than or equal to the reference frame TH2, the operation in the second compensation mode is as follows: when the reference frame TH2 is passed after entering the second compensation mode, the operation returns to the first compensation mode, and when the reference frame TH2 is not passed, the operation remains in the second compensation mode.

[0234] Figure 14 This is a diagram illustrating an example of a display device according to an embodiment of the present disclosure operating in a first compensation mode and a second compensation mode according to a change in the driving frequency.

[0235] Reference Figure 14 The display device 100 according to the embodiments of the present disclosure can operate in a first compensation mode, in which compensation is performed on the entire area of ​​the display panel 110 by an RT sensing process after power is applied.

[0236] In the first compensation mode, an RT sensing process can be performed that sequentially senses the characteristic values ​​(threshold voltage or mobility) of the driving transistor DRT during the blanking period and thereby compensates for the data voltage Vdata.

[0237] In this case, the driving frequency of the display device 100 can be changed within the range of 1Hz to 120Hz, and the driving frequency can be changed according to the type of image data DATA applied from the host system. In this case, the reference value TH1 used to determine the driving frequency change Dfreq can be set to 24Hz, which corresponds to 20% of the entire range of driving frequency change (120Hz).

[0238] When the driving frequency change Dfreq exceeds the reference value TH1 at the first point P1, the display device 100 can switch from the first compensation mode to the second compensation mode.

[0239] In the second compensation mode, the compensated data voltage Vdata_comp can be applied to the entire area of ​​the display panel 110 according to the temperature value, or the compensated data voltage Vdata_comp can be applied to a portion of the display panel 110 according to the temperature value.

[0240] In this case, when the compensated data voltage Vdata_comp is applied to a portion of the display panel 110 based on the temperature value, the compensated data voltage Vdata_comp can be applied to the first region of the display panel 110 based on the sensing voltage Vsen measured by the RT sensing process, and the compensated data voltage Vdata_comp can be applied to a second region other than the first region based on the temperature value.

[0241] In this case, the display device 100 can compensate only the first region from the first point P1 through the RT sensing process, and apply the compensated data voltage Vdata_comp to the second region other than the first region based on the temperature value.

[0242] In addition, the display device 100 can count frame changes from the first point P1 and determine the time to maintain the second compensation mode based on the frame.

[0243] When the reference frame TH2 corresponding to the reference time used to maintain the second compensation mode is set to seven frames (TH2=7), the display device 100 can count the number of frames from the first point P1 and maintain the second compensation mode for more than seven frames.

[0244] When the drive frequency change Dfreq exceeds the reference value TH1 again at the second point P2 within seven frames from the first point P1, the display device 100 can initialize the number of frames counted since entering the second compensation mode to zero, and maintain the second compensation mode for more than seven frames (corresponding to the reference frame TH2).

[0245] When the drive frequency change Dfreq remains less than or equal to the reference value TH1 for eight frames from the second point P2, the display device 100 returns to the first compensation mode at the third point P3 after eight frames from the second point P2.

[0246] Therefore, starting from the third point P3, the display device 100 performs a sequential RT sensing process for sensing and compensating the characteristic values ​​of the driving transistor DRT over the entire area of ​​the display panel 110.

[0247] Next, when the drive frequency change Dfreq exceeds the reference value TH1 at the fourth point P4, the display device 100 re-enters the second compensation mode and maintains the second compensation mode for more than seven frames corresponding to the reference frame TH2 (that is, during eight frames).

[0248] Therefore, the display device 100 can apply the compensated data voltage Vdata_comp to the entire area of ​​the display panel 110 from the fourth point P4 according to the temperature value, or apply the compensated data voltage Vdata_comp to a portion of the display panel 110 according to the temperature value.

[0249] When the compensated data voltage Vdata_comp is applied to a portion of the display panel 110 based on the temperature value, compensation can be performed only on the upper and lower regions of the display panel 110 corresponding to the first region through the RT sensing process, and compensation can be performed on the second region based on the temperature value determined based on the temperature sensor 150 or the type of image data DATA.

[0250] When the drive frequency change Dfreq is maintained based on the reference value TH1 for eight frames from the fourth point P4, the display device 100 operates again from the fifth point P5 (eight frames from the fourth point P4) in the first compensation mode.

[0251] Through the above process, the display device 100 of this disclosure performs compensation only on a first region with relatively small brightness deviation through the RT sensing process within a specific time period from when the driving frequency change Dfreq exceeds the reference value TH1, and performs compensation on a second region based on the temperature value determined from the temperature sensor 150 or the image data DATA, so that image defects caused by the change in driving frequency as perceived by the user can be minimized or reduced.

[0252] The embodiments described above in this disclosure will now be briefly described.

[0253] The display device 100 disclosed herein includes a display panel 110, a data driving circuit 130, and a timing controller 140. The display panel 110 has a plurality of sub-pixels SP, each sub-pixel SP including multiple gate lines GL, multiple data lines DL, and a driving transistor DRT. The data driving circuit 130 is configured to convert image data DATA into a data voltage Vdata and apply the data voltage Vdata to the multiple data lines DL. The timing controller 140 is configured to control the data driving circuit 130 and switch from a first compensation mode to a second compensation mode for the characteristic value of the driving transistor DRT when the driving frequency change Dfreq exceeds a reference value TH1. In the first compensation mode, the characteristic value of the driving transistor DRT can be compensated for the entire area of ​​the display panel 110 through an RT sensing process during the blanking period. In the second compensation mode, the characteristic value of the driving transistor DRT can be compensated for at least a portion of the display panel 110 based on a temperature value.

[0254] The frequency variation Dfreq can be determined based on the difference between the number of pulses of the horizontal synchronization signal Hsync in the current frame and the number of pulses of the horizontal synchronization signal Hsync in the previous frame.

[0255] The reference value TH1 can be set to a value greater than or equal to 20% of the entire range of variable drive frequencies.

[0256] In the second compensation mode, the characteristic value of the driving transistor DRT can be compensated for the entire area of ​​the display panel 110 according to the temperature value.

[0257] In the second compensation mode, the characteristic value of the driving transistor DRT can be compensated for the first region of the display panel 110 through the RT sensing process during the blanking period, and the characteristic value of the driving transistor DRT can be compensated for the second region other than the first region according to the temperature value.

[0258] The first region may be the region where the brightness deviation caused by the change in the driving frequency in the display panel 110 is less than a predetermined value.

[0259] The first region may include an upper region and a lower region. The upper region is provided with less than 5% of the multiple selection lines GL provided in the display panel 110, and the lower region is provided with less than 5% of the selection lines GL.

[0260] The characteristic value of the driving transistor DRT can be mobility, and the RT sensing process can be the process of sensing the mobility of the driving transistor DRT.

[0261] The timing controller 140 can return to the first compensation mode when reference frame TH2 has elapsed since the time it switched to the second compensation mode.

[0262] The reference frame TH2 can be set based on the frame and can be determined according to the rate of change of the image data DATA.

[0263] When the drive frequency change exceeds the reference value TH1 within the reference frame TH2, the timing controller 140 can initialize the time when the operation mode is switched to the second compensation mode.

[0264] During the blanking period, after the RT sensing process, the timing controller 140 can apply a recovery voltage REC to reset the sub-pixel SP.

[0265] The display device 100 may also include a temperature sensor 150, which is configured to detect the temperature of the display panel 110, and the temperature value may be a value measured by the temperature sensor 150.

[0266] The temperature value can be determined using a histogram for each gray level of the image data DATA.

[0267] The temperature value can be determined using the ratio of active pixels based on image data DATA of the display panel 110.

[0268] According to the display driving method for a display device disclosed herein, the display device includes a display panel 110 and a data driving circuit 130. The display panel 110 has a plurality of sub-pixels SP, each sub-pixel SP including a plurality of gate lines GL, a plurality of data lines DL, and a driving transistor DRT. The data driving circuit 130 is configured to convert image data DATA into a data voltage Vdata and apply the data voltage Vdata to the plurality of data lines DL. The method includes the following steps: operating in a first compensation mode, in which characteristic values ​​of the driving transistor DRT are compensated for the entire area of ​​the display panel 110 during a blanking period via an RT sensing process; calculating a driving frequency change Dfreq between the driving frequency of the current frame and the driving frequency of the previous frame; comparing the driving frequency change Dfreq with a reference value TH1; and operating in a second compensation mode when the driving frequency change Dfreq is greater than the reference value TH1, wherein in the second compensation mode, characteristic values ​​of the driving transistor DRT can be compensated for at least a portion of the display panel 110 based on a temperature value.

[0269] The operation in the second compensation mode may include the following steps: counting the number of frames Count according to the frame change; comparing the counted number of frames Count with the reference frame TH2; and operating in the first compensation mode when the counted number of frames Count is greater than the reference frame TH2.

[0270] The display driving method may also include the following steps: when the driving frequency change Dfreq in reference frame TH2 is greater than the reference value TH1, the number of counted frames is initialized.

[0271] In the second compensation mode, the characteristic value of the driving transistor DRT can be compensated for the first region of the display panel 110 through the RT sensing process during the blanking period, and the characteristic value of the driving transistor DRT can be compensated for the second region other than the first region according to the temperature value.

[0272] The above description has been presented to enable any person skilled in the art to make and use the technical concepts of this disclosure, and has been provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this disclosure. The above description and drawings are provided as examples of the technical concepts of this disclosure for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical concepts of this disclosure.

[0273] Cross-reference to related applications

[0274] This application claims priority to Korean Patent Application No. 10-2022-0067065, filed on May 31, 2022, which is incorporated herein by reference for all purposes as if fully set forth herein.

Claims

1. A display device, the display device comprising: The display panel includes multiple sub-pixels, and multiple gate lines, multiple data lines and driving transistors are provided in the multiple sub-pixels; A data driving circuit configured to convert image data into a data voltage and apply the data voltage to the plurality of data lines; as well as A timing controller configured to control the data drive circuit and switch from a first compensation mode to a second compensation mode for the mobility of the drive transistor when the drive frequency changes beyond a reference value. In the first compensation mode, during the blanking period, the mobility of the driving transistors is compensated for the entire area of ​​the display panel through a real-time sensing process. In the second compensation mode, the mobility of the driving transistors is compensated for at least a portion of the display panel based on the temperature value.

2. The display device according to claim 1, wherein, The change in drive frequency is determined based on the difference between the number of pulses of the horizontal synchronization signal in the current frame and the number of pulses of the horizontal synchronization signal in the previous frame.

3. The display device according to claim 1, wherein, The reference value is determined to be greater than or equal to 20% of the entire range in which the drive frequency can vary.

4. The display device according to claim 1, wherein, In the second compensation mode, the mobility of the driving transistor is compensated for the entire area of ​​the display panel based on the temperature value.

5. The display device according to claim 1, wherein, In the second compensation mode, during the blanking period, the mobility of the driving transistor is compensated for a first region of the display panel through the real-time sensing process, and the mobility of the driving transistor is compensated for a second region other than the first region based on the temperature value.

6. The display device according to claim 5, wherein, The first region includes an area where the brightness deviation caused by the change in the driving frequency in the display panel is less than a predetermined value.

7. The display device according to claim 6, wherein, The first region includes an upper region and a lower region. Less than 5% of the multiple selection lines provided in the display panel are provided in the upper region, and less than 5% of the selection lines are provided in the lower region.

8. The display device according to claim 1, wherein, The timing controller returns to the first compensation mode after a reference time has elapsed since the time it switched to the second compensation mode.

9. The display device according to claim 8, wherein, The reference time is set based on frames and is determined according to the rate of change of the image data.

10. The display device according to claim 8, wherein, When the change in the drive frequency exceeds the reference value within the reference time, the timing controller initializes the time for switching to the second compensation mode.

11. The display device according to claim 1, wherein, During the blanking period, after the real-time sensing process, the timing controller applies a recovery voltage to reset the sub-pixel.

12. The display device of claim 1, further comprising a temperature sensor configured to detect the temperature of the display panel. in, The temperature value is a value measured by the temperature sensor.

13. The display device according to claim 1, wherein, The temperature value is determined using a histogram for each gray level of the image data.

14. The display device according to claim 1, wherein, The temperature value is determined using the ratio of active pixels based on the image data of the display panel.

15. A display driving method for a display device, the display device comprising a display panel and a data driving circuit, the display panel comprising a plurality of sub-pixels, wherein a plurality of gate lines, a plurality of data lines and driving transistors are disposed in the plurality of sub-pixels, the data driving circuit being configured to convert image data into data voltage and apply the data voltage to the plurality of data lines, the method comprising the following steps: The system operates in a first compensation mode, wherein, during the blanking period, the mobility of the driving transistors is compensated for the entire area of ​​the display panel through a real-time sensing process. Calculate the change in drive frequency between the current frame and the previous frame; Compare the change in driving frequency with a reference value; and When the change in the driving frequency exceeds the reference value, operation is performed in the second compensation mode. In the second compensation mode, the mobility of the driving transistors is compensated for at least a portion of the display panel based on the temperature value.

16. The display driving method according to claim 15, wherein, The steps for operating in the second compensation mode include the following: The number of frames is counted based on frame changes; Compare the counted number of frames with the reference frame; and When the number of counted frames is greater than the reference frame, the system operates in the first compensation mode.

17. The display driving method according to claim 16, further comprising the following steps: When the change in the driving frequency within the reference frame is greater than the reference value, the counted number of frames is initialized.

18. The display driving method according to claim 15, wherein, In the second compensation mode, during the blanking period, the mobility of the driving transistor is compensated for a first region of the display panel through the real-time sensing process, and the mobility of the driving transistor is compensated for a second region other than the first region based on the temperature value.

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