Timing control circuit, timing control method, and semiconductor memory

CN117153209BActive Publication Date: 2026-08-28CHANGXIN MEMORY TECH INC
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Patent Information

Application Number
CN202210570667.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-24
Publication Date
2026-08-28
Estimated Expiration
2042-05-24

AI Technical Summary

Technical Problem

但是供电电压和环境温度的波动都会对延时时间造成一定影响,进而影响了信号时序同步的效果

Benefits of technology

[0025]本公开实施例提供了一种时序控制电路、时序控制方法以及半导体存储器,该时序控制电路包括信号传输模块和时序补偿模块,且时序补偿模块与信号传输模块连接;其中,信号传输模块,用于接收初始采样信号,并对初始采样信号进行传输,生成采样信号;时序补偿模块至少包括补偿电容,用于接收可调的供电电压,根据供电电压和补偿电容对初始采样信号进行补偿延时调节,以使采样信号与待采样的数据信号之间的时间差满足预设要求。这样,通过设置时序补偿模块,利用供电电压和补偿电容对初始采样信号的补偿延时调节,可以减小延时时间受内部工作电压或工作温度等参数变化的影响,从而能够提高延时时间的准确性,改善初始采样信号与数据信号之间的时序同步。

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Abstract

The embodiment of the present disclosure provides a timing control circuit, a timing control method and a semiconductor memory. The timing control circuit comprises a signal transmission module and a timing compensation module, and the timing compensation module is connected with the signal transmission module. The signal transmission module is used for receiving an initial sampling signal and transmitting the initial sampling signal to generate a sampling signal. The timing compensation module at least comprises a compensation capacitor, which is used for receiving an adjustable power supply voltage, and compensating and delaying the initial sampling signal according to the power supply voltage and the compensation capacitor, so that the time difference between the sampling signal and the data signal to be sampled meets the preset requirement. In this way, by setting the timing compensation module, the influence of the delay time on the internal working voltage or the working temperature and other parameters can be reduced, thereby improving the accuracy of the delay time and improving the timing synchronization between the initial sampling signal and the data signal.
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Claims

1. A timing control circuit, characterized by comprising: The timing control circuit includes a signal transmission module and a timing compensation module, and the timing compensation module is connected to the signal transmission module; wherein, The signal transmission module is used to receive the initial sampling signal, transmit the initial sampling signal, and generate a sampling signal; The timing compensation module includes at least a compensation capacitor for receiving an adjustable power supply voltage and adjusting the initial sampling signal for compensation delay based on the power supply voltage and the compensation capacitor, so that the time difference between the sampling signal and the data signal to be sampled meets a preset requirement. The timing control circuit further includes a regulated power supply and a control module, wherein the control module is connected to the regulated power supply; wherein, The control module is used to detect parameter changes in the timing control circuit, and control the regulated power supply to generate the power supply voltage corresponding to the parameter changes based on the parameter changes and the preset power supply voltage generation strategy. The timing control circuit further includes a comparison module, which is connected to the control module; wherein... The comparison module is used to compare the rising edge of the sampled signal with the data signal to be sampled, and determine the change in the rising edge time difference between the sampled signal and the data signal to be sampled within the same clock cycle; The control module is further configured to acquire the rising edge difference output by the comparison module, and generate the power supply voltage corresponding to the rising edge difference change based on the change in the rising edge difference and a preset power supply voltage generation strategy.

2. The timing control circuit of claim 1, wherein, The timing control circuit further includes a clock input circuit and a data input circuit. The input terminal of the signal transmission module is connected to the clock input circuit, and the output terminal of the signal transmission module is connected to the data input circuit. The signal transmission module includes at least one internal circuit. When there are multiple internal circuits, the multiple internal circuits are sequentially connected in the transmission direction from the clock input circuit to the data input circuit.

3. The timing control circuit of claim 2, wherein, The number of timing compensation modules is at least one, and different timing compensation modules correspond to different internal circuits. Each timing compensation module is connected to the output terminal of the corresponding internal circuit to perform timing compensation on the output signal of the internal circuit.

4. The timing control circuit of claim 2, wherein, The timing control circuit also includes a power supply module; wherein, one end of the compensation capacitor is connected to the power supply module, and the other end of the compensation capacitor is connected to the output terminal of the corresponding internal circuit. The power supply module is used to provide and adjust the power supply voltage so as to adjust the discharge rate of the compensation capacitor through coupling.

5. The timing control circuit according to claim 4, characterized in that, The timing compensation module further includes a first switching transistor; wherein, the gate of the first switching transistor is connected to the power supply module, the source of the first switching transistor is connected to one end of the compensation capacitor, the other end of the compensation capacitor is connected to a low level, and the drain of the first switching transistor is connected to the output terminal of the corresponding internal circuit. The power supply module is used to provide and adjust the power supply voltage to control the conduction level of the first switching transistor and adjust the discharge rate of the compensation capacitor according to the conduction level of the first switching transistor.

6. The timing control circuit according to claim 4 or 5, characterized in that, The compensation capacitor is used to adjust the delay time of the initial sampled signal; wherein, If the timing control circuit increases the initial delay time of the initial sampling signal, it reduces the discharge rate of the compensation capacitor to reduce the delay time of the compensation capacitor on the initial sampling signal. If the timing control circuit reduces the initial delay time of the initial sampled signal, it increases the discharge speed of the compensation capacitor to increase the delay time of the compensation capacitor for the initial sampled signal.

7. The timing control circuit according to claim 2, characterized in that, The internal circuitry includes a buffer register.

8. The timing control circuit according to claim 1, characterized in that, The parameter changes in the timing control circuit are the temperature changes in the timing control circuit, and the preset power supply voltage generation strategy is that the temperature and the power supply voltage are negatively correlated within a preset temperature range.

9. The timing control circuit according to claim 1, characterized in that, The parameter changes in the timing control circuit are the voltage changes of the internal circuits in the timing control circuit that are not connected to the timing compensation module. The preset power supply voltage generation strategy is that the voltage of the internal circuits not connected to the timing compensation module is positively correlated with the power supply voltage.

10. The timing control circuit according to claim 1, characterized in that, The power supply voltage is provided by an internal operating power source or a charge pump, the charge pump being used to generate the internal operating power source based on an external power source.

11. The timing control circuit according to claim 1, characterized in that, The timing control circuit is used to adjust the timing relationship between the initial sampling signal and the data signal; The initial sampling signal input to the signal transmission module is one of the following: data strobe signal DQS and write clock signal WCK.

12. A timing control method, characterized in that, The method includes: Receive the initial sampling signal and the data signal to be sampled; The initial sampling signal is transmitted through the signal transmission module to generate a sampling signal; The timing compensation module receives an adjustable power supply voltage and adjusts the initial sampling signal by compensating for delay based on the power supply voltage and the compensation capacitor in the timing compensation module, so that the time difference between the sampling signal and the data signal to be sampled meets the preset requirements. The control module detects parameter changes in the timing control circuit and controls the regulated power supply to generate the power supply voltage corresponding to the parameter changes based on the parameter changes and the preset power supply voltage generation strategy. The comparison module controls the regulated power supply to generate the power supply voltage corresponding to the parameter changes based on the parameter changes and the preset power supply voltage generation strategy. The control module obtains the rising edge difference output by the comparison module, and generates the power supply voltage corresponding to the rising edge difference change based on the change in the rising edge difference and the preset power supply voltage generation strategy. The control module is connected to the regulated power supply, the comparison module is connected to the control module, and the signal transmission module, the timing compensation module, the control module, the regulated power supply, and the comparison module all belong to the timing control circuit.

13. A semiconductor memory, characterized in that, Includes the timing control circuit as described in any one of claims 1 to 11.

Citation Information

Patent Citations

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