Encryption method, device and storage medium based on plcm mapping

Abstract

The application belongs to the technical field of encryption, and particularly relates to an encryption method and device based on PLCM mapping and a storage medium. First, initial data of a chaotic system is acquired, and data precision is selected according to a data type. Then, the initial data is taken as initial values and structure parameters of the chaotic system of the PLCM mapping, encryption precision is set according to the data precision, and a key stream is generated by operation based on an improved divider with a precision control module and without bit extension processing. Finally, the key stream and a binary plaintext sequence stream generated by plaintext information to be encrypted are subjected to bit-by-bit XOR operation to generate encrypted data. The application can solve the problem of large resource consumption of a dynamic precision divider in the current PLCM mapping process when not restoring the remainder division.

Description

Technical Field

[0001] This invention belongs to the field of encryption technology, and particularly relates to encryption methods, devices and storage media based on PLCM mapping. Background Technology

[0002] Chaotic systems are nonlinear dynamic systems that exhibit extreme sensitivity to initial conditions. They can be used to generate pseudo-random number sequences and are highly unpredictable, thus making them important applications in cryptography. PLCM mapping, a piecewise mapping widely used in encryption systems, has a uniform distribution function, making the combination of PLCM mapping with chaotic systems a relatively mature application.

[0003] When implementing dynamic precision in PLCM mapping, a dynamic precision divider is required. The dynamic precision divider involves two methods: division with recovery remainder and division without recovery remainder. The hardware resources for division without recovery remainder mainly consist of an adder and a subtractor. Compared to division with recovery remainder, it has higher resource overhead but lower circuit delay. Therefore, in order to reduce hardware resource overhead and achieve lower circuit delay, it is necessary to improve the hardware structure involved in division without recovery remainder. Summary of the Invention

[0004] The technical problem solved by this invention is to provide an encryption method, device and storage medium based on PLCM mapping, so as to solve the problem of high resource overhead of the dynamic precision divider in the current PLCM mapping process when using division without restoring the remainder.

[0005] The basic solution provided by this invention is an encryption method based on PLCM mapping, comprising:

[0006] S1: Obtain the initial data of the chaotic system and select the data precision according to the data type;

[0007] S2: Use the initial data as the initial value and structural parameters of the chaotic system mapped by the PLCM, set the encryption precision according to the data precision, and generate a key stream;

[0008] S3: Perform a bitwise XOR operation on the key stream and the binary plaintext sequence stream generated from the plaintext information to be encrypted to generate encrypted data;

[0009] In the chaotic system mapped by the PLCM in S2, division is performed by an improved divider. The improved divider includes a precision control module, a remainder register, a quotient register, an adder, a subtractor, a multiplexer, and a counting and judgment module. The precision control module is connected to the counting and judgment module and is used to use the data precision as the iteration threshold of the counting and judgment module. The remainder register and the quotient register are connected to the counting and judgment module. One end of the adder and the subtractor are connected to the counting and judgment module, and the other end is connected to one end of the multiplexer. The other end of the multiplexer is connected to the remainder register.

[0010] Furthermore, the processing steps of the improved divider include:

[0011] The precision control module sets the iteration threshold based on the data precision and transmits it to the counting and judgment module;

[0012] Use the dividend as the initial value of the remainder register and set the initial value of the quotient register to 0;

[0013] The data processed by the remainder register is transmitted to the counting and judgment module. If the counting and judgment module determines that the current iteration count has not reached the iteration threshold, the remainder value is output to the adder and subtractor.

[0014] After expanding the remainder value, it is added to and subtracted from the divisor value using adders and subtractors respectively. Based on the result of selecting the highest bit of the data in the remainder register, the corresponding adder or subtractor is selected through a multiplexer, and the resulting value is assigned to the remainder register.

[0015] Shift the data in the quotient register to the left and invert the most significant bit of the data in the remainder register;

[0016] The data in the remainder register is processed by the counting and judgment module and then subjected to a loop of addition and subtraction until the number of loops in the counting and judgment module reaches the set iteration threshold, at which point the iteration result in the quotient register is output.

[0017] Furthermore, S2 includes:

[0018] S2-1: Determine the initial values ​​and structural parameters of the PLCM mapping based on the initial data, and set the encryption precision according to the data precision;

[0019] S2-2: Preset the initial threshold and parameter threshold according to the encryption precision, and preset the iteration threshold of PLCM mapping as k, the number of PLCM mapping iterations as i, and the perturbation values ​​in the iteration as x and y;

[0020] S2-3: Determine whether the iteration has reached the iteration threshold k by using i. When i ≠ k, if x is greater than the initial threshold, add the original initial value to the current iteration result as the initial value. If y is greater than the parameter threshold, use the value of the last iteration result as the structure parameter. When i = k, it means that the iteration is complete and the key stream is generated.

[0021] Furthermore, the calculation formula for performing a bit-by-bit XOR operation on the key stream and the binary plaintext sequence stream generated from the plaintext information to be encrypted in step S3 is as follows:

[0022] Z n =S n ⊕Y n

[0023] Among them, S n Y represents the key stream. n Represents a stream of binary plaintext sequences.

[0024] The PLCM-based encryption system, applied to the aforementioned PLCM-based encryption method, includes an SPI module, a parameter extraction module, a data control module, a PLCM chaotic mapping module, and an XOR module. The SPI module connects to an external interface via a serial port to acquire raw data. The parameter extraction module receives the raw data, extracts input parameters, data precision, plaintext information, and input valid bits, and transmits them to the data control module. The data control module selects the received precision to generate an encryption precision control command, generates a binary plaintext sequence from the plaintext information, generates initial values ​​and structure parameters from the input parameters, and transmits the control command, initial values, and structure parameters to the PLCM chaotic mapping module. The binary plaintext sequence and input valid bits are transmitted to the XOR module. The PLCM chaotic mapping module receives the initial values, structure parameters, and control command, generates a key stream based on an improved divider, and transmits it to the data control module. The data control module transmits the key stream to the XOR module. The XOR module generates a binary encryption sequence based on the input valid bits and the key stream, and performs a bit-by-bit XOR operation between the binary encryption sequence and the binary plaintext sequence to generate encrypted data.

[0025] Furthermore, the improved divider includes a precision control module, a remainder register, a quotient register, an adder, a subtractor, a multiplexer, and a counting and judgment module. The processing steps of the improved divider include:

[0026] The precision control module sets the iteration threshold based on the data precision and transmits it to the counting and judgment module;

[0027] Use the dividend as the initial value of the remainder register and set the initial value of the quotient register to 0;

[0028] The data processed by the remainder register is transmitted to the counting and judgment module. If the counting and judgment module determines that the current iteration count has not reached the iteration threshold, the remainder value is output to the adder and subtractor.

[0029] After expanding the remainder value, it is added to and subtracted from the divisor value using adders and subtractors respectively. Based on the result of selecting the highest bit of the data in the remainder register, the corresponding adder or subtractor is selected through a multiplexer, and the resulting value is assigned to the remainder register.

[0030] Shift the data in the quotient register to the left and invert the most significant bit of the data in the remainder register;

[0031] The data in the remainder register is processed by the counting and judgment module and then subjected to a loop of addition and subtraction until the number of loops in the counting and judgment module reaches the set iteration threshold, at which point the iteration result in the quotient register is output.

[0032] An electronic device includes a processor and a memory, wherein the memory stores programs or instructions, and the processor executes the PLCM mapping-based encryption method as described above by invoking the programs or instructions stored in the memory.

[0033] A computer-readable storage medium storing a program or instructions that causes a computer to perform the PLCM mapping-based encryption method as described above.

[0034] The principle and advantages of this invention are as follows: In the PLCM mapping-based encryption method of this application, input data of the chaotic system used for PLCM mapping is first obtained. The input data is used to ensure that the chaotic system can be in a chaotic state. Then, the data precision is selected according to the input data as the encryption precision setting of the chaotic system. The chaotic system then performs iterative calculations. Under the action of PLCM mapping, when the initial value of the chaotic system changes slightly, it will produce a huge change after iteration, making the generated random key stream highly secure. At the same time, during the operation of the chaotic system, the divider in the hardware resources used is optimized. The improvements made to the original divider involve changing its expansion process and using precision control as the threshold for the number of cycles. This allows the corresponding cycle result to be output as soon as the threshold is reached, saving resource overhead. Furthermore, the improved divider in this application uses a non-recovery remainder divider, which, while maintaining its original low circuit delay, further solves the problem of high resource overhead. Therefore, the technical solution of this application generates highly secure encrypted data with low hardware resource overhead and low circuit delay, greatly solving the problem of high resource overhead in the current dynamic precision divider in the PLCM mapping process when using non-recovery remainder division. Attached Figure Description

[0035] Figure 1 This is a flowchart of Embodiment 1 of the present invention;

[0036] Figure 2 This is a flowchart of Embodiment 1 of the present invention;

[0037] Figure 3 This is a schematic diagram of the improved divider structure according to Embodiment 1 of the present invention;

[0038] Figure 4 This is a schematic diagram of a conventional divider structure according to Embodiment 1 of the present invention;

[0039] Figure 5 This is a schematic diagram of the system structure of Embodiment 2 of the present invention;

[0040] Figure 6 This is a schematic diagram of the electronic device structure in an embodiment of the present invention. Detailed Implementation

[0041] The following detailed description illustrates the specific implementation method:

[0042] The reference numerals in the accompanying drawings include: electronic device 400, processor 401, memory 402, input device 403, and output device 404.

[0043] The implementation examples are basically as follows Figure 1 and Figure 2 As shown: An encryption method based on PLCM mapping includes:

[0044] S1: Obtain the initial data of the chaotic system and select the data precision according to the data type;

[0045] In this embodiment, the initial data of the acquired chaotic system adopts human characteristics based on a wireless human body local area network (WHRN). In the WHRN, wearable sensors collect human physiological characteristic parameters, such as electrocardiogram (ECG) and electroencephalogram (EEG) characteristics. These human characteristics have good human variability, randomness, and time-varying properties, and can therefore be used as important resources in security fields such as identity authentication and data encryption. Taking ECG characteristics as an example, the peak localization method is first used to extract feature parameters based on pulse intervals from the ECG signals collected by the WHRN nodes. Then, a series of operations such as summation, modulo operation, and inverse Gray code mapping are performed on the feature parameters to convert them into binary feature vectors with better randomness. In the binary feature vector, the number of bits is used as the initial value and structural parameter for subsequent encryption of the chaotic system. The data precision is set according to the encryption requirements and then input into the chaotic system for encryption.

[0046] S2: Using the initial data as the initial values ​​and structural parameters of the chaotic system mapped by the PLACM, setting the encryption precision according to the data precision, and generating a key stream; specifically, the steps in S2 include:

[0047] S2-1: Determine the initial values ​​and structural parameters of the PLCM mapping based on the initial data, and set the encryption precision according to the data precision;

[0048] S2-2: Preset the initial threshold and parameter threshold according to the encryption precision, and preset the iteration threshold of PLCM mapping as k, the number of PLCM mapping iterations as i, and the perturbation values ​​in the iteration as x and y;

[0049] S2-3: Determine whether the iteration has reached the iteration threshold k by using i. When i ≠ k, if x is greater than the initial threshold, add the original initial value to the current iteration result as the initial value. If y is greater than the parameter threshold, use the value of the last iteration result as the structure parameter. When i = k, it means that the iteration is complete and the key stream is generated.

[0050] In this embodiment, the expression for the PLCM mapping process is:

[0051]

[0052] Where, x n Let x represent the input value for the nth iteration, p represent the structure parameters of the mapping, and x represent the input value for the nth iteration. n+1 This indicates that the next iteration result is generated after the mapping function is calculated;

[0053] In the aforementioned chaotic system mapped by PLCM, the hardware involved includes a divider, specifically a dynamic precision divider. In existing technologies, dynamic precision dividers involve two methods: remainder-recovery division and non-recovery division. Non-recovery division primarily uses an adder and a subtractor, resulting in higher resource overhead compared to remainder-recovery division, but with lower circuit delay. However, in this application, because the initial value of the divisor is always greater than the initial value of the dividend when the chaotic system runs the divider, this application improves upon existing non-recovery dividers. To reduce resource overhead while retaining the advantage of low circuit delay, the improved divider specifically includes a precision control module, a remainder register, a quotient register, an adder, a subtractor, a multiplexer, and a counting and judgment module. The connection method is as follows: the precision control module is connected to the counting and judgment module to use data precision as the iteration threshold for the counting and judgment module; the remainder register and quotient register are connected to the counting and judgment module; one end of the adder and subtractor is connected to the counting and judgment module, and the other end is connected to one end of the multiplexer; the other end of the multiplexer is connected to the remainder register.

[0054] like Figure 3As shown, the improved divider in this application operates as follows:

[0055] The precision control module sets the iteration threshold based on the data precision and transmits it to the counting and judgment module;

[0056] Use the dividend as the initial value of the remainder register and set the initial value of the quotient register to 0;

[0057] The data processed by the remainder register is transmitted to the counting and judgment module. If the counting and judgment module determines that the current iteration count has not reached the iteration threshold, the remainder value is output to the adder and subtractor.

[0058] After expanding the remainder value, it is added to and subtracted from the divisor value using adders and subtractors respectively. Based on the result of selecting the highest bit of the data in the remainder register, the corresponding adder or subtractor is selected through a multiplexer, and the resulting value is assigned to the remainder register.

[0059] Shift the data in the quotient register to the left and invert the most significant bit of the data in the remainder register;

[0060] The data in the remainder register is processed by the counting and judgment module and then subjected to a loop of addition and subtraction until the number of loops in the counting and judgment module reaches the set iteration threshold, at which point the iteration result in the quotient register is output.

[0061] To describe the operational logic of the improved divider in this application in more detail, taking a 32-bit fixed-point precision as an example, the initial value of the quotient register is 0, and the initial value of the remainder register is the dividend. After counting and judgment, the remainder value is expanded, and then added to and subtracted from the divisor value respectively. The result is assigned to the remainder register based on the highest bit of the data; if the highest bit is 1, the addition result is selected; otherwise, the subtraction result is selected. The data in the quotient register is left-shifted, and the lowest bit is the inverted highest bit of the remainder register. Then, the data in the remainder register is added and subtracted again after counting and judgment, repeating the above steps. When the count reaches 32, the result of the quotient register is output. If the precision is selected as 16-bit fixed-point, the steps are the same as for 32-bit fixed-point, except that when the count reaches 16, iteration and output of the result are stopped, saving computation time.

[0062] To further demonstrate its difference from existing dividers, a comparison with existing dividers is made. Figure 4In this method, the existing divider expands the operand to 64 bits. The high 32 bits of the dividend are the original dividend, and the low 32 bits are 0. Similarly, the low 32 bits of the divisor are the original divisor, and the high 32 bits are 0. Through repeated addition and subtraction, a 64-bit quotient is obtained. Since the original dividend is smaller than the original divisor, the high 32 bits of the quotient are 0, and the low 32 bits are the desired result. This method incurs the cost of a 65-bit adder and subtractor, as well as additional register overhead.

[0063] In the operation of the existing divider described above, during the first 32 iterations, due to the relationship between the dividend and divisor, the result can be described as the remainder register continuously obtaining the value of the dividend through shifting, while the high-order bits of the quotient register are continuously set to 0; the quotient value is officially calculated only in the last 32 iterations. During the calculation process, the high-order 32 bits of both the remainder register and the quotient register are 0, thus only 32 bits of registers are needed to store the calculation result. Based on this property, this invention no longer performs bit expansion processing on the operands, and its divider operates as described above. Figure 3 The structural and process modifications are shown.

[0064] The key stream generated by the chaotic system mapped by the PLCM in step S2 is XORed bit-by-bit with the plaintext information to be encrypted, thus completing the encryption operation. Specifically, step S3 involves XORing the key stream with the binary plaintext sequence stream generated from the plaintext information to be encrypted bit-by-bit to generate encrypted data. The formula for calculating the bit-by-bit XOR operation is as follows:

[0065] Z n =S n ⊕Y n

[0066] Among them, S n Y represents the key stream. n Represents a stream of binary plaintext sequences.

[0067] Example 2:

[0068] Example 2 also includes an encryption system based on PLAC mapping, such as... Figure 5As shown, this system discloses an ASIC overall architecture for an encryption method based on PLCM mapping. Specifically, it includes an SPI module, a parameter extraction module, a data control module, a PLCM chaotic mapping module, and an XOR module. The SPI module is used to connect to an external interface via a serial port to acquire raw data. The parameter extraction module receives the raw data and extracts the input parameters, data precision, plaintext information, and input valid bits, and transmits them to the data control module. The data control module selects the received precision to generate a control command for encryption precision, generates a binary plaintext sequence from the plaintext information, generates initial values ​​and structure parameters from the input parameters, and transmits the control command, initial values, and structure parameters to the PLCM chaotic mapping module. The binary plaintext sequence and input valid bits are transmitted to the XOR module. The PLCM chaotic mapping module receives the initial values, structure parameters, and control command, generates a key stream based on an improved divider, and transmits it to the data control module. The data control module transmits the key stream to the XOR module. The XOR module generates a binary encryption sequence based on the input valid bits and the key stream, and performs a bit-by-bit XOR operation on the binary encryption sequence and the binary plaintext sequence to generate encrypted data.

[0069] The improved divider's structure is consistent with the improved divider in the PLCM mapping-based encryption method. Specifically, it includes: a precision control module, a remainder register, a quotient register, an adder, a subtractor, a multiplexer, and a counting and judgment module. The processing steps of the improved divider include:

[0070] The precision control module sets the iteration threshold based on the data precision and transmits it to the counting and judgment module;

[0071] Use the dividend as the initial value of the remainder register and set the initial value of the quotient register to 0;

[0072] The data processed by the remainder register is transmitted to the counting and judgment module. If the counting and judgment module determines that the current iteration count has not reached the iteration threshold, the remainder value is output to the adder and subtractor.

[0073] After expanding the remainder value, it is added to and subtracted from the divisor value using adders and subtractors respectively. Based on the result of selecting the highest bit of the data in the remainder register, the corresponding adder or subtractor is selected through a multiplexer, and the resulting value is assigned to the remainder register.

[0074] Shift the data in the quotient register to the left and invert the most significant bit of the data in the remainder register;

[0075] The data in the remainder register is processed by the counting and judgment module and then subjected to a loop of addition and subtraction until the number of loops in the counting and judgment module reaches the set iteration threshold, at which point the iteration result in the quotient register is output.

[0076] In addition, such as Figure 6 As shown, it also includes an electronic device, which 400 includes one or more processors 401 and memory 402.

[0077] The processor 401 may be a central processing unit (CPU) or other form of processing unit with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 400 to perform desired functions.

[0078] The memory 402 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 401 may execute the program instructions to implement the PLCM mapping-based encryption method of any embodiment of the present invention described above, and / or other desired functions. Various contents such as initial extrinsic parameters and thresholds may also be stored in the computer-readable storage medium.

[0079] In one example, the electronic device 400 may further include an input device 403 and an output device 404, these components being interconnected via a bus system and / or other forms of connection mechanisms (not shown). The input device 403 may include, for example, a keyboard, a mouse, etc. The output device 404 may output various information to the outside, including warning messages, braking force, etc. The output device 404 may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0080] Of course, for the sake of simplicity, Figure 6 Only some of the components of the electronic device 400 relevant to the present invention are shown, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device 400 may include any other suitable components depending on the specific application.

[0081] In addition to the methods and devices described above, embodiments of the present invention may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps of the encryption method based on PLCM mapping provided in any embodiment of the present invention.

[0082] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of the present invention. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0083] Furthermore, embodiments of the present invention may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps of the encryption method based on PLCM mapping provided in any embodiment of the present invention.

[0084] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0085] The above are merely embodiments of the present invention. Commonly known structures and characteristics are not described in detail here. Those skilled in the art are aware of all common technical knowledge in the field prior to the application date or priority date, are aware of all existing technologies in that field, and have the ability to apply conventional experimental methods prior to that date. Those skilled in the art can, under the guidance of this application, improve and implement this solution in combination with their own capabilities. Some typical known structures or methods should not be obstacles for those skilled in the art to implement this application. It should be noted that those skilled in the art can make several modifications and improvements without departing from the structure of the present invention. These should also be considered within the scope of protection of the present invention, and will not affect the effectiveness of the implementation of the present invention or the practicality of the patent. The scope of protection claimed in this application should be determined by the content of its claims, and the specific embodiments described in the specification can be used to interpret the content of the claims.

Claims

1. An encryption method based on PLCM mapping, characterized in that: include: S1: Obtain the initial data of the chaotic system and select the data precision according to the data type; S2: Use the initial data as the initial value and structural parameters of the chaotic system mapped by the PLCM, set the encryption precision according to the data precision, and generate a key stream; S3: Perform a bitwise XOR operation on the key stream and the binary plaintext sequence stream generated from the plaintext information to be encrypted to generate encrypted data; In the chaotic system mapped by PLCM in S2, division is performed by an improved divider. The improved divider includes a precision control module, a remainder register, a quotient register, an adder, a subtractor, a multiplexer, and a counting and judgment module. The precision control module is connected to the counting and judgment module and is used to use the data precision as the iteration threshold of the counting and judgment module. The remainder register and the quotient register are connected to the counting and judgment module. One end of the adder and the subtractor are connected to the counting and judgment module, and the other end is connected to one end of the multiplexer. The other end of the multiplexer is connected to the remainder register. The processing steps of the improved divider include: The precision control module sets the iteration threshold based on the data precision and transmits it to the counting and judgment module; Use the dividend as the initial value of the remainder register and set the initial value of the quotient register to 0; The data processed by the remainder register is transmitted to the counting and judgment module. If the counting and judgment module determines that the current iteration count has not reached the iteration threshold, the remainder value is output to the adder and subtractor. After expanding the remainder value, it is added to and subtracted from the divisor value using adders and subtractors respectively. Based on the result of selecting the highest bit of the data in the remainder register, the corresponding adder or subtractor is selected through a multiplexer, and the resulting value is assigned to the remainder register. Shift the data in the quotient register to the left and invert the most significant bit of the data in the remainder register; The data in the remainder register is processed by the counting and judgment module and then subjected to a loop of addition and subtraction until the number of loops in the counting and judgment module reaches the set iteration threshold, at which point the iteration result in the quotient register is output.

2. The encryption method based on PLCM mapping according to claim 1, characterized in that: S2 includes: S2-1: Determine the initial values ​​and structural parameters of the PLCM mapping based on the initial data, and set the encryption precision according to the data precision; S2-2: Preset the initial threshold and parameter threshold according to the encryption precision, and preset the iteration threshold of PLCM mapping as k, the number of PLCM mapping iterations as i, and the perturbation values ​​in the iteration as x and y; S2-3: Determine whether the iteration has reached the iteration threshold k by using i. When i ≠ k, if x is greater than the initial threshold, add the original initial value to the current iteration result as the initial value. If y is greater than the parameter threshold, use the value of the last iteration result as the structure parameter. When i = k, it means that the iteration is complete and the key stream is generated.

3. The encryption method based on PLCM mapping according to claim 2, characterized in that: The formula for performing a bitwise XOR operation on the key stream and the binary plaintext sequence stream generated from the plaintext information to be encrypted in step S3 is as follows: in, Represents the key stream. Represents a stream of binary plaintext sequences.

4. An encryption system based on PLCM mapping, applied to the encryption method based on PLCM mapping as described in any one of claims 1-3, characterized in that: The system includes an SPI module, a parameter extraction module, a data control module, a PLCM chaotic mapping module, and an XOR module. The SPI module is used to connect to an external interface via a serial port to acquire raw data. The parameter extraction module receives the raw data and extracts the input parameters, data precision, plaintext information, and input valid bits, and transmits them to the data control module. The data control module selects the received precision to generate a control command for encryption precision, generates a binary plaintext sequence from the plaintext information, generates initial values ​​and structural parameters from the input parameters, and transmits the control command, initial values, and structural parameters to the PLCM chaotic mapping module. The binary plaintext sequence and input valid bits are transmitted to the XOR module. The PLCM chaotic mapping module receives initial values, structural parameters, and control commands, generates a key stream based on the improved divider, and transmits it to the data control module. The data control module then transmits the key stream to the XOR module. The XOR module is used to generate a binary encryption sequence based on the input valid bits and the key stream, and to perform a bit-by-bit XOR operation on the binary encryption sequence and the binary plaintext sequence to generate encrypted data.

5. The encryption system based on PLCM mapping according to claim 4, characterized in that: The improved divider includes a precision control module, a remainder register, a quotient register, an adder, a subtractor, a multiplexer, and a counting and judgment module. The processing steps of the improved divider include: The precision control module sets the iteration threshold based on the data precision and transmits it to the counting and judgment module; Use the dividend as the initial value of the remainder register and set the initial value of the quotient register to 0; The data processed by the remainder register is transmitted to the counting and judgment module. If the counting and judgment module determines that the current iteration count has not reached the iteration threshold, the remainder value is output to the adder and subtractor. After expanding the remainder value, it is added to and subtracted from the divisor value using adders and subtractors respectively. Based on the result of selecting the highest bit of the data in the remainder register, the corresponding adder or subtractor is selected through a multiplexer, and the resulting value is assigned to the remainder register. Shift the data in the quotient register to the left and invert the most significant bit of the data in the remainder register; The data in the remainder register is processed by the counting and judgment module and then subjected to a loop of addition and subtraction until the number of loops in the counting and judgment module reaches the set iteration threshold, at which point the iteration result in the quotient register is output.

6. An electronic device, characterized in that: It includes a processor and a memory, wherein the memory stores programs or instructions, and the processor executes the encryption method based on PLCM mapping as described in any one of claims 1-3 by calling the programs or instructions stored in the memory.

7. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a program or instructions that cause a computer to perform the encryption method based on PLCM mapping as described in any one of claims 1-3.

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