How to use a high-speed serial port based on a PHM chip

Abstract

This invention provides a high-speed serial port usage method based on a PHM chip, relating to the field of chip programming technology. The method includes the following steps: powering on the computer, the PHM chip starting up and performing initialization settings, the computer automatically launching a BIOS operation page to perform LPC program settings, and the computer CPU chip controlling the PHM chip to initialize the serial port driver within the BIOS operation interface. This invention's high-speed serial port design implements a high-speed serial port that can be directly used within the system. It eliminates the need for software redevelopment on domestic platforms, maintaining compatibility with existing software drivers. Furthermore, the serial communication rate is significantly improved compared to existing domestically produced chips, reaching up to 6.25 Mbps. This PHM chip-based high-speed serial port usage method achieves complete independent control, similar to the original x86 platform serial port operation method, thus improving product adaptability.

Description

Technical Field

[0001] This invention relates to the field of chip programming technology, specifically to a method for using a high-speed serial port based on a PHM chip. Background Technology

[0002] In computer devices, serial ports serve as an important debugging and communication interface, characterized by simple protocols and low development difficulty. They are typically provided by the controller integrated into the computer chip or by a dedicated serial port chip. This approach results in a relatively low serial communication rate, generally 115.2K bps, with higher speeds supported up to 230K / 460K / 921K bps. Solutions achieving higher serial rates generally employ specific FPGAs, but software adaptation is more complex, requiring the development of dedicated system drivers and applications. Two common existing serial port design schemes are EC and Super IO. The core of an EC is a special microcontroller that provides an LPC interface, allowing it to connect to the host's LPC bus and communicate with the CPU as a slave device. Meanwhile, EC integrates a FLASH interface, SMBUS controller, wake-up control, interrupt controller, timer controller, serial port controller, ACPI management controller, keyboard controller, GPIO controller, etc., for power-on timing control, serial port expansion, etc., with a serial port rate generally up to 460K bps. SuperIO is a multi-functional interface chip that can expand serial ports, keyboard controllers, etc. through LPC interface, and can monitor voltage, fan speed, temperature, and monitor and manage the health status of the platform. It provides a serial port rate up to 921K bps.

[0003] The two solutions mentioned above are common solutions on the x86 platform. However, taking the Loongson 7A1000 chip as an example, its serial port only supports up to 460K bps, which cannot meet the needs of high-speed serial ports. Therefore, on domestic processor platforms, the built-in bridge chip serial port communication rate is low and cannot meet the needs of domestic production for high-speed serial ports.

[0004] Furthermore, most domestic serial port solutions (such as those built using FPGAs) require separate system software development for adaptation, which is very difficult. Therefore, this invention is based on a domestic PHM chip to implement a high-speed serial port solution under the system, which does not require software development for the original operating system and is compatible with the original software system, thus effectively solving the above-mentioned problems and difficulties. Summary of the Invention

[0005] To provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not intended as a general commentary, nor is it intended to identify key / important components or describe the scope of protection of these embodiments, but rather as a prelude to the detailed description that follows.

[0006] This invention provides a method for using a high-speed serial port based on a PHM chip, which can be applied to an operating system to realize a high-speed window solution under the operating system without the need for software development of the original operating system and is compatible with the original software system.

[0007] This disclosure provides a method for using a high-speed serial port based on a PHM chip. The steps of the design method are as follows:

[0008] Step S1: Power on the computer, and the PHM chip starts up to perform initialization settings;

[0009] Step S2: The computer automatically launches the BIOS operation page to configure the LPC program;

[0010] Step S3: The computer CPU chip controls the PHM chip to initialize the serial port driver in the BIOS operating interface;

[0011] Step S4: The PHM chip initializes the ACCIS table of the serial port driver in the BIOS operation interface;

[0012] Step S5: The operating system loads the corresponding driver based on the serial port driver's ACP table;

[0013] Step S6: The serial port driver calls the serial port application driver interface program to enter the working state.

[0014] Furthermore, this high-speed serial port design method is based on the PHM chip for system control. The PHM chip is connected to the CPU's LPC controller as a slave device and is externally connected to the CPU core chip of the computer via the LPC bus, serving as a peripheral chip of the computer.

[0015] Furthermore, the PHM chip acts as a controller to control multiple high-speed serial ports. Each high-speed serial port is used to control the computer's peripherals. Each high-speed serial port is used to control external keyboards and mice, displays and touch screens, cooling fans and battery management devices. The PHM chip's serial ports adopt standard serial port protocols.

[0016] Furthermore, the standard serial port protocol of the PHM chip includes a start bit, main data bits 0-7, a check bit, and a stop bit. Both communicating parties need to agree on a consistent data packet format in order to send and receive data normally.

[0017] Furthermore, the serial port definition of the PHM chip is consistent with the 9-pin standard serial port definition, and the serial port register settings of the PHM chip are based on the LPC-mapped IO ports.

[0018] Furthermore, the serial port registers include a data register, an interrupt enable register, an interrupt flag register, a line control register, a modulation control register, a line status register, and a modulation status register.

[0019] Furthermore, before using the serial port to transmit data, the data length and baud rate of the PHM chip's serial port are set.

[0020] Furthermore, the PHM chip sets the format of serial port data transmission through the line control register.

[0021] Furthermore, when setting the baud rate of the serial port, the PHM chip first sets the line control register DLAB to 1, then writes the interrupt enable register and the data register, and after setting, the line control register DLAB is set to 0.

[0022] This disclosure provides a high-speed serial port implementation scheme based on a PHM chip, which can achieve the following technical effects on a domestic platform:

[0023] This invention provides a high-speed serial port usage method based on the PHM chip. Using the new domestically produced PHM chip as a foundation, the invention elaborates on the high-speed serial port design of the PHM chip, realizing a high-speed serial port that can be directly used in the system. No software redevelopment is required on domestic platforms, and it is compatible with existing software drivers. Furthermore, the serial communication rate is significantly improved compared to existing domestically produced chips, reaching 6.25 Mbps. This high-speed serial port usage method based on the PHM chip achieves complete independent control and is similar to the original X86 platform serial port operation method, enhancing product adaptability.

[0024] The above general description and the description below are exemplary and illustrative only and are not intended to limit this application. Attached Figure Description

[0025] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations and drawings do not constitute a limitation on the embodiments. Elements having the same reference numerals in the drawings are shown as similar elements. The drawings are not to be scaled. And wherein:

[0026] Figure 1 This is a block diagram illustrating the serial port principle of the high-speed serial port usage method based on the PHM chip of the present invention.

[0027] Figure 2 This is a software operation flowchart of the high-speed serial port usage method based on the PHM chip of the present invention;

[0028] Figure 3 This is a data line diagram of the PHM chip communication protocol for the high-speed serial port usage method based on the PHM chip of the present invention. Detailed Implementation

[0029] To provide a more detailed understanding of the features and technical content of the embodiments of this disclosure, the implementation of the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. The accompanying drawings are for illustrative purposes only and are not intended to limit the embodiments of this disclosure. In the following technical description, for ease of explanation, several details are used to provide a full understanding of the disclosed embodiments. However, one or more embodiments may still be implemented without these details. In other cases, well-known structures and devices may be simplified in their depiction to simplify the drawings.

[0030] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this disclosure described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0031] Unless otherwise stated, the term "multiple" means two or more.

[0032] In this embodiment of the disclosure, the character " / " indicates that the objects before and after it are in an "or" relationship. For example, A / B means: A or B.

[0033] The term "and / or" describes an association between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or A and B.

[0034] The term "correspondence" can refer to an association or binding relationship. The correspondence between A and B means that there is an association or binding relationship between A and B.

[0035] It should be noted that, unless otherwise specified, the embodiments and features described in the present disclosure can be combined with each other.

[0036] Example:

[0037] Combination Figure 1-3 As shown, this embodiment of the invention provides a method for using a high-speed serial port based on a PHM chip, including the following steps:

[0038] Step S1: Power on the computer, and the PHM chip starts up to perform initialization settings;

[0039] Step S2: The computer starts the BIOS operation page to configure the LPC program;

[0040] Step S3: The computer CPU chip controls the PHM chip to initialize the serial port driver in the BIOS operating interface;

[0041] Step S4: The PHM chip initializes the ACCIS table of the serial port driver in the BIOS operation interface;

[0042] Step S5: The operating system loads the corresponding driver based on the serial port driver's ACP table;

[0043] Step S6: The serial port driver calls the serial port application driver interface program to enter the working state.

[0044] Optionally, this high-speed serial port design method is based on the PHM chip for system control. The PHM chip is connected as a slave device to the CPU's LPC controller and is externally connected to the CPU core chip of the computer via the LPC bus, serving as a peripheral chip of the computer.

[0045] Optionally, the PHM chip acts as a controller to control multiple high-speed serial ports. Each high-speed serial port is used to control the computer's peripherals. Each high-speed serial port is used to control external keyboards and mice, displays and touch screens, cooling fans and battery management devices. The PHM chip's serial ports use standard serial port protocols.

[0046] Optionally, the standard serial port protocol of the PHM chip includes a start bit, main data bits 0-7, a parity bit, and a stop bit. Both communicating parties need to agree on a consistent data packet format to send and receive data normally. The standard serial port protocol of the PHM chip is as follows: Figure 3 As shown.

[0047] Optionally, the PHM chip's serial port definition is consistent with the 9-pin standard serial port definition, and its standard serial port protocol is shown in the table below:

[0048]

[0049]

[0050] Optionally, the settings of the PHM-related registers of the PHM chip are based on the LPC-mapped I / O ports. The relevant registers of the PHM serial port of the PHM chip are shown in the table below:

[0051] 1 2F8 Write / Read Data register 2 2F9 Write Interrupt enable register 3 2FA Write Interrupt Flag Register 4 2FB Write Line control register 5 2FC Write Modulation control register 6 2FD Read Line Status Register 7 2FE Read Modulation Status Register 8 2FF - reserve

[0052] Optionally, the PHM chip needs to set the data length and baud rate of its serial port during operation. The PHM chip adjusts the serial port data transmission format, such as odd parity / even parity, data length, and other modules, and sets the baud rate of the serial port. When setting the baud rate of the serial port, the line control register DLAB is first set to 1, and then the interrupt enable register and the data register are written. After the setting is completed, the line control register DLAB is set to 0.

[0053] Optionally, the serial port of the PHM chip can be used as a debugging serial port in the BIOS, or it can be used normally in the system for use by upper-level applications.

[0054] The high-speed serial port usage method based on the PHM chip provided in this disclosure describes the high-speed serial port design of the PHM chip, based on the new domestically produced chip PHM. It realizes a high-speed serial port that can be directly used in the system. No software redevelopment is required on the domestic platform, and it is compatible with the original software driver. Moreover, the serial communication rate is significantly improved compared with the existing domestically produced chips, and the communication rate can reach 6.25 Mbps. Furthermore, this high-speed serial port usage method based on the PHM chip achieves complete independent control and is similar to the original X86 platform serial port operation method, which enhances the product's adaptability.

[0055] The foregoing description and accompanying drawings fully illustrate embodiments of the present disclosure to enable those skilled in the art to practice them. Other embodiments may include structural and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the order of operation may vary. Parts and features of some embodiments may be included or substituted for parts and features of other embodiments. Embodiments of the present disclosure are not limited to the structures described above and shown in the accompanying drawings, and various modifications and changes may be made without departing from its scope. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A method for using a high-speed serial port based on a PHM chip, characterized in that, Applied to operating systems, the high-speed serial port usage method includes: When the computer is powered on, the PHM chip starts up and performs initialization settings. The computer boots into the BIOS interface to configure the LPC program. The computer CPU chip controls the PHM chip to initialize the serial port driver settings in the BIOS interface; The PHM chip initializes the ACPI table of the serial port driver in the BIOS operation interface; The operating system loads the corresponding driver based on the ACPI table of the serial port driver; The serial port driver calls the serial port application driver interface program to enter the working state. The PHM chip, as a slave device, is connected to the LPC controller of the CPU and externally connected to the CPU core chip of the computer via the LPC bus, serving as a peripheral chip of the computer. The PHM chip acts as a controller to control multiple high-speed serial ports, each of which is used to control the computer's peripherals.

2. The method for using a high-speed serial port according to claim 1, characterized in that: The standard serial port protocol of the PHM chip includes a start bit, main data bits 0-7, a check bit, and a stop bit. The two communicating parties send and receive data using a consistent data packet format.

3. The method for using a high-speed serial port according to claim 1, characterized in that: The serial port register settings of the PHM chip are based on the LPC-mapped I / O ports.

4. The method of using a high-speed serial port according to claim 3, characterized in that: The serial port registers include a data register, an interrupt enable register, an interrupt flag register, a line control register, a modulation control register, a line status register, and a modulation status register.

5. The method of using a high-speed serial port according to claim 4, characterized in that: The PHM chip sets the format of serial port data transmission through the line control register.

6. The method of using a high-speed serial port according to claim 4, characterized in that: When setting the baud rate of the serial port, the PHM chip first sets the line control register DLAB to 1, then writes the interrupt enable register and the data register, and sets the line control register DLAB to 0 after the setting is completed.

7. The method of using a high-speed serial port according to any one of claims 1 to 6, characterized in that: Before using the serial port to transmit data, the data length and baud rate of the PHM chip's serial port need to be set.

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