Si / sic hybrid device coupling thermal parameter identification method

By partitioning the thermal network of the Si/SiC hybrid device into two low-order models and constructing constraint equations using the shell temperature drop curve, the high-order fitting problem of thermal parameter identification for hybrid devices is solved, simplifying thermal parameter extraction and improving applicability.

CN117172178BActive Publication Date: 2026-07-14HUNAN UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HUNAN UNIV
Filing Date
2023-09-15
Publication Date
2026-07-14

AI Technical Summary

Technical Problem

In the existing technology, when the thermal parameter identification method of Si/SiC hybrid devices is applied to parallel devices, it is difficult to fit the higher-order time constants and the thermal constraint conditions cannot be constructed, resulting in a complex temperature response expression and difficulty in accurately solving the thermal parameters.

Method used

By adopting the concept of thermal network partitioning equivalence, the high-order thermal network of hybrid devices is divided into two low-order equivalent thermal network models. By using the case temperature drop curves of IGBT and MOSFET under separate heating, the constraint equation between time constant and thermal parameters is constructed, simplifying the thermal parameter identification process.

Benefits of technology

It reduces the difficulty of thermal parameter identification, simplifies the steps of heating to thermal equilibrium and measuring power loss, improves the applicability of the zero-input response method in complex scenarios, and reduces hardware costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a Si / SiC hybrid device coupling thermal parameter identification method, which comprises the following steps: setting a heat dissipation working condition F1, separately applying power loss to IGBT and MOSFET for separate heating; obtaining corresponding Laplace domain node voltage equations according to the Laplace domain equivalent thermal network model after separate heating, and correspondingly obtaining the time domain expression of the shell temperature cooling curve according to the Laplace domain node voltage equations; fitting the time domain expression by using the measured data under the current working condition to obtain the time constant under the corresponding working condition, and deriving the constraint equation between the time constant and the thermal parameter; setting a heat dissipation working condition F2, separately applying power loss to IGBT or MOSFET for heating, obtaining the time constant under F2, and deriving the constraint equation between the time constant under F2 and the thermal parameter; and solving the thermal parameter by simultaneously solving the constraint equations under the two working conditions; the application reduces the difficulty of thermal parameter identification of the zero input response method, and simplifies the steps of heating the device to the thermal equilibrium state and extracting the thermal parameter by measuring the power loss.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to a method for identifying coupling thermal parameters of Si / SiC hybrid devices. Background Technology

[0002] Si / SiC hybrid devices, characterized by the parallel connection of Si IGBTs and SiC MOSFETs, achieve near-SiC overall performance at a cost far lower than pure SiC. This provides a superior solution for balancing losses and costs, and has become a potential application for the construction of high-efficiency, low-cost power electronic converters.

[0003] To improve the reliability of hybrid devices, RC thermal network models have been proposed for real-time monitoring of junction temperature. Existing methods for identifying thermal network parameters often rely on experimental measurements to obtain transient thermal response information to provide feedback on the thermal resistance and capacitance parameters of the device under real-time health conditions. However, these experimental methods must meet several requirements of the JEDEC standard: 1) the power loss of the chip must be measurable; 2) the device must be heated to thermal equilibrium. Since power devices generally operate in switching mode, their internal junction temperatures are usually fluctuating, meaning that it is difficult for hybrid devices to reach thermal equilibrium in actual converters. Furthermore, accurately capturing power loss remains a challenge due to rapid changes in voltage and current. Research has revealed a zero-input response method that identifies parameters based on the time constant of the thermal network. This method does not require measuring losses or heating the device to thermal equilibrium, overcoming the limitations of existing experimental measurement methods. However, it ignores the thermal coupling effects caused by lateral heat transfer from other chips and is currently only applied to single-chip thermal network structures. The application rules for parallel devices are still unclear. If the zero-input response method is directly applied to the coupled thermal network model of hybrid devices, the temperature response expression will contain a high order. Fitting high-order time constants is difficult, and thermal constraints cannot be constructed one by one, ultimately leading to the failure of thermal parameter solution. Summary of the Invention

[0004] In view of this, the present invention provides a method for identifying coupled thermal parameters of Si / SiC hybrid devices, which at least solves the problem of the difficulty in the calculation process of thermal parameter identification methods in the prior art.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A method for identifying coupling thermal parameters of a Si / SiC hybrid device includes the following steps:

[0007] S1. Set the heat dissipation mode F1 to apply power loss to the IGBT and MOSFET respectively, so that the IGBT and MOSFET are heated separately;

[0008] S2. Obtain the corresponding Lagrange node voltage equations based on the Lagrange equivalent thermal network model after individual heating, and obtain the time-domain expressions of the IGBT and MOSFET case temperature drop curves based on the corresponding Lagrange node voltage equations.

[0009] S3. Fit the time domain expression to obtain the time constant under the corresponding working condition by using the measured data under the current working condition, and derive the constraint equation between the time constant and the thermal parameters;

[0010] S4. Set the heat dissipation condition F2, apply power loss to the IGBT or MOSFET individually for heating, obtain the time constant under the heat dissipation condition F2 according to the method in S3, and derive the constraint equation between the time constant and the thermal parameters under the heat dissipation condition F2.

[0011] S5. Solve for the thermal parameters by combining the constraint equations between the time constant and the thermal parameters under the combined heat dissipation conditions F1 and F2.

[0012] Preferably, the corresponding Lagrange node voltage equations obtained from the Lagrange domain equivalent thermal network model after individual heating in S2 are as follows:

[0013] The Lagrange node voltage equation after IGBT is heated alone is:

[0014]

[0015] The Lagrange node voltage equation for a MOSFET after individual heating is as follows:

[0016]

[0017] In the formula, T 1a ~T 6a The following are the node voltages of nodes T1 to T6 relative to the reference point Ta, respectively; R1 and C1 are the thermal resistance and thermal capacitance values ​​from the IGBT junction to the bottom; R2 and C2 are the thermal resistance and thermal capacitance values ​​from the MOSFET junction to the bottom; R3 and C3 are the thermal resistance and thermal capacitance values ​​from the bottom of the IGBT to the heat sink substrate; R4 and C4 are the thermal resistance and thermal capacitance values ​​from the bottom of the MOSFET to the heat sink substrate; R5 and C5 represent the convective heat transfer process of the heat sink directly below the IGBT; R6 and C6 represent the convective heat transfer process of the heat sink directly below the MOSFET; R7 is the lateral thermal resistance for heat transfer from the IGBT to the MOSFET; R8 is the lateral thermal resistance for heat transfer from the MOSFET to the IGBT. Therefore, R7 and R8 are defined as the coupling thermal resistance between the IGBT and the MOSFET. 11 U 13 U 15 and U 16 The values ​​U represent the initial voltages of capacitors C1, C3, C5, and C6 after heating the IGBT individually. 22 U24 U 25 and U 26 These represent the initial voltages of capacitors C2, C4, C5, and C6 after the MOSFETs are heated individually.

[0018] Preferably, the specific content of obtaining the time-domain expression of the IGBT and MOSFET case temperature drop curves based on the Lagrange domain node voltage equation in S2 includes:

[0019] Based on the Lagrange domain nodal voltage equation, the nodal voltage T is obtained. 3a =T3-T a and T 4a =T4-T a The Laplace expression for the response is:

[0020]

[0021]

[0022] Where T3 and T4 are the node voltages at nodes T3 and T4, respectively. a Reference point voltage;

[0023] Expanding equations (6) and (7) using partial fractions yields:

[0024]

[0025]

[0026] In the formula, α1-α4 are the poles. The relevant undetermined coefficients, α5-α8, are related to the poles. The relevant undetermined coefficients; τ1 to τ8 are all time constants;

[0027] Performing an inverse Laplace transform on equations (8) and (9), the time-domain expressions for the case temperature drop curves of IGBTs and MOSFETs are as follows:

[0028]

[0029]

[0030] Where t is the heat dissipation time.

[0031] Preferably, the method for obtaining the constraint equation between the time constant and thermal parameters under heat dissipation condition F1 is as follows:

[0032] Due to the extreme point It is the characteristic equation s 4 +k3s 3 +k2s 2 The root and pole of +k1s+k0 It is the characteristic equation s 4 +l3s 3 +l2s 2 The roots of +l1s+l0, based on the relationship between the roots and coefficients of a cubic equation, yield the constraint equation between the time constant and the thermal parameters as follows:

[0033] For IGBTs:

[0034]

[0035] For MOSFETs:

[0036]

[0037] Preferably, the constraint equation between the time constant and the thermal parameters under heat dissipation condition F2 is as follows:

[0038] For IGBTs:

[0039]

[0040] For MOSFETs:

[0041]

[0042] As can be seen from the above technical solution, compared with the prior art, the present invention discloses a method for identifying coupling thermal parameters of Si / SiC hybrid devices, which has the following beneficial effects:

[0043] 1) By utilizing the concept of thermal network partitioning equivalence, the high-order thermal network of the hybrid device is divided into two low-order equivalent thermal network models, which reduces the difficulty of thermal parameter identification in the zero-input response method.

[0044] 2) By using the case temperature drop curves of IGBT and MOSFET under separate heating, the constraint equation between thermal time constant and RC thermal parameters is constructed. Then, the coupled thermal network parameters of the hybrid device are solved, which simplifies the steps of heating the device to thermal equilibrium and measuring power loss and extracting thermal parameters.

[0045] 3) The concept of thermal network partitioning can be further extended to parallel structures of three or more devices, which greatly improves the applicability of the zero-input response method in complex scenarios. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This is a structural diagram of a Si / SiC hybrid device provided in an embodiment of the present invention;

[0048] Figure 2 This is a schematic diagram of the heat transfer path under the partitioning process of hybrid devices provided in an embodiment of the present invention, wherein (a) IGBT is heated separately; and (b) MOSFET is heated separately.

[0049] Figure 3 This is a schematic diagram of the equivalent thermal network model structure of the hybrid device after partitioning processing, provided in an embodiment of the present invention.

[0050] Figure 4 This is a schematic diagram of the thermal parameter identification process provided in an embodiment of the present invention;

[0051] Figure 5 A schematic diagram of the power loss waveform of the hybrid device provided in an embodiment of the present invention;

[0052] Figure 6 The diagram shows the finite element simulation results and thermal network model estimation results of the hybrid device provided in the embodiments of the present invention, where (a) heating time is 1s; (b) heating time is 10s; and (c) heating time is 100s. Detailed Implementation

[0053] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0054] This invention provides a method for identifying coupling thermal parameters of Si / SiC hybrid devices, applicable to hybrid devices composed of Si IGBTs and SiC MOSFETs connected in parallel, the structure of which is as follows: Figure 1 As shown, Si IGBTs and SiC MOSFETs can be independently driven at the gate level, and the power devices primarily rely on heat conduction, with heat transferred vertically only from top to bottom. When only one of the Si IGBTs or SiC MOSFETs is operational, the heat transfer path of the hybrid device is as follows: Figure 2 As shown; by Figure 2 As can be seen from the heat transfer path, when the IGBT or MOSFET in the hybrid device operates alone, the coupled thermal network model is divided into two large regions containing the thermal resistance of a common heat sink. These two regions correspond to two equivalent fourth-order thermal network models. Since the thermal coupling effect between chips in the hybrid device is only transmitted through the thermal resistance of the heat sink, partitioning can reduce the order of the thermal network model while reflecting the thermal coupling effect, providing an architecture for the application of the zero-input response method.

[0055] This invention includes the following steps:

[0056] S1. Set the heat dissipation mode F1 to apply power loss to the IGBT and MOSFET respectively, so that the IGBT and MOSFET are heated separately;

[0057] S2. Obtain the corresponding Lagrange node voltage equations based on the Lagrange equivalent thermal network model after individual heating, and obtain the time-domain expressions of the IGBT and MOSFET case temperature drop curves based on the corresponding Lagrange node voltage equations.

[0058] S3. Fit the time domain expression to obtain the time constant under the corresponding working condition by using the measured data under the current working condition, and derive the constraint equation between the time constant and the thermal parameters;

[0059] S4. Set the heat dissipation condition F2, apply power loss to the IGBT or MOSFET individually for heating, obtain the time constant under the heat dissipation condition F2 according to the method in S3, and derive the constraint equation between the time constant and the thermal parameters under the heat dissipation condition F2.

[0060] S5. Solve for the thermal parameters by combining the constraint equations between the time constant and the thermal parameters under the combined heat dissipation conditions F1 and F2.

[0061] It should be noted that:

[0062] The cooling conditions can be adjusted by changing the fan speed.

[0063] Before setting the heat dissipation condition F1, pre-set the heating current magnitude, frequency, and heating time. The Lagrange domain equivalent heat network model is as follows: Figure 3 As shown.

[0064] To further implement the above technical solution, the corresponding Lagrange domain node voltage equations obtained in S2 based on the Lagrange domain equivalent thermal network model after individual heating are as follows:

[0065] The Lagrange node voltage equation after IGBT is heated alone is:

[0066]

[0067] The Lagrange node voltage equation for a MOSFET after individual heating is as follows:

[0068]

[0069] In the formula, T 1a ~T 6a The following are the node voltages of nodes T1 to T6 relative to the reference point Ta, respectively; R1 and C1 are the thermal resistance and thermal capacitance values ​​from the IGBT junction to the bottom; R2 and C2 are the thermal resistance and thermal capacitance values ​​from the MOSFET junction to the bottom; R3 and C3 are the thermal resistance and thermal capacitance values ​​from the bottom of the IGBT to the heat sink substrate; R4 and C4 are the thermal resistance and thermal capacitance values ​​from the bottom of the MOSFET to the heat sink substrate; R5 and C5 represent the convective heat transfer process of the heat sink directly below the IGBT; R6 and C6 represent the convective heat transfer process of the heat sink directly below the MOSFET; R7 is the lateral thermal resistance for heat transfer from the IGBT to the MOSFET; R8 is the lateral thermal resistance for heat transfer from the MOSFET to the IGBT. Therefore, R7 and R8 are defined as the coupling thermal resistance between the IGBT and the MOSFET. 11 U 13 U 15 and U 16 The values ​​U represent the initial voltages of capacitors C1, C3, C5, and C6 after heating the IGBT individually. 22 U 24 U 25 and U 26 These represent the initial voltages of capacitors C2, C4, C5, and C6 after the MOSFETs are heated individually.

[0070] To further implement the above technical solution, the specific content of obtaining the time-domain expressions of the IGBT and MOSFET case temperature drop curves based on the Lagrange node voltage equation in S2 includes:

[0071] Based on the Lagrange domain nodal voltage equation, the nodal voltage T is obtained. 3a =T3-T a and T 4a =T4-T a The Laplace expression for the response is:

[0072]

[0073]

[0074] The coefficients m3-m0, n3-n0 are related to the RC parameters and the initial capacitor voltage, while the coefficients k3-k0 and l3-l0 are only related to the RC parameters; T3 and T4 are the node voltages at nodes T3 and T4, respectively. aLet be the reference point voltage; since the denominators of expressions (3) and (4) are the characteristic equations of Cauer-type networks, and the solutions to these equations are all single-order solutions located on the negative real axis, expressions (6) and (7) can be expanded using partial fractions as follows:

[0075]

[0076]

[0077] In the formula, α1-α4 are the poles. The relevant undetermined coefficients, α5-α8, are related to the poles. The relevant undetermined coefficients; τ1 to τ8 are all time constants;

[0078] Performing an inverse Laplace transform on equations (5) and (6), the time-domain expressions for the case temperature drop curves of IGBTs and MOSFETs are as follows:

[0079]

[0080]

[0081] Where t is the heat dissipation time.

[0082] From equations (7) and (8), we can see that T 3a and T 4a The corresponding time constants are only 4, which is 2 fewer than the time-domain equation expression corresponding to the shell temperature drop curve based on the hybrid device coupled thermal network model. This is achieved by adjusting T... 3a and T 4a Curve fitting can easily yield the time constants τ1-τ8. Based on the solution principle of the zero-input response method, the next step is to construct a set of constraint equations between the time constants and the RC parameters.

[0083] To further implement the above technical solution, the method for obtaining the constraint equation between the time constant and thermal parameters under heat dissipation condition F1 is as follows:

[0084] From equations (5) and (6), it can be seen that, due to the poles It is the characteristic equation s 4 +k3s 3 +k2s 2 The root and pole of +k1s+k0 It is the characteristic equation s 4 +l3s 3 +l2s 2 The roots of +l1s+l0, based on the relationship between the roots and coefficients of a cubic equation, yield the constraint equation between the time constant and the thermal parameters as follows:

[0085] For IGBTs:

[0086]

[0087] For MOSFETs:

[0088]

[0089] In actual testing, the case temperature drop curves of IGBTs and MOSFETs are recorded using a data acquisition device. Then, the time constants τ1-τ8 are obtained by data fitting according to equations (7) and (8), i.e., τ1-τ8 can be regarded as known quantities. As can be seen from equations (9) and (10), there are currently 8 equations, but 14 unknowns: R1~R8, C1-C6. When the number of unknowns is greater than the number of equations, the solution of the equations is not unique. Therefore, it is not enough to solve all thermal parameters by using only the time constant of the cooling curve under one operating condition. New constraints need to be added to identify all RC parameters.

[0090] To further implement the above technical solution, the constraint equation between the time constant and thermal parameters under heat dissipation condition F2 is as follows:

[0091] For IGBTs:

[0092]

[0093] For MOSFETs:

[0094]

[0095] Changing the external heat dissipation conditions is a relatively practical solution. When the external heat dissipation conditions change, only the six values ​​of R5-R8 and C5-C6 are affected. By adding a set of heat dissipation conditions, a new set of constraint equations can be derived. Since changing the heat dissipation conditions has no effect on the junction thermal resistance of IGBTs and MOSFETs or the thermal resistance of thermal grease, any set of thermal constraint equations for IGBTs and MOSFETs can be selected, such as equation (11) or equation (12).

[0096] In equation (11), τ'1-τ'4 is the time constant of the shell temperature drop curve when the IGBT is heated alone under the second heat dissipation condition, and k'0-k'3 is only related to the RC parameters. In equation (12), τ'5-τ'8 is the time constant of the shell temperature drop curve when the IGBT is heated alone under the second heat dissipation condition, and l'0-l'3 is only related to the RC parameters. Since R5-R8 and R'5-R'8 can be easily measured, they can be regarded as known quantities. From equations (9)-(11) or equations (9), (10) and (12), it can be seen that a total of 12 equations contain 12 unknowns: R1~R4, C1-C6, C'5-C'6. Therefore, by solving equations (9)-(11) or equations (9), (10) and (12) simultaneously, all the remaining thermal parameters can be identified.

[0097] The invention will be further illustrated below through simulation experiments:

[0098] This invention focuses on the thermal network path partitioning of Si IGBT / SiC MOSFET hybrid devices under single-chip operation, and details its thermal parameter identification method in conjunction with the case temperature drop curve. Figure 4 The specific implementation steps of the proposed method are given. First, a finite element simulation model of the hybrid device is built. A power loss of 50W is applied to both the IGBT and MOSFET separately. When the device is heated to thermal equilibrium, the heating source is turned off, and the case temperature drop curves of the IGBT and MOSFET are obtained. The time constant required to solve the thermal parameters can be obtained by combining the time-domain expression of the case temperature drop curve, as shown in Table 1.

[0099] Table 1 Time constants under different heating conditions

[0100]

[0101]

[0102] Substituting the time constants in Table 1 and the previously measured R5-R8 and R'5-R'8 into equations (12)-(14) yields all the thermal parameters. The final results are shown in Table 2.

[0103] Table 2. Parameter identification results of hybrid device coupled thermal network

[0104]

[0105] To verify the accuracy of the thermal parameter identification results of the coupled thermal network, this invention employs a junction temperature comparison experiment. The previously established finite element model is still used, and simultaneous application of [conditions] to the IGBT and MOSFET is performed. Figure 5The square wave excitation source shown simultaneously measures the junction and case temperatures of two devices. Then, combining the identified thermal parameters, a coupled thermal network model of the hybrid device is built in MATLAB to estimate the junction and case temperatures. The finite element simulation results and the coupled thermal network model estimation results are shown below. Figure 6 As shown.

[0106] Depend on Figure 6 It can be seen that when the heating time is 1s, 10s and 100s respectively, the estimated junction temperature of the thermal network model constructed by the thermal parameter results identified by the method proposed in this invention is basically consistent with the finite element simulation waveform, thus demonstrating that the thermal parameter identification results have high accuracy.

[0107] The method proposed in this invention is compared with other existing methods, and the results are shown in Table 3:

[0108] Table 3 Comparison of Different Schemes

[0109]

[0110] Condition 1: Is it necessary to heat the device to thermal equilibrium?

[0111] Condition 2: Is it necessary to measure power loss?

[0112] The comparison results of the above schemes show that, compared with existing schemes, the scheme proposed in this invention can simultaneously simplify the thermal equilibrium condition and power loss measurement steps, and since it does not require junction temperature measurement, the hardware circuit cost is lower. Furthermore, the application of the equivalent concept of thermal network partitioning greatly improves its applicability to parallel devices; therefore, this invention is more suitable for practical applications of extracting coupled thermal parameters of hybrid devices.

[0113] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for identifying coupling thermal parameters of a Si / SiC hybrid device, characterized in that, Includes the following steps: S1. Set the heat dissipation mode F1 to apply power loss to the IGBT and MOSFET respectively, so that the IGBT and MOSFET are heated separately; S2. Obtain the corresponding Lagrange node voltage equations based on the Lagrange equivalent thermal network model after individual heating, and obtain the time-domain expressions of the IGBT and MOSFET case temperature drop curves based on the corresponding Lagrange node voltage equations. The corresponding Lagrange node voltage equations obtained from the Lagrange domain equivalent thermal network model after individual heating are as follows: The Lagrange node voltage equation after IGBT is heated alone is: (1) The Lagrange node voltage equation for a MOSFET after individual heating is as follows: (2) In the formula, T 1a ~T 6a The following are the node voltages of nodes T1 to T6 relative to the reference point Ta, respectively; R1 and C1 are the thermal resistance and thermal capacitance values ​​from the IGBT junction to the bottom; R2 and C2 are the thermal resistance and thermal capacitance values ​​from the MOSFET junction to the bottom; R3 and C3 are the thermal resistance and thermal capacitance values ​​from the bottom of the IGBT to the heat sink substrate; R4 and C4 are the thermal resistance and thermal capacitance values ​​from the bottom of the MOSFET to the heat sink substrate; R5 and C5 represent the convective heat transfer process of the heat sink directly below the IGBT; R6 and C6 represent the convective heat transfer process of the heat sink directly below the MOSFET; R7 is the lateral thermal resistance for heat transfer from the IGBT to the MOSFET; R8 is the lateral thermal resistance for heat transfer from the MOSFET to the IGBT. Therefore, R7 and R8 are defined as the coupling thermal resistance between the IGBT and the MOSFET. 11 U 13 U 15 and U 16 The values ​​U represent the initial voltages of capacitors C1, C3, C5, and C6 after heating the IGBT individually. 22 U 24 U 25 and U 26 These represent the initial voltages of capacitors C2, C4, C5, and C6 after the MOSFETs are heated individually; The specific content of obtaining the time-domain expressions for the case temperature drop curves of IGBTs and MOSFETs based on the Lagrange domain node voltage equations includes: Based on the Lagrange domain nodal voltage equation, the nodal voltage T is obtained. 3a =T3-T a and T 4a =T4-T a The Laplace expression for the response is: (3) (4) Where T3 and T4 are the node voltages at nodes T3 and T4, respectively. a Reference point voltage; Expanding equations (3) and (4) using partial fractions yields: (5) (6) In the formula, α1-α4 are the poles. , , , The relevant undetermined coefficients, α5-α8, are related to the poles. , , , Relevant undetermined coefficients; ~ All are time constants; Performing an inverse Laplace transform on equations (5) and (6), the time-domain expressions for the case temperature drop curves of IGBTs and MOSFETs are as follows: (7) (8) Where t is the heat dissipation time; S3. Fit the time domain expression to obtain the time constant under the corresponding working condition by using the measured data under the current working condition, and derive the constraint equation between the time constant and the thermal parameters; S4. Set the heat dissipation condition F2, apply power loss to the IGBT or MOSFET individually for heating, obtain the time constant under the heat dissipation condition F2 according to the method in S3, and derive the constraint equation between the time constant and the thermal parameters under the heat dissipation condition F2. S5. Solve for the thermal parameters by combining the constraint equations between the time constant and the thermal parameters under the combined heat dissipation conditions F1 and F2.

2. The method for identifying coupling thermal parameters of a Si / SiC hybrid device according to claim 1, characterized in that, The method for obtaining the constraint equation between the time constant and thermal parameters under heat dissipation condition F1 is as follows: Due to the extreme point , , , It is the characteristic equation The root, the extreme point , , , It is the characteristic equation Based on the relationship between the roots and coefficients of a quartic equation, the constraint equation between the time constant and the thermal parameters is obtained as follows: For IGBTs: (9) For MOSFETs: (10)。 3. The method for identifying coupling thermal parameters of a Si / SiC hybrid device according to claim 1, characterized in that, The constraint equation between the time constant and thermal parameters under heat dissipation condition F2 is as follows: For IGBTs: (11) For MOSFETs: (12)。