A terahertz digital power amplifier with active load modulation
Patent Information
- Application Number
- CN202311102969.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-29
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2043-08-29
AI Technical Summary
[0003]然而，当前的太赫兹频段的功率放大器架构受高频影响及工艺性能的限制，大多使用结构简单的传输线零度合成网络来完成功率合成，鲜少关注无源结构相对复杂的有源负载调制技术，但是日益增长数据流量需求必然使得今后的发射机系统引入愈发复杂的高阶调制技术以提高频谱利用率，因此数字功率放大器的信号通常具有较大的动态范围，而零度合成网络难以解决负载阻抗大范围波动的问题，导致在不同功率级下阻抗的失配及效率的降低，在功率状态数量较多的高阶调制下更会使得发射机系统的整体效率严重损失；此外，受实际布线限制，多路零度合成网络不同路之间走线长短的差异所导致的相位差会导致合成后功率提升的效果被削弱，这就从本质上决定了零度合成网络无法做到较多路数功率的合成(在现有的成果中通常不超过16路)，进而难以实现具有较大动态范围的数字功率放大器
[0019] This invention employs a differential Cascode structure in its digital power amplifier unit, simultaneously achieving amplitude modulation and power amplification on the same structure. Furthermore, the power weights and total number of each digital power amplifier unit can be adjusted according to the complexity constraints of the actual circuit to form a digital power amplifier with a specified number of bits. In addition, by introducing a series-coupled balun structure into the output power combining network, and utilizing its voltage combining characteristics and excellent wideband high impedance ratio matching performance at high frequencies, active load modulation in the terahertz band is achieved. This significantly improves the matching of the digital power amplifier unit at various power levels, thereby effectively enhancing the overall efficiency of the digital power amplifier when the signal dynamic range is large.
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Figure CN117176089B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of wireless communication technology, and specifically relates to a terahertz digital power amplifier with active load modulation. Background Technology
[0002] While fifth-generation (5G) mobile communication networks, primarily based on sub-6GHz and millimeter-wave bands, largely meet the current strong communication demands of society, with the rapid progress of modern society and the ever-increasing requirements for wireless communication performance, 5G mobile communication networks will eventually struggle to meet communication indicators such as ultra-low latency at the microsecond level and ultra-high transmission rates at the Tbit / s level. Therefore, terahertz band communication is considered one of the key technologies for realizing sixth-generation (6G) mobile communication networks with ultra-high data throughput. Digital power amplifiers, as important components in modern digital wireless communication systems, integrate digital-to-analog conversion, up-conversion, and power amplification functions, directly converting digital baseband signals to RF modulated signals on a single component. This is one of the key technologies for achieving high-efficiency, highly integrated RF microwave transmitters. Therefore, research on high-performance terahertz digital power amplifier architectures has extremely high economic value and strategic significance for the future of my country.
[0003] However, current terahertz power amplifier architectures are limited by high-frequency influences and process performance, mostly using simple transmission line zero-degree combining networks for power combining, with little attention paid to the relatively complex passive structure of active load modulation technology. However, the ever-increasing demand for data traffic will inevitably lead to the introduction of increasingly complex high-order modulation techniques in future transmitter systems to improve spectrum utilization. Therefore, the signals of digital power amplifiers usually have a large dynamic range, and zero-degree combining networks are unable to solve the problem of large-range fluctuations in load impedance, resulting in impedance mismatch and efficiency reduction at different power levels. Under high-order modulation with a large number of power states, the overall efficiency of the transmitter system will be severely damaged. In addition, due to practical wiring limitations, the phase difference caused by the difference in the length of the traces between different paths in a multi-path zero-degree combining network will weaken the power enhancement effect after combining. This essentially determines that zero-degree combining networks cannot combine a large number of power paths (usually no more than 16 paths in existing results), and thus it is difficult to realize digital power amplifiers with a large dynamic range.
[0004] Therefore, introducing active load modulation technology into digital power amplifiers in the terahertz band and exploring suitable passive synthesis network architectures are of great significance for realizing integrated, high-efficiency, and large dynamic range terahertz digital transmitter chips. Summary of the Invention
[0005] To address the shortcomings of existing technologies mentioned in the background section, this invention provides a terahertz digital power amplifier with active load modulation. This amplifier employs a differential Cascode power amplifier unit to control the state of the digital power amplifier via the digital baseband signal, thereby modulating and amplifying the digital baseband signal. Furthermore, it utilizes a coupled-line balun as a power combining network to achieve wideband, high impedance ratio active load modulation in the terahertz band, effectively improving the overall efficiency of the large dynamic range digital power amplifier.
[0006] To achieve the above objectives, the technical solution of the present invention is as follows:
[0007] A terahertz digital power amplifier with active load modulation is characterized by comprising a drive power distribution network, m digital power amplifier units, and an output power combining network. The drive power distribution network equally distributes the input RF signal power in the terahertz band and amplifies it by a single-stage drive amplifier before transmitting it to each digital power amplifier unit to ensure overall gain. Each digital power amplifier unit is controlled by a digital baseband signal and simultaneously performs mixing of the digital baseband signal and the RF signal, as well as power amplification of the mixed signal. The output power combining network combines the power signals from the m digital power amplifier units and performs active load modulation on the digital power amplifier units at different power levels to improve efficiency.
[0008] Furthermore, the drive power distribution network includes an input power distribution network and m drive amplifier units; wherein, the front end of the input power distribution network is composed of an inverted microstrip line zero-degree combining network to achieve equal power distribution, and each branch of the microstrip line zero-degree combining network uses a set of coupling line baluns to convert the single-ended RF input signal into a differential RF input signal; the drive amplifier unit is composed of a pair of differential common-emitter transistors and uses a pair of cross-coupling capacitors to improve the gain and stability of the drive amplifier, and the drive amplifier unit amplifies the differential RF input signal and transmits it to each digital power amplifier unit.
[0009] Furthermore, the digital power amplifier unit adopts a differential Cascode structure, using a microstrip line as inter-stage matching between the common-emitter transistor and the common-base transistor, and employing a pair of cross-coupling capacitors to improve the gain and stability of the power amplifier. The RF signal transmitted by the drive power distribution network is input from the base of the common-emitter transistor, the digital baseband signal is input from the base of the common-base transistor, and the power-amplified mixer signal is output from the collector of the common-base transistor. When the digital signal is low, the digital power amplifier unit is in the off state and does not output an RF signal; when the digital signal is high, the digital power amplifier unit is in the on state and outputs the amplified RF signal. Therefore, from the perspective of the time-domain waveform of the output signal, each digital power amplifier unit has the effect of multiplying and amplifying the digital baseband signal and the RF signal in the time domain, that is, outputting a 1-bit amplitude-modulated signal after power amplification.
[0010] Furthermore, in the differential Cascode structure, the number of common-emitter transistors and common-base transistors is changed by connecting them in parallel to change the power weight of each digital power amplifier unit.
[0011] Furthermore, when the number of bits in the digital power amplifier is n bits, 2 n Two power stage states; n The power level states are determined by 2 n Synthesizing of at least n equal-weighted power amplifier units or at least n unequal-weighted power amplifier units.
[0012] Furthermore, the output power combining network includes a balun combining network and 2m pre-matching circuits.
[0013] The pre-matching circuit, consisting of a section of microstrip line, is used to achieve impedance matching between the digital power amplifier unit and the balun synthesis network. The reason for using the pre-matching circuit is that in the terahertz band, the coupled line balun is difficult to directly provide the load impedance required by the digital power amplifier unit (especially a large imaginary part of the impedance). Therefore, a section of microstrip line is used to match the port impedance of the balun to the load impedance required by the power amplifier unit.
[0014] Furthermore, when the m digital power amplifier units are unequal-weighted digital power amplifier units, the front end of the balun synthesis network consists of m / 2 two-in-one series coupled-line baluns, and the back end consists of m / 2 coupled-line baluns and a multi-in-one series coupled-line balun. The mixing signals output by every two pairs of the digital power amplifier units are transmitted through a pre-matching circuit to a two-in-one series coupled-line balun to be synthesized into a single-ended signal, then converted into a differential signal by the coupled-line balun and transmitted to the multi-in-one series coupled-line balun, and finally synthesized into an n-bit amplitude modulation signal for output.
[0015] When the m digital power amplifier units are equal-weighted digital power amplifier units, the front end of the balun synthesis network consists of m / 2 two-in-one series coupled line baluns, and the back end consists of a microstrip line zero-degree synthesis network. The mixing signals output by every two pairs of digital power amplifier units are transmitted through a pre-matching circuit to a two-in-one series coupled line balun to synthesize into a single-ended signal, and finally directly synthesized into an n-bit amplitude modulation signal output through the microstrip line zero-degree synthesis network.
[0016] The advantages of using a series coupled-line balun in a balun synthesis network are as follows: First, coupled-line baluns are inherently easy to implement with wide bandwidth and high impedance ratio; second, as a distributed balun, coupled-line baluns are more suitable for the terahertz band where the distribution effect is significant, and coupled-line baluns do not use wire-wound inductors to form transformers, so they will not fail due to exceeding the self-resonant frequency at high frequencies; third, series coupled-line baluns are a voltage synthesis structure, which is more suitable for active load modulation of terahertz band power amplifiers where the output impedance is low when turned off.
[0017] The active load modulation effect formed by the combined action of the pre-matching circuit and the coupling line balun synthesis network is as follows: in the maximum power stage, the optimal load impedance of each power amplifier unit is matched; in other power stage states, the load impedance of each activated power amplifier unit is made as close as possible to its optimal load impedance to ensure that the efficiency loss is within an acceptable range, thereby improving the overall efficiency of the digital power amplifier.
[0018] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:
[0019] This invention employs a differential Cascode structure in its digital power amplifier unit, simultaneously achieving amplitude modulation and power amplification on the same structure. Furthermore, the power weights and total number of each digital power amplifier unit can be adjusted according to the complexity constraints of the actual circuit to form a digital power amplifier with a specified number of bits. In addition, by introducing a series-coupled balun structure into the output power combining network, and utilizing its voltage combining characteristics and excellent wideband high impedance ratio matching performance at high frequencies, active load modulation in the terahertz band is achieved. This significantly improves the matching of the digital power amplifier unit at various power levels, thereby effectively enhancing the overall efficiency of the digital power amplifier when the signal dynamic range is large. Attached Figure Description
[0020] Figure 1 This is a system block diagram of the digital power amplifier of the present invention.
[0021] Figure 2 This is a schematic diagram of the drive power distribution network (m-path) in this invention.
[0022] Figure 3 This is a schematic diagram of the drive amplifier unit in this invention.
[0023] Figure 4 This is a schematic diagram of the structure of the digital power amplifier unit in this invention.
[0024] Figure 5 This is a schematic diagram of the output power combining network in Embodiment 1 of the present invention.
[0025] Figure 6 This is a schematic diagram of the series-coupled balun used in the output power combining network of the present invention (taking a two-in-one example).
[0026] Figure 7 This is a schematic diagram illustrating the principle of active load modulation using a balun synthesis network in this invention (taking a two-in-one example).
[0027] (a) is a schematic diagram of the maximum power level state, and (b) is a schematic diagram of the non-maximum power level state.
[0028] Figure 8 This is a schematic diagram of the impedance matching process of the output synthesis network in this invention.
[0029] Figure 9 This is a schematic diagram of the output power combining network in Embodiment 2 of the present invention. Detailed Implementation
[0030] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings.
[0031] Example 1
[0032] A 216GHz, 4-bit digital power amplifier synthesized using unequal-weighted digital power amplifier units based on indium phosphide heterojunction bipolar transistor (InP HBT) technology includes a drive power combining network, eight digital power amplifier units, and an output power combining network.
[0033] The driving power combining network includes an input power distribution network and a driving power amplifier unit, and its structure is as follows: Figure 2 As shown (m=8), the input 216GHz RF signal power is first divided into eight equal paths by a microstrip zero-degree synthesizer network. Then, at the end of each path, a coupling line balun converts the single-ended input to a differential input, and the input signal passes through a driver amplifier stage before the power input digital power amplifier unit to ensure the overall system gain. The structure of the driver amplifier is as follows: Figure 3 As shown, it consists of a pair of differential common-emitter transistors and uses cross-coupling capacitors to improve gain and stability.
[0034] The structure of the digital power amplifier unit is as follows: Figure 4 As shown, it consists of a pair of differential Cascode structures. Cross-coupling capacitors are also used on the common-emitter transistor to improve gain and stability. The digital baseband signal is applied to the base of the common-base transistor to control the switching of the digital power amplifier unit. The 216GHz RF signal is applied to the common-emitter transistor as the carrier signal.
[0035] In this embodiment, a total of four groups of unequal-weighted digital power amplifier units are required. Each group consists of one low-weighted digital power amplifier unit and one high-weighted digital power amplifier unit. Figure 4 The structures shown are exactly the same, with the high-weighted digital power amplifier unit in... Figure 5 Based on the structure shown, each transistor is increased to two in parallel to improve output power.
[0036] The output power combining network includes a pre-matched circuit and a balun combining network, the structure of which is as follows: Figure 5 As shown, the pre-matching circuit consists of a section of microstrip line connected between the output port of the digital power amplifier unit and the differential port of the coupling line balun to achieve better impedance matching with the balun. The balun combining network consists of four sets of two-in-one series coupling line baluns and one set of four-in-one series coupling line baluns. The connection method is as follows: the input port of each set of two-in-one series coupling line baluns is connected to the output port of a low-weight digital power amplifier unit and a high-weight digital power amplifier unit respectively through the pre-matching network. Then, the outputs of the four sets of two-in-one series coupling line baluns are each converted into differential signals again through a coupling line balun. Finally, the four-in-one series coupling line baluns are combined into the final output signal of the system.
[0037] The specific topology of the series-coupled balun used is as follows: Figure 6 As shown (taking a two-in-one balun as an example), a tuning capacitor is used on each balun, and a phase compensation line is used between the two baluns to tune the imbalance of the impedance at the different balun ports.
[0038] With the above connection method, each group of high and low weight digital power amplifier units and the corresponding two-in-one series coupling line balun constitutes a set of unequal weight two-way power combining. By controlling the switching of the digital power amplifier units with digital signals, four different power level states can be formed. These four sets of unequal weight combinations and the four-in-one series coupling line balun at the back end are regarded as a set of equal weight four-way power combining, which can also form four different power level states. Therefore, a total of 4×4=16 different power level states can be formed in the final output signal of the system, that is, a 4-bit digital power amplifier is formed.
[0039] The principle of active load modulation achieved through a balun synthesis network and a pre-matched circuit is as follows: Figure 7As shown (taking two-channel combining as an example; the principle of four-channel combining is similar and will not be elaborated here), let the voltages of the two digital power amplifier units when they are turned on be V1 and V2, respectively, the voltage turns ratios of the two baluns be n1 and n2, and the load be R. L When both digital power amplifier units are turned on, the voltage is applied to the load by the series balun. At this time, the input impedance Z of the two baluns is... in1 and Z in2 They are respectively:
[0040] Z in1 =n1 2 n2V1R L / (n2V1+n1V2);
[0041] Z in2 =n2 2 n1V2R L / (n2V1+n1V2);
[0042] When only one digital amplifier unit is turned on, the output impedance of the off digital amplifier unit is low in the terahertz frequency band, which can be approximated as a short circuit. At this time, only the voltage of the turned-on digital amplifier unit is applied to the load through the balun, and the corresponding input impedance of the balun is:
[0043] Z in1 '=n1 2 R L (Only when the first path is open);
[0044] or Z in2 =n2 2 R L (Only when the second path is open).
[0045] Mathematical analysis shows that, under the physical premise that all parameters in the formula are greater than 0, Z in1 and Z in2 The value is always less than Z in1 'and Z in2 The value of 'V1 / V2' is given; moreover, digital power amplifiers differ from traditional Doherty amplifiers. The former directly switches each power amplifier unit to achieve different states of saturation and back-off. Therefore, the optimal load impedance required by a digital power amplifier unit is the same in all states. For these two reasons, theoretically, a digital power amplifier cannot achieve optimal impedance matching in all states. However, based on the above mathematical expression, given the turn-on voltage ratio V1 / V2 of the two power amplifier units, the overall impedance matching state of the digital power amplifier can be improved through the following operation:
[0046] 1. By designing and adjusting the voltage turns ratio n1 / n2 of the two coupled-line baluns and selecting a suitable load value R... L Control and reduce Zin1 'and Z in2 'Offset from Z on the Smith chart' in1 and Z in2 The degree;
[0047] 2. Then, by designing a pre-matching circuit, the optimal load impedance Z of the digital power amplifier unit is achieved. opt Match to Z in1 and Z in2 ;
[0048] This impedance matching process is as follows: Figure 8 As shown, through the above operations, the digital power amplifier unit has the highest efficiency in the maximum power stage state, and the efficiency loss is small and controllable in the non-maximum power stage state, thereby improving the overall efficiency of the digital power amplifier.
[0049] Example 2
[0050] A 216GHz, 4-bit digital power amplifier synthesized using equal-weighted digital power amplifier units based on indium phosphide heterojunction bipolar transistor (InP HBT) technology includes a drive power combining network, 16 digital power amplifier units, and an output power combining network.
[0051] This embodiment can be regarded as another implementation of embodiment 1.
[0052] The driving power combining network described above is similar to the driving power combining network in Example 1, but the number of channels is increased to 16, and its structure is as follows: Figure 2 As shown (m=16), the structure of the driver amplifier is as follows: Figure 3 As shown.
[0053] The structure of the digital power amplifier unit is as follows: Figure 4 As shown, a total of 16 equally weighted digital power amplifier units are required in this embodiment. In order to improve the output power, they all adopt the same structure as the high-weighted digital power amplifier units in Embodiment 1.
[0054] The output power combining network includes a pre-matched circuit and a balun combining network, the structure of which is as follows: Figure 9 As shown, the pre-matching circuit still consists of a section of microstrip line, and its connection method and function are the same as in Example 1. The balun combining network consists of eight sets of two-in-one series coupled line baluns and a microstrip line zero-degree combining network. The input port of each set of two-in-one series coupled line baluns is connected to the output port of two equally weighted digital power amplifier units through the pre-matching network. Considering that the number of outer channels of this architecture is large, the complexity and difficulty of using coupled line baluns for power combining are relatively large. Therefore, an eight-in-one microstrip line zero-degree combining network is used directly at the back end to combine the output power of the eight sets of two-in-one baluns into the final output signal of the final system.
[0055] With the above connection method, each group of equal-weighted digital power amplifier units and the corresponding two-in-one series coupling balun constitute a group of equal-weighted two-way power combiners. By controlling the switching of the digital power amplifier units with digital signals, two different power level states can be formed. These eight groups of equal-weighted combinations and the outer eight-in-one zero-degree combining network can be regarded as constituting a group of equal-weighted eight-way power combiners, which can also form eight different power level states. Therefore, a total of 2×8=16 different power level states can be formed in the final output signal of the system, which can still form a 4-bit digital power amplifier.
[0056] The principle of active load modulation through balun synthesis network and pre-matching circuit is exactly the same as that described in Example 1, and will not be repeated here.
[0057] The above description is merely a specific embodiment of the present invention. Any feature disclosed in this specification may be replaced by other equivalent or similar features unless otherwise specified. All disclosed features, or steps in all methods or processes, may be combined in any way except for mutually exclusive features and / or steps.
Claims
1. A terahertz digital power amplifier with active load modulation, characterized in that, The system includes a drive power distribution network, m digital power amplifier units, and an output power combining network. The drive power distribution network equally distributes the input RF signal power in the terahertz band and amplifies it using a single-stage drive amplifier before transmitting it to each digital power amplifier unit to ensure overall gain. Each digital power amplifier unit is controlled by a digital baseband signal and simultaneously performs mixing of the digital baseband signal and the RF signal, as well as power amplification of the mixed signal. The output power combining network combines the power signals from the m digital power amplifier units and performs active load modulation of the digital power amplifier units at different power levels. The digital power amplifier unit adopts a differential Cascode structure, using a microstrip line as interstage matching between the common emitter transistor and the common base transistor, and using a pair of cross-coupling capacitors to improve the gain and stability of the power amplifier. The radio frequency signal transmitted by the drive power distribution network is input from the base of the common emitter transistor, the digital baseband signal is input from the base of the common base transistor, and the collector of the common base transistor outputs a power-amplified mixed signal; when the digital signal is low, the digital power amplifier unit is in the off state and does not output radio frequency signal; when the digital signal is high, the digital power amplifier unit is in the on state and outputs the amplified radio frequency signal. The output power combining network includes a balun combining network and 2m pre-matching circuits; wherein, the pre-matching circuits are used to achieve impedance matching between the digital power amplifier unit and the balun combining network; the balun combining network is used to combine m mixing signals into one n-bit amplitude modulation signal for output. When the m digital power amplifier units are unequal-weighted digital power amplifier units, the front end of the balun synthesis network consists of m / 2 two-in-one series coupled-line baluns, and the back end consists of m / 2 coupled-line baluns and a multi-in-one series coupled-line balun. The mixing signals output by every two pairs of digital power amplifier units are transmitted through a pre-matching circuit to a two-in-one series coupled-line balun to be synthesized into a single-ended signal, then converted into a differential signal by the coupled-line balun and transmitted to the multi-in-one series coupled-line balun, and finally synthesized into an n-bit amplitude modulation signal for output. When the m digital power amplifier units are equal-weighted digital power amplifier units, the front end of the balun synthesis network consists of m / 2 two-in-one series coupled line baluns, and the back end consists of a microstrip line zero-degree synthesis network. The mixing signals output by every two pairs of digital power amplifier units are transmitted through a pre-matching circuit to a two-in-one series coupled line balun to synthesize into a single-ended signal, and finally directly synthesized into an n-bit amplitude modulation signal output through the microstrip line zero-degree synthesis network.
2. A terahertz digital power amplifier with active load modulation as described in claim 1, characterized in that, The drive power distribution network includes an input power distribution network and m drive amplifier units; The input power distribution network front end is composed of an inverted microstrip line zero-degree synthesis network to achieve equal power distribution. Each branch of the microstrip line zero-degree synthesis network uses a set of coupling line baluns to convert the single-ended RF input signal into a differential RF input signal. The driver amplifier unit consists of a pair of differential common-emitter transistors and uses a pair of cross-coupled capacitors to improve the gain and stability of the driver amplifier. The driver amplifier unit amplifies the differential RF input signal and transmits it to each digital power amplifier unit.
3. A terahertz digital power amplifier with active load modulation as described in claim 1 or 2, characterized in that, When the number of bits in a digital power amplifier is n bits, 2 n Two power stage states; n The power level states are determined by 2 n Synthesizing of at least n equal-weighted power amplifier units or at least n unequal-weighted power amplifier units.
4. A terahertz digital power amplifier with active load modulation as described in claim 3, characterized in that, In the differential Cascode structure, the number of common-emitter transistors and common-base transistors is changed by connecting them in parallel to change the power weight of each digital power amplifier unit.
5. A terahertz digital power amplifier with active load modulation as described in claim 1 or 2, characterized in that, The pre-matching circuit consists of a section of microstrip line.