An adaptive total dose effect hardening circuit with real-time continuous compensation

Abstract

The present application relates to a kind of real-time continuous compensation adaptive total dose effect reinforcement circuit, belong to power electronics field.The circuit includes several compensation units, the number of compensation units is equal to the number of irradiation-sensitive points to be compensated, to realize the compensation of multiple points total dose irradiation.Each compensation unit has the same circuit structure, including voltage clamping circuit, current mirror and irradiation-sensitive compensation MOS tube.Voltage clamping circuit is clamped to the voltage of irradiation-sensitive compensation MOS tube drain voltage of irradiation-sensitive point to be compensated;The gate of irradiation-sensitive compensation MOS tube is connected with irradiation-sensitive point to be compensated, and corresponding compensation current is generated according to total dose irradiation;Current mirror guides the compensation current generated to irradiation-sensitive point to be compensated, to realize the continuous compensation of total dose irradiation.Voltage clamping circuit and current mirror are not sensitive to total dose irradiation.The present application can realize the real-time continuous total dose effect compensation for multiple points to be compensated.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology and relates to an adaptive total dose effect hardening circuit with real-time continuous compensation. Background Technology

[0002] For devices and analog integrated circuits fabricated using deep submicron processes, the total dose effect is mainly manifested as a negative shift in the device threshold voltage and an increase in leakage current. On the one hand, the accumulation of trapped charge in the oxide layer causes a negative shift in the threshold voltage, which is the main cause of radiation-induced degradation of DC parameters. On the other hand, the total dose-induced charge in the field oxide layer on the drain-source side of the device is a key factor in the formation of leakage current on the drain-source side.

[0003] As process dimensions and gate oxide thickness continue to decrease, the amount of charge accumulated within the gate oxide decreases, and the negative offset of the device threshold voltage gradually weakens. However, leakage current remains a significant problem. Many radiation-hardened analog integrated circuits are designed to ensure normal circuit function by increasing the circuit bias current. This design approach, which increases the quiescent current margin, can no longer meet the growing demands of analog integrated circuits for lower power consumption and higher power density. Therefore, it is necessary to reduce or even eliminate the impact of leakage current on analog integrated circuits.

[0004] The leakage current induced by the total dose effect can be equivalent to the current generated by the parasitic MOS. On the one hand, due to the complex operating voltage range of analog circuits, the current of the parasitic MOS is affected by the device bias. On the other hand, different device biases will further exacerbate the differences in the equivalent size of the parasitic MOS in the irradiation environment. This can lead to undercompensation or overcompensation. Therefore, the core of the compensation approach is to ensure that the operating state of the compensation transistor is consistent with that of the compensated transistor. In existing irradiation compensation schemes, the operating state of the compensation transistor does not follow that of the compensated transistor; either the gate voltage of the compensation transistor is always zero, or the drain voltage of the compensation transistor cannot follow that of the compensated transistor. The total dose radiation effects on the compensation transistor and the compensated transistor are different, and they cannot generate leakage currents of the same magnitude, making them unsuitable for environments with varying radiation dose rates. Additional irradiation detection circuits are required. Compensation for different total dose cumulative doses requires the design of compensation transistors of different sizes, and external control signals are needed to ensure that the compensation circuit for the corresponding total dose cumulative dose is working properly, making continuous compensation for total dose irradiation inconvenient. Once the size of the compensation transistor is determined, compensation can only be performed at a fixed total dose cumulative dose point. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide an adaptive total dose effect hardening circuit with real-time continuous compensation, which realizes real-time compensation of total dose irradiation by setting the compensation tube and the compensated tube to be in the same working state.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] An adaptive total dose effect hardening circuit with real-time continuous compensation includes several compensation units, the number of which is equal to the number of radiation-sensitive points to be compensated, so as to achieve compensation for total dose irradiation at multiple points.

[0008] Each compensation unit has the same circuit structure, including a voltage clamping circuit, a current mirror, and an irradiation-sensitive compensation MOSFET. The voltage clamping circuit clamps the drain voltage of the irradiation-sensitive compensation MOSFET to the voltage of the irradiation-sensitive point to be compensated; the gate of the irradiation-sensitive compensation MOSFET is connected to the irradiation-sensitive point to be compensated, and generates a corresponding compensation current according to the total dose irradiation; the current mirror guides the generated compensation current to the irradiation-sensitive point to be compensated, so as to achieve continuous compensation of the total dose irradiation.

[0009] Both the voltage clamping circuit and the current mirror are insensitive to total dose irradiation.

[0010] Optionally, the voltage clamping circuit includes an operational amplifier and a MOSFET. n1 The current mirror includes a MOSFET M. p1 and M p2 .

[0011] The non-inverting input of the operational amplifier is connected to the radiation-sensitive point to be compensated, and its inverting input is connected to the MOSFET M. n1 The source and MOSFET M n2 The drain is connected, and its output terminal is connected to the MOSFET M. n1 Gate connection; MOSFET M n1 The drain and MOSFET M p1 The drain, gate, and MOSFET M p2 Gate connection; MOSFET M p1 The source of the MOSFET is connected to the power supply; p2 The source is connected to the power supply, and its drain is connected to the radiation-sensitive point to be compensated.

[0012] The beneficial effects of this invention are as follows:

[0013] (1) The present invention can generate leakage current corresponding to the total dose of cumulative irradiation in real time according to the working state of the device, and output dynamic compensation current for use by subsequent circuits;

[0014] (2) The compensation current can be adaptively changed according to the operating state of the device;

[0015] (3) The compensation current can be adaptively changed with the irradiation dose rate;

[0016] (4) Real-time compensation for total dose irradiation can be achieved;

[0017] (5) It can simultaneously achieve continuous compensation for total dose irradiation at multiple points;

[0018] (6) It can achieve compensation for the total dose irradiation at any time from generation to dissipation;

[0019] (7) Only one compensation tube is needed, and there is no need to set up devices of different sizes according to different irradiation conditions.

[0020] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0021] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein:

[0022] Figure 1 A schematic diagram of the adaptive total dose effect hardening circuit structure for real-time continuous compensation provided in an embodiment of the present invention;

[0023] Figure 2 This is a schematic diagram of the compensation unit structure. Detailed Implementation

[0024] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0025] like Figure 1 The diagram shows an adaptive total dose effect hardening circuit with real-time continuous compensation provided in an embodiment of the present invention. It includes m compensation units for compensating m corresponding radiation-sensitive points to be compensated, wherein the compensation current I for each point to be compensated is... offset，i They are independent of each other and can achieve continuous compensation for total dose irradiation at multiple points simultaneously.

[0026] m compensation units have the same circuit structure, such as Figure 2As shown, the circuit structure of each compensation unit includes a voltage clamping circuit, an irradiation-sensitive compensation transistor, and a current mirror. Both the voltage clamping circuit and the current mirror are insensitive to total dose irradiation. The voltage compensation circuit includes an operational amplifier and a MOSFET. n1 The current mirror includes a MOSFET M. p1 and M p2 The radiation-sensitive compensation transistor is a MOSFET. n2 Specifically, MOSFET M p1 The source is connected to the power supply, and its gate is connected to its drain and the MOSFET M. n1 The drain and MOSFET M p2 Gate connection; MOSFET M p2 The source of the MOSFET is connected to the power supply, and its drain is connected to the circuit to be compensated; MOSFET M n1 The gate of the transistor is connected to the output of the operational amplifier, and its source is connected to the inverting input of the operational amplifier and the MOSFET M. n2 The drain of the MOSFET is connected; the non-inverting input of the operational amplifier is connected to the circuit to be compensated; the MOSFET M... n2 The gate of the circuit is connected to the circuit to be compensated, and its source is grounded.

[0027] In this embodiment, the circuit to be compensated is an irradiation-sensitive MOS transistor. The drain of the MOS transistor is connected to the non-inverting input of the operational amplifier, and its gate is connected to the MOS transistor M. n2 The gate connection.

[0028] The compensating transistor and the compensated transistor have the same dimensions, and at a gate voltage V G Under the same conditions, the voltage clamping circuit makes the drain voltage of the compensating transistor follow the drain voltage V of the compensated transistor. D This ensures that both have the same operating state, enabling compensation current I. offset,i The device adapts to its operating state. Specifically, for switching transistors, the induced charge accumulation is dynamically refreshed in each switching cycle to ensure consistent induced charge yield and output. Furthermore, consistent drain voltage ensures the same induced charge distribution in both the compensating and compensated transistors, preventing undercompensation or overcompensation due to inconsistent induced charge yield and output or inconsistent induced charge distribution. Since both the compensating and compensated transistors are affected by the same total dose radiation effect, they generate the same leakage current I. leak Therefore, it remains applicable to situations involving changes in irradiation dose rate and can achieve compensation current I. offset,i Adaptive to changes in irradiation dose rate; the compensation tube acts as a redundant backup for the compensated tube, ensuring no impact on the normal circuit function during periods of no irradiation, and eliminating the need for an additional irradiation detection circuit to determine whether the compensation circuit needs to be activated, thus enabling real-time compensation of total irradiation dose; compensation current I offset,iIt increases with the cumulative dose of total irradiation, enabling continuous compensation for total irradiation.

[0029] The specific principle of total dose irradiation compensation is as follows:

[0030] Under normal operation, MOSFET M p1 M n1 M n2 There is a current I1 in the branch formed. When the irradiation effect occurs, the compensation tube M n2 Both the compensated MOSFET and the MOSFET will generate leakage current I. leak Therefore, the current in the branch should be I1-I. leak However, under the influence of the power supply VDD, the current in the branch will remain at I1, that is, the power supply generates a compensation current I. offset , and I offset equals I leak The compensation current passes through the current mirror in the MOSFET M. p2 A similar current was generated at the location, compensating for the current I lost by the compensated MOSFET due to the radiation effect. leak Therefore, current compensation for the compensated tube is achieved.

[0031] When not exposed to total dose irradiation, the compensating transistor and the compensated transistor have the same gate voltage V. G and the same drain voltage V D When the current flowing through the devices is the same, the circuit works normally; when subjected to total dose irradiation, the compensating tube and the compensated tube simultaneously generate leakage current I of the same magnitude. leak Compensation current I offset,i The compensation is performed directly on the compensated tube using a current mirror; after the total dose of irradiation fades, the leakage current I... leak As the annealing effect gradually decreases to zero, the compensation current I... offset,i It also decreases accordingly to zero.

[0032] This invention requires only one compensation tube and does not require different sized devices to be set according to different irradiation conditions, thus having the characteristics of strong independence and wide applicability.

[0033] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A real-time continuously compensated adaptive total dose effect hardening circuit, characterized in that: The circuit includes several compensation units, the number of which is equal to the number of radiation-sensitive points to be compensated, in order to achieve compensation for the total dose of radiation at multiple points; The compensation units have the same circuit structure, including a voltage clamping circuit, a current mirror, and an irradiation-sensitive compensation MOSFET. The voltage clamping circuit clamps the drain voltage of the irradiation-sensitive compensation MOSFET to the voltage of the irradiation-sensitive point to be compensated. The gate of the irradiation-sensitive compensation MOSFET is connected to the irradiation-sensitive point to be compensated, and generates a corresponding compensation current according to the total dose irradiation. The current mirror guides the compensation current to the irradiation-sensitive point to be compensated, so as to realize continuous compensation of the total dose irradiation. Both the voltage clamping circuit and the current mirror are insensitive to the total dose irradiation.

2. The adaptive total dose effect hardening circuit according to claim 1, characterized in that: The voltage clamping circuit includes an operational amplifier and a MOSFET. n1 The non-inverting input of the operational amplifier is connected to the radiation-sensitive point to be compensated, and its inverting input is connected to the MOSFET M. n1 The source and MOSFET M n2 The drain is connected, and its output terminal is connected to the MOSFET M. n1 Gate connection; MOSFET M n1 The drain of the device is connected to the current mirror.

3. The adaptive total dose effect hardening circuit according to claim 1, characterized in that: The current mirror includes a MOSFET M p1 and M p2 ; MOS transistor M p1 The source is connected to the power supply, and its gate is connected to its drain and the MOSFET M. p2 The gate of the MOSFET and the voltage clamping circuit are connected; MOSFET M p2 The source is connected to the power supply, and its drain is connected to the radiation-sensitive point to be compensated.

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