A differential ring oscillator with low voltage operation capability

Abstract

The application discloses a differential ring oscillator with low-voltage working capability in the technical field of integrated circuits, and a delay unit of the oscillator comprises an input pair tube M3, a current source tube M4, a cross-coupled pair tube M1 and a load tube M2. The low-voltage differential delay unit disclosed by the application uses a single-side structure of an NMOS input tube matched with a PMOS current source, and retains output capability in the case of two-layer stacking; the left and right branches with the same structure are coupled by using the cross-coupled pair tube to construct differential output capability; the M2 tube connected by a diode is added as a load, the working interval of the current source tube is ensured, the ring oscillator constructed after the cascade of the delay units not only has low-voltage working capability, but also has linear voltage tuning gain, and the number of stages of the oscillator can be as low as two.

Description

Technical Field

[0001] This invention discloses a differential ring oscillator with low-voltage operating capability, specifically in the field of integrated circuit technology. Background Technology

[0002] Oscillators are an important source of clock signals, providing stable oscillation signals with stable output frequency and amplitude, and are used in various circuits. As the most common oscillator structure, the ring oscillator has many advantages, such as a wide tuning range, extremely small chip footprint, and the ability to provide multi-phase output.

[0003] Traditional low-voltage ring oscillators (ROs) are limited by the nonlinearity of tuning gain (Kvco) and high power consumption. The control transistor in the delay unit will periodically turn on and off with the operation of the ring oscillator (RO), losing the good power supply noise suppression properties provided by the constant current source, making it difficult to obtain linear tuning gain (Kvco). Alternatively, due to the large number of stacked transistors, the power supply voltage for normal operation is large, making it difficult to meet the design requirements of low power consumption.

[0004] Currently, the delay units of traditional ring oscillators are typically composed of stacked multi-layer transistors, such as a three-layer architecture consisting of a current source, an input pair, and a load transistor. Such a multi-layer architecture has certain requirements on the minimum power supply voltage, which is not conducive to low-power design. Some structures reduce the power supply voltage requirement by removing the current source transistor, but this will lead to a decrease in the circuit's ability to suppress power supply noise. Summary of the Invention

[0005] The purpose of this invention is to provide a differential ring oscillator with low-voltage operating capability, addressing the aforementioned issue in the background art where the delay units of conventional ring oscillators typically consist of stacked multi-layer transistors, such as a three-layer architecture consisting of a current source, an input pair, and a load transistor. This multi-layer architecture imposes certain requirements on the minimum power supply voltage, which is detrimental to low-power designs. While some structures reduce the power supply voltage requirement by removing the current source transistor, this leads to a decrease in the circuit's ability to suppress power supply noise.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a differential ring oscillator with low-voltage operating capability, the method comprising the following steps:

[0007] Step 1: Use NMOS transistor M3 as the input device for the left branch and PMOS transistor M4 as the current source device for the left branch.

[0008] Step 2: Construct the right branch using the same M3 and M4 pipes;

[0009] Step 3: Use a cross-coupling unit consisting of two identical NMOS transistors M1 to couple the left and right branches together;

[0010] Step 4: Add NMOS transistors M2 with their gate and drain shorted to both the left and right branches to serve as part of the load of the delay unit;

[0011] Step 5, the transfer function of the half-circuit of the delay unit is as follows;

[0012]

[0013] The output impedance of M4 is neglected, and C in the formula is... L The total capacitance of the output node;

[0014] Step Six: Construct a two-stage ring oscillator by cascading two of the above delay units. The transfer function of this two-stage ring oscillator circuit is:

[0015]

[0016] Step 7: Set the denominator to 0 to satisfy the Barkhausen criterion, then the location of the conjugate poles can be determined as follows:

[0017]

[0018] in:

[0019]

[0020] It is evident that as long as g is guaranteed in the design of the delay unit... m1 >g m2 The conjugate poles will then be located in the right half of the complex plane; according to the Barkhausen criterion, the two-stage differential ring oscillator constructed by the low-voltage differential delay unit will oscillate stably at g. m3 / 2πC L This frequency;

[0021] The oscillation frequency and tuning gain of the constructed two-stage differential ring oscillator circuit can be calculated as follows:

[0022]

[0023]

[0024] Where α is the current ratio, α=W3 / (W1+W2+W3), and W1, W2, and W3 are the gate widths of the cross-coupled transistor, the diode load, and the input pair, respectively;

[0025] Combining equations (5) and (6), for f OSC About V LPFThe tuning gain can be obtained by taking the partial derivative.

[0026]

[0027] The two-stage differential ring oscillator circuit according to equation (7) achieves linear tuning gain.

[0028] Preferably, in steps one to four, the transistors are input transistors, cross-coupled transistors, and load transistors of the same type.

[0029] Preferably, the low-voltage differential delay unit circuit uses a load transistor M2 with a gate-drain short-circuit configuration.

[0030] Preferably, a ring oscillator is constructed by cascading an even number of, but not limited to, two, low-voltage delay units.

[0031] Preferably, the constructed ring oscillator can operate under different power supply voltages, and its oscillation frequency, tuning gain, and phase noise are only related to the current consumed.

[0032] Compared with existing linearly tuned gain techniques, the advantages of this invention are: this low-supply-voltage differential ring oscillator circuit solves the problem of high supply voltage required by traditional ring oscillators. By employing a delay unit with only two stacked transistor layers, it achieves operation at low supply voltages, thus saving power consumption. This invention also supports the construction of two-stage ring oscillators to further reduce power consumption. Compared with existing low-voltage techniques, the advantages of this invention are: the introduction of a gate-drain short-circuit structure in the load of the delay unit ensures the reliability of the current source transistor. During ring oscillator operation, a conducting current source path is always maintained, achieving linearly tuned gain, truly preserving the current source transistor, and improving the circuit's power supply noise suppression capability. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the low power supply voltage delay unit structure proposed in this invention;

[0034] Figure 2 This is a schematic diagram of the two-stage ring oscillator and its equivalent model constructed based on the proposed delay unit in this invention;

[0035] Figure 3 This is a schematic diagram of a current-starved ring oscillator;

[0036] Figure 4 This is a schematic diagram of a current-mode logic delay cell;

[0037] Figure 5 This is a schematic diagram of the voltage-controlled gain (Kvco) of the oscillator;

[0038] Figure 6This is a tailless current source type differential delay unit based on cross-coupled transistors. Detailed Implementation

[0039] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0040] Please see Figure 1-6 This invention provides a technical solution: a differential ring oscillator with low-voltage operating capability and a low-supply-voltage delay unit for constructing it, comprising:

[0041] Step 1: Use NMOS transistor M3 as the input device for the left branch and PMOS transistor M4 as the current source device for the left branch.

[0042] Step 2: Construct the right branch using the same M3 and M4 pipes;

[0043] Step 3: Use a cross-coupling unit consisting of two identical NMOS transistors M1 to couple the left and right branches together;

[0044] Step 4: Add NMOS transistors M2 with their gate and drain shorted to both the left and right branches to serve as part of the load of the delay unit;

[0045] Step 5, the transfer function of the half-circuit of the delay unit is as follows;

[0046]

[0047] The output impedance of M4 is neglected, and C in the formula is... L The total capacitance of the output node;

[0048] Step Six: Construct a two-stage ring oscillator by cascading two of the above delay units. The transfer function of this two-stage ring oscillator circuit is:

[0049]

[0050] Step 7: Set the denominator to 0 to satisfy the Barkhausen criterion, then the location of the conjugate poles can be determined as follows:

[0051]

[0052] in:

[0053]

[0054] In the design of the delay unit, ensure g m1 >g m2 At this point, the two-stage differential ring oscillator constructed by the low-voltage differential delay unit will oscillate stably at g. m3 / 2πC L This frequency;

[0055] The oscillation frequency and tuning gain of the constructed two-stage differential ring oscillator circuit can be calculated as follows:

[0056]

[0057]

[0058] Where α is the current ratio, α=W3 / (W1+W2+W3), and W1, W2, and W3 are the gate widths of the cross-coupled transistor, the diode load, and the input pair, respectively;

[0059] Combining equations (5) and (6), for f OSC About V LPF The tuning gain can be obtained by taking the partial derivative.

[0060]

[0061] The two-stage differential ring oscillator circuit according to equation (7) achieves linear tuning gain. NMOS transistor M3 is used as the input device of the left branch, PMOS transistor M4 is used as the current source device of the left branch, the same M3 and M4 transistors are used to construct the right branch, a cross-coupling unit composed of two identical NMOS transistors M1 is used, and NMOS transistors M2 with gate and drain shorted are added in the left and right branches.

[0062] like Figure 2 As shown, as described above, Figure 1 The two-stage low-voltage ring oscillator circuit shown, constructed by cascading low-supply-voltage delay units, ensures g in the design of the delay units. m1 >g m2 At this point, the two-stage differential ring oscillator constructed by the low-voltage differential delay unit will oscillate stably at g. m3 / 2πC L This frequency.

[0063] The oscillation frequency and tuning gain of the constructed two-stage differential ring oscillator circuit can be calculated as follows:

[0064]

[0065]

[0066] Where α is the current ratio, α=W3 / (W1+W2+W3), and W1, W2, and W3 are the gate widths of the cross-coupled transistor, the diode load, and the input pair, respectively;

[0067] Combining equations (5) and (6), for f OSC About V LPF The tuning gain can be obtained by taking the partial derivative.

[0068]

[0069] The two-stage differential ring oscillator circuit according to equation (7) achieves linear tuning gain.

[0070] In steps one through three, the cross-coupling method provides the differential operating mode. A ring oscillator is a closed-loop negative feedback structure composed of multiple cascaded delay units. Depending on the type of delay unit, it is divided into single-ended inverter ring oscillators and differential delay unit ring oscillators. The delay units can be differential current-mode structures, current-starved structures, PMOS cross-coupled pseudo-differential delay units, NMOS cross-coupled structures, or pseudo-differential delay units using substrate tuning technology. For example... Figure 3 As shown, a ring oscillator (RO) composed of cascaded current-starved inverters as delay units achieves linear modulation characteristics by introducing a controllable charge and discharge current source. For this part, please refer to the article "Analysis and design of current-starved ring VCO", 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT), Chennai, India, 2016, pp. 3222-3227, by Shruti Suman et al. Compared with single-ended inverter ring oscillators, differential delay unit ring oscillators exhibit better suppression of common-mode noise and power supply noise, and can generate more phase output signals, thus having a wider range of applications.

[0071] The delay units constructed in steps one through three consist of only two stacked layers of devices and can operate at low supply voltages. The power consumption of the oscillator is the sum of the power consumption of all its delay units, which is determined by the product of the supply voltage (VDD) and the current it consumes. Therefore, if the oscillation frequency and noise performance can be maintained while reducing the supply voltage, a low-power, high-performance ring oscillator design can be achieved. Figure 4As shown, ring oscillators composed of cascaded delay units with differential current modes or similar structures have good common-mode noise suppression capabilities. However, the stacking of three layers of transistors—tail current source transistor, input pair transistor, and load—in the delay unit structure limits its minimum operating power supply voltage. Differential delay units using other load types, such as diode loads, controlled source loads, or symmetrical loads, all have similar advantages and disadvantages. For this part, please refer to, for example, the article "A Low-Power Quadrature Local Oscillator Using Current-Mode-Logic Ring Oscillator and Frequency Triplers" by Yu-ShengLin et al., in IEEE Microwave and Wireless Components Letters, vol.23, no.12, pp.650-652.

[0072] Linearity characterizes how linear the output frequency of a voltage-controlled oscillator (VCO) is with respect to changes in control voltage. For example... Figure 5 As shown, the derivative of the relationship between the oscillation frequency of the oscillator and the control voltage (or current) is named the voltage-controlled gain (K). VCO This value is usually expected to be a constant.

[0073] Step four introduces a diode load with its gate and drain shorted, ensuring a constant current source path for the resulting ring oscillator during operation. This guarantees the current source transistor always operates within its saturation region—thus improving not only the suppression of power supply and common-mode noise but also making the oscillation frequency and phase noise performance independent of the power supply voltage. The ring oscillator circuit composed of this delay unit also possesses linearly tuned gain. For example... Figure 6 As shown, by introducing a PMOS cross-coupling structure, differential output can be maintained even when the tail current source transistor is removed. This two-layer structure can operate at a lower supply voltage (VDD) and can provide a rail-to-rail output voltage range. However, its current source transistor will periodically enter the linear region, causing the tuning gain to become non-linear. For this part, see, for example, the article "A low-noise fast-lockphase-locked loop with adaptive bandwidth control" by Joonsuk Lee et al., in IEEE Journal of Solid-State Circuits, vol.35, no.8, pp.1137-1145.

[0074] For ease of understanding, the following terms are explained:

[0075] Delay unit: Used in circuits to provide a delay for large-swing input signals, it is a special type of buffer unit; typically, the delay value of the delay unit needs to be adjustable.

[0076] Ring oscillator: A ring oscillator is a circuit that generates a periodic oscillating electrical signal after power-on due to circuit noise and other conditions meeting certain conditions. It is a closed-loop negative feedback structure composed of multiple cascaded delay units.

[0077] Ring oscillator (RO), cross-coupled pair (M1), diode load (M2), input pair (M3), tuning gain (Kvco), differential current mode (CML), and power supply voltage (VDD).

[0078] Although the invention has been described above with reference to embodiments, various modifications can be made and components can be replaced with equivalents without departing from the scope of the invention. In particular, features in the embodiments disclosed herein can be combined in any way, provided there is no structural conflict. The lack of an exhaustive description of these combinations in this specification is merely for brevity and resource conservation. Therefore, the invention is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A differential ring oscillator with low-voltage operating capability, characterized in that: The delay unit is composed of two stacked transistors, enabling it to operate at extremely low supply voltages. Furthermore, a suitable load structure allows the ring oscillator constructed from this delay unit to exhibit a linear voltage regulation gain (K). VCO ), The steps are as follows: Step 1: Use NMOS transistor M3 as the left branch input device, with its gate receiving the left input signal V. IP With its source grounded, a PMOS transistor M4 is used as the current source for the left branch, and its gate receives the control signal V. LPF The source is connected to the power supply, and the drain of M4 is connected to the drain of M3. The connection point serves as the left output node V. ON ; Step 2: Construct the right branch using the same M3 and M4 transistors. The gate of the right M3 transistor receives the right input signal V. IN The gate of the right M4 is connected to the same V as the gate of the left M4. LPF The drain connected to M3 and M4 on the right is the right output node V. OP ; Step 3: Use a cross-coupled unit consisting of two identical NMOS transistors M1, i.e., connect the gate of the left branch M1 to the drain of the right branch M1, and connect the gate of the right branch M1 to the drain of the left branch M1. The sources of both M1 are grounded. Then connect the drain of the left branch M1 to the aforementioned left output node V. ON The drain of the right branch M1 is connected to the aforementioned right output node V. OP This couples the left and right branches together, hence V at this time IP and V IN V OP and V ON They all exhibit a difference relationship; Step 4: Connect NMOS transistors M2 with their gate and drain shorted to the output nodes of both the left and right branches to act as part of the load of the delay unit. The sources of both M2 transistors are grounded. Step 5, the transfer function of the half-circuit of the delay unit is as follows; （1）； The output impedance of M4 is neglected in the formula, where C L The total capacitance of the output node; Step Six: Construct a two-stage ring oscillator using two of the above-mentioned delay units cascaded together, i.e., the first stage V ON Connected to the second level V IP Level 1 V OP Connected to the second level V IN And the second level V ON Connected to the first level V IN Level 2 V OP Connected to the first level V IP Then the transfer function of this two-stage ring oscillator circuit is: （2）； Step 7: Set the denominator to 0 to satisfy the Barkhausen criterion, then the location of the conjugate poles can be determined as follows: （3）； in: （4）； It is evident that as long as g is guaranteed in the design of the delay unit... m1 >g m2 The conjugate poles will then be located in the right half of the complex plane; according to the Barkhausen criterion, the two-stage differential ring oscillator constructed by the low-voltage differential delay unit will oscillate stably at g. m3 / 2πC L This frequency; The oscillation frequency and tuning gain of the constructed two-stage differential ring oscillator circuit can be calculated as follows: （5）； （6）； Where α is the current ratio, α=W3 / (W1+W2+W3), and W1, W2, and W3 are the gate widths of the cross-coupled transistor, the diode load, and the input pair, respectively; Combining equations (5) and (6), for f OSC About V LPF The tuning gain can be obtained by taking the partial derivative. （7）； The two-stage differential ring oscillator circuit according to equation (7) achieves linear tuning gain.

2. A differential ring oscillator with low-voltage operating capability according to claim 1, characterized in that: In steps one through four, the transistors are of the same type: input transistors, cross-coupled transistors, and load transistors.

3. A differential ring oscillator with low-voltage operating capability according to claim 1, characterized in that: The load transistor M2 was used in the form of a gate-drain short circuit.

4. A differential ring oscillator with low-voltage operating capability according to claim 1, characterized in that: A ring oscillator constructed using cascaded even-number stages of low-voltage delay units.

5. A differential ring oscillator with low-voltage operating capability according to claim 1, characterized in that: The oscillator can operate under different power supply voltages, and its oscillation frequency, tuning gain, and phase noise are only related to the current consumed.

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