Air bridge and method of manufacturing the same, quantum chip
Patent Information
- Application Number
- CN202310847833.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-11
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2043-07-11
AI Technical Summary
[0004]本发明的目的是提供一种空气桥及其制造方法、量子芯片,以解决现有技术中空气桥容易断裂或坍塌的问题,能够避免空气桥断裂或坍塌
[0028]区别于现有技术的情况,本发明提供的空气桥的制造方法在衬底上沉积低损耗介质材料作为支撑层,在支撑层的上表面和面向两个超导薄膜的两侧表面镀膜,形成超导桥体,以及在两个超导薄膜上镀膜,形成与超导桥体连接的超导垫,支撑层损耗低,不需要去除,不会对量子芯片的性能造成影响,可以支撑超导桥体,从而能够避免空气桥断裂或坍塌,并且超导桥体和超导垫镀膜后,无需刻蚀,因而不存在过刻的问题。
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Figure CN117177656B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of quantum chip manufacturing technology, and in particular to an air bridge and its manufacturing method, and a quantum chip. Background Technology
[0002] Quantum chips are designed with numerous ground planes. Adjacent ground planes are insulated from each other by signal transmission lines. To ensure the decoherence time of the quantum chip is not affected, adjacent ground planes must maintain the same potential. Besides ground planes, other such regions may exist on the quantum chip: for example, connections between two signal transmission lines or connections between conductive regions when two chips need to be cascaded. To achieve these connections, air bridges are introduced in existing processes.
[0003] Current air bridge manufacturing processes involve forming an arched photoresist layer on a substrate, depositing metal on the photoresist, patterning and etching the metal, and finally removing the photoresist through ultrasonic cleaning or similar methods. The resulting metal structure becomes the air bridge. However, because these air bridges lack support, their structural stability is very poor, making them prone to breakage or collapse. Furthermore, the etching of the metal typically employs wet or dry etching methods, which, due to uneven etching and unstable etching rates, can easily lead to over-etching, damaging the metal components that need to be connected. Summary of the Invention
[0004] The purpose of this invention is to provide an air bridge and its manufacturing method, as well as a quantum chip, to solve the problem that air bridges in the prior art are prone to breakage or collapse, and to avoid the breakage or collapse of air bridges.
[0005] To address the aforementioned technical problems, this invention provides an air bridge for forming superconducting connections on a quantum chip substrate, comprising:
[0006] A support layer covers the insulating gap region between two superconducting thin films on the substrate, and the material of the support layer is a low-loss dielectric material.
[0007] A superconducting bridge is formed on the upper surface of the support layer and on both sides facing the two superconducting films, and its two ends are respectively connected to the first superconducting film and the second superconducting film.
[0008] Preferably, the low-loss dielectric material is amorphous germanium, α-silicon, or silicon nitride.
[0009] Preferably, the upper surface of the support layer is parallel to the plane defined by the surfaces of the two superconducting thin films.
[0010] Preferably, the two side surfaces of the support layer are perpendicular to the upper surface.
[0011] Preferred options also include:
[0012] Two superconducting pads are formed on the two superconducting thin films and are connected to both sides of the superconducting bridge body, respectively.
[0013] To address the aforementioned technical problems, the present invention also provides a quantum chip, comprising:
[0014] Substrate;
[0015] Two superconducting thin films are formed on the substrate, and an insulating spacer region is provided between the two superconducting thin films;
[0016] The aforementioned air bridge.
[0017] Preferably, the insulating gap region has a superconducting band that is not connected to the two superconducting thin films and is covered by the support layer, and the two superconducting thin films and the superconducting band form a coplanar waveguide.
[0018] To address the aforementioned technical problems, the present invention also provides a method for manufacturing an air bridge, wherein the air bridge is used to form a superconducting connection on a quantum chip, and the manufacturing method includes:
[0019] A substrate and two superconducting thin films with insulating spacer regions formed on the substrate are provided;
[0020] A low-loss dielectric material is deposited in the insulating interval region to form a support layer covering the insulating interval region;
[0021] A superconducting bridge is formed on the upper and side surfaces of the support layer by coating.
[0022] Preferably, while forming a superconducting bridge on the upper surface of the support layer and the two sides facing the two superconducting thin films through coating, a superconducting pad connected to the superconducting bridge is formed on the two superconducting thin films.
[0023] Preferably, while forming superconducting bridges on the upper surface of the support layer and on both sides facing the two superconducting thin films, forming superconducting pads connected to the superconducting bridges on the two superconducting thin films includes:
[0024] A lower layer of photoresist and an upper layer of photoresist with a development speed lower than that of the lower layer of photoresist are coated on the substrate;
[0025] The upper and lower photoresist layers are exposed and developed to form a first opening in the upper photoresist layer and a second opening with a width greater than the first opening in the lower photoresist layer, so as to expose the support layer and a portion of the superconducting film on both sides of the first opening.
[0026] Through the first opening of the coating, a superconducting bridge is formed on the upper surface and both sides of the support layer, and a superconducting pad connected to the superconducting bridge is formed on the two superconducting films, wherein the thickness of the superconducting pad does not exceed the thickness of the lower photoresist layer.
[0027] The upper and lower layers of photoresist are peeled off.
[0028] Unlike existing technologies, the air bridge manufacturing method provided by this invention involves depositing a low-loss dielectric material as a support layer on a substrate, coating the upper surface of the support layer and the two side surfaces facing the two superconducting thin films to form a superconducting bridge body, and coating the two superconducting thin films to form a superconducting pad connected to the superconducting bridge body. The support layer has low loss and does not need to be removed, so it will not affect the performance of the quantum chip. It can support the superconducting bridge body, thereby preventing the air bridge from breaking or collapsing. Furthermore, after coating the superconducting bridge body and the superconducting pad, no etching is required, so there is no problem of over-etching.
[0029] The air bridge and quantum chip provided by this invention belong to the same inventive concept and have the same technical effects as the aforementioned air bridge manufacturing method, and will not be described again here. Attached Figure Description
[0030] Figure 1 This is a schematic diagram of the structure of an air bridge provided in an embodiment of the present invention.
[0031] Figure 2 for Figure 1 The cross-sectional view of the air bridge along direction AA is shown.
[0032] Figure 3 This is a schematic diagram of another form of quantum chip provided in an embodiment of the present invention.
[0033] Figure 4 This is a schematic diagram of the manufacturing method of the air bridge provided in an embodiment of the present invention. Detailed Implementation
[0034] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0035] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0037] Please refer to Figure 1 and Figure 2 This invention provides an air bridge. The air bridge is used to form a superconducting connection on the substrate of a quantum chip. The air bridge includes a support layer 11 and a superconducting bridge body 12.
[0038] A support layer 11 covers the insulating gap region between the two superconducting thin films 30 on the substrate 20. The support layer 11 is made of a low-loss dielectric material. The two superconducting thin films 30 are separated by the insulating gap region. This insulating gap region may contain other circuitry of the quantum chip, or it may be completely bare, exposing the substrate 20. The low-loss dielectric material has virtually no impact on the signal transmission of the superconducting thin films 30, and therefore does not affect the decoherence time of the quantum chip. The low-loss dielectric material can be amorphous germanium, α-silicon, or silicon nitride, etc.
[0039] The support layer 11 determines the span width of the air bridge; by increasing the width of the support layer 11, the span width of the air bridge can be increased. In this embodiment, the support layer 11 can extend to both sides of the insulating spacer region, covering a portion of the two superconducting films 30, thereby increasing the span width of the air bridge.
[0040] The superconducting bridge 12 is formed on the upper surface of the support layer 11 and on both sides facing the two superconducting thin films 30, and its two ends are respectively connected to the two superconducting thin films 30. The superconducting bridge 12 is attached to the upper surface and both sides of the support layer 11, that is, the inner contour of the superconducting bridge 12 is the outer contour of the support layer 11, so the support layer 11 provides support for the superconducting bridge 12.
[0041] In this embodiment, the air bridge also includes two superconducting pads 13. The two superconducting pads 13 are respectively formed on two superconducting thin films 21 and are respectively connected to both sides of the superconducting bridge body 12. The superconducting pads 13 can indirectly increase the contact area between the superconducting bridge body 12 and the superconducting thin film 30, thereby increasing the structural strength of the superconducting bridge body 12.
[0042] In this embodiment, the air bridge supports the superconducting bridge body through a support layer, preventing the superconducting bridge body from breaking or collapsing. Furthermore, the support layer has low loss and will not affect the performance of the quantum chip.
[0043] In some embodiments of this application, the upper surface of the support layer 11 is parallel to the plane defined by the surfaces of the two superconducting thin films 30. Since the plane containing the surfaces of the two superconducting thin films 30 is parallel to the upper surface of the support layer 11, the portion of the superconducting bridge 12 located on the upper surface of the support layer 11 is also parallel to the two superconducting thin films 30.
[0044] Furthermore, the two side surfaces of the support layer 11 are perpendicular to the upper surface. Thus, the portion of the superconducting bridge 12 located on the two side surfaces of the support layer 11 is also perpendicular to the two superconducting thin films 30, making the superconducting bridge 12 form a frame structure with higher structural stability.
[0045] Both the superconducting bridge 12 and the superconducting pad 13 are formed of superconducting materials. The thickness of the superconducting bridge 12 can be the same as the thickness of the superconducting pad 13, which facilitates simultaneous fabrication in the process, such as simultaneous coating to form the superconducting bridge 12 and the superconducting pad 13.
[0046] Please refer to this again. Figure 1 and Figure 2 This invention also provides a quantum chip. The quantum chip includes a substrate 20, two superconducting thin films 30, and an air bridge as described in the previous embodiment. The air bridge forms a superconducting connection between the two superconducting thin films 30.
[0047] Because of its supporting structure, the length of the superconducting bridge body 12 of the air bridge can be arbitrarily set, such as... Figure 1 As shown, the superconducting bridge body 12 is long enough to form a long tunnel air bridge.
[0048] The two superconducting thin films 30 can form components such as resonators, filters, and capacitors. For example, in a specific application, the two superconducting thin films 30 serve as part of a coplanar waveguide. Specifically, the insulating gap region has a superconducting band 40 that is not connected to the two superconducting thin films 30 and is covered by the support layer 11. The two superconducting thin films 30 and the superconducting band 40 form a coplanar waveguide. The superconducting band 40 serves as the central conductor of the coplanar waveguide, and the two superconducting thin films 30 serve as ground planes on both sides of the central conductor.
[0049] Besides forming a single coplanar waveguide transmission line, two superconducting thin films 30 can also form two or more coplanar waveguide transmission lines, such as... Figure 3 The diagram shown is a schematic of another form of quantum chip. In this quantum chip, the insulating gap region between the two superconducting thin films 30 has two superconducting bands 40, and there is also a common ground plane 50 between the two superconducting bands 40. The common ground plane 50 serves as the common ground plane for the two superconducting bands 40, and the two superconducting thin films 30 and the common ground plane 50 together serve as the ground planes on both sides of the two superconducting bands 40.
[0050] Furthermore, quantum chips can include multiple air bridges, for example... Figure 3 In the quantum chip, there are 3 air bridges, and the 3 air bridges share a support layer 11.
[0051] Please refer to Figure 4 This invention provides a method for manufacturing an air bridge, which is used to form a superconducting connection on a substrate of a quantum chip. The manufacturing method includes the following steps:
[0052] S1: Provides a substrate and two superconducting thin films formed on the substrate with insulating spacer regions.
[0053] Among them, such as Figure 4 Figure a shows a schematic diagram of the substrate. Two superconducting thin films 30 are formed on the substrate 20, and there is an insulating gap between the two superconducting thin films 30.
[0054] S2: Deposit low-loss dielectric material in the insulation gap area to form a support layer covering the insulation gap area.
[0055] The support layer can be formed using masks such as photoresists. First, a low-loss dielectric material is deposited on the substrate covering two superconducting thin films and an insulating spacer region, such as... Figure 4 Figure b shows a schematic diagram after low-loss dielectric material has been deposited on the substrate. The low-loss dielectric material completely covers the entire area of the substrate.
[0056] Then, a mask corresponding to the pattern of the support layer is fabricated on a low-loss dielectric material. For example... Figure 4 Figure c shows a schematic diagram after the mask is formed on the substrate. The size of the mask M is the same as the size of the support layer to be fabricated. The mask M is preferably a photoresist.
[0057] Finally, a mask is used to etch the exposed low-loss dielectric material, and the mask is removed after etching is complete. For example... Figure 4Figure d shows a schematic diagram after the support layer is formed on the substrate. The low-loss dielectric material outside the mask M is etched, leaving the support layer 11. In this embodiment, the low-loss dielectric material is amorphous germanium, and the superconducting thin film 30 is made of aluminum. During etching, a RIE (reactive ion etching) process can be used, and an F-based gas (CF4 or SF6) can be used as the etching gas to etch the low-loss dielectric material. The etching rate of F-based gas for germanium differs significantly from that for aluminum, allowing for complete etching of germanium without damaging the superconducting thin film 30.
[0058] S3: A superconducting bridge is formed on the upper surface of the support layer and on both sides facing the two superconducting thin films by coating.
[0059] Among them, such as Figure 4 Figure h shows a schematic diagram of the deposition process to form a superconducting bridge and a superconducting pad. After deposition, a layer of superconducting metal is deposited on the upper surface of the support layer 11 and on both sides facing the two superconducting thin films 30 to form a superconducting bridge 12. In this embodiment, while forming the superconducting bridge on the upper surface of the support layer and on both sides facing the two superconducting thin films through deposition, a superconducting pad connected to the superconducting bridge is formed on the two superconducting thin films. Figure 4 As shown in Figure h, while the superconducting bridge 12 is being formed, a layer of superconducting metal is also deposited on the two superconducting thin films 30 to form a superconducting pad 11. The superconducting pad 13 is connected to the superconducting bridge 12 as a whole.
[0060] To directly deposit and form the superconducting bridge 12 and superconducting pad 13, without etching them after deposition, in some embodiments of this application, the step of forming the superconducting bridge on the upper surface of the support layer and the two side surfaces facing the two superconducting films by deposition includes:
[0061] S31: Coating a lower layer of photoresist and an upper layer of photoresist with a development speed lower than that of the lower layer of photoresist onto the substrate.
[0062] Among them, such as Figure 4 Figure e shows a schematic diagram after two layers of photoresist are coated on the substrate. The lower photoresist is Pd, and the upper photoresist is Pu.
[0063] S32: Expose and develop the upper and lower photoresist layers to form a first opening in the upper photoresist layer and a second opening with a width greater than the first opening in the lower photoresist layer, so as to expose the support layer and a portion of the superconducting thin film on both sides of the first opening.
[0064] Among them, such as Figure 4Figure f shows a schematic diagram after developing two layers of photoresist. The two photoresist layers have the same exposure pattern. During development, because the development speed of the lower photoresist Pd is greater than that of the upper photoresist Pu, the dissolution speed of the exposed area of the lower photoresist Pd is greater than that of the exposed area of the upper photoresist Pu. As a result, the opening width of the first opening W1 formed by the upper photoresist Pu is smaller than the opening width of the second opening W2 formed by the lower photoresist Pd.
[0065] S33: Through the first opening, a superconducting bridge is formed on the upper surface and both sides of the support layer, and a superconducting pad connected to the superconducting bridge is formed on the two superconducting films, wherein the thickness of the superconducting pad does not exceed the thickness of the underlying photoresist.
[0066] Among them, such as Figure 4 Figure g shows a schematic diagram after coating through the first opening. The support layer 11 and portions of the superconducting thin film 30 on both sides are exposed within the first opening W1. Therefore, during coating, the exposed areas will be coated with superconducting metal. Since the opening width of the second opening W2 is greater than the opening width of the first opening W1, the superconducting pad 13 can only reach a maximum width flush with the sidewall of the first opening W1, thus avoiding contact with the sidewall of the second opening W2. Furthermore, since the thickness of the superconducting pad 13 does not exceed the thickness of the underlying photoresist Pd, the superconducting pad 13 will also not contact the sidewall of the first opening W1.
[0067] S34: Peel off the top and bottom layers of photoresist.
[0068] Among them, such as Figure 4 As shown in g, when peeling off the double-layer photoresist, since the superconducting pad 13 does not contact the sidewall of the second opening W2 or the sidewall of the first opening W1, the peeling off of the photoresist will not damage the superconducting pad 13 and the superconducting bridge 12, and the photoresist can be peeled off more easily.
[0069] Since the surface of the superconducting thin film 30 is easily oxidized to form oxides after contact with air, in order to avoid the oxides hindering the electrical connection, in this embodiment, before coating through the first opening, i.e. before step S33, the method further includes: removing the oxides from the surfaces of the two superconducting thin films within the first opening.
[0070] Among them, such as Figure 4 As shown in Figure f, after the first opening W1 and the second opening W2 are formed, the superconducting thin film 30 easily comes into contact with air, thereby forming oxides on its surface. Therefore, it is necessary to remove the oxides from the surfaces of the two superconducting thin films. In this embodiment, an IBE (ion beam etching) process is preferably used to remove the oxides.
[0071] The air bridge manufacturing method in this embodiment does not require etching the superconducting metal after coating, thus avoiding the over-etching problem in existing processes. The support layer does not need to be removed after coating, ensuring the superconducting bridge remains supported and maintaining structural stability, preventing breakage or collapse. Furthermore, the support layer is a low-loss dielectric material, which will not affect the performance of the quantum chip.
[0072] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0073] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.
Claims
1. An air bridge for forming superconducting connections on a substrate of a quantum chip, characterized in that, include: A support layer covers the insulating spacer region between two superconducting thin films on the substrate. The support layer is made of a low-loss dielectric material, such as amorphous germanium, α-silicon, or silicon nitride. A superconducting bridge is formed on the upper surface and both sides of the support layer, and its two bottom ends are respectively connected to the two superconducting thin films; The support layer is not removed after the superconducting bridge body is formed.
2. The air bridge according to claim 1, characterized in that, The upper surface of the support layer is parallel to the plane defined by the surfaces of the two superconducting thin films.
3. The air bridge according to claim 2, characterized in that, The two side surfaces of the support layer are perpendicular to the upper surface.
4. The air bridge according to claim 1, characterized in that, Also includes: Two superconducting pads are formed on the two superconducting thin films and are connected to both sides of the superconducting bridge body, respectively.
5. A quantum chip, characterized in that, include: Substrate; Two superconducting thin films are formed on the substrate, and an insulating spacer region is provided between the two superconducting thin films; The air bridge according to claim 1 or 2.
6. The quantum chip according to claim 5, characterized in that, The insulating gap region has a superconducting band that is not connected to the two superconducting thin films and is covered by the support layer. The two superconducting thin films and the superconducting band form a coplanar waveguide.
7. A method for manufacturing an air bridge, wherein the air bridge is used to form a superconducting connection on a substrate of a quantum chip, characterized in that, The manufacturing method includes: A substrate and two superconducting thin films with insulating spacer regions formed on the substrate are provided; A low-loss dielectric material is deposited in the insulating interval region to form a support layer covering the insulating interval region. The low-loss dielectric material is amorphous germanium, α-silicon, or silicon nitride. By coating, two superconducting bridges are formed on the upper and side surfaces of the support layer, with their bottom ends respectively connected to the two superconducting thin films; The support layer is not removed after the superconducting bridge body is formed.
8. The manufacturing method according to claim 7, characterized in that, By coating, two superconducting bridges are formed on the upper and side surfaces of the support layer, with their bottom ends respectively connected to the two superconducting thin films. At the same time, superconducting pads are formed on the two superconducting thin films, which are connected to the two sides of the superconducting bridges.
9. The manufacturing method according to claim 8, characterized in that, The process involves forming two superconducting bridges, each with its bottom end connected to the two superconducting thin films, on the upper and side surfaces of the support layer through film deposition, while simultaneously forming superconducting pads on the two superconducting thin films that are connected to the sides of the superconducting bridges. This includes: A lower layer of photoresist and an upper layer of photoresist with a development speed lower than that of the lower layer of photoresist are coated on the substrate; The upper and lower photoresist layers are exposed and developed to form a first opening in the upper photoresist layer and a second opening with a width greater than the first opening in the lower photoresist layer, so as to expose the support layer and a portion of the superconducting film on both sides of the first opening. Through the first opening of the coating, two superconducting bridges are formed on the upper surface and the two side surfaces of the support layer, respectively, and the bottom ends of the bridges are respectively connected to the two superconducting films. A superconducting pad is formed on the two superconducting films and connected to the two sides of the superconducting bridges. The thickness of the superconducting pad does not exceed the thickness of the lower photoresist layer. The top and bottom layers of photoresist are peeled off.
Citation Information
Patent Citations
Method for fabricating capacitor in semiconductor device
KR1020080088276A
Superconducting vias for routing electrical signals through substrates and their methods of manufacture
US11276727B1