Data processing method and device, processing chip, electronic equipment and storage medium

Abstract

The present disclosure provides a data processing method and device, a processing chip, an electronic device and a storage medium. The method comprises: in response to a registration request of an application domain in two or more processor cores, establishing a connection with the application domain based on registration information in the registration request; in response to detecting a first security function event, notifying all application domains in the two or more processor cores of the first security function event; in response to the notification of the first security function event, enabling a data collection function for the first security function event, collecting first data related to the first security function event; in response to a processing instruction, calling the first data, and determining a processing procedure for the first security function event based on the first data. The present disclosure makes data collection and scenario coverage more comprehensive, data acquisition more timely, and expected functional safety more reliable.

Description

Technical Field

[0001] This disclosure relates to intended functional safety processing techniques for driving chips, and more particularly to a data processing method and apparatus, a processing chip, an electronic device, and a storage medium. Background Technology

[0002] Safety of the Intended Functionality (SOTIF) focuses on the safety of intended functions, that is, the safety level of functions that meet the intended design requirements. Its main purpose is to improve the safety of autonomous driving. Due to the complexity and unknown nature of the operating scenarios of autonomous vehicles, even if an autonomous driving function meets the design requirements, there may still be numerous safety risks. Existing chips used for autonomous driving cannot specifically support the implementation of SOTIF. Taking data collection as an example, improving algorithms by collecting and continuously iterating through large amounts of scenario data is one of the important aspects of implementing SOTIF. For specific SOTIF events, the perception, decision-making, and control methods running on the System-on-Chip (SOC) cannot effectively handle them and must rely on external assistance. For example, specific external modules need to send specific signals to notify the SOC to perform specific processing. Although existing SOC chips can receive signals through general-purpose input / output (GPIO) interfaces, there is a significant delay in the information transmission to the autonomous driving decision-making layer, making it ineffective. Summary of the Invention

[0003] This disclosure provides a data processing method and apparatus, a processing chip, an electronic device, and a storage medium to at least solve the above-mentioned technical problems existing in the prior art.

[0004] According to a first aspect of this disclosure, a data processing method is provided, applied in a processing chip, the processing chip including a functional event processing unit and two or more processor cores; the two or more processor cores are connected to each other via an inter-core communication channel, and each processor core supports at least one application domain; the functional event processing unit is respectively connected to the two or more processor cores; the method includes:

[0005] In response to a registration request from the application domain in one or more processor cores, a connection is established with the application domain based on the registration information in the registration request;

[0006] In response to the detection of a first security function event, the first security function event is notified to all application domains in the two or more processor cores;

[0007] In response to a notification of the first security function event, enable the data collection function for the first security function event and collect first data related to the first security function event;

[0008] In response to the processing instruction, the first data is retrieved, and the processing progress for the first security function event is determined based on the first data.

[0009] In some possible implementations, the method further includes:

[0010] Build test scenarios and identify erroneous test events under different test scenarios;

[0011] In response to the detection of a misoperation test event, the system determines that the first security function event has occurred and sends the first security function event to the input interface of the function event processing unit.

[0012] The functional event handling unit responds to an interrupt instruction by notifying all the application domains in the two or more processor cores.

[0013] In some possible implementations, the method further includes:

[0014] The first security function event, which is input from an external source, is obtained through the input interface of the function event processing unit, and then notified to all application domains in the two or more processor cores.

[0015] In some implementations, notifying all application domains of the first security function event in the two or more processor cores includes:

[0016] In response to receiving the first security function event through the input interface of the functional event processing unit, a corresponding control register message is generated for the first security function event;

[0017] Insert the control register message into the security function control message queue;

[0018] When the functional event processing unit detects that the security function control message queue is not empty, it triggers the interrupt processor to generate an interrupt instruction. In response to the interrupt instruction, it notifies all application domains in the two or more processor cores of the first security function event through the output interface of the functional event processing unit.

[0019] In some possible implementations, the collection of first data relating to the first security function event includes:

[0020] The register of the functional event processing unit is triggered to collect at least one of the following: the ID of the first security function event in the application domain where the first security function event occurred, the occurrence time, and the area information of the first security function event.

[0021] The collected first data is converted into a registered message for a security function event, and the registered message for the security function event is inserted into the security function event message queue.

[0022] According to a second aspect of this disclosure, a data processing apparatus is provided, applied in a processing chip, the processing chip including a functional event processing unit and two or more processor cores; the two or more processor cores are connected to each other via an inter-core communication channel, and each processor core supports at least one application domain; the functional event processing unit is respectively connected to the two or more processor cores; the apparatus includes:

[0023] A connection establishment unit is configured to, in response to a registration request from the application domain in one or more processor cores, establish a connection with the application domain based on the registration information in the registration request;

[0024] The notification unit is configured to, in response to detecting a first security function event, notify all application domains in the two or more processor cores of the first security function event;

[0025] The collection unit is configured to, in response to a notification of the first security function event, enable the data collection function for the first security function event and collect first data related to the first security function event;

[0026] The first determining unit is configured to, in response to a processing instruction, retrieve the first data and determine the processing progress for the first security function event based on the first data.

[0027] In some possible implementations, the device further includes:

[0028] The second determining unit is used to construct test scenarios and determine erroneous test events under different test scenarios.

[0029] The third determining unit is used to determine that the first security function event has occurred in response to the input of detecting a misoperation test event, and to send the first security function event to the input interface of the function event processing unit.

[0030] The notification unit is further configured to trigger the functional event processing unit to notify all application domains in the two or more processor cores in response to an interrupt instruction.

[0031] In some possible implementations, the device further includes:

[0032] The acquisition unit is used to acquire the first security function event input from an external source through the input interface of the function event processing unit, and the notification unit is also used to notify all the application domains in the two or more processor cores.

[0033] In some possible implementations, the notification unit is further configured to:

[0034] In response to receiving the first security function event through the input interface of the functional event processing unit, a corresponding control register message is generated for the first security function event;

[0035] Insert the control register message into the security function control message queue;

[0036] When the functional event processing unit detects that the security function control message queue is not empty, it triggers the interrupt processor to generate an interrupt instruction. In response to the interrupt instruction, the first security function event is notified to all application domains in the two or more processor cores through the output interface of the functional event processing unit.

[0037] In some possible implementations, the collecting unit is further configured to:

[0038] The register of the functional event processing unit is triggered to collect at least one of the following: the ID of the first security function event in the application domain where the first security function event occurred, the occurrence time, and the area information of the first security function event.

[0039] The collected first data is converted into a registered message for a security function event, and the registered message for the security function event is inserted into the security function event message queue.

[0040] According to a third aspect of this disclosure, a processing chip is provided, comprising:

[0041] Two or more processor cores are connected through an inter-core communication channel and support at least one application domain;

[0042] The function event processing unit, in response to the function registration requests of the two or more application domains, establishes a connection with the two or more application domains based on the registration information; and, in response to detecting a first security function event, notifies all the application domains in the two or more processor cores of the first security function event.

[0043] An interrupt controller is connected to the interface of the functional event processing unit and to the two or more application domains respectively; in response to detecting the functional event, it generates an interrupt command;

[0044] The input unit is used to receive a first functional event from an external source, or a first functional event from an internal processor, or a control instruction from an interrupt controller.

[0045] An output unit is used to notify all the application domains in the two or more processor cores.

[0046] According to a fourth aspect of this disclosure, an electronic device is provided, comprising:

[0047] At least one processor; and

[0048] A memory communicatively connected to the at least one processor; wherein,

[0049] The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the steps of the data processing method described in this disclosure.

[0050] According to a fifth aspect of this disclosure, a non-transitory computer-readable storage medium is provided storing computer instructions for causing the computer to perform the steps of the data processing method described in this disclosure.

[0051] The data processing method, apparatus, processing chip, device, and storage medium disclosed herein, by setting a functional event processing unit in the SOC chip, accepts registration requests from application domains in each processor core, and monitors expected functional safety events using the functional event processing unit. When an expected functional safety event is determined to have occurred, it can notify the application domains in each processor core of the expected functional safety event, enabling the corresponding application domains in the processor core to record the relevant data of the expected functional safety event in a timely manner. By continuously collecting relevant data of expected functional safety events, the data collection and scenario coverage are more comprehensive, and the data collection is more timely. By collecting and continuously iterating a large amount of scenario data for testing, the expected functional safety is made more reliable, the processing efficiency of expected functional safety events is improved, and better safety protection is provided for vehicles.

[0052] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0053] The above and other objects, features, and advantages of this disclosure will become readily apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. Several embodiments of this disclosure are illustrated in the drawings by way of example and not limitation, in which:

[0054] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

[0055] Figure 1 This illustration shows the implementation flow of the data processing method according to an embodiment of the present disclosure. Figure 1 ;

[0056] Figure 2 A schematic diagram of the logical structure of a SOC according to an embodiment of this disclosure is shown;

[0057] Figure 3 A schematic diagram of the registration process of the programmable control module according to an embodiment of the present disclosure is shown;

[0058] Figure 4 This illustration shows the implementation flow of the data processing method according to an embodiment of the present disclosure. Figure 2 ;

[0059] Figure 5 A schematic diagram illustrating the data collection process for security function events according to an embodiment of this disclosure is shown;

[0060] Figure 6 A schematic diagram of the composition structure of a data processing apparatus according to an embodiment of the present disclosure is shown;

[0061] Figure 7 A schematic diagram of the composition structure of an electronic device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0062] To make the objectives, features, and advantages of this disclosure more apparent and understandable, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0063] Figure 1 This illustration shows the implementation flow of the data processing method according to an embodiment of the present disclosure. Figure 1 ,like Figure 1As shown, the data processing method of this disclosure is applied to a multi-core heterogeneous chip, which includes two or more processor cores connected through an inter-core communication channel. As one implementation, the inter-core communication channel can include two types: one for transmitting small amounts of data, such as using a mailbox to transmit instructions; and the other for supporting large amounts of data, such as shared memory. Here, the inter-core communication channel is merely illustrative; other forms of connection channels are also possible. The multi-core heterogeneous chip may include a System on Chip (SOC).

[0064] Figure 2 A schematic diagram of the logical structure of a SOC according to an embodiment of this disclosure is shown, as follows: Figure 2 As shown, the SOC of this embodiment includes multiple processor cores, and each processor core supports at least one application domain.

[0065] The processor core includes a CPU, an Internet Service Provider (ISP) interface, a Data Processing Unit (DPU), a Graphics Processing Unit (GPU), and Random Access Memory (RAM). Each processor core can function independently as a data processing unit, supporting the processing system and corresponding applications; the processor cores are independent of each other. As an example, the processor core may also include a CPU, GPU, Direct Memory Access (DMA) interface, and Variable Rate Controller Area Network (CAN) with Flexible Data Rate (CAN FD). Alternatively, the processor core may include a CPU, RAM, and a Security Event Management (SEM) interface. In this embodiment, the processor core determines its processing functions based on its data processing needs; the processor core is individually configured according to processing capacity requirements.

[0066] The SOC in this embodiment of the disclosure also includes a dedicated function event processing unit for handling security function events, which is connected to two or more processor cores respectively. The function event processing unit in this embodiment of the disclosure can be... Figure 2 The expected functional safety support components in the document. For example... Figure 2As shown, this embodiment of the disclosure adds support for the implementation of expected functional safety in the SOC, that is, adds expected functional safety support components. This makes it more convenient and timely to collect data and cover specific scenarios when the autonomous driving system in the vehicle implements expected functional safety.

[0067] The intended functional safety support component of this disclosure is connected to each processor core in the SOC via an interrupt controller, and is also connected to a counter and a Fuse library.

[0068] The intended functional safety support components of the SOC in this disclosure include four main functional modules, as follows:

[0069] The programmable control module (PCM) is the control center of the entire expected functional safety support component. Its main functions include initialization, which initializes the expected functional safety support component, registers multiple application domains in each processor core, manages input signals of input modules, manages output signals of output modules, and transmits control messages between internal modules. It can also achieve simple programmability by obtaining configuration information from sources such as the Fuse library.

[0070] Figure 3 A schematic diagram of the registration process of the programmable control module according to an embodiment of this disclosure is shown, such as... Figure 3 As shown, the registration process for the programmable control module in this embodiment includes:

[0071] The programmable controller module obtains configuration information from the Fuse library and performs initialization. This configuration information includes interface information for each processor core in the SoC, and virtual interface information for application domains within the processor cores. This initialization requires establishing connections with each processor core in the SoC, accepting registrations from different application domains within each processor core, and establishing connections with these different application domains.

[0072] Initialize the broadcast and on-demand systems to ensure that they can broadcast to different application domains in each processor core and accept external on-demand requests. Trigger the interrupt controller based on the on-demand request and send trigger control signals to the corresponding functional applications in the application domain of the specific processor core.

[0073] Each domain registers expected functional safety event interrupts. Application domains in each processor core register expected functional safety events with the expected functional safety support component in response to interrupt signals triggered based on expected functional safety event detection.

[0074] The on-demand and broadcast system contains a control message queue and an event message queue. On-demand provides the ability for external random event queries, while broadcast provides timely notification capabilities to all external modules registered with the expected functional safety support components. The control message queue primarily caches operation control messages such as event input / queries.

[0075] The event message queue primarily caches the specific content of events, such as the event ID, the time of occurrence (marked by a global counter), and the event area.

[0076] The input module mainly supports three input methods, including SOC pin signal input, external master (such as CPU) write register input, and interrupt signal input.

[0077] The output module, similar to the input module, also supports three output forms, including signal output from the SOC pin, output from the external master (such as the CPU) register, and signal output to the interrupt controller to generate an interrupt.

[0078] like Figure 1 As shown, the data processing method of this disclosure includes the following processing steps:

[0079] Step 101: In response to the registration request of the application domain in the two or more processor cores, establish a connection with the application domain based on the registration information in the registration request.

[0080] In this embodiment of the disclosure, when the SOC is started, the functional event processing unit accepts the registration request of the application domain in the processor core, establishes the connection between the application domain in different processor cores, or, when a new functional event-related application domain is installed in the processor core, it actively registers with the functional event processing unit and creates a connection with the functional event processing unit.

[0081] Step 102: In response to detecting a first security function event, the first security function event is notified to all application domains in the two or more processor cores.

[0082] In this embodiment of the disclosure, test scenarios are constructed to determine erroneous operation test events under different test scenarios; in response to the detection of an erroneous operation test event, the occurrence of the first safety function event is determined, and the first safety function event is sent to the input interface of the function event processing unit; the function event processing unit, in response to an interrupt instruction, notifies all application domains in two or more processor cores. Test scenarios may include steering lock disabling when the vehicle power system signal is abnormal, steering lock disabling when the vehicle driving / speed signal is abnormal, etc.

[0083] Step 103: In response to the notification of the first security function event, enable the data collection function for the first security function event and collect the first data related to the first security function event.

[0084] In this embodiment, when an application domain in the processor core receives a notification of a first security function event, it will collect first data related to the first security function event based on the application domain where the first security function event is located. This embodiment can detect the first security function event immediately upon its occurrence and promptly notify all application domains in the processor core. This allows the relevant application domains in the processor core to collect the first data related to the first security function event in a timely manner. By collecting and continuously iterating through a large amount of scenario data for testing, the algorithm for determining security function events can be improved, thereby better enhancing the vehicle's expected safety functions.

[0085] Step 104: In response to the processing instruction, retrieve the first data and determine the processing progress for the first security function event based on the first data.

[0086] In this embodiment of the disclosure, by collecting a large amount of scenario data on safety function events, and through the efficient collection and accumulation of safety function event data, the overall process of the vehicle executing expected functional safety events is determined based on the collected safety function event data, so as to improve the vehicle's expected functional safety event handling capability.

[0087] Figure 4 This illustration shows the implementation flow of the data processing method according to an embodiment of the present disclosure. Figure 2 ,like Figure 4 As shown, the data processing method of this disclosure includes the following processing steps:

[0088] Step 401: In response to the registration request of the application domain in the two or more processor cores, establish a connection with the application domain based on the registration information in the registration request.

[0089] In this embodiment of the disclosure, when the SOC is started, the functional event processing unit accepts the registration request of the application domain in the processor core, establishes the connection between the application domain in different processor cores, or, when a new functional event-related application domain is installed in the processor core, it actively registers with the functional event processing unit and creates a connection with the functional event processing unit.

[0090] Step 402: Obtain the first security function event from external input through the input interface of the function event processing unit, and notify the first security function event to all application domains in the two or more processor cores.

[0091] In this embodiment of the disclosure, the functional event processing unit can receive notifications of anticipated functional safety events sent by an external system via an external PIN pin of the input module. As an example, an external auxiliary testing system may flag an anticipated functional safety event and input this information via the PIN pin of the functional event processing unit, thereby triggering the interrupt controller to promptly notify the relevant application domain in the processor core of the anticipated functional safety event.

[0092] As one implementation, notifying all application domains in the two or more processor cores of the first security function event includes: receiving the first security function event in response to the input interface of the function event processing unit, generating a corresponding control register message for the first security function event; inserting the control register message into a security function control message queue; when the function event processing unit detects that the security function control message queue is not empty, triggering an interrupt processor to generate an interrupt instruction, and in response to the interrupt instruction, notifying all application domains in the two or more processor cores of the first security function event through the output interface of the function event processing unit.

[0093] Step 403: In response to the notification of the first security function event, enable the data collection function for the first security function event and collect the first data related to the first security function event.

[0094] In this embodiment of the disclosure, collecting first data related to the first security function event includes: triggering the register of the function event processing unit to collect at least one of the ID of the first security function event in the application domain where the first security function event occurred, the occurrence time, and the area information of the first security function event; converting the collected first data into a security function event register message; and inserting the security function event register message into a security function event message queue.

[0095] Figure 5 A schematic diagram illustrating the data collection process for security function events according to an embodiment of this disclosure is shown, such as... Figure 5As shown, the data collection process for safety function events in this embodiment includes: the test domain inputs fault scenario data, such as altered sign images; the autonomous driving system receives the altered sign image data; the autonomous driving system initiates the perception decision control process and completes the corresponding processing. Additionally, as a method, the test domain issues a notification of an expected functional safety event, and the expected functional safety support component receives the relevant notification. Specifically, in this embodiment, the expected functional safety support component receives external relevant notifications through the REG input module; the control module converts the relevant notifications into REG messages, pushes them into the event message queue according to the REG message type, and the broadcast system broadcasts the message to the application domains in each processor core. This broadcast, through the output module of the expected functional safety support component, notifies the interrupt controller to generate an interrupt, thereby generating an event occurrence signal. This notifies the relevant application domains of the processor core where the expected functional safety event occurred, triggering them to perform data collection functions to collect data related to the expected functional safety event, thus completing the data collection.

[0096] In this embodiment, when an application domain in the processor core receives a notification of a first security function event, it will collect first data related to the first security function event based on the application domain where the first security function event is located. This embodiment can detect the first security function event immediately upon its occurrence and promptly notify all application domains in the processor core. This allows the relevant application domains in the processor core to collect the first data related to the first security function event in a timely manner. By collecting and continuously iterating through a large amount of scenario data for testing, the algorithm for determining security function events can be improved, thereby better enhancing the vehicle's expected safety functions.

[0097] Step 404: In response to the processing instruction, retrieve the first data and determine the processing progress for the first security function event based on the first data.

[0098] In this embodiment of the disclosure, by collecting a large amount of scenario data on safety function events, and through the efficient collection and accumulation of safety function event data, the overall process of the vehicle executing expected functional safety events is determined based on the collected safety function event data, so as to improve the vehicle's expected functional safety event handling capability.

[0099] The following specific examples further illustrate the essence of the technical solutions in the embodiments of this disclosure.

[0100] Example 1: Misoperation simulation test. The test system constructs test scenarios and misoperation test events. When a misoperation test event is input, the expected functional safety support component can be notified through the CPU that an expected functional safety event has occurred. At this time, the expected functional safety component quickly notifies the functional domains registered in the broadcast system through the interrupt controller. The data collection module can be easily deployed to any suitable functional domain because it is capable of receiving notification of the expected functional safety event as soon as possible.

[0101] Example 2: In real-vehicle road testing, some anticipated functional safety events occur without the autonomous driving system's awareness. However, the equipment of the external auxiliary testing system marks the anticipated functional safety event and inputs the information about the anticipated functional safety event to the anticipated functional safety support component via the SoC's PIN pin. The relevant application domain in the processor core of the SoC can receive the notification in a timely manner.

[0102] The technical solution of this disclosure adds support for the implementation of expected functional safety at the main control chip level, such as SOC, making it more convenient for the entire autonomous driving system to implement expected functional safety in terms of data collection and coverage of specific scenarios.

[0103] Figure 6 A schematic diagram of the composition structure of a data processing apparatus according to an embodiment of the present disclosure is shown, such as... Figure 6 As shown, the data processing apparatus of this disclosure embodiment is applied in a processing chip, the processing chip including a functional event processing unit and two or more processor cores; the two or more processor cores are connected to each other through an inter-core communication channel, and each processor core supports at least one application domain; the functional event processing unit is respectively connected to the two or more processor cores; the data processing apparatus of this disclosure embodiment includes:

[0104] The connection establishment unit 60 is used to establish a connection with the application domain based on the registration information in the registration request in response to the registration request of the application domain in the two or more processor cores;

[0105] Notification unit 61 is configured to notify all application domains in the two or more processor cores of the first security function event in response to the detection of the first security function event;

[0106] The collection unit 62 is configured to enable the data collection function for the first security function event in response to the notification of the first security function event, and to collect the first data related to the first security function event.

[0107] The first determining unit 63 is configured to, in response to a processing instruction, retrieve the first data and determine the processing progress for the first security function event based on the first data.

[0108] exist Figure 6 Based on the data processing apparatus shown, the data processing apparatus of this disclosure embodiment further includes:

[0109] Second Determined Unit ( Figure 6 (not shown in the image), used to construct test scenarios and determine erroneous test events under different test scenarios;

[0110] Third Determined Unit ( Figure 6 (not shown in the image), used to respond to the input of a detected erroneous test event, determine that the first safety function event has occurred, and send the first safety function event to the input interface of the function event processing unit;

[0111] The notification unit 61 is further configured to trigger the functional event processing unit to notify all application domains in the two or more processor cores in response to an interrupt instruction.

[0112] exist Figure 6 Based on the data processing apparatus shown, the data processing apparatus of this disclosure embodiment further includes:

[0113] Acquisition Unit ( Figure 6 (Not shown in the image), the notification unit 61 is used to obtain the first security function event from external input through the input interface of the function event processing unit, and is also used to notify all the application domains in the two or more processor cores.

[0114] As one implementation, the notification unit 61 is further configured to:

[0115] In response to receiving the first security function event through the input interface of the functional event processing unit, a corresponding control register message is generated for the first security function event;

[0116] Insert the control register message into the security function control message queue;

[0117] When the functional event processing unit detects that the security function control message queue is not empty, it triggers the interrupt processor to generate an interrupt instruction. In response to the interrupt instruction, the first security function event is notified to all application domains in the two or more processor cores through the output interface of the functional event processing unit.

[0118] As one implementation, the collection unit 62 is also used for:

[0119] The register of the functional event processing unit is triggered to collect at least one of the following: the ID of the first security function event in the application domain where the first security function event occurred, the occurrence time, and the area information of the first security function event.

[0120] The collected first data is converted into a registered message for a security function event, and the registered message for the security function event is inserted into the security function event message queue.

[0121] In an exemplary embodiment, the connection establishment unit 60, notification unit 61, collection unit 62, first determination unit 63, second determination unit, third determination unit, and acquisition unit may be implemented by one or more central processing units (CPUs), graphics processing units (GPUs), application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers (MCUs), microprocessors, or other electronic components.

[0122] Regarding the apparatus in the above embodiments, the specific manner in which each module and unit performs its operations has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0123] This disclosure also describes a processing chip, including:

[0124] Two or more processor cores are connected through an inter-core communication channel and support at least one application domain;

[0125] The function event processing unit, in response to the function registration requests of the two or more application domains, establishes a connection with the two or more application domains based on the registration information; and, in response to detecting a first security function event, notifies all the application domains in the two or more processor cores of the first security function event.

[0126] An interrupt controller is connected to the interface of the functional event processing unit and to the two or more application domains respectively; in response to detecting the functional event, it generates an interrupt command;

[0127] The input unit is used to receive a first functional event from an external source, or a first functional event from an internal processor, or a control instruction from an interrupt controller.

[0128] An output unit is used to notify all the application domains in the two or more processor cores.

[0129] For the specific structure of the processing chip in this embodiment, please refer to [link / reference]. Figure 2 The structure shown is not described in detail here.

[0130] According to embodiments of this disclosure, this disclosure also describes an electronic device and a readable storage medium.

[0131] Figure 7 A schematic block diagram of an example electronic device 800 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0132] like Figure 7 As shown, the electronic device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 802 or a computer program loaded from a storage unit 808 into a random access memory (RAM) 803. The RAM 803 may also store various programs and data required for the operation of the electronic device 800. The computing unit 801, ROM 802, and RAM 803 are interconnected via a bus 804. An input / output (I / O) interface 805 is also connected to the bus 804.

[0133] Multiple components in electronic device 800 are connected to I / O interface 805, including: input unit 806, such as keyboard, mouse, etc.; output unit 807, such as various types of displays, speakers, etc.; storage unit 808, such as disk, optical disk, etc.; and communication unit 809, such as network card, modem, wireless transceiver, etc. Communication unit 809 allows electronic device 800 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0134] The computing unit 801 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 801 performs the various methods and processes described above, such as interface control methods. For example, in some embodiments, the interface control method may be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 808. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 800 via ROM 802 and / or communication unit 809. When the computer program is loaded into RAM 803 and executed by the computing unit 801, one or more steps of the interface control method described above may be performed. Alternatively, in other embodiments, the computing unit 801 may be configured as a data processing method by any other suitable means (e.g., by means of firmware).

[0135] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0136] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0137] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0138] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0139] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with embodiments of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0140] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be cloud servers, servers in distributed systems, or servers incorporating blockchain technology.

[0141] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this disclosure can be achieved, and this is not limited herein.

[0142] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.

[0143] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A data processing method applied in a processing chip, the processing chip including a functional event processing unit and two or more processor cores; the two or more processor cores are connected through an inter-core communication channel, and each processor core supports at least one application domain; The functional event processing unit is connected to the two or more processor cores respectively; characterized in that... The method includes: In response to a registration request from the application domain in one or more processor cores, a connection is established with the application domain based on the registration information in the registration request; In response to the detection of a first security function event, the first security function event is notified to all application domains in the two or more processor cores; In response to a notification of the first security function event, enable the data collection function for the first security function event and collect first data related to the first security function event; In response to the processing instruction, the first data is retrieved, and the processing progress for the first security function event is determined based on the first data; Build test scenarios and identify erroneous test events under different test scenarios; In response to the detection of a misoperation test event, the system determines that the first security function event has occurred and sends the first security function event to the input interface of the function event processing unit. The functional event handling unit responds to an interrupt instruction by notifying all the application domains in the two or more processor cores; The first security function event, which is input from an external source, is obtained through the input interface of the function event processing unit, and then notified to all application domains in the two or more processor cores.

2. The method according to claim 1, characterized in that, The step of notifying all application domains in the two or more processor cores of the first security function event includes: In response to receiving the first security function event through the input interface of the functional event processing unit, a corresponding control register message is generated for the first security function event; Insert the control register message into the security function control message queue; When the functional event processing unit detects that the security function control message queue is not empty, it triggers the interrupt processor to generate an interrupt instruction. In response to the interrupt instruction, it notifies all application domains in the two or more processor cores of the first security function event through the output interface of the functional event processing unit.

3. The method according to claim 1, characterized in that, The collection of first data related to the first security function event includes: The register of the functional event processing unit is triggered to collect at least one of the following: the ID of the first security function event in the application domain where the first security function event occurred, the occurrence time, and the area information of the first security function event. The collected first data is converted into a registered message for a security function event, and the registered message for the security function event is inserted into the security function event message queue.

4. A data processing device, applied in a processing chip, the processing chip including a functional event processing unit and two or more processor cores; the two or more processor cores are connected to each other through an inter-core communication channel, and each processor core supports at least one application domain; The functional event processing unit is connected to the two or more processor cores respectively; characterized in that... The device includes: A connection establishment unit is configured to, in response to a registration request from the application domain in one or more processor cores, establish a connection with the application domain based on the registration information in the registration request; The notification unit is configured to notify all application domains in the two or more processor cores of the first security function event in response to the detection of the first security function event; The collection unit is configured to, in response to a notification of the first security function event, enable the data collection function for the first security function event and collect first data related to the first security function event; The first determining unit is configured to, in response to a processing instruction, retrieve the first data and determine the processing progress for the first security function event based on the first data; The second determining unit is used to construct test scenarios and determine erroneous test events under different test scenarios. The third determining unit is used to determine that the first security function event has occurred in response to the input of detecting a misoperation test event, and to send the first security function event to the input interface of the function event processing unit. The notification unit is also configured to trigger the functional event processing unit to notify all application domains in the two or more processor cores in response to an interrupt instruction; The acquisition unit is used to acquire the first security function event input from an external source through the input interface of the function event processing unit, and the notification unit is also used to notify all the application domains in the two or more processor cores.

5. The apparatus according to claim 4, characterized in that, The notification unit is further configured to: In response to receiving the first security function event through the input interface of the functional event processing unit, a corresponding control register message is generated for the first security function event; Insert the control register message into the security function control message queue; When the functional event processing unit detects that the security function control message queue is not empty, it triggers the interrupt processor to generate an interrupt instruction. In response to the interrupt instruction, the first security function event is notified to all application domains in the two or more processor cores through the output interface of the functional event processing unit.

6. The apparatus according to claim 4, characterized in that, The collection unit is also used for: The register of the functional event processing unit is triggered to collect at least one of the following: the ID of the first security function event in the application domain where the first security function event occurred, the occurrence time, and the area information of the first security function event. The collected first data is converted into a registered message for a security function event, and the registered message for the security function event is inserted into the security function event message queue.

7. A processing chip, characterized in that, The processing chip includes: Two or more processor cores are connected through an inter-core communication channel and support at least one application domain; The function event processing unit, in response to a function registration request from an application domain in one or more processor cores, establishes a connection with the two or more application domains based on registration information; and, in response to detecting a first security function event, notifies all the application domains in the two or more processor cores of the first security function event. An interrupt controller is connected to the interface of the functional event processing unit and to the two or more application domains respectively; in response to detecting the first security function event, it generates an interrupt command; The input unit is used to receive a first security function event input from an external source, or to receive a first security function event input from an internal processor, or to receive a control instruction input from an interrupt controller. An output unit is used to notify all the application domains in the two or more processor cores; A test scenario is constructed, and erroneous operation test events under different test scenarios are identified. In response to the detection of an erroneous operation test event, the occurrence of the first security function event is determined, and the first security function event is sent to the input interface of the function event processing unit. In response to an interrupt instruction, the function event processing unit notifies all application domains in the two or more processor cores. The first security function event input from the outside is obtained through the input interface of the function event processing unit, and notification is sent to all application domains in the two or more processor cores.

8. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the steps of the data processing method according to any one of claims 1 to 3.

9. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, The computer instructions are used to cause the computer to perform the steps of the data processing method according to any one of claims 1 to 3.

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