A voltage conversion circuit, a voltage boosting method and a product

Abstract

The embodiment of the present application provides a voltage conversion circuit, a voltage boosting method and a product. The voltage conversion circuit comprises an inductor, a first capacitor, a first transistor group and a second transistor group. One end of the inductor is electrically connected with a signal input end of the voltage conversion circuit, and the other end of the inductor is electrically connected with a signal output end of the voltage conversion circuit through the first transistor group and grounded through the second transistor group. The first transistor group and the second transistor group are electrically connected with two ends of the first capacitor respectively. The first transistor group or the second transistor group comprises at least two transistor switches, which are configured to control the inductor to perform at least one of the following operations: charging, discharging to the signal output end and discharging to the first capacitor by turning on or off of the transistor switches, and / or control the capacitor to perform at least one of the following operations: charging and discharging to the signal output end. The embodiment of the present application can improve the voltage conversion efficiency of the voltage conversion circuit, improve the problem of insufficient voltage boosting ratio of the display module, and output higher working voltage.

Description

Technical Field

[0001] This application relates to the field of display device technology, and in particular to a transformer circuit, a boost method, and a product. Background Technology

[0002] As users' demands for display performance increase, the brightness of monitors needs further improvement. Increasing the operating voltage of the backlight, and thus the brightness of the LCD backlight, is the most direct and effective way to improve monitor brightness. Therefore, for current monitors, especially large-size, high-brightness monitors, the demand for higher operating voltages in the backlight module is growing. To facilitate the mass production of display products, how to increase the operating voltage of the backlight module at low cost and high efficiency is a problem that engineers urgently need to solve.

[0003] It should be noted that the information in the background section of the invention is only configured to enhance the understanding of the background of the embodiments of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] This application provides a transformer circuit, a boost method, and a product, which aim to efficiently improve the transformer efficiency of the transformer circuit, thereby addressing the problem of insufficient boost ratio in current display modules and outputting a higher operating voltage.

[0005] In one aspect, embodiments of this application provide a transformer circuit, including: an inductor, a first capacitor, a first transistor group, and a second transistor group;

[0006] One end of the inductor is electrically connected to the signal input terminal of the transformer circuit, and the other end of the inductor is electrically connected to the signal output terminal of the transformer circuit through the first transistor group and grounded through the second transistor group; the first transistor group and the second transistor group are respectively electrically connected to the two ends of the first capacitor;

[0007] Wherein, the first transistor group or the second transistor group includes: at least two transistor switches configured to control the inductor to perform at least one of the following operations by turning on or off: charging, discharging to the signal output terminal, discharging to the first capacitor, and / or controlling the capacitor to perform at least one of the following operations: charging, discharging to the signal output terminal.

[0008] Optionally, it further includes: a pulse control signal line electrically connected to the gate of the transistor switch, configured to transmit a pulse voltage signal to the transistor switch to control the transistor switch to be turned on or off; the transistor switch includes a field-effect transistor;

[0009] The first transistor group includes a first field-effect transistor and a second field-effect transistor, and the second transistor group includes a third field-effect transistor and a fourth field-effect transistor;

[0010] The first terminals of the second field-effect transistor and the third field-effect transistor are respectively electrically connected to the inductor; the second terminal of the second field-effect transistor is respectively electrically connected to the first terminal of the first capacitor and the first terminal of the first field-effect transistor; the second terminal of the third field-effect transistor is respectively electrically connected to the second terminal of the first capacitor and the first terminal of the fourth field-effect transistor; the second terminal of the third field-effect transistor is electrically connected to the signal output terminal; and the second terminal of the fourth field-effect transistor is grounded.

[0011] Optionally, the first and second field-effect transistors may be of the type of P-type MOSFETs, and the third and fourth field-effect transistors may be of the type of N-type MOSFETs.

[0012] The pulse control signal line includes: a first signal line and a second signal line; the first signal line is electrically connected to the gates of the first field-effect transistor and the fourth field-effect transistor, respectively, and the second signal line is electrically connected to the gates of the second field-effect transistor and the third field-effect transistor, respectively.

[0013] The first and second field-effect transistors are configured to turn on when a low pulse voltage signal is transmitted on the pulse control signal line; the third and fourth field-effect transistors are configured to turn on when a high pulse voltage signal is transmitted on the pulse control signal line.

[0014] Optionally, the pulse voltage signal has a first period; each of the first periods includes: a first time segment, a second time segment, a third time segment, and a fourth time segment;

[0015] The pulse control signal line is configured to perform the following operations:

[0016] During the first time period, the first signal line and the second signal line are set to a high level;

[0017] During the second time period, the first signal line is set to a high level and the second signal line is set to a low level.

[0018] During the third time period, the first signal line and the second signal line are set to a low level;

[0019] During the fourth time period, the first signal line is set to a low level and the second signal line is set to a high level.

[0020] Optionally, the pulse voltage signal has a second period; each of the second periods includes: a fifth time segment, a sixth time segment, a seventh time segment, and an eighth time segment;

[0021] The pulse control signal line is configured to perform the following operations:

[0022] During the fifth time period, the first signal line and the second signal line are set to a low level;

[0023] During the sixth time period, the first signal line is set to a high level and the second signal line is set to a low level.

[0024] During the seventh time period, the first signal line and the second signal line are set to a high level;

[0025] During the eighth time segment, the first signal line is set to a low level and the second signal line is set to a high level.

[0026] Optionally, it further includes: a comparison module electrically connected to the pulse control signal line;

[0027] The comparison module is configured to detect the ratio between a second preset voltage and a first preset voltage, and to transmit a pulse voltage signal with a first period to the transistor switch via a pulse control signal line when the second preset voltage is greater than or equal to twice the first preset voltage, or to transmit a pulse voltage signal with a second period to the transistor switch via a pulse control signal line when the second preset voltage is less than or equal to twice the first preset voltage.

[0028] Wherein, the first preset voltage is the voltage input to the signal input terminal, and the second preset voltage is the voltage output to the signal output terminal.

[0029] Optionally, the signal input terminal of the transformer circuit is configured to input the backlight input voltage; the signal output terminal of the transformer circuit is configured to output the LED operating voltage.

[0030] Compared with the prior art, the advantages of the embodiments of this application are as follows:

[0031] The transformer circuit provided in this application utilizes transistor switches in the first and second transistor groups to control the charging and discharging states of the inductor and the first capacitor. By changing the duty cycle of the voltage output to the signal output terminal of the transformer circuit, the ratio between the voltage output at the signal output terminal and the voltage input at the signal input terminal can be freely adjusted, thereby outputting a voltage that meets the requirements. Compared to traditional boost architectures, this application, through the combination of multiple transistor switches, inductors, and the first capacitor, can implement time-division control of the circuit's on / off state, forming a multi-stage boost, effectively improving transformer efficiency. Furthermore, it eliminates the boost factor limitation of the backlight input voltage at the signal input terminal, effectively solving the problem of insufficient boost ratio in current display modules. It can achieve higher voltage output at the signal output terminal, meeting the LED operating voltage requirements of large-size, high-brightness display modules.

[0032] In another aspect, embodiments of this application also provide a boost method applied to the transformer circuit in the above embodiments, comprising:

[0033] During the first time segment, one end of the inductor is grounded, and the inductor is charged.

[0034] During the second time period, the transistor switch between the inductor and the first capacitor is turned on, the inductor discharges to the first capacitor, and the first capacitor is charged.

[0035] During the third time segment, one end of the inductor is grounded, and the inductor is charged.

[0036] In the fourth time segment, the transistor switch controlling the connection between the first capacitor and the signal output terminal of the transformer circuit is turned on, and the first capacitor discharges to the signal output terminal.

[0037] In another aspect, embodiments of this application also provide a display driver chip, including the transformer circuit described in the above embodiments.

[0038] In another aspect, embodiments of this application also provide a backlight module, including the display driver chip in the above embodiments.

[0039] In another aspect, embodiments of this application also provide a display device, including the backlight module in the above embodiments.

[0040] Compared with the prior art, the advantages of the product embodiments of this application are as follows:

[0041] The display devices provided in this application all include the transformer circuit in the above embodiments. They not only have all the advantages of the transformer circuit, but also utilize the characteristics of the transformer circuit that the boost ratio is easy to adjust and has a large adjustment range to improve the problem of insufficient boost ratio of the display module, output higher operating voltage, thereby realizing backlight of large-size, high-brightness display modules and helping to improve the display effect of display products. Attached Figure Description

[0042] The accompanying drawings are for reference and illustration only and are not intended to limit the scope of protection of this application. The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0043] Figure 1 A connection diagram of a transformer circuit in one embodiment provided in this application is shown;

[0044] Figure 2 A circuit connection diagram of a time-division control transformer is shown in one embodiment of the related art;

[0045] Figure 3 This diagram illustrates a signal waveform of a time-division controlled transformer in one embodiment of the related art.

[0046] Figure 4 A circuit connection diagram of yet another time-division control transformer in one embodiment of the related art is shown;

[0047] Figure 5 A schematic diagram of the signal waveform of another time-division controlled transformer is shown in one embodiment of the related art;

[0048] Figure 6 A flowchart illustrating the steps of a boost method according to one embodiment of the present application is shown. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0050] LEDs, with their long lifespan and high luminous efficiency, are widely used as backlights for LCD displays. To match the operating voltage and current of the LED strings, the backlight input voltage (VBL) input to the system is typically boosted by the LED driver IC. The backlight operating voltage is often obtained by the boost circuit in the display driver chip by boosting the input backlight voltage. When the backlight input voltage is limited by cost, size, and other constraints, the only option is to increase the boost ratio of the boost circuit.

[0051] Related technologies typically incorporate asynchronous boost converter circuits in the driver chip to boost the backlight input voltage and output a working voltage that meets the LED's emission requirements. As users' demands for display performance increase, the brightness of monitors needs further improvement. Increasing the backlight brightness of the LCD monitor is the most direct and effective way to improve overall monitor brightness. Therefore, increasing the backlight's working voltage, thereby increasing its brightness, helps improve the monitor's overall brightness. With a constant backlight input voltage, it's necessary to increase the boost ratio of the boost circuit, that is, the ratio between the LED working voltage output at the signal output terminal and the backlight input voltage at the signal input terminal. Currently, boost converter circuits are most efficient only under conditions of multiple voltage boosts. The limited boost efficiency of the boost circuits provided in related technologies cannot meet the demand for high boost ratios. For example, the related technology proposes a boost+charge pump circuit architecture, which can effectively improve the boost efficiency by using inductors and capacitors. However, due to the inherent architectural characteristics of the ChargePump as a switched capacitor voltage converter, the boost ratio is limited to 2 times in the application environment of backlight modules. This results in the backlight input voltage at the system end being limited, which cannot meet the LED operating voltage requirements of the backlight of large-size high-brightness display panels, thereby limiting the luminous performance of the display.

[0052] To address the aforementioned issues, this application provides a transformer circuit, a boost method, and a product. Utilizing transistor switches in the first and second transistor groups, the charging and discharging states of the inductor and the first capacitor are controlled. By changing the duty cycle of the voltage output to the signal output terminal of the transformer circuit, the ratio between the voltage output to the input voltage can be freely adjusted, thereby outputting a voltage that meets the requirements. Compared to traditional asynchronous boost and boost+charge pump architectures, this application, through the combination of multiple transistors, inductors, and the first capacitor, enables time-division control of the circuit's on / off states, forming a multi-stage boost, effectively improving transformer efficiency. Furthermore, it eliminates the boost factor limitation of the backlight input voltage at the signal input terminal, effectively solving the problem of insufficient boost ratio in current display modules. This allows for higher voltage output at the signal output terminal, meeting the LED operating voltage requirements of large-size, high-brightness display modules.

[0053] The embodiments of this application will now be described with reference to the accompanying drawings.

[0054] Reference Figure 1 , Figure 1 A schematic diagram of the connection of a transformer circuit according to one embodiment of this application is shown. Figure 1 As shown, this application embodiment provides a transformer circuit, including: an inductor L, a first capacitor C1, a first transistor group T10, and a second transistor group T20.

[0055] In this context, inductance L refers to the inductor.

[0056] In order to achieve non-polarity charging or discharging of the first capacitor, in some optional embodiments, the first capacitor C1 can be a flying capacitor.

[0057] In some optional embodiments, the first transistor group T10 or the second transistor group T20 may include a plurality of transistors for controlling the charging or discharging of the inductor L and / or the first capacitor C1 by turning itself on or off.

[0058] One end of the inductor L is electrically connected to the signal input terminal VIN of the transformer circuit, and the other end of the inductor L is electrically connected to the signal output terminal VOUT of the transformer circuit through the first transistor group T10 and grounded through the second transistor group T20.

[0059] The inductor L can be charged using the voltage signal input at the signal input terminal VIN.

[0060] In some optional embodiments, the voltage output at the signal output terminal VOUT of the transformer circuit can be a second preset voltage, and the voltage input at the signal input terminal VIN can be a first preset voltage. The ratio between the second preset voltage and the first preset voltage can be greater than 1, which serves as the preset boost ratio of the transformer circuit.

[0061] The first transistor group T10 and the second transistor group T20 are electrically connected to the two ends of the first capacitor C1, respectively.

[0062] The first transistor group T10 or the second transistor group T20 includes at least two transistor switches configured to control the inductor L to perform at least one of the following operations by turning itself on or off: charging, discharging to the signal output terminal VOUT, discharging to the first capacitor C1, and / or controlling the capacitor to perform at least one of the following operations: charging, discharging to the signal output terminal VOUT.

[0063] Preferably, to facilitate unipolar signal control, the transistor switch type can include a field-effect transistor (FET) or a bipolar transistor. Further, the transistor switch type can be a metal-oxide-semiconductor field-effect transistor (MOSFET), also simply called a MOSFET. A MOSFET can include a gate, a source, and a drain, and depending on whether the MOSFET is P-type or N-type, the conduction or disconnection between the source and drain can be achieved based on the voltage signal at the input gate.

[0064] In some optional embodiments, the inductor L can maintain an electrical connection with the signal input terminal VIN, maintain the inductor L in a powered state, and the transistor switch can control the inductor L to perform at least one of the following operations: discharging to the signal output terminal VOUT, discharging to the first capacitor C1, and / or controlling the capacitor to perform at least one of the following operations: charging, discharging to the signal output terminal VOUT.

[0065] Specifically, when the second transistor group T20 is turned on, the inductor L is grounded, forming a charging circuit to charge the inductor L. When the first transistor group T10 is turned on, a discharging circuit is formed between the inductor L and the signal output terminal VOUT of the transformer circuit, allowing the inductor L to discharge to the signal output terminal VOUT. When the transistor switch in the first transistor group T10 and the second transistor group T20, which is electrically connected between the inductor L and the first capacitor C1, is turned on, a charging circuit is formed between the inductor L and the first capacitor C1, charging the first capacitor C1. When the transistor switch in the first transistor group T10 and the second transistor group T20, which is electrically connected between the first capacitor C1 and the signal output terminal VOUT of the transformer circuit, is turned on, a discharging circuit is formed between the first capacitor C1 and the signal output terminal VOUT of the transformer circuit, discharging the first capacitor C1.

[0066] By controlling the on / off states of transistors in different time segments, time-division control of the charging and discharging circuit of inductor L / first capacitor C1 can be achieved, thereby realizing different boost ratios. The transformer circuit in this embodiment can be installed in the display driver chip of the display module to boost the backlight input voltage. Therefore, in an optional embodiment, the signal input terminal VIN of the transformer circuit is configured to input the backlight input voltage. The signal output terminal VOUT of the transformer circuit is configured to output the LED operating voltage.

[0067] Through the above embodiments, this application utilizes the transistor switches in the first transistor group T10 and the second transistor group T20 to control the charging and discharging states of the inductor L and the first capacitor C1. By changing the duty cycle of the time when the voltage is output to the signal output terminal VOUT of the transformer circuit, the ratio between the voltage output at the signal output terminal VOUT and the voltage input at the signal input terminal VIN can be freely adjusted, thereby outputting a voltage that meets the requirements. Compared with the traditional asynchronous Boost and Boost+Charge Pump architectures, this application, through the combination of multiple transistors, inductor L, and first capacitor C1, can implement time-division control of the circuit's on / off state, forming a multi-stage boost, effectively improving the transformer efficiency. Furthermore, it eliminates the boost factor limitation of the backlight input voltage at the signal input terminal, effectively solving the problem of insufficient boost ratio in current display modules. It can achieve a higher voltage output at the signal output terminal VOUT, meeting the LED operating voltage requirements of large-size, high-brightness display modules. For example, an LED operating voltage output of 5–21V can be achieved.

[0068] In some optional embodiments, the transformer circuit may further include a second capacitor CIN. One end of the inductor L, which is electrically connected to the signal input terminal VIN of the transformer circuit, may also be electrically connected to the second capacitor CIN. Thus, the signal input terminal VIN can also be electrically connected to the second capacitor CIN, which can act as a voltage regulator capacitor to stabilize the voltage signal input to the inductor L at the signal input terminal VIN.

[0069] In some optional embodiments, the transformer circuit may further include a third capacitor COUT. One end of the first capacitor C1, which is electrically connected to the signal output terminal VOUT of the transformer circuit, may also be electrically connected to the third capacitor COUT. Thus, the signal output terminal VOUT may also be electrically connected to the third capacitor COUT, and the third capacitor COUT may act as a voltage stabilizing capacitor to stabilize the voltage signal output from the signal output terminal VOUT.

[0070] In this embodiment, a time-division multiplexing control of the on / off state of a transistor switch can be considered using a PWM pulse signal. Therefore, in an optional embodiment, this application also provides a transformer circuit, further comprising: a pulse control signal line electrically connected to the gate of the transistor switch, configured to transmit a pulse voltage signal to the transistor switch to control the transistor switch to be on or off; the transistor switch includes a field-effect transistor.

[0071] In some optional embodiments, the transformer circuit may further include a control chip (not shown in the figure). The other end of the pulse control signal line, which is electrically connected to the gate of the transistor switch, may be electrically connected to the control chip. The control chip can be used to generate pulse voltage signals.

[0072] The first transistor group T10 includes a first field-effect transistor PM1 and a second field-effect transistor PM2, and the second transistor group T20 includes a third field-effect transistor NM1 and a fourth field-effect transistor NM2.

[0073] In some optional embodiments, the first field-effect transistor PM1, the second field-effect transistor PM2, the third field-effect transistor NM1, and the fourth field-effect transistor NM2 can be MOS transistors.

[0074] The first terminal of the second field-effect transistor PM2 and the first terminal of the third field-effect transistor NM1 are electrically connected to the inductor L. The second terminal of the second field-effect transistor PM2 is electrically connected to the first terminal of the first capacitor C1 and the first terminal of the first field-effect transistor PM1. The second terminal of the third field-effect transistor NM1 is electrically connected to the second terminal of the first capacitor C1 and the first terminal of the fourth field-effect transistor NM2. The second terminal of the third field-effect transistor NM1 is electrically connected to the signal output terminal VOUT. The second terminal of the fourth field-effect transistor NM2 is grounded.

[0075] In the above embodiments, a first field-effect transistor PM1 and a second field-effect transistor PM2, a third field-effect transistor NM1 and a fourth field-effect transistor NM2 are respectively set in the first transistor group T10 and the second transistor group T20. By turning on or off the four transistor switches, time-division control of different circuit states can be realized. In this way, the discharge terminal of inductor L and the charging and discharging state of the first capacitor C1 can be switched in different time periods, and the voltage ratio of the signal input terminal VIN and the signal output terminal VOUT can be adjusted.

[0076] The embodiments of this application can further configure the transistor switch type and, in conjunction with pulse control signal lines with different pulse voltage periods, realize time-division control and switching of circuit states. Therefore, in an optional embodiment, this application also provides a transformer circuit, wherein the first field-effect transistor PM1 and the second field-effect transistor PM2 are P-type MOSFETs, and the third field-effect transistor NM1 and the fourth field-effect transistor NM2 are N-type MOSFETs.

[0077] The pulse control signal lines include: a first signal line S1 and a first signal line S2. The first signal line S1 is electrically connected to the gates of the first field-effect transistor PM1 and the fourth field-effect transistor NM2, respectively, and the first signal line S2 is electrically connected to the gates of the second field-effect transistor PM2 and the third field-effect transistor NM1, respectively.

[0078] Specifically, a P-type MOSFET can be turned on when a low-level signal is input to the gate and turned off when a high-level signal is input to the gate. An N-type MOSFET can be turned on when a high-level signal is input to the gate and turned off when a low-level signal is input to the gate.

[0079] The first field-effect transistor PM1 and the second field-effect transistor PM2 are configured to be turned on when a low pulse voltage signal is transmitted on the pulse control signal line; the third field-effect transistor NM1 and the fourth field-effect transistor NM2 are configured to be turned on when a high pulse voltage signal is transmitted on the pulse control signal line.

[0080] It should be noted that, in the embodiments of this application, the conduction or disconnection of the transistor switch refers to the on / off state between the source and the drain.

[0081] Reference Figure 2 , Figure 2 A schematic diagram of the circuit connection of a time-division controlled transformer is shown in one embodiment of the related art. For example... Figure 2As shown, different time-sharing control strategies can be set for different boost ratio requirements in the embodiments of this application. In some optional embodiments, when the ratio between the voltage output at the signal output terminal VOUT and the voltage input at the signal input terminal VIN is greater than or equal to 2, the duty cycle is greater than or equal to 0.5. Therefore, in an optional embodiment, this application also provides a transformer circuit, wherein the pulse voltage signal has a first period. Each first period includes: a first time segment, a second time segment, a third time segment, and a fourth time segment.

[0082] In this embodiment, the duty cycle can be the ratio between the discharge duration of the first capacitor C1 and the sum of the charging and discharging durations.

[0083] Reference Figure 3 , Figure 3 A schematic diagram of the signal waveform of a time-division controlled transformer is shown in one embodiment of the related art. For example... Figure 3 As shown, the pulse control signal line is configured to perform the following operations:

[0084] During the first time period, the first signal line S1 and the first signal line S2 are set to a high level.

[0085] During the second time segment, the first signal line S1 is set to a high level and the first signal line S2 is set to a low level.

[0086] During the third time segment, the first signal line S1 and the first signal line S2 are set to low level.

[0087] During the fourth time segment, the first signal line S1 is set to a low level, and the first signal line S2 is set to a high level.

[0088] The current IL through inductor L experiences ripple due to the inductor's charging and discharging states. The voltage VCF through the first capacitor also experiences ripple due to the capacitor's charging and discharging states; approximately, when the boost ratio is 2, VCF is about half the output voltage VOUT.

[0089] Accordingly, the transistor switch is configured to perform the following operations:

[0090] During the first time interval, the third field-effect transistor NM1 and the fourth field-effect transistor NM2 are turned on, while the first field-effect transistor PM1 and the second field-effect transistor PM2 are turned off.

[0091] During the second time interval, the second field-effect transistor PM2 and the fourth field-effect transistor NM2 are turned on, while the first field-effect transistor PM1 and the third field-effect transistor NM1 are turned off.

[0092] During the third time segment, the third field-effect transistor NM1 and the fourth field-effect transistor NM2 are turned on, while the first field-effect transistor PM1 and the second field-effect transistor PM2 are turned off.

[0093] During the fourth time segment, the first field-effect transistor PM1 and the third field-effect transistor NM1 are turned on, while the second field-effect transistor PM2 and the fourth field-effect transistor NM2 are turned off.

[0094] Furthermore, the inductor L and the first capacitor C1 are configured to perform the following operations:

[0095] During the first time interval, one end of inductor L is connected to the signal input terminal VIN, and the other end is grounded, forming a charging circuit for inductor L. Inductor L is charged, the potential at LX is equal to 0, and the current at LX increases.

[0096] LX is a line reference potential point located between inductor L and the first transistor group T10 and the second transistor group T20.

[0097] During the second time interval, one end of the inductor L remains connected to the signal input terminal VIN, while the other end discharges into the first capacitor C1. One end of the first capacitor C1 is connected to the inductor L, and the other end is grounded, forming a charging circuit for the first capacitor C1. The first capacitor C1 is charged, and the potential at LX is equal to the potential of the first capacitor C1, causing the current at LX to decrease.

[0098] During the third time interval, one end of inductor L is connected to the signal input terminal VIN, and the other end is grounded, forming a charging circuit for inductor L. Inductor L is charged, the potential at LX is equal to 0, and the current at LX increases.

[0099] During the fourth time segment, one end of the inductor L remains connected to the signal input terminal VIN, and the other end is connected to the first capacitor C1. One end of the first capacitor C1 is connected to the inductor L, and the other end is connected to the signal output terminal VOUT, forming a discharge circuit for the first capacitor C1. The first capacitor C1 discharges, and the potential at LX is equal to the difference between the potential at the signal output terminal VOUT and the potential at the first capacitor C1, causing the current at LX to decrease.

[0100] In some optional embodiments, with a boost ratio of 2, the duty cycle is 0.5. The charging time of the first capacitor C1 is equal to the discharging time. When the circuit is in steady state, the amount of charge charged into the first capacitor C1 is equal to the amount of charge released, i.e., Cfly * Vcf = Cfly * (Vout - Vcf), where Vcf = 0.5Vout. Here, CFLY is the capacitance of the first capacitor C1, Vcf is the voltage at the first capacitor C1, and Vout is the voltage output at the signal output terminal VOUT. The first cycle can repeat in this manner.

[0101] Through the above embodiments, the duty cycle can be adjusted by adjusting the ratio between the discharge time of the first capacitor C1 and the first cycle, thereby obtaining the required output voltage. This can be used to meet the boost requirement that the ratio between the LED operating voltage and the backlight input voltage of the display module is greater than 2.

[0102] Reference Figure 4 , Figure 4 A circuit connection diagram of yet another time-sharing control transformer in one embodiment of the related art is shown. For example... Figure 4 As shown, in some alternative embodiments, when the ratio between the voltage output at signal output terminal VOUT and the voltage input at signal input terminal VIN is less than 2, the duty cycle is less than 0.5. Therefore, in one alternative embodiment, this application also provides a transformer circuit in which the pulse voltage signal has a second period. Each second period includes: a fifth time segment, a sixth time segment, a seventh time segment, and an eighth time segment.

[0103] Reference Figure 5 , Figure 5 A schematic diagram of the signal waveform of another time-division controlled transformer in one embodiment of the related art is shown. For example... Figure 5 As shown, the pulse control signal line is configured to perform the following operations:

[0104] During the fifth time segment, the first signal line S1 and the first signal line S2 are set to low level.

[0105] During the sixth time segment, the first signal line S1 is set to a high level and the first signal line S2 is set to a low level.

[0106] During the seventh time segment, the first signal line S1 and the first signal line S2 are set to high level.

[0107] During the eighth time segment, the first signal line S1 is set to a low level, and the first signal line S2 is set to a high level.

[0108] The current IL through inductor L experiences ripple due to the inductor's charging and discharging states. The voltage VCF through the first capacitor also experiences ripple due to the capacitor's charging and discharging states; approximately, when the boost ratio is 2, VCF is about half the output voltage VOUT.

[0109] Accordingly, the transistor switch is configured to perform the following operations:

[0110] During the fifth time segment, the first field-effect transistor PM1 and the second field-effect transistor PM2 are turned on, while the third field-effect transistor NM1 and the fourth field-effect transistor NM2 are turned off.

[0111] During the sixth time segment, the second field-effect transistor PM2 and the fourth field-effect transistor NM2 are turned on, while the first field-effect transistor PM1 and the third field-effect transistor NM1 are turned off.

[0112] During the seventh time segment, the first field-effect transistor PM1 and the second field-effect transistor PM2 are turned on, while the third field-effect transistor NM1 and the fourth field-effect transistor NM2 are turned off.

[0113] During the eighth time segment, the first field-effect transistor PM1 and the third field-effect transistor NM1 are turned on, while the second field-effect transistor PM2 and the fourth field-effect transistor NM2 are turned off.

[0114] Furthermore, the inductor L and the first capacitor C1 are configured to perform the following operations:

[0115] During the fifth time segment, one end of inductor L is connected to the signal input terminal VIN, and the other end is connected to the signal output terminal VOUT, forming a discharge circuit for inductor L. Inductor L discharges to the signal output terminal VOUT, and the potential at LX is equal to the potential at the signal output terminal VOUT, causing the current at LX to decrease.

[0116] During the sixth time segment, one end of inductor L is connected to the signal input terminal VIN, and the other end is connected to the first capacitor C1. One end of the first capacitor C1 is connected to inductor L, and the other end is grounded, forming a charging circuit between inductor L and first capacitor C1. Inductor L and first capacitor C1 are charged, and the potential at LX is equal to the potential of the first capacitor C1, and the current at LX increases.

[0117] During the seventh time segment, one end of inductor L is connected to the signal input terminal VIN, and the other end is connected to the signal output terminal VOUT, forming a discharge circuit for inductor L. Inductor L discharges to the signal output terminal VOUT, and the potential at LX is equal to the potential at the signal output terminal VOUT, causing the current at LX to decrease.

[0118] During the eighth time segment, one end of inductor L is connected to the signal input terminal VIN, and the other end is connected to the first capacitor C1. One end of the first capacitor C1 is connected to inductor L, and the other end is connected to the signal output terminal VOUT, forming a discharge circuit between inductor L and the first capacitor C1. When inductor L and the first capacitor C1 discharge, the potential at LX is equal to the difference between the potential at the signal output terminal VOUT and the potential at the first capacitor C1, and the current at LX decreases.

[0119] In some optional embodiments, with a boost ratio of 2, the duty cycle is 0.5. The charging time of the first capacitor C1 is equal to the discharging time. When the circuit is in steady state, the amount of charge charged into the first capacitor C1 is equal to the amount of charge released, i.e., Cfly * Vcf = Cfly * (Vout - Vcf), where Vcf = 0.5Vout. Here, Cfly is the capacitance of the first capacitor C1, Vcf is the voltage at the first capacitor C1, and Vout is the voltage output at the signal output terminal VOUT. The second cycle can repeat in this manner.

[0120] Through the above embodiments, the duty cycle can be adjusted by adjusting the ratio between the discharge time of the first capacitor C1 and the second cycle, thereby obtaining the required output voltage. This can be used to meet the boost requirement that the ratio between the LED operating voltage and the backlight input voltage of the display module is less than 2.

[0121] In conjunction with the above embodiments, this application also considers utilizing a comparison module to set corresponding time-sharing control strategies according to different boost ratio requirements, thereby achieving differentiated boost control. To this end, in an optional embodiment, this application also provides a transformer circuit, further comprising: a comparison module electrically connected to a pulse control signal line.

[0122] The comparison module can be set in the control chip.

[0123] The comparison module is configured to detect the ratio between a second preset voltage and a first preset voltage, and to transmit a pulse voltage signal with a first period to the transistor switch via the pulse control signal line when the second preset voltage is greater than or equal to twice the first preset voltage, or to transmit a pulse voltage signal with a second period to the transistor switch via the pulse control signal line when the second preset voltage is less than or equal to twice the first preset voltage.

[0124] Wherein, the first preset voltage is the voltage input at the signal input terminal VIN, and the second preset voltage is the voltage output at the signal output terminal VOUT.

[0125] In some alternative embodiments, the first preset voltage can be the backlight input voltage. The second preset voltage can be the LED operating voltage, used to enable the LED string to operate.

[0126] Through the above embodiments, the boost ratio of the transformer circuit can be adjusted by changing the duty cycle of the charging time of the first capacitor C1. Furthermore, the boost ratio can be positively correlated with the proportion of the charging time of the first capacitor C1. Therefore, in this embodiment, the ratio between the charging time of the first capacitor C1 and the duration of the first cycle or the duration of the second cycle is positively correlated with the ratio between the amplitude of the second preset voltage and the amplitude of the first preset voltage. And / or, the ratio between the charging time of the first capacitor C1 and the total charging and discharging time of the first capacitor C1 is positively correlated with the ratio between the amplitude of the second preset voltage and the amplitude of the first preset voltage.

[0127] Through the above embodiments, this application also has the following advantages compared with related technologies:

[0128] (1) By using MOSFETs to control charging and discharging, the voltage can be boosted, eliminating the need for external diodes and reducing the space occupied in the backlight module.

[0129] (2) Since a higher boost ratio can be achieved, the requirements for backlight input voltage are reduced. During the idle time period when no voltage signal is output to the signal output terminal VOUT, the voltage difference between the two ends of the internal components is also reduced accordingly. That is, the voltage stress of the components is reduced. Therefore, the selection of components can be expanded, the performance requirements of the internal components can be reduced, and the cost reduction can be achieved.

[0130] (3) By controlling the charging and discharging state through multiple transistor switches, although the switching frequency of the MOSFET is increased, the switching loss is reduced due to the lower voltage required by the MOSFET. The loss of inductor L and capacitor can also be reduced. Compared with related technologies, it can effectively reduce ripple current and circuit loss.

[0131] The following analysis uses the transformer circuit in the embodiment of this application, which has a double boost ratio, as an example:

[0132] Since the MOSFET switch only requires 1 / 2Vout, according to the MOSFET switching loss calculation formula: Ploss=(C*Vds2*fsw) / 2, C represents the MOSFET output capacitance, Vds is the drain-source voltage (i.e., voltage difference), and fsw represents the MOSFET switching frequency. Vds changes from Vout to 1 / 2Vout. Although the switching frequency doubles, the actual Ploss=(C*Vout2*fsw) / 4 is reduced by half compared to the original Ploss.

[0133] According to the inductance formula di / dt = V / L, in related technologies, the voltage across inductor L is Vin, the rising current slope is set to K = Vin / L, and the falling current slope is (Vout - Vin) / L. However, in this embodiment, when D is greater than or equal to 0.5, the rising current slope is set to K = Vin / L, and the falling current slope is (0.5Vout - Vin) / L. Assuming L is the same, Vout = 4Vin, the rising current slope of LX remains unchanged, while the falling current slope is in a 3:1 ratio. Therefore, the ripple current in related technologies is twice that of this embodiment. Thus, the transformer circuit in this embodiment can significantly reduce the ripple current, according to the inductance LRMS current formula. ILdc is the average current and Ip-p is the ripple current, so it can effectively reduce the RMS current loss of the inductor L, and similarly reduce the current loss of the MOSFET and the RMS loss of the capacitor.

[0134] Reference Figure 6 , Figure 6 A flowchart illustrating the steps of a boost method according to one embodiment of this application is shown. Figure 6 As shown, based on the same inventive concept, this application also provides a boost method applied to the transformer circuit in the above embodiments, the method comprising:

[0135] In step S601, during the first time segment, one end of the control inductor L is grounded, and the inductor L is charged.

[0136] In step S602, during the second time period, the transistor switch between the control inductor L and the first capacitor C1 is turned on, the inductor L discharges to the first capacitor C1, and the first capacitor C1 is charged.

[0137] In step S603, during the third time segment, one end of the control inductor L is grounded, and the inductor L is charged.

[0138] In step S604, during the fourth time interval, the transistor switch between the first capacitor C1 and the signal output terminal VOUT of the transformer circuit is turned on, and the first capacitor C1 discharges to the signal output terminal VOUT.

[0139] Based on the same inventive concept, this application also provides a display driver chip, including the transformer circuit in the above embodiments.

[0140] To achieve distributed boost and reduce voltage stress on internal components, in some optional embodiments, the display driver chip may include multiple transformer circuits as described above to form a multi-stage boost.

[0141] Based on the same inventive concept, this application also provides a backlight module, including the display driver chip in the above embodiments.

[0142] In some alternative embodiments, the backlight module may include an LED backlight module.

[0143] Based on the same inventive concept, this application also provides a display device, including the backlight module in the above embodiments.

[0144] In some alternative embodiments, the display device may include an LCD display module.

[0145] Specifically, display devices may include display modules, smartwatches, mobile phones, tablets, VR device display screens, or computer monitors, etc.

[0146] Based on the same inventive concept, this application also provides a display device, which includes the display apparatus in the above embodiments.

[0147] As the method embodiments or product embodiments are basically similar to the device embodiments, the descriptions are relatively simple, and relevant details can be found in the descriptions of the device embodiments.

[0148] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0149] It should be noted that, unless otherwise expressly specified and limited, the accompanying drawings in this application specification are for illustrative purposes only and to aid understanding, and the dimensions in the drawings shall not be construed as limiting the content of this application.

[0150] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0151] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are configured for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0152] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0153] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0154] In this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes that element.

[0155] Finally, it should be noted that specific examples have been used in this document to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are merely configured to help understand the technical solutions and core ideas of this application. Although preferred embodiments of this application have been described, those skilled in the art, once they understand the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of this application.

Claims

1. A transformer circuit, characterized in that, include: Inductor, first capacitor, first transistor group, and second transistor group; One end of the inductor is electrically connected to the signal input terminal of the transformer circuit, and the other end of the inductor is electrically connected to the signal output terminal of the transformer circuit through the first transistor group and grounded through the second transistor group; the first transistor group and the second transistor group are respectively electrically connected to the two ends of the first capacitor; Wherein, the first transistor group or the second transistor group includes: at least two transistor switches configured to control the inductor to perform at least one of the following operations by turning on or off: charging, discharging to the signal output terminal, discharging to the first capacitor, and / or controlling the capacitor to perform at least one of the following operations: charging, discharging to the signal output terminal; The transformer circuit further includes: a pulse control signal line, electrically connected to the gate of the transistor switch, configured to transmit a pulse voltage signal to the transistor switch to control the transistor switch to turn on or off; The transformer circuit further includes a comparator module, which is electrically connected to the pulse control signal line; The comparison module is configured to detect the ratio between a second preset voltage and a first preset voltage, and to transmit a pulse voltage signal with a first period to the transistor switch via a pulse control signal line when the second preset voltage is greater than or equal to twice the first preset voltage, or to transmit a pulse voltage signal with a second period to the transistor switch via a pulse control signal line when the second preset voltage is less than or equal to twice the first preset voltage. Wherein, the first preset voltage is the voltage input to the signal input terminal, and the second preset voltage is the voltage output to the signal output terminal; The ratio between the second preset voltage and the first preset voltage is used as the preset boost ratio of the transformer circuit. The boost ratio is adjusted by changing the duty cycle of the charging duration of the first capacitor.

2. The transformer circuit according to claim 1, characterized in that, The transistor switch includes a field-effect transistor; The first transistor group includes a first field-effect transistor and a second field-effect transistor, and the second transistor group includes a third field-effect transistor and a fourth field-effect transistor; The first terminals of the second field-effect transistor and the third field-effect transistor are respectively electrically connected to the inductor; the second terminal of the second field-effect transistor is respectively electrically connected to the first terminal of the first capacitor and the first terminal of the first field-effect transistor; the second terminal of the third field-effect transistor is respectively electrically connected to the second terminal of the first capacitor and the first terminal of the fourth field-effect transistor; the second terminal of the third field-effect transistor is electrically connected to the signal output terminal; and the second terminal of the fourth field-effect transistor is grounded.

3. The transformer circuit according to claim 2, characterized in that, The first and second field-effect transistors are of the type of P-type MOSFETs, and the third and fourth field-effect transistors are of the type of N-type MOSFETs. The pulse control signal line includes: a first signal line and a second signal line; the first signal line is electrically connected to the gates of the first field-effect transistor and the fourth field-effect transistor, respectively, and the second signal line is electrically connected to the gates of the second field-effect transistor and the third field-effect transistor, respectively. The first and second field-effect transistors are configured to turn on when a low pulse voltage signal is transmitted on the pulse control signal line; the third and fourth field-effect transistors are configured to turn on when a high pulse voltage signal is transmitted on the pulse control signal line.

4. The transformer circuit according to claim 3, characterized in that, The pulse voltage signal has a first period; each of the first periods includes: a first time segment, a second time segment, a third time segment, and a fourth time segment; The pulse control signal line is configured to perform the following operations: During the first time period, the first signal line and the second signal line are set to a high level; During the second time period, the first signal line is set to a high level and the second signal line is set to a low level. During the third time period, the first signal line and the second signal line are set to a low level; During the fourth time period, the first signal line is set to a low level and the second signal line is set to a high level.

5. The transformer circuit according to claim 3, characterized in that, The pulse voltage signal has a second period; each of the second periods includes: a fifth time segment, a sixth time segment, a seventh time segment, and an eighth time segment; The pulse control signal line is configured to perform the following operations: During the fifth time period, the first signal line and the second signal line are set to a low level; During the sixth time period, the first signal line is set to a high level and the second signal line is set to a low level. During the seventh time period, the first signal line and the second signal line are set to a high level; During the eighth time segment, the first signal line is set to a low level and the second signal line is set to a high level.

6. The transformer circuit according to any one of claims 1 to 5, characterized in that, The signal input terminal of the transformer circuit is configured to input the backlight input voltage; the signal output terminal of the transformer circuit is configured to output the LED operating voltage.

7. A method for boosting voltage, characterized in that, Applied to the transformer circuit as described in any one of claims 1 to 6, comprising: During the first time segment, one end of the inductor is grounded, and the inductor is charged. During the second time period, the transistor switch between the inductor and the first capacitor is turned on, the inductor discharges to the first capacitor, and the first capacitor is charged. During the third time segment, one end of the inductor is grounded, and the inductor is charged. In the fourth time segment, the transistor switch controlling the connection between the first capacitor and the signal output terminal of the transformer circuit is turned on, and the first capacitor discharges to the signal output terminal.

8. A display driver chip, characterized in that, include: The transformer circuit as described in any one of claims 1 to 6.

9. A backlight module, characterized in that, include: The display driver chip as described in claim 8.

10. A display device, characterized in that, include: The backlight module as described in claim 9.

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