A method of generating termination impedance parameters and a test system
CN117198370BActive Publication Date: 2026-08-28CHANGXIN MEMORY TECH INC
Patent Information
- Application Number
- CN202210605921.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-30
- Publication Date
- 2026-08-28
- Estimated Expiration
- 2042-05-30
AI Technical Summary
Technical Problem
然而,终结阻抗信号在不同的工作场景下的取值变化较为多样,在测试时没有固定的真值用于验证,测试难度较大
Benefits of technology
[0027]本公开实施例提供了一种终结阻抗参数的产生方法和测试系统,该方法包括:在接收到第一操作指令时,将多个预设控制字写入到数据缓冲器中的第一数据队列;其中,第一数据队列的数据用于指示在操作指令被执行的情况下不同执行阶段对应的终结阻抗参数;基于第一数据队列的数据,向数据缓冲器中的第三数据队列的对应位置写入数据;按照预设时序,通过数据缓冲器对第三数据队列的数据进行输出,得到第一终结阻抗信号。这样,利用终结阻抗参数的产生方法,能够根据工作场景实时输出第一终结阻抗信号,作为终结阻抗信号测试的验证数据,降低测试的复杂性,提高测试效率。
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Abstract
The embodiment of the present disclosure provides a method for generating a termination impedance parameter and a test system, the method comprising: when a first operation instruction is received, writing a plurality of preset control words into a first data queue in a data buffer; wherein the data of the first data queue is used to indicate the termination impedance parameter corresponding to different execution stages in the case where the operation instruction is executed; based on the data of the first data queue, writing data to the corresponding position of a third data queue in the data buffer; and outputting the data of the third data queue through the data buffer according to a preset timing to obtain a first termination impedance signal. In this way, the first termination impedance signal is output in real time according to the working scene, which can be used as verification data for termination impedance signal testing, thereby reducing the complexity of testing and improving the efficiency of testing.
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Citation Information
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