Cavity package structure and method of forming the same

Abstract

The application relates to a cavity type packaging structure and a forming method thereof, the cavity type packaging structure comprising a substrate, a semiconductor chip attached to the upper surface of the substrate, a heat-conducting material layer located on the upper surface of the substrate and covering the semiconductor chip, an upper cover comprising a top and a protruding annular side located on the lower surface of the top, the bottom surface of the annular side being attached to the upper surface of the substrate around the semiconductor chip and the heat-conducting material layer, a sealed cavity being formed between the upper cover and the upper surface of the substrate, and a cooling pipe for injecting coolant, the inlet end and the outlet end of the cooling pipe being fixed in the upper cover, the pipe part of the cooling pipe being suspended below the top of the upper cover and embedded in the heat-conducting material layer, so that the heat generated by the semiconductor chip can be quickly conducted to the coolant in the cooling pipe through the heat-conducting material layer for release, thereby improving the heat dissipation performance and the heat dissipation efficiency of the semiconductor chip in the cavity type packaging structure.

Description

Technical Field

[0001] This application relates to the field of packaging, and more particularly to a cavity-type packaging structure and a method for forming the same. Background Technology

[0002] Cavity-type packaging technology is widely used in the packaging of some semiconductor chips, especially in the packaging of radio frequency chips, due to its better radio frequency performance and lower dielectric constant.

[0003] In existing cavity-type packaging products, due to the need to consider radio frequency performance and heat dissipation, a ceramic cover is often set on the substrate to form an internal cavity structure to encapsulate the semiconductor chip (such as radio frequency chip) mounted on the substrate.

[0004] To improve heat dissipation performance, heat sinks are usually placed on or in the ceramic cover. However, this method still has limited heat dissipation effect on semiconductor chips and will affect the heat dissipation performance of the package structure. Summary of the Invention

[0005] Some embodiments of this application provide a cavity-like encapsulation structure, including:

[0006] substrate;

[0007] A semiconductor chip is mounted on the upper surface of the substrate, and the semiconductor chip is electrically connected to the substrate;

[0008] A thermally conductive material layer located on the upper surface of the substrate and covering the semiconductor chip;

[0009] The top cover includes a top and a raised annular side portion located on the lower surface of the top. The bottom surface of the annular side portion of the top cover is attached to the upper surface of the substrate surrounding the semiconductor chip and the thermally conductive material layer, and a sealed cavity is formed between the top cover and the upper surface of the substrate.

[0010] A cooling pipe for injecting coolant, the cooling pipe including an inlet end, an outlet end and a pipe section connecting the outlet end and the inlet end, the inlet end and the outlet end of the cooling pipe being fixed in the upper cover, and the pipe section of the cooling pipe being suspended below the top of the upper cover and embedded in the thermally conductive material layer.

[0011] In some embodiments, the inlet and outlet ends of the cooling pipe are both fixed in the annular side of the top cover and extend from the outer side wall of the annular side.

[0012] In some embodiments, the inlet and outlet ends of the cooling pipe are both fixed in the top of the cover and extend from the upper surface of the cover.

[0013] In some embodiments, one end of the cooling pipe’s inlet and outlet is fixed in the top of the cover and extends from the upper surface of the top, while the other end is fixed in the annular side of the cover and extends from the outer wall of the annular side.

[0014] In some embodiments, the cooling conduit is partially embedded in a thermally conductive material layer above or around the semiconductor chip.

[0015] In some embodiments, the cooling pipe portion is horizontally arranged or protrudes towards the lower surface of the top of the cover.

[0016] In some embodiments, the material of the thermally conductive material layer is thermally conductive silicone grease, thermally conductive gel, or thermosetting polymer; the coolant is deionized water, alcohol-based solution, fluorinated liquid (hydrofluoroether), mineral oil, or silicone oil.

[0017] In some embodiments, when the cooling pipe dissipates heat, the coolant is injected from the inlet end of the cooling pipe and flows out from the outlet end, or after the coolant is injected into the cooling pipe, the inlet end and the outlet end are sealed to encapsulate the coolant in the cooling pipe.

[0018] In some embodiments, the substrate includes: a flange base, a housing attached to an edge region of the upper surface of the flange base, wherein a pin is fixed in the housing, and the housing exposes the two end surfaces of the pin.

[0019] The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the flange substrate, and the pads on the semiconductor chip being electrically connected to the pins via a first metal lead.

[0020] The bottom surface of the annular side of the top cover is attached to the upper surface of the casing of the substrate.

[0021] In some embodiments, the substrate includes a plurality of discrete pins and an isolation layer that fills the space between adjacent pins;

[0022] The semiconductor chip includes a back side and a functional side, the functional side having a raised external protrusion, the semiconductor chip being flip-mounted on the upper surface of the pin, and the external protrusion on the functional side of the semiconductor chip being soldered to the pin.

[0023] The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

[0024] In some embodiments, the substrate includes a base island and a plurality of discrete pins located around the base island, and the space between the base island and the pins and the space between adjacent pins is filled with an isolation layer;

[0025] The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the base island, and the pads on the semiconductor chip being electrically connected to the pins via a second metal lead.

[0026] The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

[0027] Some embodiments of this application also provide a method for forming a cavity-like encapsulation structure, including:

[0028] Provide substrate;

[0029] A semiconductor chip is mounted on the upper surface of the substrate, and the semiconductor chip is electrically connected to the substrate;

[0030] A thermally conductive material layer is formed on the upper surface of the substrate to cover the semiconductor chip;

[0031] A top cover with a fixed cooling pipe is provided, the top cover including a top and a raised annular side portion located on the lower surface of the top, the cooling pipe for injecting coolant, the cooling pipe including an inlet end, an outlet end and a pipe portion connecting the outlet end and the inlet end, the inlet end and the outlet end of the cooling pipe being fixed in the top cover, and the pipe portion of the cooling pipe being suspended below the lower surface of the top of the top cover;

[0032] The bottom surface of the annular side of the top cover is attached to the upper surface of the substrate surrounding the semiconductor chip and the thermally conductive material layer, while the pipe portion of the cooling channel is embedded in the thermally conductive material layer, forming a sealed cavity between the top cover and the upper surface of the substrate.

[0033] In some embodiments, after attaching the bottom surface of the annular side of the top cover to the upper surface of the substrate surrounding the semiconductor chip and the thermally conductive material layer, and embedding the pipe portion of the cooling channel into the thermally conductive material layer, the method further includes: curing the thermally conductive material layer.

[0034] In some embodiments, the process of fixing the inlet and outlet ends of the cooling pipe in the upper cover includes: forming two perforations in the upper cover; and fixing the outer walls of the inlet and outlet ends of the cooling pipe to the inner walls of the corresponding perforations in the upper cover using sealant.

[0035] In some embodiments, both perforations are located in the annular side of the top cover, and the inlet and outlet ends of the corresponding cooling pipes are respectively fixed in the two perforations in the annular side of the top cover and extend from the outer side wall of the annular side.

[0036] In some embodiments, both perforations are located in the top of the cover, and the inlet and outlet ends of the corresponding cooling pipes are fixed in the two perforations in the top of the cover and extend from the upper surface of the top.

[0037] In some embodiments, one of the two perforations is located in the top of the cover and the other is located in the annular side of the cover. One end of the corresponding cooling pipe inlet and outlet is fixed in the perforation in the top of the cover and extends from the upper surface of the top, while the other end is fixed in the perforation in the annular side of the cover and extends from the outer wall of the annular side.

[0038] In some embodiments, the cooling conduit is partially embedded in a thermally conductive material layer above or around the semiconductor chip.

[0039] In some embodiments, the cooling pipe portion is horizontally arranged or protrudes towards the lower surface of the top of the cover.

[0040] In some embodiments, the material of the thermally conductive material layer is thermally conductive silicone grease, thermally conductive gel, or thermosetting polymer; the coolant is deionized water, alcohol-based solution, fluorinated liquid (hydrofluoroether), mineral oil, or silicone oil.

[0041] In some embodiments, the process for forming the thermally conductive material layer includes coating.

[0042] In some embodiments, when the cooling pipe dissipates heat, the coolant is injected from the inlet end and flows out from the outlet end, or after the coolant is injected into the cooling pipe, the inlet and outlet ends are sealed to enclose the coolant within the cooling pipe.

[0043] In some embodiments, the substrate includes: a flange base, a housing attached to an edge region of the upper surface of the flange base, wherein a pin is fixed in the housing, and the housing exposes the two end surfaces of the pin.

[0044] The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the flange substrate, and the pads on the semiconductor chip being electrically connected to the pins via a first metal lead.

[0045] The bottom surface of the annular side of the top cover is attached to the upper surface of the casing of the substrate.

[0046] In some embodiments, the substrate includes a plurality of discrete pins and an isolation layer that fills the space between adjacent pins;

[0047] The semiconductor chip includes a back side and a functional side, the functional side having a raised external protrusion, the semiconductor chip being flip-mounted on the upper surface of the pin, and the external protrusion on the functional side of the semiconductor chip being soldered to the pin.

[0048] The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

[0049] In some embodiments, the substrate includes a base island and a plurality of discrete pins located around the base island, and the space between the base island and the pins and the space between adjacent pins is filled with an isolation layer;

[0050] The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the base island, and the pads on the semiconductor chip being electrically connected to the pins via a second metal lead.

[0051] The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

[0052] The cavity-type packaging structure and its forming method in some of the foregoing embodiments of this application include: a substrate; a semiconductor chip mounted on the upper surface of the substrate, the semiconductor chip being electrically connected to the substrate; a thermally conductive material layer located on the upper surface of the substrate and covering the semiconductor chip; a top cover, the top cover including a top and a raised annular side portion located on the lower surface of the top, the bottom surface of the annular side portion of the top cover being attached to the upper surface of the substrate surrounding the semiconductor chip and the thermally conductive material layer, a sealed cavity being formed between the top cover and the upper surface of the substrate; and a cooling pipe for injecting coolant, the cooling pipe including an inlet end, an outlet end, and a pipe portion connecting the outlet end and the inlet end, the inlet end and the outlet end of the cooling pipe being fixed in the top cover, and the pipe portion of the cooling pipe being suspended below the top of the top cover and embedded in the thermally conductive material layer. Because the semiconductor chip is covered by a thermally conductive material layer, the inlet and outlet ends of the cooling pipe are fixed in the top cover, and the pipe portion of the cooling pipe is suspended below the top of the top cover and embedded in the thermally conductive material layer, the heat generated by the semiconductor chip can be quickly conducted to the coolant in the cooling pipe for release through the thermally conductive material layer, thereby improving the heat dissipation performance and efficiency of the semiconductor chip in the cavity-type packaging structure. Attached Figure Description

[0053] Figures 1-8 This is a schematic diagram illustrating the formation process of the cavity-type encapsulation structure in some embodiments of the present invention;

[0054] Figure 9 This is a schematic diagram illustrating the formation process of a cavity-type encapsulation structure according to other embodiments of the present invention;

[0055] Figure 10 This is a schematic diagram illustrating the formation process of a cavity-type encapsulation structure according to other embodiments of the present invention;

[0056] Figure 11 This is a schematic diagram illustrating the formation process of a cavity-type encapsulation structure according to other embodiments of the present invention;

[0057] Figure 12 This is a schematic diagram illustrating the formation process of a cavity-type encapsulation structure according to other embodiments of the present invention. Detailed Implementation

[0058] The specific embodiments of this application will be described in detail below with reference to the accompanying drawings. In describing the embodiments of this application in detail, for ease of explanation, the schematic diagrams may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of this application. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0059] This application first provides a method for forming a cavity-like encapsulation structure, and the method is described in detail below with reference to the accompanying drawings.

[0060] refer to Figure 1 Substrate 100 is provided.

[0061] The substrate serves as a carrier for subsequent processes. In this embodiment, the substrate 100 includes: a flange base 101, a housing 105 attached to the upper surface edge region of the flange base 101, a pin 107 fixed in the housing 105, and the housing 105 exposing the two end surfaces of the pin.

[0062] The flange base 101 serves two purposes: firstly, it supports the subsequently mounted semiconductor chip and forms a sealed cavity between itself, the housing, and the subsequent mounting cover, with the subsequently mounted semiconductor chip located within the sealed cavity; secondly, the flange base 101 also serves for heat dissipation of the subsequently mounted semiconductor chip.

[0063] The flange base 101 is made of metal. In some embodiments, the metal may be one or more of Cu, W, Al, Ti, Ag, Au, Pt, and Ni.

[0064] The flange base 101 can be a single-layer or multi-layer structure. In some embodiments, the flange base 101 is a three-layer structure, including a first metal layer (not shown in the figure), an intermediate layer (not shown in the figure) located on the first metal layer, and a second metal layer (not shown in the figure) located on the intermediate layer. The first and second metal layers are made of Cu, and the intermediate layer is made of Mo or ceramic. The flange base with this structure has a small coefficient of thermal expansion, low stress, and good heat dissipation performance, which prevents delamination defects of the subsequently mounted RF chip and improves the heat dissipation efficiency of the RF chip, thereby improving the electrical performance of the cavity-type packaging structure.

[0065] In some embodiments, the flange base 101 may include a central region and an edge region surrounding the central region, on which a semiconductor chip is subsequently mounted, and on which a housing 105 is mounted.

[0066] The enclosure 105 serves two purposes: firstly, it supports the pins 107, allowing the pins 107 to be installed on the upper sides or around the flange base 101, and electrically isolating the pins 107 from the flange base 101; secondly, the enclosure 105 also forms a sealed cavity between the flange base 101 and the subsequently attached top cover.

[0067] The housing 105 is a hollow ring and is attached to the upper surface edge area of ​​the flange base 101, that is, the middle area surrounding the flange base 101.

[0068] In some embodiments, the enclosure 105 is attached to the edge region surface of the flange base 101 by an adhesive 106.

[0069] In some embodiments, the casing 105 is made of ceramic or insulating resin.

[0070] The pin 107 is used to lead out the electrical signals of the subsequently mounted semiconductor chip for electrical connection to other devices. The pin 107 is located on the upper sides or around the flange base 101. The pin 107 includes two ends, one end facing the middle area near the flange base 101 for electrical connection with the semiconductor chip, and the other end facing away from the middle area of ​​the flange base 101 for electrical connection with other devices outside the cavity-like package structure formed in this application.

[0071] In some embodiments, the pin 107 may be fixed to the upper surface of the housing 105 or to the housing 105.

[0072] refer to Figure 2 A semiconductor chip 200 is mounted on the upper surface of the substrate 100, and the semiconductor chip 200 is electrically connected to the substrate 100.

[0073] In this embodiment, the back side of the semiconductor chip 200 is attached to the upper surface of the flange substrate 101, and the semiconductor chip 200 is electrically connected to the pins 107 on the substrate 100.

[0074] In some embodiments, the semiconductor chip 200 includes an opposing back surface and a functional surface, the functional surface having pads (not shown), and the pads on the semiconductor chip 200 are electrically connected to the pin 107 via a first metal lead 203. In some embodiments, the pads are made of one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver.

[0075] In some embodiments, the semiconductor chip 200 is a radio frequency (RF) chip, a core component of a mobile communication system, primarily used to process high-frequency (including RF transceiver, frequency synthesis, and power amplification) RF signals, typically in the frequency range of several kilohertz (kHz) to tens of gigahertz (GHz). In other embodiments, the semiconductor chip 200 may also be a signal processing chip, a logic control chip, a memory chip, a sensor chip, or a power supply chip.

[0076] The back of the semiconductor chip 200 is attached to the upper surface of the flange base 101 using a thermally insulating adhesive 201. The heat generated by the semiconductor chip 200 is transferred to the flange base 101 through the thermally insulating adhesive 201.

[0077] The number of mounted semiconductor chips 200 can be one or more (greater than or equal to two). In some embodiments, when the number of mounted semiconductor chips 200 is multiple, the multiple semiconductor chips 200 can be interconnected through a third metal lead 204. The materials of the first metal lead 203 and the third metal lead 204 can be one or more of gold, aluminum, copper, silver, nickel, and palladium, and the forming process includes a wire bonding process.

[0078] refer to Figure 3 A thermally conductive material layer 108 is formed on the upper surface of the substrate 100 to cover the semiconductor chip 200.

[0079] The thermally conductive material layer 108 can effectively reduce the contact thermal resistance between different structures and is used to conduct the heat generated by the semiconductor chip 200 to the cooling pipes that are subsequently mounted. The coolant in the cooling pipes will release the absorbed heat, thereby realizing the rapid transfer of the heat generated by the semiconductor chip 200 to the cooling pipes for release, which improves the heat dissipation performance and efficiency of the semiconductor chip 200.

[0080] The material of the thermally conductive material layer 108 can be thermally conductive silicone grease, thermally conductive gel, or thermosetting polymer material.

[0081] Thermal grease is a paste-like thermal interface material, generally used for heat dissipation in high-power electronic devices. It is widely used due to its excellent thermal conductivity, as it directly reduces the air gap between contact surfaces. Thermal grease is typically produced by mixing and degassing a silicone oil matrix with inorganic fillers of high thermal conductivity. The inorganic fillers filling the silicone oil matrix determine the thermal conductivity of the grease. These inorganic fillers are mainly ceramic thermally conductive particles such as Al2O3, AlN, BN, SiC, and ZnO.

[0082] The thermally conductive gel is a particle-filled polymer, and its matrix material, silicone resin, is generally subjected to weak cross-linking curing treatment to enhance the cohesiveness of the material. The thermally conductive gel can possess both liquid and solid properties, dispersing like a liquid. Its characteristics include high thermal conductivity, low surface energy, and good consistency, thereby reducing contact thermal resistance. After curing, it can form a more robust structure, eliminating the pumping effect while ensuring low thermal resistance. Furthermore, its low modulus properties can also absorb stress.

[0083] The thermosetting polymer material is a liquid polymer material applied to the heat dissipation element inside a microelectronic package and cured at room temperature or under heating conditions. It exhibits excellent thermal conductivity, enabling rapid heat transfer between interfaces. The thermal interface material layer naturally forms strong bonds during the curing process without the need for external pressure. The thermosetting polymer material is generally prepared by adding thermally conductive fillers to an epoxy resin polymer matrix. Similar to thermally conductive gels, the thermal interface material layer possesses both liquid and solid states; due to its greater rigidity in the solid state, its adhesive strength is also stronger.

[0084] In some embodiments, the thermally conductive material layer 108 completely covers the semiconductor chip 200, and the thickness of the thermally conductive material layer 108 is greater than the mounting height of the semiconductor chip 200 (the distance between the highest point of the first metal lead 203 and the third metal lead 204 and the upper surface of the flange substrate 101). In some embodiments, the formation process of the thermally conductive material layer 108 includes coating. The coated thermally conductive material layer 108 has a certain degree of flexibility, so that when the top cover is subsequently mounted on the upper surface of the substrate, the pipe portion of the cooling channel can be embedded in the thermally conductive material layer 108 at the same time, and then the thermally conductive material layer 108 is cured.

[0085] refer to Figures 4-6 Provides a top cover 300 with a fixed cooling pipe 306 (see reference). Figure 6 The upper cover 300 includes a top 301 and a raised annular side 302 located on the lower surface of the top 301. The cooling pipe 306 is used to inject coolant. The cooling pipe 306 includes an inlet end 31, an outlet end 32, and a pipe portion 33 connecting the outlet end 32 and the inlet end 31. The inlet end 31 and the outlet end 32 of the cooling pipe 306 are fixed in the upper cover 300, and the pipe portion 33 of the cooling pipe 306 is suspended below the lower surface of the top 301 of the upper cover 300.

[0086] After the upper cover 300 is subsequently attached to the upper surface of the substrate 100, it is used to form a sealed cavity between the upper cover 300 and the substrate 100.

[0087] In some embodiments, the process of fixing the inlet end 31 and outlet end 32 of the cooling pipe 306 in the upper cover 300 includes: referring to Figure 4 A top cover 300 is provided, the top cover 300 including a top 301 and a raised annular side portion 302 located on the lower surface of the top 301, and two perforations 303 are formed in the top cover 300; Reference Figure 5 A cooling pipe 306 is provided, the cooling pipe 306 including an inlet end 31, an outlet end 32, and a pipe section 33 connecting the outlet end 32 and the inlet end 31; Reference Figure 6The outer walls of the inlet end 31 and outlet end 32 of the cooling pipe 306 are fixed to the inner walls of the corresponding perforations 303 in the top cover 300 using sealant (not shown in the figure).

[0088] In some embodiments, the top cover 300 may be made of a non-metallic material to prevent interference with the radio frequency signals emitted by the semiconductor chip 200. In one embodiment, the material of the top cover 300 is ceramic, such as alumina. In another embodiment, the material of the top cover 300 may also be epoxy resin.

[0089] Continue to refer to Figure 4 or Figure 6 The top cover 300 is inverted "U" shape. The top 301 and the annular side 302 are integral structures. In some embodiments, the top 301 has flat upper and lower surfaces, and the annular side wall 302 protrudes from the lower surface of the edge region of the top 301 (the top 301 may include a central region and an edge region surrounding the central region). The shape of the annular side 302 corresponds to the shape of the subsequent mounting position on the upper surface of the substrate. The annular side 302 is annular in shape, and the annular ring can be a circular ring, an elliptical ring, or a polygonal ring (it can be a triangular ring, a quadrilateral ring, or a pentagonal ring, etc.).

[0090] Two through holes 303 are formed in the upper cover 300. The through holes 303 are used to fix the inlet end 31 and the outlet end 32 of the cooling pipe 306, so that the pipe portion 33 of the cooling pipe 306 is suspended below the lower surface of the top 301 of the upper cover 300. In this embodiment, reference is made to... Figure 4 or Figure 6 The two perforations 303 in the upper cover 300 are both located in the annular side portion 302 of the upper cover 300. The inlet end 31 and outlet end 32 of the cooling pipe 306 are respectively fixed in the two perforations 303 of the annular side portion 302 of the upper cover 300 and extend from the outer side wall of the annular side portion 302.

[0091] In some other embodiments, the two perforations may also be located in the top 301 of the top cover 300, and the inlet end 31 and outlet end 32 of the corresponding cooling pipe 306 are fixed in the two perforations in the top 301 of the top cover 300 and extend from the upper surface of the top 301.

[0092] In some other embodiments, one of the two perforations is located in the top 301 of the top cover 300, and the other is located in the annular side 302 of the top cover 300. One end of the corresponding cooling pipe 306, the inlet end 31 and the outlet end 32, is fixed in the perforation in the top 301 of the top cover 300 and extends from the upper surface of the top 301, while the other end is fixed in the perforation in the annular side 302 of the top cover 300 and extends from the outer side wall of the annular side 302.

[0093] Continue to refer to Figure 5 or Figure 6 The cooling pipe 306 includes two ports, specifically an inlet end 31 and an outlet end 32. A pipe section 33 connects the inlet end 31 and the outlet end 32. The inlet end 31, the outlet end 32, and the pipe section 33 are all hollow structures. A coolant (such as deionized water, alcohol-based solution, fluorinated liquid (hydrofluoroether), mineral oil, or silicone oil) is subsequently injected into the cooling pipe 306. The semiconductor chip 200 (see reference) Figure 8 or Figure 9 The heat generated is quickly conducted through the thermally conductive material layer 108 to the coolant 307 in the cooling pipe 306 for release, thereby improving the heat dissipation performance and efficiency of the semiconductor chip 200 in the cavity-type packaging structure.

[0094] The cooling conduit 306 is formed of a material with high thermal conductivity. In some embodiments, the material with high thermal conductivity includes metals (e.g., copper, aluminum, gold, nickel, steel, or stainless steel).

[0095] refer to Figure 7 The bottom surface of the annular side 302 of the top cover 300 is attached to the upper surface of the substrate 100 surrounding the semiconductor chip 200 and the thermally conductive material layer 108, while the pipe portion 33 of the cooling pipe 306 is embedded in the thermally conductive material layer 108, forming a sealed cavity between the top cover 300 and the upper surface of the substrate 100.

[0096] In this embodiment, the bottom surface of the annular side 302 of the top cover 300 is attached to the upper surface of the casing 105 of the substrate 100. In a specific embodiment, the bottom surface of the annular side 302 of the top cover 300 is attached to the upper surface of the casing 105 of the substrate 100 by an adhesive layer 304.

[0097] In this embodiment, the pipe portion 33 of the cooling pipe 306 is arranged horizontally, and the pipe portion 33 of the cooling pipe 306 is embedded in a portion of the thermally conductive material layer 108 above the semiconductor chip 200.

[0098] In some embodiments, after attaching the bottom surface of the annular side 302 of the top cover 300 to the upper surface of the substrate 100 surrounding the semiconductor chip 200 and the thermally conductive material layer 108, and embedding the pipe portion 33 of the cooling pipe 306 into the thermally conductive material layer 108, the method further includes: curing the thermally conductive material layer 108.

[0099] Thus, the cavity-like encapsulation structure of this application is formed. When applying the cavity-like encapsulation structure of this application subsequently, refer to... Figure 8 or Figure 9 Coolant 307 is injected into the cooling pipe 306 in the cavity-type packaging structure. The heat generated by the semiconductor chip 200 is conducted to the coolant 307 in the cooling pipe 306 through the thermally conductive material layer 108 for release, thereby improving the heat dissipation performance and efficiency of the semiconductor chip 200 in the cavity-type packaging structure.

[0100] In some embodiments, the coolant 307 is deionized water, alcohol-based solution, fluorinated liquid (hydrofluoroether), mineral oil, or silicone oil.

[0101] In some embodiments, reference Figure 8 The coolant 307 flows within the cooling pipe 306, meaning that when the cooling pipe 306 dissipates heat, the coolant 307 flows from the inlet end 31 (reference) of the cooling pipe 306. Figure 6 Injected from outlet end 32 (reference) Figure 6 The coolant 307 flows out to further improve heat dissipation performance and efficiency. In a specific embodiment, during application, the inlet end 31 of the cooling pipe 306 in the cavity-like encapsulation structure is connected to an external input pipe 310, and the outlet end 32 of the cooling pipe 306 is connected to an external output pipe 311. The external input pipe 310 and the external output pipe 311 are connected to corresponding pumps. The pumps are used to continuously pump coolant 307 into the external input pipe 310 and the cooling pipe 306, and to allow coolant 307 to flow out from the external output pipe 311. After the heat in the coolant 307 flowing out from the external output pipe 311 is released, it can be pumped back into the cooling pipe 306 for circulation.

[0102] In other embodiments, reference is made to... Figure 9 After the coolant 307 is injected into the cooling pipe 306, the inlet and outlet ends of the cooling pipe 306 are sealed, thus sealing the coolant 307 in the cooling pipe 306.

[0103] Other embodiments of the present invention also provide a method for forming a cavity-like encapsulation structure, see reference. Figure 10 This embodiment is different from the previous embodiment ( Figures 1-9The main differences in the embodiment shown include: the pipe portion 33 of the cooling pipe 306 is convex in the direction away from the lower surface of the top 301 of the upper cover 300, and the pipe portion 33 of the cooling pipe 306 is embedded in a portion of the thermally conductive material layer 108 surrounding the semiconductor chip 200, and the pipe portion 33 of the cooling pipe 306 does not contact the first metal lead 203 and the third metal lead 204, so that the pipe portion 33 of the cooling pipe 306 can be closer to the semiconductor chip 200, thereby better dissipating heat from the semiconductor chip 200.

[0104] Other embodiments of the present invention also provide a method for forming a cavity-like encapsulation structure, see reference. Figure 11 This embodiment is different from the previous embodiment ( Figures 1-10 The main differences in the illustrated embodiments include: the substrate 100 includes a plurality of discrete pins 104 and an isolation layer 102 filling the space between adjacent pins 104; the semiconductor chip 200 includes opposing back surfaces and functional surfaces, the functional surface having raised external protrusions 206, the semiconductor chip 200 being flip-mounted on the upper surface of the pins 104, and the external protrusions 206 on the functional surface of the semiconductor chip 200 being soldered to the pins 104; the bottom surface of the annular side 302 of the top cover 300 is attached to the pins 104 and the upper surface of the isolation layer 102 surrounding the semiconductor chip 200 (for the specific configuration of the cooling channel 306, please refer to the corresponding part of the foregoing embodiments for definition or description, which will not be repeated here). This allows for the packaging and heat dissipation of substrates with different structures.

[0105] In some embodiments, the plurality of pins 104 are discrete, the pins 104 are made of metal, and the isolation layer 102 is made of insulating resin.

[0106] In some embodiments, the external bumps 206 on the functional surface of the semiconductor chip 200 may be solder bumps or include metal bumps and solder bumps located on the top surface of the metal bumps. In some embodiments, the metal bumps are made of one or more of aluminum, nickel, tin, tungsten, platinum, copper, titanium, chromium, tantalum, gold, and silver, and the solder bumps are made of one or more of tin, tin-silver, tin-lead, tin-silver-copper, tin-silver-zinc, tin-zinc, tin-bismuth-indium, tin-indium, tin-gold, tin-copper, tin-zinc-indium, or tin-silver-antimony.

[0107] In some embodiments, the bottom surface of the annular side 302 of the top cover 300 is attached to the upper surface of the pins 104 and the isolation layer 102 surrounding the semiconductor chip 200 by an adhesive layer 314.

[0108] Other embodiments of the present invention also provide a method for forming a cavity-like encapsulation structure, see reference. Figure 12This embodiment is different from the previous embodiment ( Figures 1-11 The main differences in the illustrated embodiment include: the substrate 100 includes a base island 103 and a plurality of discrete pins 104 surrounding the base island 103; the space between the base island 103 and the pins 104, as well as the space between adjacent pins 104, is filled with an isolation layer 102; the semiconductor chip 200 includes opposing back surfaces and functional surfaces, the functional surfaces having pads; the back surface of the semiconductor chip 200 is mounted on the upper surface of the base island 103; the pads on the semiconductor chip 200 are electrically connected to the pins 104 via second metal leads 207; the bottom surface of the annular side 302 of the top cover 300 is mounted on the pins 104 surrounding the semiconductor chip 200 and on the upper surface of the isolation layer 102 (for the specific configuration of the cooling channel 306, please refer to the corresponding definition or description in the foregoing embodiments, which will not be repeated here). This allows for the packaging and heat dissipation of substrates with different structures.

[0109] Some embodiments of this application also provide a cavity-like encapsulation structure, see reference. Figure 7 ,include:

[0110] substrate 100;

[0111] A semiconductor chip 200 is mounted on the upper surface of the substrate 100, and the semiconductor chip 200 is electrically connected to the substrate 100.

[0112] A thermally conductive material layer 108 is located on the upper surface of the substrate 100 and covers the semiconductor chip 200;

[0113] The upper cover 300 includes a top 301 and a raised annular side 302 located on the lower surface of the top 301. The bottom surface of the annular side 302 of the upper cover 300 is attached to the upper surface of the substrate 100 surrounding the semiconductor chip 200 and the thermally conductive material layer 108. A sealed cavity is formed between the upper cover 300 and the upper surface of the substrate 100.

[0114] Cooling pipe 306, into which coolant is injected, includes an inlet end 31 (reference). Figure 6 ), Export end 32 (reference) Figure 6 The cooling pipe 306 has an outlet end 32 and an inlet end 31 connected by a pipe section 33. The inlet end 31 and the outlet end 32 of the cooling pipe 306 are fixed in the upper cover 300. The pipe section 33 of the cooling pipe 306 is suspended below the top 301 of the upper cover 300 and embedded in the thermally conductive material layer 108.

[0115] In some embodiments, continue to refer to Figure 7The inlet end 31 and outlet end 32 of the cooling pipe 306 are both fixed in the annular side portion 302 of the upper cover 300 and extend out from the outer side wall of the annular side portion 302.

[0116] In other embodiments, the inlet end 31 and the outlet end 32 of the cooling pipe 306 are both fixed in the top 301 of the cover 300 and extend from the upper surface of the top 301.

[0117] In other embodiments, one end of the cooling conduit 306, either the inlet end 31 or the outlet end 32, is fixed in the top 301 of the top cover 300 and extends from the upper surface of the top 301, while the other end is fixed in the annular side portion 302 of the top cover 300 and extends from the outer side wall of the annular side portion 302.

[0118] In some embodiments, reference Figure 7 , Figure 11 or Figure 12 The pipe portion 33 of the cooling pipe 306 is embedded in a portion of the thermally conductive material layer 108 above the semiconductor chip.

[0119] In other embodiments, reference is made to... Figure 10 The pipe portion 33 of the cooling pipe 306 is embedded in a portion of the thermally conductive material layer 108 surrounding the semiconductor chip 200.

[0120] In some embodiments, reference Figure 7 or Figure 12 The pipe section 33 of the cooling pipe 306 is arranged horizontally.

[0121] In other embodiments, reference is made to... Figure 10 or Figure 11 The pipe portion 33 of the cooling pipe 306 is convex in a direction away from the lower surface of the top 301 of the upper cover 300.

[0122] In some embodiments, the material of the thermally conductive material layer 108 is thermally conductive silicone grease, thermally conductive gel, or thermosetting polymer; the coolant is deionized water, alcohol-based solution, fluorinated liquid (hydrofluoroether), mineral oil, or silicone oil.

[0123] In some embodiments, reference Figure 8 When the cooling pipe 306 dissipates heat, the coolant 307 is injected from the inlet end of the cooling pipe 306 and flows out from the outlet end.

[0124] In other embodiments, after the coolant 307 is injected into the cooling pipe 306, the inlet and outlet ends of the cooling pipe 306 are sealed to encapsulate the coolant 307 within the cooling pipe 306.

[0125] In some embodiments, continue to refer to Figure 7 The substrate 100 includes: a flange base 101; a housing 105 attached to the upper surface edge region of the flange base 101; pins 107 fixed in the housing 105; and the housing 105 exposing the two end surfaces of the pins 107; the semiconductor chip 200 includes opposing back surfaces and functional surfaces; the functional surfaces have pads; the back surface of the semiconductor chip 200 is attached to the upper surface of the flange base 101; and the pads on the semiconductor chip 200 are electrically connected to the pins 107 via first metal leads 203; and the bottom surface of the annular side portion 302 of the top cover 300 is attached to the upper surface of the housing 105 of the substrate 100.

[0126] In other embodiments, reference is made to... Figure 11 The substrate 100 includes a plurality of discrete pins 104 and an isolation layer 102 filling the space between adjacent pins 104; the semiconductor chip 200 includes a back side and a functional side, the functional side having a raised external protrusion 206, the semiconductor chip 200 being flip-mounted on the upper surface of the pins 104, and the external protrusion 206 on the functional side of the semiconductor chip 200 being soldered to the pins 104; the bottom surface of the annular side 302 of the top cover 300 is attached to the upper surface of the pins 104 and the isolation layer 102 surrounding the semiconductor chip 200.

[0127] In other embodiments, reference is made to... Figure 12 The substrate includes a base island 103 and a plurality of discrete pins 104 located around the base island 103. The space between the base island 103 and the pins 104, as well as the space between adjacent pins 104, is filled with an isolation layer 102. The semiconductor chip 200 includes opposing back surfaces and functional surfaces. The functional surfaces have pads. The back surface of the semiconductor chip 200 is mounted on the upper surface of the base island 103. The pads on the semiconductor chip 200 are electrically connected to the pins 104 via second metal leads 207. The bottom surface of the annular side 302 of the top cover 300 is mounted on the pins 104 and the upper surface of the isolation layer 102 surrounding the semiconductor chip 200.

[0128] It should be noted that the terms "comprising" and "having," and their variations, used in this application are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context. It should be understood that such data can be used interchangeably where appropriate. Furthermore, the embodiments and features described in the embodiments of this application can be combined with each other unless otherwise specified. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this application. In the various embodiments described above, each embodiment focuses on its differences from other embodiments; similar or identical parts between embodiments can be referred to (or understood) interchangeably.

[0129] Although this application has been disclosed above with reference to preferred embodiments, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications to the technical solutions of this application by utilizing the methods and techniques disclosed above without departing from the spirit and scope of this application. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall fall within the protection scope of the technical solutions of this application.

Claims

1. A cavity-like encapsulation structure, characterized in that, include: substrate; A semiconductor chip is mounted on the upper surface of the substrate, and the semiconductor chip is electrically connected to the substrate; A thermally conductive material layer is coated on the upper surface of the substrate and covers the semiconductor chip. The material of the thermally conductive material layer is thermally conductive silicone grease or thermally conductive gel. The top cover includes a top and a raised annular side portion located on the lower surface of the top. The bottom surface of the annular side portion of the top cover is attached to the upper surface of the substrate surrounding the semiconductor chip and the thermally conductive material layer. A sealed cavity is formed between the top cover and the upper surface of the substrate. There is a continuous gap between the thermally conductive material layer and the top of the top cover and the annular side portion. A cooling pipe for injecting coolant, the cooling pipe including an inlet end, an outlet end and a pipe section connecting the outlet end and the inlet end, the inlet end and the outlet end of the cooling pipe being fixed in the upper cover, the pipe section of the cooling pipe being convex in a direction away from the top lower surface of the upper cover, the pipe section of the cooling pipe being suspended below the top of the upper cover and embedded in the thermally conductive material layer on the side of the semiconductor chip.

2. The cavity-type encapsulation structure according to claim 1, characterized in that, The inlet and outlet ends of the cooling pipe are both fixed in the annular side of the upper cover and extend from the outer side wall of the annular side.

3. The cavity-type encapsulation structure according to claim 1, characterized in that, The inlet and outlet ends of the cooling pipe are both fixed in the top of the cover and extend from the upper surface of the cover.

4. The cavity-type encapsulation structure according to claim 1, characterized in that, One end of the cooling pipe is fixed in the top of the cover and extends from the upper surface of the top, while the other end is fixed in the annular side of the cover and extends from the outer wall of the annular side.

5. The cavity-type encapsulation structure according to claim 1, characterized in that, The coolant is deionized water, alcohol-based solution, fluorinated liquid, mineral oil, or silicone oil.

6. The cavity-type encapsulation structure according to claim 1 or 5, characterized in that, When the cooling pipe dissipates heat, the coolant is injected from the inlet end of the cooling pipe and flows out from the outlet end, or after the coolant is injected into the cooling pipe, the inlet end and the outlet end are sealed to seal the coolant in the cooling pipe.

7. The cavity-type encapsulation structure according to claim 1, characterized in that, The substrate includes: a flange base, a housing attached to the upper surface edge region of the flange base, a pin fixed in the housing, and the housing exposing the two end surfaces of the pin; The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the flange substrate, and the pads on the semiconductor chip being electrically connected to the pins via a first metal lead. The bottom surface of the annular side of the top cover is attached to the upper surface of the casing of the substrate.

8. The cavity-type encapsulation structure according to claim 1, characterized in that, The substrate includes a plurality of discrete pins and an isolation layer that fills the space between adjacent pins; The semiconductor chip includes a back side and a functional side, the functional side having a raised external protrusion, the semiconductor chip being flip-mounted on the upper surface of the pin, and the external protrusion on the functional side of the semiconductor chip being soldered to the pin. The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

9. The cavity-type encapsulation structure according to claim 1, characterized in that, The substrate includes a base island and a plurality of discrete pins located around the base island, and the space between the base island and the pins and the space between adjacent pins are filled with an isolation layer; The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the base island, and the pads on the semiconductor chip being electrically connected to the pins via a second metal lead. The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

10. A method for forming a cavity-like encapsulation structure, characterized in that, include: Provide substrate; A semiconductor chip is mounted on the upper surface of the substrate, and the semiconductor chip is electrically connected to the substrate; A thermally conductive material layer is coated on the upper surface of the substrate to cover the semiconductor chip. The material of the thermally conductive material layer is thermally conductive silicone grease or thermally conductive gel, and the coated thermally conductive material layer has flexibility. A top cover with a fixed cooling pipe is provided. The top cover includes a top and a raised annular side portion located on the lower surface of the top. The cooling pipe is for injecting coolant and includes an inlet end, an outlet end, and a pipe portion connecting the outlet end and the inlet end. The inlet end and outlet end of the cooling pipe are fixed in the top cover. The pipe portion of the cooling pipe is suspended below the lower surface of the top of the top cover and is convex in a direction away from the lower surface of the top of the top cover. The bottom surface of the annular side of the top cover is attached to the upper surface of the substrate surrounding the semiconductor chip and the thermally conductive material layer. At the same time, the pipe portion of the cooling channel is embedded in the thermally conductive material layer on the side of the semiconductor chip. A sealed cavity is formed between the top cover and the upper surface of the substrate. There is a continuous gap between the thermally conductive material layer, the top of the top cover, and the annular side.

11. The method for forming a cavity-like encapsulation structure according to claim 10, characterized in that, After attaching the bottom surface of the annular side of the top cover to the upper surface of the substrate surrounding the semiconductor chip and the thermally conductive material layer, and embedding the pipe portion of the cooling channel into the thermally conductive material layer, the method further includes: curing the thermally conductive material layer.

12. The method for forming a cavity-like encapsulation structure according to claim 10, characterized in that, The process of fixing the inlet and outlet ends of the cooling pipe in the upper cover includes: forming two perforations in the upper cover; and fixing the outer walls of the inlet and outlet ends of the cooling pipe to the inner walls of the corresponding perforations in the upper cover using sealant.

13. The method for forming a cavity-like encapsulation structure according to claim 12, characterized in that, Both perforations are located in the annular side of the upper cover. The inlet and outlet ends of the corresponding cooling pipes are fixed in the two perforations in the annular side of the upper cover and extend out from the outer wall of the annular side.

14. The method for forming a cavity-like encapsulation structure according to claim 12, characterized in that, Both perforations are located in the top of the cover, and the inlet and outlet ends of the corresponding cooling pipes are fixed in the two perforations in the top of the cover and extend from the upper surface of the top.

15. The method for forming a cavity-like encapsulation structure according to claim 12, characterized in that, One of the two perforations is located in the top of the cover and the other is located in the annular side of the cover. One end of the inlet and outlet of the corresponding cooling pipe is fixed in the perforation in the top of the cover and extends from the upper surface of the top, while the other end is fixed in the perforation in the annular side of the cover and extends from the outer wall of the annular side.

16. The method for forming a cavity-like encapsulation structure according to claim 10, characterized in that, The coolant is deionized water, alcohol-based solution, fluorinated liquid, mineral oil, or silicone oil.

17. The method for forming a cavity-like encapsulation structure according to claim 16, characterized in that, The process for forming the thermally conductive material layer includes coating.

18. The method for forming a cavity-like encapsulation structure according to claim 10 or 16, characterized in that, When the cooling pipe dissipates heat, the coolant is injected from the inlet end of the cooling pipe and flows out from the outlet end, or after the coolant is injected into the cooling pipe, the inlet end and the outlet end are sealed to seal the coolant in the cooling pipe.

19. The method for forming a cavity-like encapsulation structure according to claim 10, characterized in that, The substrate includes: a flange base, a housing attached to the upper surface edge region of the flange base, a pin fixed in the housing, and the housing exposing the two end surfaces of the pin; The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the flange substrate, and the pads on the semiconductor chip being electrically connected to the pins via a first metal lead. The bottom surface of the annular side of the top cover is attached to the upper surface of the casing of the substrate.

20. The method for forming a cavity-like encapsulation structure according to claim 10, characterized in that, The substrate includes a plurality of discrete pins and an isolation layer that fills the space between adjacent pins; The semiconductor chip includes a back side and a functional side, the functional side having a raised external protrusion, the semiconductor chip being flip-mounted on the upper surface of the pin, and the external protrusion on the functional side of the semiconductor chip being soldered to the pin. The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

21. The method for forming a cavity-like encapsulation structure according to claim 10, characterized in that, The substrate includes a base island and a plurality of discrete pins located around the base island, and the space between the base island and the pins and the space between adjacent pins are filled with an isolation layer; The semiconductor chip includes a back side and a functional side, the functional side having pads, the back side of the semiconductor chip being mounted on the upper surface of the base island, and the pads on the semiconductor chip being electrically connected to the pins via a second metal lead. The bottom surface of the annular side of the top cover is attached to the upper surface of the pins and isolation layer surrounding the semiconductor chip.

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