Semiconductor structure and method of forming a semiconductor structure

Abstract

A semiconductor structure and a method of forming the same. The structure includes: a substrate including an isolation region; a first electrode plate on the isolation region; a first dielectric structure on the first electrode plate; a second electrode plate on the first dielectric structure, a projection of the second electrode plate on the substrate partially or entirely overlaps a projection of the first electrode plate on the substrate; a sidewall structure on sidewalls of the second electrode plate; a passivation layer on the sidewall structure and the first dielectric structure, a dielectric constant of the sidewall structure is greater than a dielectric constant of the passivation layer. The performance of the semiconductor structure is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a semiconductor structure and a method for forming the semiconductor structure. Background Technology

[0002] Digital isolators are core safety components in industrial automation systems. They enable non-contact data and energy transfer between high and low voltage systems while blocking dangerous currents, protecting personnel and equipment. Currently, the digital isolation market primarily offers two isolation methods: electromagnetic coupling and capacitive coupling. Capacitively coupled digital isolation chips, due to their small size, high integration, low power consumption, and high communication speed, are increasingly used in industrial, medical, and automotive fields. However, the performance of existing capacitive isolators still needs improvement. Summary of the Invention

[0003] The technical problem solved by this invention is to provide a semiconductor structure and a method for forming the semiconductor structure to improve the performance of capacitor isolators.

[0004] To address the aforementioned technical problems, the present invention provides a semiconductor structure comprising: a substrate, the substrate including an isolation region and a device region; a first metal layer located on the device region; a first electrode plate located on the isolation region, the first electrode plate being formed simultaneously with the first metal layer; a first dielectric structure located on the first electrode plate and the first metal layer; a second electrode plate located on the first dielectric structure, the projection range of the second electrode plate on the substrate partially or completely overlapping the projection range of the first electrode plate on the substrate; a sidewall structure located on the sidewall of the second electrode plate, the dielectric constant of the sidewall structure exhibiting a gradient distribution; and a passivation layer located on the sidewall structure and the first dielectric structure, the dielectric constant of the sidewall structure being greater than the dielectric constant of the passivation layer.

[0005] Optionally, the dielectric constant of the sidewall structure gradually decreases from the surface of the second electrode plate to the surface of the passivation layer.

[0006] Optionally, the sidewall structure includes several dielectric layers, and the dielectric constant of the several dielectric layers decreases layer by layer from the surface of the second electrode plate to the surface of the passivation layer.

[0007] Optionally, the sidewall structure includes a single dielectric layer, the dielectric constant of which gradually decreases from the surface of the second electrode plate to the surface of the passivation layer.

[0008] Optionally, the dielectric constant of any of the dielectric layers is greater than the dielectric constant of the passivation layer.

[0009] Optionally, the number of dielectric layers is greater than or equal to one.

[0010] Optionally, the thickness of any of the dielectric layers may range from 10% to 30% of the thickness of the second electrode plate.

[0011] Optionally, the material of the sidewall structure includes two or more of nitrogen, silicon, carbon and oxygen.

[0012] Optionally, the sidewall structure may be made of one or more of silicon carbide, silicon nitride, and silicon oxynitride.

[0013] Optionally, the sidewall structure includes a first part and a second part, wherein the first part is located on the sidewall surface of the second electrode plate and the second part is located on the surface of the first dielectric structure.

[0014] Optionally, the top surface of the first portion is lower than the top surface of the second electrode plate.

[0015] Optionally, the height of the first portion is greater than or equal to 50% of the thickness of the second electrode plate.

[0016] Optionally, the extension length of the second portion on the surface of the first dielectric structure is greater than or equal to twice the thickness of the second electrode plate.

[0017] Optionally, the first portion is also located on a portion of the top surface of the second electrode plate.

[0018] Optionally, it also includes: an adhesive layer located on the sidewall of the second electrode plate; the sidewall structure is located on the adhesive layer.

[0019] Optionally, the material of the adhesion layer includes silicon oxide.

[0020] Optionally, the dielectric constant of the sidewall structure is in the range of 4 to 50.

[0021] Optionally, the thickness of the second electrode plate is greater than the thickness of the first electrode plate.

[0022] Optionally, the thickness of the second electrode plate ranges from 0.9 micrometers to 5 micrometers; the thickness of the first electrode plate ranges from 0.3 micrometers to 2 micrometers.

[0023] Optionally, the passivation layer may be made of silicon oxide.

[0024] Optionally, the materials of the second electrode plate and the first electrode plate include metals, including aluminum or aluminum-copper alloys.

[0025] Optionally, the substrate includes: a base, wherein the base of the isolation region further has an isolation structure; and a second dielectric structure located on the base, wherein the first electrode plate is located on the second dielectric structure.

[0026] Optionally, the second dielectric structure further includes: a device structure located on the device region, and a first electrical interconnect structure located on the device structure and electrically connected to the device structure.

[0027] Optionally, it further includes: a second electrical interconnect structure located within the first dielectric structure of the device region, the second electrical interconnect structure being electrically connected to the first metal layer; and a second metal layer located on the first dielectric structure, the second metal layer being electrically connected to the second electrical interconnect structure.

[0028] Accordingly, the present invention also provides a method for forming a semiconductor structure, comprising: providing a substrate, the substrate including an isolation region and a device region; forming a first metal layer on the device region; forming a first electrode plate on the isolation region, the first electrode plate being formed simultaneously with the first metal layer; forming a first dielectric structure on the first electrode plate and the first metal layer; forming a second electrode plate on the first dielectric structure, the projection range of the second electrode plate on the substrate partially or completely overlapping the projection range of the first electrode plate on the substrate; forming a sidewall structure on the sidewall of the second electrode plate, the dielectric constant of the sidewall structure exhibiting a gradient distribution; and forming a passivation layer on the sidewall structure and the first dielectric structure, the dielectric constant of the sidewall structure being greater than the dielectric constant of the passivation layer.

[0029] Optionally, the dielectric constant of the sidewall structure gradually decreases from the surface of the second electrode plate to the surface of the passivation layer.

[0030] Optionally, the sidewall structure includes several dielectric layers, and the dielectric constant of the several dielectric layers decreases layer by layer from the surface of the second electrode plate to the surface of the passivation layer.

[0031] Optionally, the sidewall structure includes a single dielectric layer, the dielectric constant of which gradually decreases from the surface of the second electrode plate to the surface of the passivation layer.

[0032] Optionally, the dielectric constant of any of the dielectric layers is greater than the dielectric constant of the passivation layer.

[0033] Optionally, the number of dielectric layers is greater than or equal to one.

[0034] Optionally, the process for forming the dielectric layer includes a deposition process.

[0035] Optionally, the sidewall structure includes a first part and a second part, wherein the first part is located on the sidewall surface of the second electrode plate and the second part is located on the surface of the first dielectric structure.

[0036] Optionally, the top surface of the first portion is lower than the top surface of the second electrode plate.

[0037] Optionally, the first portion is also located on a portion of the top surface of the second electrode plate.

[0038] Optionally, before forming the sidewall structure on the sidewall of the second electrode plate, the method further includes: forming an adhesion layer on the sidewall of the second electrode plate; the sidewall structure is located on the adhesion layer.

[0039] Optionally, the dielectric constant of the sidewall structure is in the range of 4 to 50.

[0040] Optionally, the substrate includes: a base, wherein the base of the isolation region further has an isolation structure; and a second dielectric structure located on the base, wherein the first electrode plate is located on the second dielectric structure.

[0041] Optionally, it further includes: forming a device structure located on the device region, the device structure being located within the second dielectric structure, and forming a first electrical interconnect structure located on the device structure and electrically connected to the device structure.

[0042] Optionally, it further includes: forming a second electrical interconnect structure located within the first dielectric structure of the device region, the second electrical interconnect structure being electrically connected to the first metal layer; and forming a second metal layer located on the first dielectric structure, the second metal layer being electrically connected to the second electrical interconnect structure.

[0043] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0044] The technical solution of this invention involves forming a sidewall structure on the sidewall of the second electrode plate, wherein the dielectric constant of the sidewall structure is gradient-distributed. A passivation layer is then formed on the sidewall structure and the first dielectric structure, wherein the dielectric constant of the sidewall structure is greater than that of the passivation layer. The electric field intensity within the dielectric material at the edge of the second electrode plate is distributed according to the magnitude of the dielectric constant of the dielectric material. That is, the product of the electric field intensity and the dielectric constant in the sidewall structure is equal to the product of the electric field intensity and the dielectric constant in the passivation layer. Since the dielectric constant of the sidewall structure is greater than that of the passivation layer, the electric field intensity in the sidewall structure is less than that in the passivation layer. This effectively weakens the high electric field intensity on the side of the second electrode plate, reducing the likelihood of breakdown on the side of the second electrode plate.

[0045] Furthermore, the sidewall structure includes several dielectric layers, the dielectric constant of which decreases progressively from the surface of the second electrode plate to the surface of the passivation layer. The product of the electric field strength and the dielectric constant in any dielectric layer of the sidewall structure is equal. Since the dielectric constants of the dielectric layers decrease sequentially, the electric field strength in the dielectric layers increases sequentially in the direction away from the sidewall of the second electrode plate. By adjusting the gradient of the dielectric properties of the dielectric layers, precise adjustment of the electric field distribution on the side of the capacitor structure plate can be achieved, effectively dispersing the relatively concentrated electric field on the side of the capacitor structure plate, eliminating the weak points in the voltage withstand capability of the capacitor structure plate, and thus improving the overall voltage withstand capability of the capacitor isolator.

[0046] Furthermore, the sidewall structure includes a single-layer dielectric layer, the dielectric constant of which gradually decreases from the surface of the second electrode plate to the surface of the passivation layer. Therefore, along the direction away from the sidewall of the second electrode plate, the electric field strength within the single-layer dielectric layer increases sequentially. By adjusting the gradient of the dielectric properties of the dielectric layer, precise adjustment of the electric field distribution on the side of the capacitor structure plate can be achieved, effectively dispersing the relatively concentrated electric field on the side of the capacitor structure plate, eliminating the weak points in the voltage withstand capability of this capacitor structure plate, and thus improving the overall voltage withstand capability of the capacitor isolator. Attached Figure Description

[0047] Figure 1 This is a schematic cross-sectional view of a semiconductor structure in one embodiment;

[0048] Figures 2 to 7 This is a cross-sectional structural schematic diagram of the semiconductor structure formation process in one embodiment of the present invention;

[0049] Figure 8 This is a cross-sectional schematic diagram of a semiconductor structure in another embodiment of the present invention. Detailed Implementation

[0050] It should be noted that the terms "surface" and "on" in this specification are used to describe the relative spatial position and are not limited to whether there is direct contact.

[0051] As described in the background section, the performance of existing capacitor isolators still needs improvement. This will now be analyzed and explained in conjunction with specific embodiments.

[0052] Figure 1 This is a cross-sectional schematic diagram of a semiconductor structure in one embodiment.

[0053] Please refer to Figure 1The semiconductor structure includes: a substrate 100, the substrate 1900 including an isolation region I and a device region II; an isolation structure 101 located within the substrate 100 in the isolation region I; a device structure 102 located on the device region II; an interconnect structure 103 electrically connected to the device structure 102; a first dielectric structure 104 located on the substrate 100, the device structure being located within the first dielectric structure 104; a first electrode plate 105 located on the first dielectric structure 104 in the isolation region I; a second dielectric structure 106 located on the first electrode plate 105; a second electrode plate 108 located on the second dielectric structure 106 in the isolation region I, the projection range of the second electrode plate 108 on the substrate 100 partially or completely overlapping the projection range of the first electrode plate 105 on the substrate 100; a passivation layer 107 located on the second electrode plate 108, the passivation layer 107 exposing a portion of the top surface of the second electrode plate 108; and the interconnect structure 103 located within the first dielectric structure 104, the second dielectric structure 106, and the passivation layer 107.

[0054] The isolation region I of the semiconductor structure is a capacitively coupled high-voltage isolator. The main structure of this isolator is a parallel-plate capacitor with a first electrode plate 105 and a second electrode plate 108 as the upper and lower plates, filled between the plates with an insulating material using a second dielectric structure 106 as the main dielectric. Research on high-voltage capacitor structures often focuses on the plates and interlayer dielectrics. In our research on high-voltage capacitor digital isolators, we found that the electric field is often most concentrated on the side of the second electrode plate 108, which may become a weak point in the high-voltage capacitor, causing capacitor breakdown to mainly occur in the passivation layer 107 on the side of the second electrode plate 108. This is because the second electrode plate 108 is typically a cuboid, and the thickness dimension of its cross-section is much smaller than its bottom dimension. When the voltage applied to the second electrode plate 108 diverges outward, the side of the second electrode plate 108 will have a large electric field strength.

[0055] Therefore, improving the breakdown resistance of the passivation layer on the side of the capacitor plate and reducing leakage current are of great significance for broadening the application fields of capacitor isolators.

[0056] To address the aforementioned problems, the present invention provides a semiconductor structure and a method for forming the semiconductor structure. This involves forming a sidewall structure on the sidewall of a second electrode plate, and then forming a passivation layer on the sidewall structure and a first dielectric structure. The dielectric constant of the sidewall structure is greater than that of the passivation layer. The electric field intensity within the dielectric material at the edge of the second electrode plate is distributed according to the magnitude of the dielectric constant of the dielectric material. That is, the product of the electric field intensity and the dielectric constant in the sidewall structure is equal to the product of the electric field intensity and the dielectric constant in the passivation layer. Since the dielectric constant of the sidewall structure is greater than that of the passivation layer, the electric field intensity in the sidewall structure is less than that in the passivation layer. This effectively weakens the high electric field intensity on the side of the second electrode plate, reducing the likelihood of breakdown at the side of the second electrode plate.

[0057] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0058] Figures 2 to 7 This is a cross-sectional schematic diagram of the semiconductor structure formation process in one embodiment of the present invention.

[0059] Please refer to Figure 2 A substrate is provided, the substrate including an isolation region I.

[0060] In this embodiment, the substrate includes: a substrate 200, and the substrate 200 of the isolation region I further includes an isolation structure 201; and a second dielectric structure 205 located on the substrate 200.

[0061] In this embodiment, the substrate further includes a device region II, and also includes: a device structure located on the device region II, the device structure being located within the second dielectric structure 205, and a first electrical interconnect structure 204 located on the device structure and electrically connected to the device structure.

[0062] The first electrical interconnect structure 204 includes a plurality of metal layers and interconnect plugs between the metal layers.

[0063] In this embodiment, the device structure includes a gate structure 202 located on device region II and source / drain doped regions 203 located in the substrates 200 on both sides of the gate structure 202. The first electrical interconnect structure 204 is electrically connected to the source / drain doped regions 203.

[0064] In this embodiment, the substrate 200 is made of silicon.

[0065] In other embodiments, the substrate material includes silicon carbide, silicon germanium, a multi-element semiconductor material composed of group III-V elements, silicon-on-insulator (SOI), or germanium-on-insulator (GOI). The multi-element semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP.

[0066] The material of the second dielectric structure 205 includes a dielectric material, which includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon carbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide, and silicon carbide.

[0067] In this embodiment, the material of the second dielectric structure 205 includes silicon oxide.

[0068] In this embodiment, the material of the isolation structure 201 includes silicon oxide.

[0069] Please continue to refer to this. Figure 2 A first electrode plate 206 is formed on the second dielectric structure 205 in the isolation zone I.

[0070] The material of the first electrode plate 206 includes metal, and the metal includes aluminum or an aluminum-copper alloy.

[0071] In this embodiment, the thickness of the first electrode plate 206 ranges from 0.3 micrometers to 2 micrometers.

[0072] In this embodiment, while forming the first electrode plate 206 on the second dielectric structure 205 in the isolation region I, it also includes forming a first metal layer 220 on the second dielectric structure 205 in the device region II, wherein the first electrode plate 206 and the first metal layer 220 are at the same height.

[0073] Please refer to Figure 3 A first dielectric structure 207 is formed on the first electrode plate 206.

[0074] The first dielectric structure 207 serves as a dielectric material filling the space between the first electrode plate 206 and the subsequently formed second electrode plate. The first electrode plate 206, the subsequently formed second electrode plate, and the first dielectric structure 207 between the first electrode plate 206 and the second electrode plate constitute a capacitor structure.

[0075] The material of the first dielectric structure 207 includes a dielectric material, which includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon carbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide, and silicon carbide.

[0076] In this embodiment, the material of the first dielectric structure 207 includes silicon oxide.

[0077] In the process of forming the first dielectric structure 207, the method further includes: forming a second electrical interconnect structure within the first dielectric structure 207, wherein the second electrical interconnect structure is electrically connected to the first metal layer 220.

[0078] Please continue to refer to this. Figure 3 A second electrode plate 208 is formed on the first dielectric structure 207 in the isolation region I, and the projection range of the second electrode plate 208 on the substrate partially or completely overlaps with the projection range of the first electrode plate 206 on the substrate.

[0079] The projection range of the second electrode plate 208 on the substrate partially or completely overlaps with the projection range of the first electrode plate 206 on the substrate, so as to ensure that the second electrode plate 208, the first dielectric structure 207 and the first electrode plate 206 can form a capacitor structure.

[0080] In this embodiment, the thickness of the second electrode plate 208 is greater than the thickness of the first electrode plate 206, so that when a voltage is subsequently applied to the second electrode plate 208, the greater thickness of the second electrode plate 208 provides stronger resistance to breakdown.

[0081] In this embodiment, the thickness of the second electrode plate 208 ranges from 0.9 micrometers to 5 micrometers.

[0082] The material of the second electrode plate 208 includes metal, which includes aluminum or an aluminum-copper alloy.

[0083] In this embodiment, while forming a second electrode plate 208 on the first dielectric structure 207 in isolation region I, it also includes forming a second metal layer 221 on the first dielectric structure 207 in device region II. The second electrode plate 208 and the second metal layer 221 are flush in height, and the second metal layer 221 is electrically connected to the second electrical interconnect structure.

[0084] Next, a sidewall structure is formed on the sidewall of the second electrode plate. Please refer to [reference needed] for the process of forming the sidewall structure. Figures 4 to 7 .

[0085] Please refer to Figure 4 and Figure 5 , Figure 5 for Figure 4 An enlarged schematic diagram of the central region A shows an adhesive material layer 211 formed on the first dielectric structure 207, the sidewall surface of the second electrode plate 208, and the top surface.

[0086] The adhesive material layer 211 is used to adhere the subsequently formed sidewall structure and the second electrode plate 208 to improve the poor bonding force between the sidewall structure and the second electrode plate 208 when the dielectric constant of the sidewall structure is high.

[0087] In this embodiment, the material of the adhesive material layer 211 includes silicon oxide.

[0088] In other embodiments, the adhesive material layer may not be formed.

[0089] In this embodiment, the process for forming the adhesive material layer 211 includes a deposition process.

[0090] Please continue to refer to this. Figure 4 and Figure 5 A sidewall structural material layer is formed on the adhesive material layer 211.

[0091] The sidewall structural material layer is used to subsequently form the sidewall structure, and the dielectric constant of the sidewall structural material layer decreases sequentially in the direction away from the sidewall of the second electrode plate 208.

[0092] In this embodiment, the sidewall structural material layer includes several dielectric material layers, and the dielectric constant of the several sidewall structural material layers decreases sequentially in the direction away from the sidewall of the second electrode plate 208.

[0093] The number of dielectric material layers is greater than or equal to one.

[0094] In this embodiment, the sidewall structure material layer schematically shows three dielectric material layers, including: a first dielectric material layer 212 located on the surface of the adhesive material layer 211; a second dielectric material layer 213 located on the surface of the first dielectric material layer 212; and a third dielectric material layer 214 located on the surface of the second dielectric material layer 213.

[0095] The dielectric constant of the dielectric material layers decreases sequentially in the direction away from the sidewall of the second electrode plate 208.

[0096] In this embodiment, the dielectric constants of the first dielectric material layer 212, the second dielectric material layer 213, and the third dielectric material layer 214 decrease sequentially.

[0097] In this embodiment, the dielectric constant of the sidewall structural material layer ranges from 4 to 50.

[0098] The dielectric material layer is made of two or more of the elements nitrogen, silicon, carbon, and oxygen.

[0099] In this embodiment, the dielectric material layer is made of silicon carbide, silicon nitride, or silicon oxynitride; the sidewall structure material layer is made of one or more of silicon carbide, silicon nitride, and silicon oxynitride.

[0100] In this embodiment, the thickness of any dielectric material layer is 10% to 30% of the thickness of the second electrode plate 208. This is so that the voltage subsequently applied to the second electrode plate 208 can be uniformly distributed by the sidewall structure at the edge of the second electrode plate 208, thereby reducing the possibility of breakdown.

[0101] In this embodiment, the process for forming the dielectric material layer includes a deposition process.

[0102] In another embodiment, the sidewall structure material comprises a single-layer dielectric material layer, wherein the dielectric constant of the single-layer dielectric material layer decreases sequentially in the direction away from the sidewall of the second electrode plate. The process for forming the single-layer dielectric material layer includes a deposition process, wherein process parameters, such as gas ratio, are adjusted during deposition to achieve the purpose of making the dielectric constant of the single-layer dielectric material layer decrease sequentially in the direction away from the sidewall of the second electrode plate.

[0103] Please refer to Figure 6 and Figure 7 , Figure 7 for Figure 6 An enlarged schematic diagram of region B shows that part of the sidewall structure material layer and adhesive material layer 211 on the top surface of the second electrode plate 208 and the surface of the first dielectric structure 207 are removed, and an adhesive layer 215 and a sidewall structure on the adhesive layer 215 are formed on the sidewall of the second electrode plate 208.

[0104] The sidewall structure includes a first part and a second part, the first part being located on the sidewall surface of the second electrode plate 208, and the second part being located on the surface of the first dielectric structure 207.

[0105] In this embodiment, the extension length of the second portion on the surface of the first dielectric structure 207 is greater than or equal to twice the thickness of the second electrode plate 208. Therefore, the second portion can, on the one hand, enhance the bonding stability between the sidewall structure and the second electrode plate 208, and on the other hand, further disperse the high voltage concentrated on the second electrode plate 208.

[0106] In this embodiment, the first portion is also located on a portion of the top surface of the second electrode plate 208.

[0107] In this embodiment, the sidewall structure includes several dielectric layers; such as Figure 7The sidewall structure shown includes: a first dielectric layer 216 located on the sidewall surface, part of the top surface and part of the surface adhesion layer 215 of the first dielectric structure 207 of the second electrode plate 208; a second dielectric layer 217 located on the surface of the first dielectric layer 216; and a third dielectric layer 218 located on the surface of the second dielectric layer 217.

[0108] The dielectric constant of the sidewall structure exhibits a gradient distribution, with the dielectric constant of the dielectric layers decreasing sequentially along the direction away from the sidewall of the second electrode plate 208. Consequently, the voltage subsequently applied to the second electrode plate 208 can be uniformly dispersed sequentially by the dielectric layers of the sidewall structure at the edge of the second electrode plate 208, reducing the likelihood of breakdown.

[0109] In other embodiments, the sidewall structure includes a single dielectric layer, the dielectric constant of which decreases sequentially in the direction away from the sidewall of the second electrode plate.

[0110] Please continue to refer to this. Figure 6 A passivation layer 210 is formed on the sidewall structure and the first dielectric structure 207. The passivation layer 210 exposes part of the top surface of the second electrode plate 208. The dielectric constant of the sidewall structure is greater than the dielectric constant of the passivation layer 210. The dielectric constant of the sidewall structure gradually decreases from the surface of the second electrode plate 208 to the surface of the passivation layer 210.

[0111] In this embodiment, the dielectric constant of any of the dielectric layers is greater than the dielectric constant of the passivation layer 210.

[0112] Both the passivation layer 210 and the sidewall structure are made of dielectric materials. The electric field intensity within the dielectric material at the edge of the second electrode plate 208 is distributed according to the dielectric constant of the dielectric material. That is, the product of the electric field intensity and the dielectric constant in the sidewall structure is equal to the product of the electric field intensity and the dielectric constant in the passivation layer 210. The dielectric constant of the sidewall structure is greater than that of the passivation layer 210, so the electric field intensity in the sidewall structure is less than that in the passivation layer 210. As a result, the high electric field intensity on the side of the second electrode plate 208 can be effectively weakened, thereby reducing the possibility of the second electrode plate 208 being easily broken down on the side.

[0113] Furthermore, the sidewall structure includes several dielectric layers, the dielectric constant of which decreases progressively from the surface of the second electrode plate 208 to the surface of the passivation layer 210. The product of the electric field strength and the dielectric constant in any dielectric layer of the sidewall structure is equal. Since the dielectric constants of the dielectric layers decrease sequentially, the electric field strength in the dielectric layers increases sequentially in the direction away from the sidewall of the second electrode plate 208. By adjusting the gradient of the dielectric properties of the dielectric layers, precise adjustment of the electric field distribution on the side of the capacitor structure plate can be achieved, effectively dispersing the relatively concentrated electric field on the side of the capacitor structure plate, eliminating the weak points in the voltage withstand capability of the capacitor structure plate, and thus improving the overall voltage withstand capability of the capacitor isolator.

[0114] Furthermore, the sidewall structure includes a single-layer dielectric layer, the dielectric constant of which gradually decreases from the surface of the second electrode plate to the surface of the passivation layer. Therefore, along the direction away from the sidewall of the second electrode plate, the electric field strength within the single-layer dielectric layer increases sequentially. By adjusting the gradient of the dielectric properties of the dielectric layer, precise adjustment of the electric field distribution on the side of the capacitor structure plate can be achieved, effectively dispersing the relatively concentrated electric field on the side of the capacitor structure plate, eliminating the weak points in the voltage withstand capability of this capacitor structure plate, and thus improving the overall voltage withstand capability of the capacitor isolator.

[0115] In this embodiment, the passivation layer 210 is made of silicon oxide.

[0116] In this embodiment, the electrical interconnect structure 204 is also located within the passivation layer 210.

[0117] Accordingly, embodiments of the present invention also provide a semiconductor structure, please refer to [the relevant documentation]. Figure 6 and Figure 7 ,include:

[0118] The substrate includes an isolation region I and a device region II;

[0119] The first metal layer 220 is located on device region II;

[0120] A first electrode plate 206 is located on isolation zone I, and the first electrode plate 206 and the first metal layer 220 are formed simultaneously.

[0121] A first dielectric structure 207 is located on the first electrode plate 206 and the first metal layer 220;

[0122] The second electrode plate 208 is located on the first dielectric structure 207, and the projection range of the second electrode plate 208 on the substrate partially or completely overlaps with the projection range of the first electrode plate 206 on the substrate.

[0123] The sidewall structure located on the side wall of the second electrode plate 208 has a gradient distribution of dielectric constant.

[0124] A passivation layer 210 is located on the sidewall structure and the first dielectric structure 207, wherein the dielectric constant of the sidewall structure is greater than the dielectric constant of the passivation layer 210.

[0125] In this embodiment, the dielectric constant of the sidewall structure gradually decreases from the surface of the second electrode plate 208 to the surface of the passivation layer 210.

[0126] In this embodiment, the sidewall structure includes several dielectric layers, and the dielectric constant of the several dielectric layers decreases layer by layer from the surface of the second electrode plate 208 to the surface of the passivation layer 210.

[0127] In another embodiment, the sidewall structure includes a single dielectric layer whose dielectric constant gradually decreases from the surface of the second electrode plate to the surface of the passivation layer.

[0128] In this embodiment, the dielectric constant of any of the dielectric layers is greater than the dielectric constant of the passivation layer 210.

[0129] In this embodiment, the number of dielectric layers is greater than or equal to one.

[0130] In this embodiment, the thickness of any dielectric layer ranges from 10% to 30% of the thickness of the second electrode plate 208.

[0131] In this embodiment, the material of the sidewall structure includes two or more of the elements nitrogen, silicon, carbon, and oxygen.

[0132] In this embodiment, the material of the sidewall structure includes silicon carbide, silicon nitride, or silicon oxynitride.

[0133] In this embodiment, the sidewall structure includes a first part and a second part, the first part being located on the sidewall surface of the second electrode plate 208, and the second part being located on the surface of the first dielectric structure 207.

[0134] In this embodiment, the extension length d1 of the second portion on the surface of the first dielectric structure 207 is greater than or equal to twice the thickness of the second electrode plate 208.

[0135] In this embodiment, the first portion is also located on a portion of the top surface of the second electrode plate 208.

[0136] In this embodiment, it further includes: an adhesion layer 215 located on the sidewall of the second electrode plate 208; the sidewall structure is located on the adhesion layer 215.

[0137] In this embodiment, the material of the adhesion layer 215 includes silicon oxide.

[0138] In this embodiment, the dielectric constant of the sidewall structure is in the range of 4 to 50.

[0139] In this embodiment, the thickness of the second electrode plate 208 is greater than the thickness of the first electrode plate 206.

[0140] In this embodiment, the thickness of the second electrode plate 208 ranges from 0.9 micrometers to 5 micrometers; the thickness of the first electrode plate 206 ranges from 0.3 micrometers to 2 micrometers.

[0141] In this embodiment, the passivation layer 210 is made of silicon oxide.

[0142] In this embodiment, the materials of the second electrode plate 208 and the first electrode plate 206 include metals, and the metals include aluminum or aluminum-copper alloys.

[0143] In this embodiment, the substrate includes: a substrate 200, wherein the substrate 200 of the isolation region I further has an isolation structure 201; a second dielectric structure 205 located on the substrate 200, wherein the first electrode plate 206 is located on the second dielectric structure 205.

[0144] In this embodiment, the second dielectric structure 205 further includes: a device structure located on device region II, and a first electrical interconnect structure 204 located on the device structure and electrically connected to the device structure.

[0145] In this embodiment, it further includes: a second electrical interconnect structure located within the first dielectric structure 207 of device region II, the second electrical interconnect structure being electrically connected to the first metal layer 220; and a second metal layer 221 located on the first dielectric structure 207, the second metal layer 221 being electrically connected to the second electrical interconnect structure.

[0146] Figure 8 This is a cross-sectional schematic diagram of a semiconductor structure in another embodiment of the present invention.

[0147] Figure 8 In order to be in Figure 4 A structural diagram based on the basic structure. Figure 8 medium structure and Figure 6 The difference in the structure is that the top surface of the first part is lower than the top surface of the second electrode plate 209.

[0148] In this embodiment, the height d2 of the first portion is greater than or equal to 50% of the thickness of the second electrode plate 208. If the height of the first portion is too low, the effect on improving the dispersion distribution of the electric field on the side of the second electrode plate 208 will not be significant.

[0149] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: Substrate, the substrate including an isolation region and a device region; The first metal layer located on the device region; A first electrode plate is located on the isolation zone, and the first electrode plate is formed simultaneously with the first metal layer; A first dielectric structure located on a first electrode plate and a first metal layer; A second electrode plate located on a first dielectric structure, wherein the projection range of the second electrode plate on the substrate partially or completely overlaps with the projection range of the first electrode plate on the substrate; A sidewall structure located on the sidewall of the second electrode plate, the sidewall structure comprising several dielectric layers, the dielectric constant of the sidewall structure exhibiting a gradient distribution; A passivation layer is located on the sidewall structure and the first dielectric structure. The dielectric constant of the sidewall structure is greater than that of the passivation layer. The dielectric constant of any one of the dielectric layers is greater than that of the passivation layer. The dielectric constant of several dielectric layers decreases layer by layer from the surface of the second electrode plate to the surface of the passivation layer.

2. The semiconductor structure as described in claim 1, characterized in that, The number of dielectric layers is greater than or equal to one.

3. The semiconductor structure as described in claim 1, characterized in that, The thickness of any dielectric layer is 10% to 30% of the thickness of the second electrode plate.

4. The semiconductor structure as described in claim 1, characterized in that, The sidewall structure is made of two or more of the elements nitrogen, silicon, carbon, and oxygen.

5. The semiconductor structure as described in claim 4, characterized in that, The sidewall structure is made of one or more of silicon carbide, silicon nitride, and silicon oxynitride.

6. The semiconductor structure as described in claim 1, characterized in that, The sidewall structure includes a first part and a second part, wherein the first part is located on the sidewall surface of the second electrode plate and the second part is located on the surface of the first dielectric structure.

7. The semiconductor structure as described in claim 6, characterized in that, The top surface of the first portion is lower than the top surface of the second electrode plate.

8. The semiconductor structure as described in claim 7, characterized in that, The height of the first portion is greater than or equal to 50% of the thickness of the second electrode plate.

9. The semiconductor structure as described in claim 6, characterized in that, The second portion extends over a length greater than or equal to twice the thickness of the second electrode plate on the surface of the first dielectric structure.

10. The semiconductor structure as described in claim 6, characterized in that, The first portion is also located on a portion of the top surface of the second electrode plate.

11. The semiconductor structure as claimed in claim 1, characterized in that, Also includes: Adhesion layer located on the sidewall of the second electrode plate; The sidewall structure is located on the adhesive layer.

12. The semiconductor structure as claimed in claim 11, characterized in that, The material of the adhesion layer includes silicon oxide.

13. The semiconductor structure as claimed in claim 1, characterized in that, The dielectric constant of the sidewall structure is in the range of 4 to 50.

14. The semiconductor structure as claimed in claim 1, characterized in that, The thickness of the second electrode plate is greater than the thickness of the first electrode plate.

15. The semiconductor structure as described in claim 14, characterized in that, The thickness of the second electrode plate ranges from 0.9 micrometers to 5 micrometers; the thickness of the first electrode plate ranges from 0.3 micrometers to 2 micrometers.

16. The semiconductor structure as claimed in claim 1, characterized in that, The passivation layer is made of silicon oxide.

17. The semiconductor structure as claimed in claim 1, characterized in that, The materials of the second electrode plate and the first electrode plate include metals, including aluminum or aluminum-copper alloys.

18. The semiconductor structure as claimed in claim 1, characterized in that, The substrate includes: a substrate, wherein the isolation region has an isolation structure within the substrate; and a second dielectric structure located on the substrate, wherein the first electrode plate is located on the second dielectric structure.

19. The semiconductor structure as claimed in claim 18, characterized in that, The second dielectric structure further includes: a device structure located on the device region, and a first electrical interconnect structure located on the device structure and electrically connected to the device structure.

20. The semiconductor structure as claimed in claim 1, characterized in that, Also includes: A second electrical interconnect structure is located within the first dielectric structure of the device region, and the second electrical interconnect structure is electrically connected to the first metal layer; A second metal layer is located on the first dielectric structure, and the second metal layer is electrically connected to the second electrical interconnect structure.

21. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided, the substrate including an isolation region and a device region; A first metal layer is formed on the device region; A first electrode plate is formed on the isolation area, and the first electrode plate is formed simultaneously with the first metal layer; A first dielectric structure is formed on the first electrode plate and the first metal layer; A second electrode plate is formed on a first dielectric structure, wherein the projection range of the second electrode plate on the substrate partially or completely overlaps with the projection range of the first electrode plate on the substrate. A sidewall structure is formed on the sidewall of the second electrode plate. The sidewall structure includes several dielectric layers, and the dielectric constant of the sidewall structure is distributed in a gradient. A passivation layer is formed on the sidewall structure and the first dielectric structure. The dielectric constant of the sidewall structure is greater than the dielectric constant of the passivation layer. The dielectric constant of any one dielectric layer is greater than the dielectric constant of the passivation layer. The dielectric constant of several dielectric layers decreases layer by layer from the surface of the second electrode plate to the surface of the passivation layer.

22. The method for forming a semiconductor structure as described in claim 21, characterized in that, The number of dielectric layers is greater than or equal to one.

23. The method for forming a semiconductor structure as described in claim 21, characterized in that, The process for forming the dielectric layer includes a deposition process.

24. The method for forming a semiconductor structure as described in claim 21, characterized in that, The sidewall structure includes a first part and a second part, wherein the first part is located on the sidewall surface of the second electrode plate and the second part is located on the surface of the first dielectric structure.

25. The method for forming a semiconductor structure as described in claim 24, characterized in that, The top surface of the first portion is lower than the top surface of the second electrode plate.

26. The method for forming a semiconductor structure as described in claim 24, characterized in that, The first portion is also located on a portion of the top surface of the second electrode plate.

27. The method for forming a semiconductor structure as described in claim 21, characterized in that, Before forming the sidewall structure on the sidewall of the second electrode plate, the method further includes: forming an adhesion layer on the sidewall of the second electrode plate; the sidewall structure is located on the adhesion layer.

28. The method for forming a semiconductor structure as described in claim 21, characterized in that, The dielectric constant of the sidewall structure is in the range of 4 to 50.

29. The method for forming a semiconductor structure as described in claim 21, characterized in that, The substrate includes: a substrate, wherein the isolation region has an isolation structure within the substrate; and a second dielectric structure located on the substrate, wherein the first electrode plate is located on the second dielectric structure.

30. The method for forming a semiconductor structure as described in claim 29, characterized in that, Also includes: A device structure is formed on the device region, the device structure being located within a second dielectric structure, and a first electrical interconnect structure is formed on the device structure and electrically connected to the device structure.

31. The method for forming a semiconductor structure as described in claim 21, characterized in that, Also includes: A second electrical interconnect structure is formed within the first dielectric structure of the device region, and the second electrical interconnect structure is electrically connected to the first metal layer; A second metal layer is formed on the first dielectric structure, and the second metal layer is electrically connected to the second electrical interconnect structure.

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