Epitaxial wafer, method for preparing epitaxial wafer and light emitting diode

Abstract

The application discloses an epitaxial wafer, an epitaxial wafer preparation method and a light emitting diode. The epitaxial wafer comprises a shallow multi-quantum well layer, an electron blocking layer and a multi-quantum well light emitting layer which are sequentially stacked. The electron blocking layer is an ErAlN layer. The shallow multi-quantum well layer comprises periodically and alternately grown shallow quantum well layers and shallow quantum barrier layers. The multi-quantum well light emitting layer comprises periodically and alternately grown quantum well layers and quantum barrier layers. The shallow quantum well layers and the quantum well layers are both InGaN layers. The shallow quantum barrier layers and the quantum barrier layers are both GaN layers. The application solves the problem of low light emitting efficiency of the epitaxial wafer under large current driving.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an epitaxial wafer, an epitaxial wafer fabrication method, and a light-emitting diode. Background Technology

[0002] Gallium nitride (GaN) semiconductor materials possess excellent properties such as direct wide bandgap, fast electron saturation drift velocity, and high thermal conductivity. Currently, GaN-based LEDs have significant application value in fields such as solid-state lighting, ultraviolet sterilization and disinfection, and new display technologies.

[0003] Currently, GaN-based blue, green, and violet LEDs typically consist of a substrate and a GaN or AlGaN buffer layer, a three-dimensional island growth layer, a two-dimensional merged growth layer, an n-type GaN current spreading layer, a multi-quantum-well emitting layer, an AlGaN electron blocking layer, a p-type GaN current spreading layer, and a p-type ohmic contact layer. With the expansion of applications for gallium nitride (GaN)-based LEDs, the required operating current density of the chips is increasing. At such ultra-high current densities, some electrons injected into the multi-quantum-well emitting layer can gain sufficient energy through mechanisms such as electric field acceleration, multiphonon recombination, and Auger recombination to escape from the multi-quantum-well emitting layer, thus severely reducing the photoelectric efficiency of gallium nitride (GaN)-based LEDs at high currents.

[0004] Building upon this, the traditional AlGaN electron blocking layer is no longer ideal in preventing current escape under high-current driving. Simply increasing the thickness or Al composition of the AlGaN electron blocking layer to enhance electron overflow has two drawbacks: First, a high-Al content AlGaN electron blocking layer increases the activation energy of Mg, leading to difficulties in hole injection and a higher operating voltage. Second, increasing the thickness of the AlGaN electron blocking layer hinders hole transport in the vertical direction. Therefore, the problem of low luminous efficiency of epitaxial wafers under high-current driving remains unsolved. Summary of the Invention

[0005] Based on this, the purpose of the present invention is to provide an epitaxial wafer, an epitaxial wafer preparation method, and a light-emitting diode, aiming to solve the problem of low luminous efficiency of epitaxial wafers under high current driving in the prior art.

[0006] The embodiments of the present invention are implemented as follows:

[0007] On one hand, embodiments of the present invention propose an epitaxial wafer comprising a shallow multi-quantum well layer, an electron blocking layer, and a multi-quantum well light-emitting layer stacked sequentially;

[0008] Wherein, the electron blocking layer is an ErAl N layer, the shallow multi-quantum well layer includes periodically alternating shallow quantum well layers and shallow quantum barrier layers, the multi-quantum well light-emitting layer includes periodically alternating quantum well layers and quantum barrier layers, the shallow quantum well layers and quantum well layers are both InGaN layers, and the shallow quantum barrier layers and quantum barrier layers are both GaN layers.

[0009] Furthermore, the Er composition of the electron blocking layer is 1% to 24.9%.

[0010] Furthermore, the thickness of the electron blocking layer is 1 nm to 20 nm.

[0011] Furthermore, the thickness of both the shallow multi-quantum well layer and the multi-quantum well light-emitting layer is 12nm to 16nm.

[0012] Furthermore, the epitaxial wafer also includes a substrate, a buffer layer, a three-dimensional island growth layer, a two-dimensional merged growth layer, an N-type GaN current spreading layer, a stress relief layer, an AlGaN electron blocking layer, a P-type current spreading layer, and a P-type ohmic contact layer.

[0013] The buffer layer, the three-dimensional island growth layer, the two-dimensional merged growth layer, the N-type doped GaN current spreading layer, the shallow multi-quantum well layer, the electron blocking layer, the multi-quantum well layer, the P-type current spreading layer, and the P-type ohmic contact layer are sequentially stacked on the substrate.

[0014] On the other hand, embodiments of the present invention provide a method for preparing an epitaxial wafer, wherein the method includes:

[0015] Provide a substrate;

[0016] A buffer layer, a three-dimensional island growth layer, a two-dimensional merged growth layer, an N-type doped GaN current spreading layer, a shallow multi-quantum well layer, an electron blocking layer, a multi-quantum well layer, a P-type current spreading layer, and a P-type ohmic contact layer are sequentially grown on the substrate.

[0017] Wherein, the electron blocking layer is an ErAl N layer, the shallow multi-quantum well layer includes periodically alternating shallow quantum well layers and shallow quantum barrier layers, the multi-quantum well light-emitting layer includes periodically alternating quantum well layers and quantum barrier layers, the shallow quantum well layers and quantum well layers are both InGaN layers, and the shallow quantum barrier layers and quantum barrier layers are both GaN layers.

[0018] Furthermore, in the above-mentioned epitaxial wafer preparation method, the growth temperature of the shallow quantum well layer is 850℃~950℃, and the growth pressure is 200 torr-250 torr.

[0019] Furthermore, in the above-mentioned epitaxial wafer preparation method, the growth temperature of the electron blocking layer is 850℃~950℃, and the growth pressure is 100 torr-150 torr.

[0020] Furthermore, in the above-mentioned epitaxial wafer preparation method, the growth temperature of the multi-quantum-well light-emitting layer is 750℃~900℃, and the growth pressure is 200 torr-250 torr.

[0021] In another aspect, embodiments of the present invention also provide a light-emitting diode, comprising the epitaxial wafer described above.

[0022] Compared with existing technologies: Erbium is a light rare earth element, and the atomic radius of the rare earth element erbium (Er) is larger than that of Al (erbium's atomic coefficient is 68, while Al's atomic coefficient is 13). After the rare earth element erbium is incorporated into AlN materials, the Er component... a Al 1-a Lattice matching at the heterojunction interface is achieved through the GaN shallow barrier layer in the N-type shallow multi-quantum-well layer and the quantum barrier layer in the multi-quantum-well light-emitting layer. This enables in-plane lattice constant matching and strain-free material growth, thereby reducing the dislocation density in the active region of the device, minimizing dislocation scattering and leakage channels, and avoiding Er-type currents. a Al 1-a The lowering of the N-type barrier height maintains good electron blocking capability, effectively improving the photoelectric efficiency and reliability of LEDs. Secondly, adding an ErAlN electron blocking layer between the shallow multi-quantum-well layer and the multi-quantum-well emitting layer can further reduce the probability of electron overflow from the multi-quantum-well emitting layer of gallium nitride (GaN)-based LEDs under high-current driving, thereby improving their photoelectric efficiency under high current. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of an epitaxial wafer structure proposed in an embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram of another structure of the epitaxial wafer proposed in one embodiment of the present invention;

[0025] Figure 3 This is a schematic diagram of the LED band structure in one embodiment of the invention.

[0026] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0027] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0028] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0030] To facilitate understanding of the present invention, a more complete description will be given below with reference to relevant embodiments. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0031] This invention addresses the problem of low luminous efficiency of epitaxial wafers under high current driving by proposing an epitaxial wafer, an epitaxial wafer fabrication method, and a light-emitting diode, wherein:

[0032] Please see Figures 1 to 3 The image shows an epitaxial wafer proposed in the first embodiment of the present invention, which includes:

[0033] The LED epitaxial structure comprises a substrate 1, a buffer layer 2, a three-dimensional island growth layer 3, a two-dimensional merged growth layer 4, an n-type GaN current spreading layer 5, a stress relief layer 6, a shallow multi-quantum well layer 7, an ErAlN electron blocking layer 8, a multi-quantum emitting layer 9, an AlGaN electron blocking layer 10, a P-type current spreading layer 11, and a P-type ohmic contact layer 12, which are sequentially stacked from bottom to top on the substrate 1. Preferably, the LED epitaxial structure is grown using a metal-organic chemical vapor deposition (MOCVD) apparatus.

[0034] The substrate 1 is a wafer made of semiconductor single crystal material, including but not limited to sapphire substrate, silicon substrate and silicon nitride substrate. In specific implementation, the substrate 1 can be processed by epitaxial process to form an epitaxial structure. Epitaxy refers to the process of growing a new single crystal on the substrate 10 after careful processing such as cutting, grinding and polishing. The new single crystal can be the same material as the substrate 1 or a different material, that is, homoepitaxial or heteroepitaxial.

[0035] This is understandable. Erbium is a light rare earth element, and its atomic radius is larger than that of Al (erbium's atomic number is 68, while Al's is 13). When erbium is incorporated into AlN materials, the Er component... a Al 1-a The GaN shallow barrier layer in the N-type shallow quantum well layer and the quantum barrier layer in the multi-quantum well light-emitting layer achieve lattice matching at the heterojunction interface, enabling in-plane lattice constant matching and strain-free material growth. This reduces the dislocation density in the active region of the device, decreases dislocation scattering and leakage channels, prevents the EraAl1-aN barrier height from decreasing, maintains good electron blocking capability, and effectively improves the photoelectric efficiency and reliability of the LED. Secondly, adding an ErAlN electron blocking layer 8 between the shallow quantum well layer 7 and the multi-quantum well light-emitting layer 9 can further reduce the probability of electron overflow into the multi-quantum well light-emitting layer of the gallium nitride (GaN)-based LED under high current driving, thereby improving its photoelectric efficiency under high current.

[0036] Specifically, the Er composition (a) of the EraAl1-aN electron blocking layer 8 is 1%–24.9%, and the thickness of the electron blocking layer 8 is 1 nm–20 nm. The thickness of the shallow multi-quantum well layer 7 and the multi-quantum well emitting layer 9 is 12 nm–16 nm.

[0037] In the ErAlN electron blocking layer 8, Er has a composition of a, and Al has a composition of 1-a. In some preferred embodiments of this example, Er has a composition of 0.249, and Al has a composition of 0.751. According to the Er... a Al 1-b The lattice matching degree between Er in the N electron blocking layer 8 and the shallow quantum barrier layer (GaN) 71 and quantum barrier layer (GaN) 91 varies depending on the composition of Er. By controlling the composition of Er within a certain range, the lattice matching degree of Er can be optimized. a Al 1-a The interfacial tensile stress between layer N8 and the shallow quantum barrier layer (GaN) 71 and quantum barrier layer (GaN) 91 is reduced. Preferably, when a is 0.249, the Er a Al 1-a There is no interfacial compressive stress between the N layer 71 and the shallow quantum barrier layer (GaN) 71 and the quantum barrier layer (GaN) 91, avoiding Er a Al 1-a The N-bar height decreases, maintaining good electron blocking ability.

[0038] On the other hand, the epitaxial wafer preparation method proposed in this embodiment of the invention is used to prepare the above-mentioned epitaxial wafer, and the epitaxial wafer preparation method includes:

[0039] Provide a substrate;

[0040] A buffer layer, a three-dimensional island growth layer, a two-dimensional merged growth layer, an N-type doped GaN current spreading layer, a shallow multi-quantum well layer, an electron blocking layer, a multi-quantum well layer, a P-type current spreading layer, and a P-type ohmic contact layer are sequentially grown on the substrate.

[0041] The electron blocking layer is an ErAlN layer, the shallow multi-quantum well layer includes periodically alternating shallow quantum well layers and shallow quantum barrier layers, the multi-quantum well light-emitting layer includes periodically alternating quantum well layers and quantum barrier layers, both the shallow quantum well layer and the quantum well layer are InGaN layers, and both the shallow quantum barrier layer and the quantum barrier layer are GaN layers.

[0042] Specifically, the growth temperature of the shallow multi-quantum well layer is 850℃~950℃, and the growth pressure is 200 torr-250 torr. The growth temperature of the electron blocking layer is 850℃~950℃, and the growth pressure is 100 torr-150 torr. The growth temperature of the multi-quantum well emitting layer is 750℃~900℃, and the growth pressure is 200 torr-250 torr.

[0043] On the other hand, the light-emitting diode proposed in the embodiments of the present invention includes the epitaxial wafer described above.

[0044] To facilitate understanding of the present invention, a more complete description will be given below with reference to relevant embodiments. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0045] Example 1

[0046] Provide a substrate required for growth, and deposit a buffer layer on the substrate;

[0047] An AlN buffer layer, a GaN buffer layer, or an AlGaN buffer layer is deposited on the substrate using a metal-organic vapor deposition method. The growth pressure in the reaction chamber is 50–200 torr, the rotation speed of the graphite substrate is controlled at 500–1000 r / min, NH3 is introduced at a flow rate of 20 slm–70 slm as the N (nitrogen) source, TMGa is introduced at a flow rate of 20 sccm–150 sccm as the Ga (gallium) source, and TMAl (trimethylaluminum) is introduced at a flow rate of 20–120 sccm as the aluminum source, so as to deposit the AlN buffer layer, the GaN buffer layer, or the AlGaN buffer layer with a thickness of 5 nm–15 nm on the substrate.

[0048] A three-dimensional island-shaped growth layer is deposited on the buffer layer;

[0049] NH3 at a flow rate of 10 slm to 60 slm is introduced into the buffer layer as a nitrogen source, and TMGa at a flow rate of 200 sccm to 500 sccm is introduced as a gallium source. The temperature of the reaction chamber is raised to 1060℃ to 1090℃, the pressure is controlled at 200 torr to 500 torr, and the rotation speed of the graphite substrate is reduced to 500 to 1000 r / min, so that a three-dimensional island-shaped GaN growth layer is grown, and the thickness of the three-dimensional island-shaped growth layer is controlled to be 500 nm to 1000 nm.

[0050] A two-dimensional merged growth layer is deposited on the three-dimensional island-shaped growth layer;

[0051] The temperature of the reaction chamber is raised to 1100℃~1450℃, the pressure is controlled at 150 torr~250 torr, the rotation speed of the graphite substrate is controlled at 800~1200 r / min, NH3 with a flow rate of 40slm~90slm is introduced as the N (nitrogen) source, and TMGa with a flow rate of 300sccm~1000sccm is introduced as the Ga (gallium) source to grow a two-dimensional GaN fused growth layer, and the thickness of the two-dimensional fused growth layer is controlled at 1000nm~2000nm.

[0052] An n-type GaN current-spreading layer is deposited on the two-dimensional merged growth layer;

[0053] The temperature of the reaction chamber was lowered to 1090℃~1100℃, the pressure was controlled at 150 torr~250 torr, the rotation speed of the graphite substrate was controlled at 800~1200 r / min, NH3 was introduced at a flow rate of 30 slm~80 slm as the N (nitrogen) source, TMGa was introduced at a flow rate of 200 sccm~500 sccm as the Ga (gallium) source, and SiH4 was introduced at a flow rate of 100 sccm~300 sccm as the N-type dopant, wherein the Si doping concentration was 8E18 atoms / cm 3 ~1.5E19 atoms / cm 3 The Si-doped n-type GaN current extension layer is grown, and the thickness of the n-type GaN layer is controlled to be 1500 nm to 2000 nm.

[0054] The n-type GaN current-spreading layer serves as the main epitaxial layer for providing electrons. During the growth of the n-type GaN layer, SiH4 is introduced to provide Si elements. Si is a tetravalent element, while Ga in the n-type GaN layer is a trivalent element. When Si atoms replace Ga atoms, they provide electrons, thereby forming the electron-providing n-type GaN layer.

[0055] A stress relief layer is deposited on the n-type GaN current-spreading layer;

[0056] The temperature of the reaction chamber is reduced to 850℃~950℃, the pressure is controlled at 200-250 torr, and the rotation speed of the graphite substrate is controlled at 500-1600 rpm to grow a low-temperature GaN stress-relief layer with a growth thickness of 1nm~200nm. When the growth thickness of the low-temperature GaN stress-relief layer is greater than 10nm, SiH4 is introduced as an N-type dopant at a flow rate of 100sccm~300sccm, wherein the Si doping concentration is 8E18atoms / cm³. 3 ~1E19atoms / cm 3 When the thickness of the low-temperature GaN stress relief layer is less than 10 nm, it is not doped with silane.

[0057] N alternating shallow quantum well layers are deposited on the stress relief layer;

[0058] The temperature of the reaction chamber is reduced to 850℃~950℃, the pressure is controlled at 200-250 torr, the rotation speed of the graphite base is controlled at 500-1600 rpm, and InGaN shallow quantum well layers and GaN shallow quantum barrier layers are stacked alternately. The growth temperature of the InGaN quantum well layer is 850℃~900℃, the growth temperature of the GaN quantum barrier layer is 900℃~950℃, and the growth thickness is 12nm~16nm, where 4≤N≤9, and N is a positive integer.

[0059] An ErAlN electron blocking layer is deposited on the shallow multi-quantum-well layer;

[0060] The temperature of the reaction chamber was raised to 850℃~950℃, the pressure was controlled at 100-150 torr, the rotation speed of the graphite substrate was controlled at 500-1600 rpm, and NH3 with a flow rate of 40slm~90slm was introduced as the N (nitrogen) source, TMGa with a flow rate of 600sccm~1100sccm was introduced as the Ga (gallium) source, TMAl with a flow rate of 10sccm~300sccm was introduced as the Al (aluminum) source, and TRIPER with a flow rate of 50~500sccm was introduced as the Er (erbium) source to grow an ErAlN electron blocking layer with a growth thickness of 1nm~20nm. 1-a N electron blocking layer, due to Er a Al 1-a The N-electron blocking layer, positioned between the shallow quantum barrier layer and the quantum barrier layer, increases the potential barrier height for electrons in the multi-quantum-well layer, reducing electron leakage. Due to the aforementioned Er... a Al 1-a The N-electron blocking layer and the preceding and following quantum barrier layers can achieve in-plane lattice constant matching and strain-free material growth. Preferably, when the Er... a Al 1-a When the Er composition in the N electron blocking layer is 24.9%, ErAlN has the same lattice constant as GaN, thereby reducing the dislocation density in the active region of the device, reducing dislocation scattering and leakage channels, and the device will have superior performance and reliability.

[0061] M alternating multi-quantum-well light-emitting layers are deposited on the ErAlN electron blocking layer;

[0062] The temperature of the reaction chamber is reduced to 750℃~900℃, the pressure is controlled at 200-250 torr, the rotation speed of the graphite base is controlled at 800-1200 rpm, and InGaN quantum well layers and GaN quantum barrier layers are stacked alternately. The growth temperature of the InGaN quantum well layer is 750℃~810℃, the growth temperature of the GaN quantum barrier layer is 850℃~900℃, and the growth thickness is 12nm~16nm, where 5≤M≤9 and N is a positive integer.

[0063] An AlGaN electron blocking layer is deposited on the multi-quantum-well light-emitting layer.

[0064] The temperature of the reaction chamber is raised to 850℃~950℃, the pressure is controlled at 150 torr~250 torr, the rotation speed of the graphite disk supporting the substrate is controlled at 800~1200 r / min, and NH4+ is introduced at a flow rate of 40 slm~90 slm.3 Using TMGa as the N (nitrogen) source and TMAl as the Al (aluminum) source with a flow rate of 10 sccm to 300 sccm, magnesium pyrocene (CP2Mg) is introduced as a dopant, with a Mg doping concentration of 1.5E20 atoms / cm². 3 ErAlN electron blocking layers were grown with a thickness of 1 nm to 20 nm.

[0065] A P-type current spreading layer and a P-type ohmic contact layer are deposited on the AlGaN electron blocking layer.

[0066] The temperature of the reaction chamber is raised to 850℃~970℃, the pressure is controlled at 150torr~250torr, the rotation speed of the graphite disk is controlled at 800~1200r / min, NH3 with a flow rate of 40slm~90slm is introduced as the N (nitrogen) source, TMGa with a flow rate of 600sccm~1100sccm is introduced as the Ga (gallium) source, and Mg2+ (CP2Mg) is introduced as the dopant, wherein the doping concentration of Mg is 1E19~5.5E20 atoms / cm3, to grow the P-type GaN current extension layer with a thickness of 20nm, and the P-type contact layer with a thickness of 5nm.

[0067] Comparative Example 1

[0068] Comparative Example 1 is a common conventional gallium nitride-based light-emitting diode epitaxial structure. The difference between Comparative Example 1 and Embodiment 1 of the present invention is that the shallow multi-quantum well layer in Comparative Example 1 does not have an ErAlN electron blocking layer deposited on it, but instead has M alternating multi-quantum well light-emitting layers deposited.

[0069] Please refer to Table 1, which shows the average performance data of 10 groups of epitaxial wafers prepared by the preparation methods in Example 1 and Comparative Example 1 of the present invention. The chips (100 epitaxial wafers per group) were prepared in the approximately 453nm band and 22×35mil size. The corresponding groups were tested with a current of 120mA. The main variations were in the growth thickness of the electron blocking layer, the Er component content, the growth temperature, and the growth pressure.

[0070] Table 1

[0071]

[0072] As shown in the table above, the performance data of the epitaxial wafers prepared in Examples 1 to 9 of this invention are significantly improved compared with existing ones. Because the rare earth element erbium is incorporated into AlN material, the Er-component EraAl1-aN, the shallow GaN barrier layer in the shallow quantum well layer, and the quantum barrier layer in the multi-quantum well light-emitting layer achieve lattice matching at the heterojunction interface, enabling in-plane lattice constant matching and strain-free material growth. This reduces the dislocation density in the active region of the device, decreases dislocation scattering and leakage channels, avoids a decrease in the EraAl1-aN barrier height, maintains good electron blocking ability, and effectively improves the photoelectric efficiency and reliability of the LED. Furthermore, the luminous efficacy of the third group of epitaxial wafers is improved by 6.6% compared to Comparative Example 1, with a 5.4% increase in brightness, a 1.09% reduction in voltage, a 0.006 μA decrease in leakage current, a 5.48% improvement in leakage current yield, and a 1.72% improvement in antistatic yield, showing the best improvement effect.

[0073] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. An epitaxial wafer, characterized in that, It includes a substrate, and a buffer layer, a three-dimensional island growth layer, a two-dimensional merged growth layer, an N-type doped GaN current spreading layer, a shallow multi-quantum well layer, an electron blocking layer, a multi-quantum well light-emitting layer, a P-type current spreading layer, and a P-type ohmic contact layer, which are sequentially stacked on the substrate. Wherein, the electron blocking layer is an ErAl N layer, the shallow multi-quantum well layer includes periodically alternating shallow quantum well layers and shallow quantum barrier layers, the multi-quantum well light-emitting layer includes periodically alternating quantum well layers and quantum barrier layers, the shallow quantum well layers and quantum well layers are both InGaN layers, and the shallow quantum barrier layers and quantum barrier layers are both GaN layers.

2. The epitaxial wafer according to claim 1, characterized in that, The Er composition of the electron blocking layer is 1% to 24.9%.

3. The epitaxial wafer according to claim 1, characterized in that, The thickness of the electron blocking layer is 1 nm to 20 nm.

4. The epitaxial wafer according to claim 1, characterized in that, The thickness of both the shallow quantum well layer and the multi-quantum well light-emitting layer is 12nm~16nm.

5. A method for preparing an epitaxial wafer, characterized in that, The method for preparing the epitaxial wafer according to any one of claims 1 to 4 includes: Provide a substrate; A buffer layer, a three-dimensional island growth layer, a two-dimensional merged growth layer, an N-type doped GaN current spreading layer, a shallow multi-quantum well layer, an electron blocking layer, a multi-quantum well layer, a P-type current spreading layer, and a P-type ohmic contact layer are sequentially grown on the substrate. The electron blocking layer is an ErAlN layer, the shallow multi-quantum well layer includes periodically alternating shallow quantum well layers and shallow quantum barrier layers, the multi-quantum well light-emitting layer includes periodically alternating quantum well layers and quantum barrier layers, both the shallow quantum well layer and the quantum well layer are InGaN layers, and both the shallow quantum barrier layer and the quantum barrier layer are GaN layers.

6. The method for preparing an epitaxial wafer according to claim 5, characterized in that, The growth temperature of the shallow quantum well layer is 850℃~950℃, and the growth pressure is 200 torr -250 torr.

7. The method for preparing an epitaxial wafer according to claim 5, characterized in that, The electron blocking layer is grown at a temperature of 850℃~950℃ and a growth pressure of 100 torr -150 torr.

8. The method for preparing an epitaxial wafer according to claim 5, characterized in that, The growth temperature of the multi-quantum well light-emitting layer is 750℃~900℃, and the growth pressure is 200 torr -250 torr.

9. A light-emitting diode, characterized in that, Includes the epitaxial wafer according to any one of claims 1 to 4.

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