Visual system and night vision device

Abstract

A visual system and a night vision device. The visual system comprises: a circuit board; a photosensitive driving chip located on the circuit board; the photosensitive driving chip comprises: a CMOS image sensor layer and a light-emitting driving layer; the CMOS image sensor layer is located on the photosensitive side of the circuit board and is used for collecting external light; the light-emitting driving layer is located on the light-emitting side of the circuit board and is used for driving a light-emitting unit to emit light; the photosensitive side of the circuit board is opposite to the light-emitting side of the circuit board; and the light-emitting unit is located on the surface of the light-emitting driving layer, is connected with the light-emitting driving layer and is adapted to emit light under the driving of the light-emitting driving layer; wherein the CMOS image sensor layer and the light-emitting driving layer are interconnected at the pixel level through a stacking process. By using the above scheme, the delay of the visual system can be reduced.

Description

Technical Field

[0001] This invention relates to the field of CMOS image sensor technology, and more specifically to a vision system and a night vision device. Background Technology

[0002] Low-light vision systems can enhance faint natural light to a visible image that is discernible to the naked eye, and are often used to achieve night vision effects.

[0003] Currently, there are two main technical approaches to mainstream low-light vision systems: low-light vision systems based on photomultiplier tubes and low-light vision systems based on ultra-high sensitivity complementary metal-oxide-semiconductor (CMOS) image sensors.

[0004] With continuous technological advancements, photomultiplier tubes (PMTs) are gradually being replaced by ultra-high sensitivity CMOS image sensors for the following reasons: 1. PMTs are extremely expensive, costing several to tens of times more than CMOS image sensors with similar performance; 2. PMTs are purely analog systems, unable to be digitized, and cannot implement various fusion and enhancement algorithms, nor can they perform long-distance transmission; 3. PMTs have a narrow range of applications and cannot be used in strong light, while CMOS image sensors can be used in strong light during the day, achieving all-weather operation.

[0005] However, existing low-light vision systems based on ultra-high sensitivity CMOS image sensors have high latency, making it difficult to meet latency requirements. Summary of the Invention

[0006] The problem this invention aims to solve is the high latency of visual systems.

[0007] To address the above problems, embodiments of the present invention provide a vision system, the vision system comprising:

[0008] Circuit board;

[0009] A photosensitive driving chip is located on a circuit board; the photosensitive driving chip includes: a CMOS image sensor layer and a light-emitting driving layer; the CMOS image sensor layer is located on the photosensitive side of the circuit board and is used to collect external light; the light-emitting driving layer is located on the light-emitting side of the circuit board and is used to drive the light-emitting unit to emit light; the photosensitive side of the circuit board is opposite to the light-emitting side of the circuit board.

[0010] And the light-emitting unit, located on the surface of the light-emitting driving layer, connected to the light-emitting driving layer, and adapted to emit light under the driving of the light-emitting driving layer;

[0011] The CMOS image sensor layer and the light-emitting driving layer are interconnected at the pixel level through a stacking process.

[0012] Optionally, the CMOS image sensor layer includes: a first pixel array composed of N first pixel structures; the light-emitting driving layer includes: a second pixel array composed of N second pixel structures; where N is ≥2 and N is an integer;

[0013] Each first pixel structure has a first bonding end, and each second pixel structure has a second bonding end. The first bonding end and the corresponding second bonding end are connected in a hybrid bonding manner.

[0014] Optionally, the first bonding end of the first pixel structure is the output end of the first pixel structure; and the second bonding end of the second pixel structure is the input end of the second pixel structure.

[0015] Optionally, the voltages of the first bonding terminal and the second bonding terminal are matched.

[0016] Optionally, the vision system further includes: a level conversion circuit, with its input end connected to the first bonding terminal and its output end connected to the second bonding terminal, adapted to convert the potential of the output signal from the first bonding terminal before inputting it to the second bonding terminal.

[0017] Optionally, the light-emitting unit includes a plurality of organic light-emitting diodes, and the output terminal of the second pixel structure is connected as the anode of the organic light-emitting diodes.

[0018] Optionally, the CMOS image sensor layer and the light-emitting driving layer are connected by a hybrid bonding method.

[0019] Optionally, the CMOS image sensor layer further includes:

[0020] The first row driving circuit is connected to the first pixel array and is adapted to select at least one row of the first pixel structure in the first pixel array for readout operation.

[0021] The readout circuit array is adapted to read out the first pixel structure selected by the first row driving circuit;

[0022] And at least one first pad adapted to be connected to the light-emitting driving layer in a hybrid bonding manner.

[0023] Optionally, the CMOS image sensor layer further includes:

[0024] The first image information processing circuit has its input terminal connected to the readout circuit array and its output terminal connected to the first pad, and is adapted to process the image information read out by the readout circuit array.

[0025] Optionally, the light-emitting driving layer further includes:

[0026] The second row driving circuit is adapted to select at least one row of the second pixel structure in the second pixel array for writing operation;

[0027] The column writing circuit is connected to the second pixel array and is adapted to write the second pixel structure selected by the second row driving circuit.

[0028] And at least one second pad adapted to be connected to the first pad in a hybrid bonding manner.

[0029] Optionally, the light-emitting driving layer further includes:

[0030] The second image information processing circuit has its input end connected to the second pad and its output end connected to the column writing circuit, and is suitable for processing the image information received by the second pad.

[0031] Optionally, the vision system further includes:

[0032] An image information processing chip is connected to the CMOS image sensor layer and is adapted to process the data output by the CMOS image sensor layer and input it to the light-emitting driving layer.

[0033] The present invention provides a night vision device, wherein the night vision device includes any of the above-described visual systems.

[0034] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0035] By applying the solution of this invention, since the CMOS image sensor layer and the light-emitting driving layer are interconnected at the pixel level through a stacking process, the output signal of the CMOS image sensor layer can be directly input to the light-emitting driving layer, instead of needing to be processed by an image signal processing chip. This reduces the delay between the output signal of the CMOS image sensor layer and the light-emitting driving layer, minimizing the dizziness experienced by users when observing and moving with night vision devices. Furthermore, by integrating the CMOS image sensor layer and the light-emitting driving layer into a single photosensitive driving chip, with the light-emitting unit located on the surface of the light-emitting driving layer, the light-emitting unit and the photosensitive driving chip are located at the same position on the circuit board, rather than using two different chips located at different positions. This reduces the number of chips on the circuit board, thereby reducing chip size and weight. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the structure of a vision system;

[0037] Figure 2This is a schematic diagram of the structure of a vision system according to an embodiment of the present invention;

[0038] Figure 3 This is a schematic diagram of the structure of a photosensitive driving chip 21 in an embodiment of the present invention;

[0039] Figure 4 This is for Figure 3 A schematic diagram of the cross-sectional structure of the photosensitive driver chip along AA';

[0040] Figure 5 This is a schematic diagram illustrating the connection between a first pixel structure and a second pixel structure in an embodiment of the present invention;

[0041] Figure 6 This is a schematic diagram of a level conversion circuit.

[0042] Figure 7 This is a schematic diagram of the structure of a CMOS image sensor according to an embodiment of the present invention;

[0043] Figure 8 This is a schematic diagram of the structure of a light-emitting driving layer in an embodiment of the present invention;

[0044] Figure 9 This is a schematic diagram of the connection of the image information processing chip in an embodiment of the present invention. Detailed Implementation

[0045] Figure 1 This is a schematic diagram of a low-light vision system based on an ultra-high sensitivity CMOS image sensor. (Refer to...) Figure 1 The low-light vision system may include: a circuit board 10, a CMOS image sensor (CIS) chip 11 located on the circuit board, an image information processing (DSP) chip 12 located on the circuit board, and a wearable microdisplay (microdisplay) 13.

[0046] The CIS chip 11 can collect natural light and digitize the light signal into raw image information. After the raw image information enters the DSP chip, the DSP chip performs various enhancement and noise reduction operations on the raw image information and transmits the processed image information to the microdisplay 13 for display.

[0047] The aforementioned low-light vision systems are mostly used in wearable devices with night vision capabilities, such as night vision goggles. Therefore, these systems need to meet the requirements of being lightweight, having a high frame rate, low latency, and low power consumption. Regarding lightweight design, excessive weight on the head would hinder movement. High frame rate and low latency are primarily to prevent dizziness when observing and moving through night vision. Due to human physiology, the scene perceived by the eye during movement lags behind actual perception, causing dizziness. Therefore, a latency of less than 10ms and a frame rate of 120 FPS are generally required to prevent dizziness. Regarding low power consumption, since these wearable devices primarily use batteries, low power consumption ensures a long operating time.

[0048] To meet wearable requirements, the MicroDisplay 13 requires the use of silicon-based organic light-emitting diodes (micro-OLEDs). The image sensor in the CIS chip 11 is a night vision-grade image sensor with ultra-high sensitivity.

[0049] However, compared to low-light vision systems based on photomultiplier tubes, Figure 1 The low-light vision system shown in the diagram struggles to achieve the same level of low latency because the CIS chip 11 needs to convert image information into digital signals, then transfer the digital signals to the DSP chip 12, and finally transmit them to the microdisplay 13. This long data link leads to increased latency. Increasing the frame rate of the CIS chip 11 to reduce latency would cause a sharp increase in its power consumption, thus affecting the operating time of the night vision system.

[0050] In addition, in the aforementioned low-light vision system, the CIS chip 11, DSP chip 12 and microdisplay 13 are laid flat on the circuit board 10, resulting in a larger size of the circuit board 10, which in turn increases the weight of the circuit board and is not conducive to making the vision system lighter.

[0051] To address this problem, this invention provides a vision system. This system interconnects the CMOS image sensor layer and the light-emitting driving layer at the pixel level using a stacking process. This allows the output signal from the CMOS image sensor layer to be directly input to the light-emitting driving layer, instead of requiring processing by an image signal processing chip. This reduces the delay between the output signal from the CMOS image sensor layer and the light-emitting driving layer, minimizing dizziness experienced by users when observing and moving around in night vision devices. Furthermore, by integrating the CMOS image sensor layer and the light-emitting driving layer into a single photosensitive driving chip, with the light-emitting unit located on the surface of the light-emitting driving layer instead of using two separate chips, the light-emitting unit and the photosensitive driving chip are located at the same position on the circuit board. This reduces the number of chips on the circuit board, decreases chip size, and reduces chip weight.

[0052] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0053] Figure 2 This is a schematic diagram of the structure of a vision system according to an embodiment of the present invention. (Refer to...) Figure 2 This invention provides a vision system comprising: a circuit board 20, a photosensitive driver chip 21, and a light-emitting unit. The light-emitting unit is located on the photosensitive driver chip 21.

[0054] Figure 3 A schematic diagram of the structure of a photosensitive driving chip 21 in an embodiment of the present invention. (Refer to...) Figure 2 and Figure 3 The photosensitive driving chip 21 includes a CMOS image sensor layer 211 and a light-emitting driving layer 212. The CMOS image sensor layer 211 is located on the photosensitive side 20a of the circuit board 20 and is used to collect external light. The light-emitting driving layer 212 is located on the light-emitting side 20b of the circuit board 20 and is used to drive the light-emitting unit to emit light. The photosensitive side 20a and the light-emitting side 20b of the circuit board 20 are opposite to each other. The light-emitting unit can be located on the surface of the light-emitting driving layer 212 and connected to the light-emitting driving layer 212, and is adapted to emit light under the drive of the light-emitting driving layer 212.

[0055] In an embodiment of the present invention, the CMOS image sensor layer 211 and the light-emitting driving layer 212 are interconnected at the pixel level through a stack process.

[0056] In specific implementations, there can be multiple ways to achieve pixel-level interconnection between the CMOS image sensor layer 211 and the light-emitting driving layer 212 through stack technology, which are not limited here.

[0057] In one embodiment, due to the similarity of the circuit structure of the CMOS image sensor layer 211 and the light-emitting driving layer 212, their manufacturing processes are basically the same. Therefore, they can be regarded as two different layers of the same chip and connected by a hybrid bond. Subsequently, the CMOS image sensor layer 211 and the light-emitting driving layer 212 can be packaged into a photosensitive driving chip 21.

[0058] Pixel-level interconnection refers to interconnecting at the pixel level, which means connecting the pixel structures of the CMOS image sensor layer 211 and the light-emitting driving layer 212. Hybrid bonding is a method to achieve denser interconnection between stacked layers, which helps to reduce the thickness of the photosensitive driving chip. After hybrid bonding, there are no gaps between the CMOS image sensor layer 211 and the light-emitting driving layer 212, and no other materials are needed to fill them.

[0059] In a specific implementation, the CMOS image sensor layer 211 can collect external natural light and convert the induced charge into a corresponding voltage signal. The light-emitting driving layer 212 can use the voltage signal output by the CMOS image sensor layer 211 to drive the light-emitting unit.

[0060] In a specific implementation, the CMOS image sensor layer 211 may include a first pixel array composed of N first pixel structures. The light-emitting driving layer 212 may include a second pixel array composed of N second pixel structures. Wherein, N is ≥2 and N is an integer.

[0061] The CMOS image sensor layer 211 and the light-emitting driving layer 212 have the same pixel size. Each first pixel structure has a first bonding end and each second pixel structure has a second bonding end. The first bonding end and the corresponding second bonding end are connected in a hybrid bonding manner in a one-to-one correspondence.

[0062] Figure 4 for Figure 3 A schematic diagram of the cross-sectional structure of the photosensitive driver chip 21 along AA'. Among them, Figure 4Only three pixel structures from each of the first pixel array 411 and the second pixel array 42 are shown. Specifically, the first pixel structure Pixeli-1 of the first pixel array 411 can be connected to the second pixel structure Pixelj-1 of the second pixel array 42 using a hybrid bonding method; the first pixel structure Pixeli of the first pixel array 411 can be connected to the second pixel structure Pixelj of the second pixel array 42 using a hybrid bonding method; and the first pixel structure Pixeli+1 of the first pixel array 411 can be connected to the second pixel structure Pixelj+1 of the second pixel array 42 using a hybrid bonding method. Here, i and j are both positive integers, and i is less than N, and j is less than N.

[0063] Taking the connection between the first pixel structure Pixeli-1 and the second pixel structure Pixelj-1 as an example, the first pixel structure Pixeli-1 can have a first bonding end HB-px. i-1 The second pixel structure Pixelj-1 can have a second bonding end HB-px j-1 First bonding end HB-px i-1 With the second bonding end HB-px j-1 Hybrid bonding connects the first pixel structure Pixeli-1 to the second pixel structure Pixelj-1.

[0064] In specific implementation, the first bonding end of each first pixel structure is connected to the corresponding first pixel structure through a metal layer. The second bonding end of each second pixel structure is connected to the corresponding second pixel structure through a metal layer.

[0065] In a specific implementation, the first bonding end of the first pixel structure is the output end of the first pixel structure. The second bonding end of the second pixel structure is the input end of the second pixel structure. Therefore, the output signal of the first pixel structure can be directly input into the corresponding second pixel structure without needing to be processed by an image information processing chip, thereby reducing latency.

[0066] In practical implementation, when the voltages of the first bonding terminal and the second bonding terminal match, the output signal of the first pixel structure can be directly input into the corresponding second pixel structure. Matching means that the voltage of the output signal from the first bonding terminal is within the driving voltage range of the second pixel structure. For example, if the voltage of the output signal from the first bonding terminal is 1V, and the driving voltage range of the second pixel structure is [-1.1V, 1.2V], then the output signal of the first pixel structure can be directly input into the corresponding second pixel structure.

[0067] In some embodiments, there may be a voltage mismatch between the first bonding terminal and the second bonding terminal, meaning the voltage of the output signal of the first pixel structure is not within the driving voltage range of the second pixel structure. In this case, the vision system may further include a level conversion circuit. The input terminal of the level conversion circuit is connected to the first bonding terminal, and the output terminal is connected to the second bonding terminal. The level conversion circuit is adapted to convert the potential of the output signal from the first bonding terminal before inputting it to the second bonding terminal.

[0068] Reference Figure 5 The first bonding end HB-px of the first pixel structure Pixeli-1 i-1 The level conversion circuit 51 can be used to connect the second bonding terminal HB-px of the second pixel structure Pixelj-1. j-1 The connection is made so that the level conversion circuit 51 can be used to connect the first bonding terminal HB to px. i-1 The voltage of the output signal is converted so that the voltage of the converted signal is suitable for input to the second bonding terminal HB-px. j-1 .

[0069] In a specific implementation, by setting a level conversion circuit between the first and second bonding terminals where the voltages are mismatched, the voltage of the output signal of the first pixel structure can be adjusted so that the adjusted signal matches the driving voltage of the second pixel structure.

[0070] In a specific implementation, the level conversion circuit can be located in the CMOS image sensor layer or in the light-emitting driving layer; there is no limitation here.

[0071] In specific implementations, the structure of the level conversion circuit is not limited. For example, a P-type source follower can be selected as the level conversion circuit.

[0072] In some embodiments, the option can be selected Figure 6 The circuit structure 61 shown is a level conversion circuit. Specifically, the level conversion circuit 61 may include: a first PMOS transistor P1, a second PMOS transistor P2, a first NMOS transistor N1, and a second NMOS transistor N2. The gate of the first PMOS transistor P1 is connected to the first bonding terminal HB-px. i-1 Connection, the gate of the second PMOS transistor P2 is connected to the second bonding terminal HB-px j-1The drain of the first PMOS transistor P1 is connected to the drain of the second PMOS transistor P2. The sources of the first PMOS transistor P1 and the second PMOS transistor P2 are connected to the power supply voltage. The drain of the first PMOS transistor P1 is connected to the drain of the first NMOS transistor N1, the gate of the first NMOS transistor N1, and the gate of the second NMOS transistor N2. The drain of the second PMOS transistor P2 is connected to the drain of the second NMOS transistor N2. The sources of the first NMOS transistor N1 and the second NMOS transistor N2 are grounded.

[0073] The level conversion circuit 61 described above can not only increase the voltage of the output signal of the first bonding terminal HB-pxi-1, but also, since the level conversion circuit 61 can convert the linear change of light intensity with voltage into a nonlinear change of voltage with current, and since the current flowing through the first PMOS transistor P1 is the same as the current flowing through the second PMOS transistor P2, and the current flowing through the second PMOS transistor P2 is also the same as the current that ultimately drives the OLED, the level conversion circuit 61 can also perform gamma correction on the output signal of the first bonding terminal HB-pxi-1, so that the light-emitting unit has a larger brightness range relative to natural light.

[0074] In specific implementations, the light-emitting unit may include a plurality of organic light-emitting diodes (OLEDs). (See reference...) Figure 4 The output terminals of each second pixel structure within the second pixel array 42 can simultaneously serve as the anode of the organic light-emitting diode. By forming a coating 213 on the surface of the light-emitting driving layer 212, the coating 213 can be connected to the output terminals of the second pixel structures in the light-emitting driving layer 212 to form individual light-emitting units, thereby emitting light under the drive of the light-emitting driving layer 212.

[0075] In practical implementation, the first pixel structure in the CMOS image sensor layer can be connected to the second bonding end of the corresponding second pixel structure in the light-emitting driving layer only through the first bonding end. In other words, the CMOS image sensor layer and the light-emitting driving layer can achieve a hybrid bonding connection only through the first and second bonding ends.

[0076] In one embodiment of the present invention, the CMOS image sensor layer and the light-emitting driving layer can also be hybrid bonded together through other terminals.

[0077] In one embodiment of the present invention, the circuit structure of the CMOS image sensor layer is as follows: Figure 7 As shown. (Refer to...) Figure 7 In addition to the first pixel array 411, the CMOS image sensor layer may also include: a first row driving circuit 412, a readout circuit array 413, and at least one first pad WB_PAD.

[0078] in:

[0079] The first row driving circuit 412 is connected to the first pixel array 411 and is adapted to select at least one row of the first pixel structure in the first pixel array 411 for readout operation.

[0080] The readout circuit array 413 is adapted to perform a readout operation on the first pixel structure selected by the first row driving circuit 412.

[0081] The first pad HB1_PAD is adapted to be connected to the light-emitting driving layer in a hybrid bonding manner.

[0082] Accordingly, the circuit structure of the light-emitting driving layer is as follows: Figure 8 As shown. (Refer to...) Figure 8 In addition to the second pixel array 421, the light-emitting driving layer may further include: a second row driving circuit 422, a column writing circuit 423, and at least one second pad HB2_PAD. Wherein:

[0083] The second row driving circuit 422 is adapted to select at least one row of second pixel structures in the second pixel array 421 for writing operations;

[0084] The column writing circuit 423 is connected to the second pixel array 421 and is adapted to perform a writing operation on the second pixel structure selected by the second row driving circuit 422.

[0085] The second pad HB2_PAD is adapted to be connected to the third bonding end HB1_PAD.

[0086] By setting a first pad HB1_PAD in the CMOS image sensor layer and a second pad HB2_PAD in the light-emitting driving layer, the output signal of the first pixel structure in the first pixel array 411 is read out by the readout circuit array 413 via the bit line BL and then input to the column write circuit 423 in the light-emitting driving layer, and then written into the corresponding second pixel structure in the second pixel array 421.

[0087] Compared to Figure 1 The vision system shown eliminates the need for a DSP chip 12, and the CMOS image sensor layer and the light-emitting driving layer achieve pixel-level interconnection through a stacking process. This reduces the circuit board size and weight of the vision system, shortens latency, and minimizes dizziness during use. Furthermore, the inclusion of the first pad HB1_PAD and the second pad HB2_PAD facilitates remote transmission, storage, and analysis of image information.

[0088] In specific implementations, a first pad HB1_PAD can be set for each first pixel structure in the first pixel array, or the first pad HB1_PAD can be set only for some first pixel structures. The number of first pads HB1_PAD in the CMOS image sensor layer is the same as the number of second pads HB2_PAD in the light-emitting driving layer, and they correspond one-to-one.

[0089] It should be noted that, in some embodiments, the first pixel structure in the CMOS image sensor layer can be connected to the second pad HB2_PAD of the corresponding second pixel structure in the light-emitting driving layer only through the first pad HB1_PAD.

[0090] In some embodiments, the first pixel structure in the CMOS image sensor layer can be connected to the light-emitting driving layer not only through the first pad HB1_PAD, but also through the first bonding end.

[0091] In a specific implementation, the first pixel array 411 is formed by an array of several first pixel structures. The circuit structure of the first pixel structure is not limited. For example, refer to... Figure 7 For any first pixel structure Pixeli in the first pixel array, it can be composed of a photodiode PD, four NMOS transistors (including transmission transistor TX, reset transistor RST, source follower transistor SF and select transistor SEL) and a capacitor C1.

[0092] In a specific implementation, the second pixel array 421 is formed by an array of several second pixel structures. The circuit structure of the second pixel structure is not limited. For example, refer to... Figure 8 For any second pixel structure Pixelj in the second pixel array, it can be composed of a first switch s1, a second switch s2, a capacitor C2, and a driving transistor DR. The second pixel structure Pixelj is connected to the first pixel structure Pixeli.

[0093] Taking the first pixel structure Pixeli as an example, the photodiode PD can sense light signals. By controlling the on / off state of the transmission transistor TX, the reset transistor RST, and the source follower transistor SF, the light signals can be converted into electrical signals and stored in the capacitor C1. When the select transistor SEL is turned on, the output terminal of the first pixel structure Pixeli (i.e., the source of the source follower transistor SF) is connected to the readout circuit array 413 through the bit line BL.

[0094] In a specific implementation, the readout circuit array 413 can be a column-parallel ADC (analog-to-digital converter). Specifically, each column of first pixel structures corresponds to one ADC, and the ADCs corresponding to the first pixel structures in each column form a column-parallel ADC. The output terminal of each first pixel structure is connected to the input terminal of the corresponding ADC via bit line BL. The corresponding ADC quantizes the signal read from bit line BL and transmits it from the corresponding first pad HB1_PADi to the corresponding second pad HB2_PADj. The signal received on the second pad HB2_PADj is written to capacitor C2, and subsequently, the OLED is driven to emit light under the drive of the driving transistor DR.

[0095] The first pixel structure Pixeli can also have a first bonding end HB_pxi, and the second pixel structure Pixelj correspondingly has a second bonding end HB_pxj. The first bonding end HB_pxi and the second bonding end HB_pxj are mixed and bonded together.

[0096] In practice, the first bonding terminal outputs an analog signal, which is a voltage signal converted from the optical signal. This analog signal is directly transmitted to the light-emitting unit or transmitted to the light-emitting unit via a level conversion circuit. The signal transmitted by the first pad is a quantized digital signal read out by a readout circuit array and subsequently transmitted to the light-emitting unit.

[0097] In practical implementation, for a pair of pixel structures in the CMOS image sensor layer and the light-emitting driving layer, they can be connected using a hybrid bonding method between the first and second bonding ends, a hybrid bonding method between the first and second pads, or a combination of both. Transmitting signals from the first bonding end to the corresponding second bonding end results in lower latency, allowing the corresponding pixel structure to emit light and display the image preferentially. Conversely, transmitting signals from the first pad to the second pad has relatively higher latency, subsequently refreshing the data stored in the pixel structure and updating the displayed image.

[0098] It should be noted that in practical applications, the first row driving circuit can drive only one row of first pixel structures in the first pixel array at a time, or it can drive two or more rows of first pixel structures in the first pixel array. Similarly, the second row driving circuit can drive only one row of second pixel structures in the second pixel array at a time, or it can drive two or more rows of second pixel structures in the second pixel array. Thus, when the first and second pixel arrays are connected via the first and second bonding terminals, the first row driving circuit can transmit signals row by row, or it can perform a global transfer operation, that is, transmit the output signals of all first pixel structures to the corresponding second bonding terminals at once. When the first and second pixel arrays are connected via the first and second pads, the first row driving circuit can drive them row by row, or it can perform a global transfer operation.

[0099] In some embodiments, to achieve image information processing, such as enhancement, gamma correction, object recognition, etc., a corresponding image information processing circuit can be set in the CMOS image sensor layer, or a corresponding image information processing circuit can be set in the light-emitting driving layer, or an image information processing chip can be set between the CMOS image sensor layer and the light-emitting driving layer. The following describes... Figure 7 to Figure 9 Provide a detailed description.

[0100] In one embodiment, reference is made to Figure 7 The CMOS image sensor layer may further include a first image information processing circuit ISP1. The input terminal of the first image information processing circuit ISP1 is connected to the readout circuit array 411, and the output terminal is connected to the first pad HB1_PAD, and is adapted to process the image information read out by the readout circuit array 411.

[0101] In specific implementations, the first image information processing circuit ISP1 does not limit the specific processing operations on the image information, and may include, but is not limited to, enhancement, gamma correction, object recognition, etc. Through the first image information processing circuit ISP1, the image information input to the light-emitting driving layer can be processed to meet image requirements.

[0102] In another embodiment, reference is made to Figure 8 The light-emitting driving layer may further include a second image information processing circuit ISP2. The input terminal of the second image information processing circuit ISP2 is connected to the second pad HB2_PAD, and the output terminal is connected to the column writing circuit, which is adapted to process the image information received by the second pad HB2_PAD.

[0103] In specific implementations, the second image information processing circuit ISP2 does not limit the specific processing operations on the image information, and may include, but is not limited to, enhancement, gamma correction, object recognition, etc. Through the second image information processing circuit ISP2, the received image information can be processed to meet image requirements.

[0104] It should be noted that, in specific implementations, the first image information processing circuit ISP1 can be set only in the CMOS image sensor layer without setting the second image information processing circuit ISP2 in the light-emitting driving layer, or the second image information processing circuit ISP2 can be set only in the light-emitting driving layer without setting the first image information processing circuit ISP1 in the CMOS image sensor layer, or both the first image information processing circuit ISP1 and the second image information processing circuit ISP2 can be set in the CMOS image sensor layer.

[0105] In yet another embodiment, reference is made to... Figure 2 An image information processing chip 22 can be disposed between the CMOS image sensor layer and the light-emitting driving layer. Specifically, the input terminal of the image information processing chip 22 can be connected to the first pad of the CMOS image sensor layer, and the output terminal can be connected to the second pad of the light-emitting driving layer.

[0106] In practical implementation, the first and second pads can be led out of the photosensitive driver chip and then connected to the image information processing chip 22 via wire bonding. Wire bonding, also known as pressure bonding, refers to the connection of internal interconnects in solid-state circuits of microelectronic devices using metal wires (gold wires) and heat or ultrasonic energy.

[0107] When the CMOS image sensor layer is equipped with a first image information processing circuit ISP1 and the light-emitting driving layer is equipped with a second image information processing circuit ISP2, power consumption, weight, latency, and other indicators can be comprehensively evaluated to determine whether to simultaneously include an image information processing chip 22. When including the image information processing chip 22, refer to... Figure 9 The image information processing chip 22 can be connected to the first image information processing circuit ISP1 via the first pad and to the second image information processing circuit ISP2 via the second pad. The independent image information processing chip 22 can be used to enhance the overall image display effect, such as for human body recognition and annotation. Meanwhile, the first image information processing circuit ISP1 and the second image information processing circuit ISP2 can be used to perform simple image enhancement operations, such as gamma correction and color calibration.

[0108] In specific implementation, the number of pixel structures connected through the first bonding end and the second bonding end, and the number of pixel structures connected through the first pad and the second pad, can be preset or selected by the first image information processing circuit ISP1, the second image information processing circuit ISP2, or the image information processing chip 91.

[0109] The organic light-emitting diode (OLED) in the light-emitting unit can be driven by a signal received from the second bonding end or by a signal received from the second pad. When the OLED is driven by a signal received from the second bonding end, latency and power consumption can be effectively reduced. When the OLED is driven by a signal received from the second pad, the processed and enhanced signal can be displayed. Signals from both sources can appear simultaneously in a single image; that is, some second pixel structures use signals from the second bonding end, while others use signals from the second pad, thus achieving compatibility between low latency and image enhancement.

[0110] This invention also provides a night vision device, which includes the aforementioned visual system.

[0111] As described above, the vision system in this embodiment integrates the CMOS image sensor layer and the light-emitting driving layer into the same photosensitive driving chip. Compared to traditional photomultiplier tube-based vision systems, it has irreplaceable advantages such as low power consumption, all-weather operation, digitization capability, and remote transmission capability. Furthermore, compared to existing CMOS image sensor-based vision systems, it offers advantages such as low power consumption, low latency, no dizziness, and low weight.

[0112] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A vision system, characterized in that, include: Circuit board; The photosensitive driver chip is located on the circuit board; The photosensitive driving chip includes a CMOS image sensor layer and a light-emitting driving layer; the CMOS image sensor layer is located on the photosensitive side of the circuit board and is used to collect external light; the light-emitting driving layer is located on the light-emitting side of the circuit board and is used to drive the light-emitting unit to emit light; the photosensitive side of the circuit board is opposite to the light-emitting side of the circuit board. And the light-emitting unit, located on the surface of the light-emitting driving layer, connected to the light-emitting driving layer, and adapted to emit light under the driving of the light-emitting driving layer; The CMOS image sensor layer and the light-emitting driving layer are interconnected at the pixel level through a stacking process.

2. The vision system as described in claim 1, characterized in that, The CMOS image sensor layer includes: a first pixel array composed of N first pixel structures; the light-emitting driving layer includes: a second pixel array composed of N second pixel structures; N is ≥2 and N is an integer; Each first pixel structure has a first bonding end, and each second pixel structure has a second bonding end. The first bonding end and the corresponding second bonding end are connected in a hybrid bonding manner.

3. The vision system as described in claim 2, characterized in that, The first bonding end of the first pixel structure is the output end of the first pixel structure; the second bonding end of the second pixel structure is the input end of the second pixel structure.

4. The vision system as described in claim 2, characterized in that, The voltages of the first bonding terminal and the second bonding terminal are matched.

5. The vision system as described in claim 2, characterized in that, Also includes: The level conversion circuit has its input terminal connected to the first bonding terminal and its output terminal connected to the second bonding terminal. It is suitable for converting the potential of the output signal from the first bonding terminal before inputting it to the second bonding terminal.

6. The vision system as described in claim 2, characterized in that, The light-emitting unit includes a plurality of organic light-emitting diodes, and the output terminal of the second pixel structure is connected as the anode of the organic light-emitting diodes.

7. The vision system according to any one of claims 2 to 6, characterized in that, The CMOS image sensor layer and the light-emitting driving layer are connected by a hybrid bonding method.

8. The vision system as described in claim 7, characterized in that, The CMOS image sensor layer also includes: The first row driving circuit is connected to the first pixel array and is adapted to select at least one row of the first pixel structure in the first pixel array for readout operation. The readout circuit array is adapted to read out the first pixel structure selected by the first row driving circuit; And at least one first pad adapted to be connected to the light-emitting driving layer in a hybrid bonding manner.

9. The vision system as described in claim 8, characterized in that, The CMOS image sensor layer also includes: The first image information processing circuit has its input terminal connected to the readout circuit array and its output terminal connected to the first pad, and is adapted to process the image information read out by the readout circuit array.

10. The vision system as described in claim 8 or 9, characterized in that, The light-emitting driving layer further includes: a second row driving circuit, adapted to select at least one row of second pixel structures in the second pixel array for writing operations; The column writing circuit is connected to the second pixel array and is adapted to write the second pixel structure selected by the second row driving circuit. And at least one second pad adapted to be connected to the first pad in a hybrid bonding manner.

11. The vision system as claimed in claim 10, characterized in that, The light-emitting driving layer further includes: The second image information processing circuit has its input end connected to the second pad and its output end connected to the column writing circuit, and is suitable for processing the image information received by the second pad.

12. The vision system as claimed in claim 1, characterized in that, Also includes: An image information processing chip is connected to the CMOS image sensor layer and is adapted to process the data output by the CMOS image sensor layer and input it to the light-emitting driving layer.

13. A night vision device, characterized in that, Includes the vision system according to any one of claims 1 to 12.

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