Data storage, access, computation methods and related products

Abstract

The present disclosure discloses a data storage method, a data access method, a data operation method, a data storage device, a computing device, a chip and a board card. The computing device can be included in a combined processing device, which can further include an interface device and other processing devices. The computing device interacts with the other processing devices to jointly complete a user-specified computing operation. The combined processing device can further include a storage device connected with the computing device and the other processing devices respectively, for storing data of the computing device and the other processing devices. The scheme of the present disclosure provides an efficient storage method and access method for unconventional types of data, thereby effectively saving storage space and transmission bandwidth.

Claims

1. A data storage method, comprising: The data is divided into an integer part and a remainder part, wherein the number of bits in the integer part is aligned to the memory access alignment value, and the number of bits in the remainder part is less than the memory access alignment value; The integer portion is stored in the first address of the first storage area; as well as The remainder is stored in a second address in a second storage area, wherein the second address has a one-to-one mapping relationship with the first address.

2. A data access method, comprising: Read the integer portion of the number of bits of the data from a first address in a first storage region, wherein the number of bits of the integer portion is aligned to a memory access alignment value; Based on the first address, determine the second address of the second storage region that has a one-to-one mapping relationship with it; The remainder of the number of bits of the data is read from the second address of the second storage area, wherein the number of bits of the remainder is less than the memory access alignment value; as well as The integer part and the remainder part are concatenated to form the data.

3. A data processing method, comprising: Perform operations on the data to be processed and obtain intermediate results; Convert the intermediate calculation results into data of a specified type; as well as The specified type of data is stored according to the data storage method described in claim 1.

4. The method according to claim 3, further comprising: Read the specified type of data according to the data access method of claim 2; as well as Perform further calculations using the specified data type.

5. The method according to any one of claims 1-4, wherein the mapping relationship between the first address and the second address is preset.

6. The method according to any one of claims 1-4, wherein the mapping relationship between the first address and the second address is established in real time when the data is stored and maintained through an address table.

7. The method according to any one of claims 1-4, wherein the first storage region is addressed according to the memory access alignment value.

8. The method of claim 7, wherein the first storage region is located in an equipped memory that is addressed according to the memory access alignment value.

9. The method according to any one of claims 1-4, wherein the second storage region is addressed and accessed by aligning the remainder portion.

10. The method according to any one of claims 1-4, wherein the data type is TF32, the memory access alignment value is 8 bits, the integer part includes 16 bits, and the remainder part includes 3 bits.

11. The method of claim 10, wherein the sign bit of the data is included in the integer portion.

12. A data storage device, comprising: A first storage region is configured with an integer portion of the number of bits for storing data, wherein the number of bits in the integer portion is aligned to a memory access alignment value; A second storage area is configured to store the remainder portion of the number of bits used to store the data, wherein the number of bits in the remainder portion is less than the memory access alignment value; There is a one-to-one mapping relationship between the first address in the first storage area corresponding to the integer part of the same data and the second address in the second storage area corresponding to the remainder part.

13. The apparatus according to claim 12, wherein the mapping relationship between the first address and the second address is preset.

14. The apparatus of claim 12, wherein the mapping relationship between the first address and the second address is established in real time when the data is stored and maintained through an address table.

15. The apparatus according to any one of claims 12-14, wherein the first storage region is addressed according to the memory access alignment value.

16. The apparatus of claim 15, wherein the first storage region is located in an equipped memory that is addressed according to the memory access alignment value.

17. The apparatus according to any one of claims 12-14, wherein the second storage region is addressed and accessed in alignment with the remainder portion.

18. The apparatus according to any one of claims 12-14, wherein the data type is TF32, the memory access alignment value is 8 bits, the integer part comprises 16 bits, and the remainder part comprises 3 bits.

19. The apparatus of claim 18, wherein the sign bit of the data is included in the integer portion.

20. A computing device comprising a data storage device according to any one of claims 12-19.

21. A chip comprising the computing device according to claim 20.

22. A circuit board comprising the chip according to claim 21.

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