Address space management methods, apparatus, computer equipment, and storage media

Abstract

This application relates to an address space management method, apparatus, computer device, and storage medium. The method includes: obtaining the allocated address space range corresponding to each created function supported by the processing chip; treating each address space range as a node and constructing a balanced binary tree based on all nodes; and, upon receiving a PCIe packet sent by the host, performing addressing based on the PCIe packet and the balanced binary tree. Because it employs a dynamic balanced binary tree based on address ranges, and can be implemented using SRAM, it significantly reduces area and power consumption compared to CAM. Furthermore, since a balanced binary tree is used, it eliminates the need for one-to-one comparisons between the PCIe packet address and the address range of each function; instead, it requires a maximum of log2(N) comparisons, where N is the total number of functions, thus significantly improving performance compared to one-to-one comparisons.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to an address space management method, apparatus, computer device, and storage medium. Background Technology

[0002] In cloud computing virtualization scenarios, network interface cards (NICs) connect to the host via PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard). According to the PCIe protocol, the chip needs to support multiple devices, and each device needs to support multiple functions. For example, the chip might need to support 8,000 functions. Each function corresponds to a segment of the PCIe address space (PCIe bar space). Each function is dynamically created during host runtime, and the host allocates address space (PCIe bar space) for each function during creation. The address space ranges allocated to different functions do not overlap and are arbitrary. There is no guarantee that the address ranges of any two functions, A and B, are consecutive or in any fixed order. When the host accesses a function, the PCIe packet it sends carries address information. The NIC chip uses the address information from the received packet to search for the address ranges of various functions. When the address of the received packet matches the address range of a function, that function is selected. To ensure chip performance, address matching operations often need to be completed within several clock cycles.

[0003] In related technologies, when the number of functions is large (e.g., a chip supports 8K functions), CAM (Content-Addressable Memory) is generally used to complete the address matching operation and find the matched function in a short time (e.g., within a few clock cycles). Because CAM needs to search all memory addresses within one clock cycle, rather than just one, it is usually faster than RAM (Random Access Memory). However, it also requires more circuitry than RAM, resulting in a larger area and higher power consumption. Furthermore, both area and power consumption increase linearly with the number of functions. Summary of the Invention

[0004] Therefore, it is necessary to provide an address space management method, apparatus, computer device, and storage medium that can reduce memory area and power consumption in response to the above-mentioned technical problems.

[0005] Firstly, this application provides an address space management method. The method includes:

[0006] Obtain the address space range allocated to each created function supported by the processing chip;

[0007] Treat each address space range as a node, and construct a balanced binary tree based on all nodes;

[0008] Upon receiving a PCIe packet from the host, addressing is performed based on the PCIe packet and a balanced binary tree.

[0009] In one embodiment, constructing a balanced binary tree based on all nodes includes:

[0010] For a target node to be inserted into a balanced binary tree, the downward comparison direction based on the address space range of the target node and the address space range of the current node in the balanced binary tree is determined. It is then determined whether the current node has a child node in the downward comparison direction. If it does, the current node is updated. The above process of determining, judging, and updating is repeated until it is determined that the current node has no child node in the downward comparison direction. The target node is then added to the balanced binary tree as a child node of the current node in the downward comparison direction. The root node of the balanced binary tree is used as the initial current node.

[0011] Determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, adjust the balanced binary tree.

[0012] In one embodiment, the downward comparison direction based on the current node is obtained according to the address space range corresponding to the target node and the address space range corresponding to the current node, including:

[0013] If the lower limit of the address space range corresponding to the current node is greater than the upper limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the left direction; if the upper limit of the address space range corresponding to the current node is less than the lower limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the right direction.

[0014] In one embodiment, updating the current node includes:

[0015] If the downward comparison direction is to the left, the left child node of the current node is determined as the current node;

[0016] If the downward comparison direction is to the right, the right child node of the current node is determined as the current node.

[0017] In one embodiment, determining whether a balanced binary tree meets the adjustment conditions includes:

[0018] Get the height difference for each node in a balanced binary tree. The height difference is the absolute value of the difference between the height of the left subtree and the height of the right subtree of the node.

[0019] If there exists a node with a height difference greater than 1, then the balanced binary tree is determined to meet the adjustment condition; otherwise, the balanced binary tree is determined not to meet the adjustment condition.

[0020] In one embodiment, adjusting the balanced binary tree includes:

[0021] Traverse the balanced binary tree from bottom to top, find the first node with a height difference greater than 1, and use it as the discovery node;

[0022] If the target node is to the left of the left subtree of the discovered node, then rotate the discovered node clockwise. If the left child node of the discovered node has a right child node, then adjust the right child node to become the left child node of the discovered node.

[0023] If the target node is to the right of the right subtree of the discovered node, then rotate the discovered node counterclockwise. If the right child node of the discovered node has a left child node, then adjust the left child node to become the right child node of the discovered node.

[0024] If the target node is to the right of the left subtree of the discovered node, then the left child node and the right subtree of the left child node of the discovered node are rotated counterclockwise. If the left child node of the discovered node has a left child node, then the target node is made the right child node of the left child node of the discovered node, and the discovered node is rotated clockwise. If the left child node of the discovered node does not have a left child node, then the discovered node is rotated clockwise.

[0025] If the target node is to the left of the right subtree of the discovered node, then rotate the right child node and the left subtree of the right child node of the discovered node clockwise, and rotate the discovered node counterclockwise. If the discovered node has a left child node, then adjust the target node to be the right child node of the discovered node.

[0026] Secondly, this application also provides an address space management device. The device includes:

[0027] The acquisition module is used to acquire the address space range allocated to each created function supported by the processing chip;

[0028] The building module is used to treat each address space range as a node and build a balanced binary tree based on all nodes.

[0029] The addressing module is used to perform addressing based on the PCIe message and a balanced binary tree when a PCIe message is received from the host.

[0030] Thirdly, this application also provides a processing chip for performing the following steps:

[0031] Obtain the address space range allocated to each dynamically created function supported by the processing chip;

[0032] Treat each address space range as a node, and construct a balanced binary tree based on all nodes;

[0033] Upon receiving a PCIe packet from the host, addressing is performed based on the PCIe packet and a balanced binary tree.

[0034] Fourthly, this application also provides a computer device. The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to perform the following steps:

[0035] Obtain the address space range allocated to each dynamically created function supported by the processing chip;

[0036] Treat each address space range as a node, and construct a balanced binary tree based on all nodes;

[0037] Upon receiving a PCIe packet from the host, addressing is performed based on the PCIe packet and a balanced binary tree.

[0038] Fifthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, performs the following steps:

[0039] Obtain the address space range allocated to each dynamically created function supported by the processing chip;

[0040] Treat each address space range as a node, and construct a balanced binary tree based on all nodes;

[0041] Upon receiving a PCIe packet from the host, addressing is performed based on the PCIe packet and a balanced binary tree.

[0042] Sixthly, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, performs the following steps:

[0043] Obtain the address space range allocated to each dynamically created function supported by the processing chip;

[0044] Treat each address space range as a node, and construct a balanced binary tree based on all nodes;

[0045] Upon receiving a PCIe packet from the host, addressing is performed based on the PCIe packet and a balanced binary tree.

[0046] The aforementioned address space management method, apparatus, computer equipment, and storage medium, by employing a dynamically balanced binary tree based on address ranges and implemented using SRAM, achieve significant savings in area and power consumption compared to CAM. Furthermore, because a balanced binary tree is used, it eliminates the need for one-to-one comparisons between PCIe packet addresses and the address ranges of each function; instead, it requires a maximum of log2(N) comparisons, where N is the total number of functions, thus significantly improving performance compared to one-to-one comparisons. Attached Figure Description

[0047] Figure 1 This is a flowchart illustrating an address space management method in one embodiment;

[0048] Figure 2 This is a schematic diagram of a balanced binary tree containing an address space range in one embodiment;

[0049] Figure 3 This is a flowchart illustrating an address space management method in one embodiment;

[0050] Figure 4 This is a schematic diagram of the structure of a balanced binary tree in one embodiment;

[0051] Figure 5 This is a schematic diagram of the adjustment of a balanced binary tree in one embodiment, where the target node is to the left of the left subtree of the discovery node;

[0052] Figure 6 This is a schematic diagram illustrating the adjustment of a balanced binary tree where the target node is to the left of the left subtree of the discovery node in another embodiment.

[0053] Figure 7 This is a schematic diagram of the adjustment of a balanced binary tree in one embodiment, where the target node is to the right of the right subtree of the discovery node;

[0054] Figure 8 This is a schematic diagram of the adjustment of a balanced binary tree where the target node is to the right of the right subtree of the discovery node in another embodiment;

[0055] Figure 9 This is a schematic diagram illustrating the adjustment of a balanced binary tree where the target node is located to the right of the left subtree of the discovery node in one embodiment.

[0056] Figure 10This is a schematic diagram illustrating the adjustment of a balanced binary tree where the target node is to the right of the left subtree of the discovery node in another embodiment.

[0057] Figure 11 This is a schematic diagram of the adjustment of a balanced binary tree in one embodiment, where the target node is to the left of the right subtree of the discovery node;

[0058] Figure 12 This is a schematic diagram of the adjustment of a balanced binary tree where the target node is to the left of the right subtree of the discovery node in another embodiment;

[0059] Figure 13 This is a structural block diagram of an address space management device in one embodiment;

[0060] Figure 14 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0062] In related technologies, when the number of functions is large (e.g., a chip supports 8K functions), CAM (Content-Addressable Memory) is generally used to complete the address matching operation and find the matched function in a short time (e.g., within a few clock cycles). Because CAM needs to search all memory addresses within one clock cycle, rather than just one, it is usually faster than RAM (Random Access Memory). However, it also requires more circuitry than RAM, resulting in a larger area and higher power consumption. Furthermore, both area and power consumption increase linearly with the number of functions.

[0063] To address the aforementioned technical problems, in one embodiment, such as Figure 1As shown, an address space management method is provided. This method can be implemented using SRAM (Static Random Access Memory) and can be applied to computer devices including PCIe buses. These computer devices can be terminal devices or servers. The terminal devices are not limited to various personal computers, laptops, smartphones, tablets, IoT devices, and portable wearable devices. IoT devices can include smart speakers, smart TVs, smart air conditioners, smart vehicle devices, etc. Portable wearable devices can include smartwatches, smart bracelets, head-mounted devices, etc. The server can be implemented using a standalone server or a server cluster composed of multiple servers. Taking the application of this method to a server as an example, the method includes the following steps:

[0064] Step 102: Obtain the address space range allocated to each created function supported by the processing chip.

[0065] It is understandable that each function is usually created dynamically, and the address space range of each function is usually not in a fixed order, but is randomly allocated based on free addresses. Different functions are allocated different address space ranges, and there is no overlap between them.

[0066] Step 104: Treat each address space range as a node and construct a balanced binary tree based on all nodes.

[0067] The construction process of a balanced binary tree can be matched with the dynamic creation process of functions. Each created function can be allocated an address space range, thus being inserted as a node into the balanced binary tree. Specifically, for the first created function, its address space range can be used as the first node of the balanced binary tree. For subsequent nodes, the balanced binary tree is constructed sequentially from top to bottom. It should be noted that the "top to bottom" mentioned above mainly refers to the top-to-bottom direction within the context of a binary tree. From a viewpoint, a binary tree typically extends from the root node to the leaf nodes; therefore, "top to bottom" refers to the direction from the root node to the leaf node. A balanced binary tree satisfies the following properties: First, it can be an empty tree; second, if the balanced binary tree is not empty, the absolute value of the height difference between the left and right subtrees of any node in the balanced binary tree is no greater than 1.

[0068] Step 106: Upon receiving a PCIe message from the host, perform addressing based on the PCIe message and the balanced binary tree.

[0069] In this embodiment of the application, for any node in a balanced binary tree that has left and right child nodes, the address space range corresponding to its left child node is generally smaller than the address space range of the node itself, and the address space range corresponding to its right child node is generally larger than the address space range of the node itself. For example... Figure 2 As shown, c_min is greater than b_max, and a_min is greater than b_max. For a received PCIe packet sent by the host, if the packet address corresponding to the PCIe packet is less than or equal to c_max and greater than or equal to c_min, then the PCIe packet has hit the target address. Figure 2 In function C, if the address of the PCIe packet is greater than c_max, the address space range of function A can be compared. If the address of the PCIe packet is less than c_min, the address space range of function B can be compared. This process continues downwards until a match is found.

[0070] In the above embodiments, because a dynamic balanced binary tree based on address range is used and can be implemented using SRAM, significant savings in area and power consumption are achieved compared to CAM. Furthermore, since a balanced binary tree is used, it eliminates the need for one-to-one comparisons between PCIe packet addresses and the address range of each function; instead, a maximum of log2(N) comparisons are required, where N is the total number of functions. This significantly improves performance compared to one-to-one comparisons.

[0071] In some embodiments, such as Figure 3 The diagram illustrates an address space management method, including:

[0072] Step 302: Obtain the address space range allocated to each created function supported by the processing chip, and treat each address space range as a node.

[0073] Step 304: For the target node to be inserted into the balanced binary tree, determine the downward comparison direction based on the address space range corresponding to the target node and the address space range corresponding to the current node in the balanced binary tree, and determine whether the current node has a child node in the downward comparison direction. If it does, update the current node. Repeat the above determination, judgment and update process until it is determined that the current node has no child node in the downward comparison direction. Then add the target node as the child node of the current node in the downward comparison direction to the balanced binary tree.

[0074] In this context, the root node of the balanced binary tree serves as the current node in the initial state.

[0075] Specifically, such as Figure 2As shown, the address space range of the target node can be compared with the address space range of each node in the balanced binary tree from top to bottom. At the beginning of the comparison, the current node is the root node C of the balanced binary tree. By comparing the address space range corresponding to the target node with the address space range corresponding to C, if the downward comparison direction is determined to be left, it can be determined whether C has a child node in the left direction (i.e., whether C has a left child node). Figure 2 It can be seen that C has a child node to the left, namely B. Therefore, the current node can be updated to B. By comparing the address space range corresponding to the target node with the address space range corresponding to B, if the downward comparison direction is determined to be left, it can be determined whether B has a child node to the left. Figure 2 It can be seen that B has no child nodes in the left direction, so the target node can be added as the left child node of B and added to the balanced binary tree.

[0076] Step 306: Determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, adjust the balanced binary tree.

[0077] Adding a target node to a balanced binary tree may result in the absolute value of the height difference between the left and right subtrees of a node being no greater than 1, thus causing the binary tree to no longer satisfy the definition of a balanced binary tree. Therefore, the balanced binary tree can be adjusted if it meets the adjustment condition. The adjustment condition is that there exists a node whose absolute value of the height difference between its left and right subtrees is greater than 1.

[0078] Step 308: Upon receiving a PCIe message from the host, perform addressing based on the PCIe message and the balanced binary tree.

[0079] In the above embodiments, because a dynamic balanced binary tree based on address range is used and can be implemented using SRAM, significant savings in area and power consumption are achieved compared to CAM. Furthermore, since a balanced binary tree is used, it eliminates the need for one-to-one comparisons between PCIe packet addresses and the address range of each function; instead, a maximum of log2(N) comparisons are required, where N is the total number of functions. This significantly improves performance compared to one-to-one comparisons.

[0080] In some embodiments, obtaining the downward comparison direction based on the current node according to the address space range corresponding to the target node and the address space range corresponding to the current node includes: if the lower limit of the address space range corresponding to the current node is greater than the upper limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the left direction; if the upper limit of the address space range corresponding to the current node is less than the lower limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the right direction.

[0081] like Figure 2 As shown, at the beginning of the comparison, the current node is the root node C of the balanced binary tree. The address space range corresponding to the target node is compared with the address space range corresponding to C. If the upper limit of the target node is less than c_min, the downward comparison direction based on node C is determined to be left. If the lower limit of the target node is greater than c_max, the downward comparison direction based on node C is determined to be right.

[0082] In the above embodiments, because a dynamic balanced binary tree based on address range is used and can be implemented using SRAM, significant savings in area and power consumption are achieved compared to CAM. Furthermore, since a balanced binary tree is used, it eliminates the need for one-to-one comparisons between PCIe packet addresses and the address range of each function; instead, a maximum of log2(N) comparisons are required, where N is the total number of functions. This significantly improves performance compared to one-to-one comparisons.

[0083] In some embodiments, updating the current node includes: determining the left child node of the current node as the current node when the downward comparison direction is left; and determining the right child node of the current node as the current node when the downward comparison direction is right.

[0084] Specifically, such as Figure 2 As shown, at the beginning of the comparison, the current node is the root node C of the balanced binary tree. If the downward comparison direction is determined to be left, it can be determined whether C has child nodes in the left direction. And... Figure 2 In the given scenario, node C has a child node B to its left. Therefore, node B, the left child of node C, can be identified as the current node. If the downward comparison direction is determined to be to the right, then it can be determined whether C has a child node to its right. And... Figure 2 In the given scenario, node C has a child node to its right, namely node A. Therefore, node A, the right child of node C, can be identified as the current node.

[0085] In the above embodiments, because a dynamic balanced binary tree based on address range is used and can be implemented using SRAM, significant savings in area and power consumption are achieved compared to CAM. Furthermore, since a balanced binary tree is used, it eliminates the need for one-to-one comparisons between PCIe packet addresses and the address range of each function; instead, a maximum of log2(N) comparisons are required, where N is the total number of functions. This significantly improves performance compared to one-to-one comparisons.

[0086] In some embodiments, determining whether a balanced binary tree meets the adjustment conditions includes: obtaining the height difference corresponding to each node in the balanced binary tree, where the height difference is the absolute value of the difference between the height of the left subtree and the height of the right subtree of the node; if there exists a node with a height difference greater than 1, then the balanced binary tree is determined to meet the adjustment conditions; otherwise, the balanced binary tree is determined not to meet the adjustment conditions.

[0087] Specifically, such as Figure 4 As shown. Figure 4 The values ​​under function A, function B, and function C represent the height differences between the corresponding nodes. Figure 4 visible, Figure 4 The height difference corresponding to the middle node C is 2, which is greater than 1, thus it can be determined that... Figure 4 The balanced binary tree in the data satisfies the adjustment condition.

[0088] In the above embodiments, because a dynamic balanced binary tree based on address range is used and can be implemented using SRAM, significant savings in area and power consumption are achieved compared to CAM. Furthermore, since a balanced binary tree is used, it eliminates the need for one-to-one comparisons between PCIe packet addresses and the address range of each function; instead, a maximum of log2(N) comparisons are required, where N is the total number of functions. This significantly improves performance compared to one-to-one comparisons.

[0089] In some embodiments, adjusting the balanced binary tree includes: traversing the balanced binary tree from bottom to top, finding the first node where the height difference is greater than 1, and using it as the discovery node;

[0090] If the target node is to the left of the left subtree of the discovered node, then rotate the discovered node clockwise. If the left child node of the discovered node has a right child node, then adjust the right child node to become the left child node of the discovered node.

[0091] If the target node is to the right of the right subtree of the discovered node, then rotate the discovered node counterclockwise. If the right child node of the discovered node has a left child node, then adjust the left child node to become the right child node of the discovered node.

[0092] If the target node is to the right of the left subtree of the discovered node, then the left child node and the right subtree of the left child node of the discovered node are rotated counterclockwise. If the left child node of the discovered node has a left child node, then the target node is made the right child node of the left child node of the discovered node, and the discovered node is rotated clockwise. If the left child node of the discovered node does not have a left child node, then the discovered node is rotated clockwise.

[0093] If the target node is to the left of the right subtree of the discovered node, then rotate the right child node and the left subtree of the right child node of the discovered node clockwise, rotate the discovered node counterclockwise, and adjust the target node to be the right child node of the discovered node.

[0094] Specifically, such as Figure 5 As shown, taking node F as the target node, Figure 5 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 5 In the attached diagram on the left, only node B has a height difference of 2, thus node B can be considered the discovery node. The target node F is located to the left of the left subtree of discovery node B (i.e., the subtree rooted at node D). At this point, node D can be used as a pivot point, and node B can be rotated clockwise to obtain... Figure 5 The attached diagram on the right shows a balanced binary tree. At this point, it is found that node B's left child node D does not have a right child node, therefore... Figure 5 The attached diagram on the right shows the adjusted balanced binary tree.

[0095] The above process identifies the case where a node's left child node does not have a right child node. However, another situation exists. For example... Figure 6 As shown, taking node F as the target node, Figure 6 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 6 In the attached diagram on the left, only node A has a height difference of 2, so node A can be considered the discovery node. Then, we can use node B, the left child node of discovery node A, as the fulcrum and rotate discovery node A clockwise to obtain the following result: Figure 6 The tree structure shown in the upper right corner. In this tree structure, node B has 3 child nodes, which is not a binary tree. Therefore, node E needs to be adjusted. Node E is the right child node of node B, which is the left child of node A. This can be done as follows: Figure 6 As shown in the bottom right diagram, node E is designated as the left child of node A, thus... Figure 6 The attached diagram in the lower right corner shows the adjusted balanced binary tree. Figure 5 and Figure 6This refers to the case where the target node is located to the left of the left subtree of the discovered node.

[0096] like Figure 7 As shown, taking node F as the target node, Figure 7 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 7 In the attached diagram on the left, only node B has a height difference of 2, thus node B can be considered the discovery node. The target node F is located to the right of the right subtree of discovery node B (i.e., the subtree rooted at node D). Therefore, node D can be used as a pivot point, and node B can be rotated counterclockwise to obtain... Figure 7 The attached diagram on the right shows a balanced binary tree. At this point, it is found that node B's right child node D does not have a left child node, therefore... Figure 7 The attached diagram on the right shows the adjusted balanced binary tree.

[0097] The above process identifies the case where a node's right child node does not have a left child node. However, another situation exists. For example... Figure 8 As shown, taking node F as the target node, Figure 8 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 8 In the attached diagram on the left, only node A has a height difference of 2, so node A can be considered the discovery node. Then, we can use node C, the right child node of the discovery node A, as the fulcrum and rotate node A clockwise to obtain the following result: Figure 8 The tree structure shown in the upper right corner. In this tree structure, node C has 3 child nodes, which is not a binary tree. Therefore, node D needs to be adjusted. Node D is the right child of node C, which is the right child of node A. This can be done as follows: Figure 8 As shown in the attached diagram in the lower right corner, node D is designated as the right child node of the discovered node A, thus... Figure 8 The attached diagram in the lower right corner shows the adjusted balanced binary tree. Figure 7 and Figure 8 This refers to the case where the target node is located to the right of the right subtree of the discovered node.

[0098] like Figure 9 As shown, taking node F as the target node, Figure 9 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 9In the attached diagram on the left, only node B has a height difference of 2, so node B can be considered the discovery node. The target node F is located to the right of the left subtree of discovery node B (i.e., the subtree rooted at node D). Therefore, we can rotate the left child node D of discovery node B and its right subtree (i.e., node F) counterclockwise to obtain... Figure 9 The binary tree structure shown in the middle. Since the left child node D of the discovered node B has no left child node, we can directly rotate the discovered node B clockwise to obtain... Figure 9 The balanced binary tree shown on the right.

[0099] Figure 9 This illustrates a scenario where the target node is located to the right of the left subtree of the discovering node. However, another scenario exists. For example... Figure 10 As shown, taking node F as the target node, Figure 10 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 10 In the attached diagram on the left, only node A has a height difference of 2, so node A can be considered the discovery node. At this point, we can perform a counter-clockwise rotation on the left child node B of the discovery node A and the right subtree of the left child node B (i.e., the subtree composed of nodes E and F), resulting in the following... Figure 10 The binary tree structure shown in the upper right corner. Since the left child node B of the discovered node A has a left child node D, the target node F is set as the right child node of the left child node B of the discovered node A. Figure 10 The binary tree structure shown in the upper right corner. Rotating the discovered node clockwise yields... Figure 10 The balanced binary tree shown in the bottom right corner. Figure 9 and Figure 10 This refers to the case where the target node is located to the right of the left subtree of the discovered node.

[0100] like Figure 11 As shown, taking node F as the target node, Figure 11 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 11 In the attached diagram on the left, only node B has a height difference of 2, so node B can be considered the discovery node. The target node F is located to the right of the right subtree of discovery node B (i.e., the subtree rooted at node D). Therefore, we can rotate the right child node D of discovery node B and its left subtree (i.e., node F) clockwise to obtain... Figure 9 The binary tree structure shown in the middle. Rotating node B counter-clockwise, we obtain... Figure 11The balanced binary tree shown on the right. Since node B has no left child, no further adjustments are needed.

[0101] Figure 11 This illustrates a scenario where the target node is located to the left of the right subtree of the discovering node. However, another scenario exists. For example... Figure 12 As shown, taking node F as the target node, Figure 12 The left-hand diagram shows the binary tree after node F has been inserted. Traverse the balanced binary tree from bottom to top, searching for the first node where the height difference is greater than 1. Figure 12 In the attached diagram on the left, only node A has a height difference of 2, so node A can be considered the discovery node. At this point, we can rotate the right child node B of the discovery node A and the left subtree of the right child node B (i.e., the subtree composed of nodes D and F) clockwise to obtain the following... Figure 10 The binary tree structure is shown in the upper right corner. Rotating the discovered node A counter-clockwise, since discovered node A has a left child node C, the target node F can be adjusted to be the right child node of the discovered node, thus obtaining... Figure 10 The balanced binary tree shown in the bottom right corner. Figure 11 and Figure 12 This refers to the case where the target node is located to the left of the right subtree of the discovered node.

[0102] In the above embodiments, because a dynamic balanced binary tree based on address range is used and can be implemented using SRAM, significant savings in area and power consumption are achieved compared to CAM. Furthermore, since a balanced binary tree is used, it eliminates the need for one-to-one comparisons between PCIe packet addresses and the address range of each function; instead, a maximum of log2(N) comparisons are required, where N is the total number of functions. This significantly improves performance compared to one-to-one comparisons.

[0103] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0104] Based on the same inventive concept, this application also provides an address space management device for implementing the address space management method described above. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more address space management device embodiments provided below can be found in the limitations of the address space management method described above, and will not be repeated here.

[0105] In one embodiment, such as Figure 13 As shown, an address space management device is provided, including: an acquisition module 1302, a construction module 1304, and an addressing module 1306, wherein:

[0106] The acquisition module 1302 is used to acquire the address space range allocated to each created function supported by the processing chip.

[0107] Module 1304 is used to treat each address space range as a node and construct a balanced binary tree based on all nodes.

[0108] The addressing module 1306 is used to perform addressing based on the PCIe message and the balanced binary tree when a PCIe message is received from the host.

[0109] In some embodiments, the construction module 1304 is configured to, for a target node to be inserted into the balanced binary tree, determine the downward comparison direction based on the address space range corresponding to the target node and the address space range corresponding to the current node in the balanced binary tree, and determine whether the current node has a child node in the downward comparison direction. If it does, the current node is updated, and the above determination, judgment and update process is repeated until it is determined that the current node has no child node in the downward comparison direction. The target node is then added to the balanced binary tree as a child node of the current node in the downward comparison direction. The root node of the balanced binary tree is used as the initial current node. The module is also configured to determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, the balanced binary tree is adjusted.

[0110] In some embodiments, the construction module 1304 is further configured to determine the downward comparison direction based on the current node as the left direction if the lower limit of the address space range corresponding to the current node is greater than the upper limit of the address space range corresponding to the target node; and to determine the downward comparison direction based on the current node as the right direction if the upper limit of the address space range corresponding to the current node is less than the lower limit of the address space range corresponding to the target node.

[0111] In some embodiments, the construction module 1304 is further configured to determine the left child node of the current node as the current node when the downward comparison direction is left; and to determine the right child node of the current node as the current node when the downward comparison direction is right.

[0112] In some embodiments, the construction module 1304 is further configured to obtain the height difference corresponding to each node in the balanced binary tree, wherein the height difference is the absolute value of the difference between the height of the left subtree and the height of the right subtree of the node; if there is a node whose height difference is greater than 1, then the balanced binary tree is determined to meet the adjustment condition; otherwise, the balanced binary tree is determined not to meet the adjustment condition.

[0113] In some embodiments, the construction module 1304 is further configured to traverse the balanced binary tree from bottom to top, find the node where the height difference is greater than 1 for the first time, and designate it as the discovery node; if the target node is to the left of the left subtree of the discovery node, the discovery node is rotated clockwise; if the left child node of the discovery node has a right child node, the right child node is adjusted to become the left child node of the discovery node; if the target node is to the right of the right subtree of the discovery node, the discovery node is rotated counterclockwise; if the right child node of the discovery node has a left child node, the left child node is adjusted to become the right .... If the target node is to the right, rotate the left child node and the right subtree of the discovered node counterclockwise. If the left child node of the discovered node has a left child node, make the target node the right child node of the left child node of the discovered node and rotate the discovered node clockwise. If the left child node of the discovered node does not have a left child node, rotate the discovered node clockwise. If the target node is to the left of the right subtree of the discovered node, rotate the right child node and the left subtree of the right child node of the discovered node clockwise and rotate the discovered node counterclockwise. If the discovered node has a left child node, adjust the target node to be the right child node of the discovered node.

[0114] Each module in the aforementioned address space management device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0115] In some embodiments, a processing chip is provided for executing the method steps provided in any of the method embodiments described above.

[0116] In some embodiments, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 14As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores address space range data. The network interface communicates with external terminals via a network connection. When the computer program is executed by the processor, it implements an address space management method.

[0117] Those skilled in the art will understand that Figure 14 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0118] In some embodiments, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to perform the following steps: obtaining the allocated address space range corresponding to each created function supported by the processing chip; treating each address space range as a node and constructing a balanced binary tree based on all nodes; and, upon receiving a PCIe message sent by a host, performing addressing based on the PCIe message and the balanced binary tree.

[0119] In some embodiments, when the processor executes a computer program, it further performs the following steps:

[0120] For a target node to be inserted into a balanced binary tree, the downward comparison direction based on the address space range of the target node and the address space range of the current node in the balanced binary tree is determined. It is then determined whether the current node has a child node in the downward comparison direction. If it does, the current node is updated. The above process of determining, judging, and updating is repeated until it is determined that the current node has no child node in the downward comparison direction. The target node is then added to the balanced binary tree as a child node of the current node in the downward comparison direction. The root node of the balanced binary tree is used as the initial current node.

[0121] Determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, adjust the balanced binary tree.

[0122] In some embodiments, when the processor executes a computer program, it further performs the following steps:

[0123] For a target node to be inserted into a balanced binary tree, the downward comparison direction based on the address space range of the target node and the address space range of the current node in the balanced binary tree is determined. It is then determined whether the current node has a child node in the downward comparison direction. If it does, the current node is updated. The above process of determining, judging, and updating is repeated until it is determined that the current node has no child node in the downward comparison direction. The target node is then added to the balanced binary tree as a child node of the current node in the downward comparison direction. The root node of the balanced binary tree is used as the initial current node.

[0124] Determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, adjust the balanced binary tree.

[0125] In some embodiments, when the processor executes a computer program, it further performs the following steps:

[0126] If the lower limit of the address space range corresponding to the current node is greater than the upper limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the left direction; if the upper limit of the address space range corresponding to the current node is less than the lower limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the right direction.

[0127] In some embodiments, when the processor executes a computer program, it further performs the following steps:

[0128] If the downward comparison direction is to the left, the left child node of the current node is determined as the current node;

[0129] If the downward comparison direction is to the right, the right child node of the current node is determined as the current node.

[0130] In some embodiments, when the processor executes a computer program, it further performs the following steps:

[0131] Get the height difference for each node in a balanced binary tree. The height difference is the absolute value of the difference between the height of the left subtree and the height of the right subtree of the node.

[0132] If there exists a node with a height difference greater than 1, then the balanced binary tree is determined to meet the adjustment condition; otherwise, the balanced binary tree is determined not to meet the adjustment condition.

[0133] In some embodiments, when the processor executes a computer program, it further performs the following steps:

[0134] Traverse the balanced binary tree from bottom to top, find the first node with a height difference greater than 1, and use it as the discovery node;

[0135] If the target node is to the left of the left subtree of the discovered node, then rotate the discovered node clockwise. If the left child node of the discovered node has a right child node, then adjust the right child node to become the left child node of the discovered node.

[0136] If the target node is to the right of the right subtree of the discovered node, then rotate the discovered node counterclockwise. If the right child node of the discovered node has a left child node, then adjust the left child node to become the right child node of the discovered node.

[0137] If the target node is to the right of the left subtree of the discovered node, then the left child node and the right subtree of the left child node of the discovered node are rotated counterclockwise. If the left child node of the discovered node has a left child node, then the target node is made the right child node of the left child node of the discovered node, and the discovered node is rotated clockwise. If the left child node of the discovered node does not have a left child node, then the discovered node is rotated clockwise.

[0138] If the target node is to the left of the right subtree of the discovered node, then rotate the right child node and the left subtree of the right child node of the discovered node clockwise, and rotate the discovered node counterclockwise. If the discovered node has a left child node, then adjust the target node to be the right child node of the discovered node.

[0139] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, performs the following steps: obtaining the allocated address space range corresponding to each created function supported by the processing chip; treating each address space range as a node and constructing a balanced binary tree based on all nodes; and, upon receiving a PCIe message sent by a host, performing addressing based on the PCIe message and the balanced binary tree.

[0140] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0141] For a target node to be inserted into a balanced binary tree, the downward comparison direction based on the address space range of the target node and the address space range of the current node in the balanced binary tree is determined. It is then determined whether the current node has a child node in the downward comparison direction. If it does, the current node is updated. The above process of determining, judging, and updating is repeated until it is determined that the current node has no child node in the downward comparison direction. The target node is then added to the balanced binary tree as a child node of the current node in the downward comparison direction. The root node of the balanced binary tree is used as the initial current node.

[0142] Determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, adjust the balanced binary tree.

[0143] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0144] If the lower limit of the address space range corresponding to the current node is greater than the upper limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the left direction; if the upper limit of the address space range corresponding to the current node is less than the lower limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the right direction.

[0145] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0146] If the downward comparison direction is to the left, the left child node of the current node is determined as the current node;

[0147] If the downward comparison direction is to the right, the right child node of the current node is determined as the current node.

[0148] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0149] Get the height difference for each node in a balanced binary tree. The height difference is the absolute value of the difference between the height of the left subtree and the height of the right subtree of the node.

[0150] If there exists a node with a height difference greater than 1, then the balanced binary tree is determined to meet the adjustment condition; otherwise, the balanced binary tree is determined not to meet the adjustment condition.

[0151] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0152] Traverse the balanced binary tree from bottom to top, find the first node with a height difference greater than 1, and use it as the discovery node;

[0153] If the target node is to the left of the left subtree of the discovered node, then rotate the discovered node clockwise. If the left child node of the discovered node has a right child node, then adjust the right child node to become the left child node of the discovered node.

[0154] If the target node is to the right of the right subtree of the discovered node, then rotate the discovered node counterclockwise. If the right child node of the discovered node has a left child node, then adjust the left child node to become the right child node of the discovered node.

[0155] If the target node is to the right of the left subtree of the discovered node, then the left child node and the right subtree of the left child node of the discovered node are rotated counterclockwise. If the left child node of the discovered node has a left child node, then the target node is made the right child node of the left child node of the discovered node, and the discovered node is rotated clockwise. If the left child node of the discovered node does not have a left child node, then the discovered node is rotated clockwise.

[0156] If the target node is to the left of the right subtree of the discovered node, then rotate the right child node and the left subtree of the right child node of the discovered node clockwise, and rotate the discovered node counterclockwise. If the discovered node has a left child node, then adjust the target node to be the right child node of the discovered node.

[0157] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, performs the following steps: obtaining the allocated address space range corresponding to each created function supported by the processing chip; treating each address space range as a node and constructing a balanced binary tree based on all nodes; and, upon receiving a PCIe message sent by a host, performing addressing based on the PCIe message and the balanced binary tree.

[0158] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0159] For a target node to be inserted into a balanced binary tree, the downward comparison direction based on the address space range of the target node and the address space range of the current node in the balanced binary tree is determined. It is then determined whether the current node has a child node in the downward comparison direction. If it does, the current node is updated. The above process of determining, judging, and updating is repeated until it is determined that the current node has no child node in the downward comparison direction. The target node is then added to the balanced binary tree as a child node of the current node in the downward comparison direction. The root node of the balanced binary tree is used as the initial current node.

[0160] Determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, adjust the balanced binary tree.

[0161] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0162] If the lower limit of the address space range corresponding to the current node is greater than the upper limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the left direction; if the upper limit of the address space range corresponding to the current node is less than the lower limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the right direction.

[0163] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0164] If the downward comparison direction is to the left, the left child node of the current node is determined as the current node;

[0165] If the downward comparison direction is to the right, the right child node of the current node is determined as the current node.

[0166] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0167] Get the height difference for each node in a balanced binary tree. The height difference is the absolute value of the difference between the height of the left subtree and the height of the right subtree of the node.

[0168] If there exists a node with a height difference greater than 1, then the balanced binary tree is determined to meet the adjustment condition; otherwise, the balanced binary tree is determined not to meet the adjustment condition.

[0169] In some embodiments, when a computer program is executed by a processor, it further performs the following steps:

[0170] Traverse the balanced binary tree from bottom to top, find the first node with a height difference greater than 1, and use it as the discovery node;

[0171] If the target node is to the left of the left subtree of the discovered node, then rotate the discovered node clockwise. If the left child node of the discovered node has a right child node, then adjust the right child node to become the left child node of the discovered node.

[0172] If the target node is to the right of the right subtree of the discovered node, then rotate the discovered node counterclockwise. If the right child node of the discovered node has a left child node, then adjust the left child node to become the right child node of the discovered node.

[0173] If the target node is to the right of the left subtree of the discovered node, then the left child node and the right subtree of the left child node of the discovered node are rotated counterclockwise. If the left child node of the discovered node has a left child node, then the target node is made the right child node of the left child node of the discovered node, and the discovered node is rotated clockwise. If the left child node of the discovered node does not have a left child node, then the discovered node is rotated clockwise.

[0174] If the target node is to the left of the right subtree of the discovered node, then rotate the right child node and the left subtree of the right child node of the discovered node clockwise, and rotate the discovered node counterclockwise. If the discovered node has a left child node, then adjust the target node to be the right child node of the discovered node.

[0175] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0176] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0177] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An address space management method, characterized by, The method includes: Obtain the address space range allocated to each created function supported by the processing chip; Treating each address space range as a node, for a target node to be inserted into the balanced binary tree, the downward comparison direction based on the current node is determined by comparing the upper limit of the address space range corresponding to the target node with the lower limit of the address space range corresponding to the current node in the balanced binary tree, and by comparing the lower limit of the address space range corresponding to the target node with the upper limit of the address space range corresponding to the current node in the balanced binary tree. Determine whether the current node has child nodes in the downward comparison direction; if so, update the current node. Repeat the above process of determining, judging and updating until it is determined that the current node has no child node in the downward comparison direction. Then add the target node as the child node of the current node in the downward comparison direction to the balanced binary tree. Upon receiving a PCIe message from the host, addressing is performed based on the PCIe message and the balanced binary tree.

2. The method of claim 1, wherein, The root node of the balanced binary tree is used as the current node initially; the method further includes: Determine whether the balanced binary tree meets the adjustment conditions. If the balanced binary tree meets the adjustment conditions, adjust the balanced binary tree.

3. The method of claim 1, wherein, Determining the downward comparison direction based on the current node includes: If the lower limit of the address space range corresponding to the current node is greater than the upper limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the left direction; if the upper limit of the address space range corresponding to the current node is less than the lower limit of the address space range corresponding to the target node, then the downward comparison direction based on the current node is determined to be the right direction.

4. The method of claim 3, wherein, Updating the current node includes: If the downward comparison direction is to the left, the left child node of the current node is determined as the current node; If the downward comparison direction is to the right, the right child node of the current node is determined as the current node.

5. The method of claim 2, wherein, The determination of whether the balanced binary tree meets the adjustment conditions includes: Obtain the height difference corresponding to each node in the balanced binary tree. The height difference is the absolute value of the difference between the height of the left subtree and the height of the right subtree of the node. If there exists a node with a height difference greater than 1, then the balanced binary tree is determined to meet the adjustment condition; otherwise, the balanced binary tree is determined not to meet the adjustment condition.

6. The method of claim 5, wherein, The adjustment of the balanced binary tree includes: Traverse the balanced binary tree from bottom to top, find the first node with a height difference greater than 1, and use it as the discovery node; If the target node is to the left of the left subtree of the discovery node, then the discovery node is rotated clockwise. If the left child node of the discovery node has a right child node, then the right child node is adjusted to become the left child node of the discovery node. If the target node is to the right of the right subtree of the discovery node, then the discovery node is rotated counterclockwise. If the right child node of the discovery node has a left child node, then the left child node is adjusted to become the right child node of the discovery node. If the target node is to the right of the left subtree of the discovery node, then the left child node and the right subtree of the discovery node are rotated counterclockwise. If the left child node of the discovery node has a left child node, then the target node is taken as the right child node of the left child node of the discovery node, and the discovery node is rotated clockwise. If the left child node of the discovery node does not have a left child node, then the discovery node is rotated clockwise. If the target node is to the left of the right subtree of the discovery node, then the right child node and the left subtree of the right child node of the discovery node are rotated clockwise, and the discovery node is rotated counterclockwise. If the discovery node has a left child node, then the target node is adjusted to be the right child node of the discovery node.

7. An address space management apparatus characterized by comprising: The device includes: The acquisition module is used to acquire the address space range allocated to each created function supported by the processing chip; The construction module treats each address space range as a node. For a target node to be inserted into a balanced binary tree, it determines the downward comparison direction based on the target node by comparing the upper limit of the address space range corresponding to the target node with the lower limit of the address space range corresponding to the current node in the balanced binary tree, and by comparing the lower limit of the address space range corresponding to the target node with the upper limit of the address space range corresponding to the current node in the balanced binary tree. It then determines whether the current node has child nodes in the downward comparison direction. If so, it updates the current node. The above determination, judgment, and update process is repeated until it is determined that the current node has no child nodes in the downward comparison direction. Finally, the target node is added to the balanced binary tree as a child node of the current node in the downward comparison direction. The addressing module is used to perform addressing based on the PCIe message and the balanced binary tree when a PCIe message is received from the host.

8. A processing chip, comprising: The processing chip is used to perform the steps of the method according to any one of claims 1 to 6.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

11. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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